diff --git a/Drivers/BSP/B-G474E-DPOW1 b/Drivers/BSP/B-G474E-DPOW1
index 0aa2479b9..613cadac3 160000
--- a/Drivers/BSP/B-G474E-DPOW1
+++ b/Drivers/BSP/B-G474E-DPOW1
@@ -1 +1 @@
-Subproject commit 0aa2479b9f76cd44642da350145d7a7c7a205261
+Subproject commit 613cadac3efb423728879c983026f7b670daa8ca
diff --git a/Drivers/BSP/STM32G474E-EVAL b/Drivers/BSP/STM32G474E-EVAL
index b11b3e163..62cc481d4 160000
--- a/Drivers/BSP/STM32G474E-EVAL
+++ b/Drivers/BSP/STM32G474E-EVAL
@@ -1 +1 @@
-Subproject commit b11b3e16399d5349e5df9f7621dd06609b0ddd33
+Subproject commit 62cc481d461da7bb88551eb4f6eba8bfff2cadcf
diff --git a/Drivers/CMSIS/Device/ST/STM32G4xx b/Drivers/CMSIS/Device/ST/STM32G4xx
index 318b2055d..f4ee39995 160000
--- a/Drivers/CMSIS/Device/ST/STM32G4xx
+++ b/Drivers/CMSIS/Device/ST/STM32G4xx
@@ -1 +1 @@
-Subproject commit 318b2055d41b6daf503073dcfb5b392ca907ceb4
+Subproject commit f4ee399953e3b5c437788526e93b10efa5fad4fa
diff --git a/Drivers/STM32G4xx_HAL_Driver b/Drivers/STM32G4xx_HAL_Driver
index 0ca931d91..63c724f62 160000
--- a/Drivers/STM32G4xx_HAL_Driver
+++ b/Drivers/STM32G4xx_HAL_Driver
@@ -1 +1 @@
-Subproject commit 0ca931d9159a7b83e48beffc06ad4984d33a3963
+Subproject commit 63c724f62a299f976ab8e413865f439cf0402168
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/Release_Notes.html b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/Release_Notes.html
index cf2076982..a5d4e2de5 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/Release_Notes.html
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/Release_Notes.html
@@ -21,7 +21,8 @@
 <div class="row">
 <div class="col-sm-12 col-lg-4">
 <center>
-<h1 id="release-notes-for-stm32-usb-c-power-delivery-g4-device-driver">Release Notes for STM32 USB-C Power Delivery G4 Device Driver</h1>
+<h1 id="release-notes-for">Release Notes for</h1>
+<h1 id="stm32-usb-c-power-delivery-g4-device-driver"><mark>STM32 USB-C Power Delivery G4 Device Driver</mark></h1>
 <p>Copyright © 2019 STMicroelectronics<br />
 </p>
 <a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
@@ -37,7 +38,7 @@ <h1 id="purpose">Purpose</h1>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history">Update History</h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section13" checked aria-hidden="true"> <label for="collapse-section13" aria-hidden="true">v5.3.0 / 27-Jan-2023</label>
+<input type="checkbox" id="collapse-section14" checked aria-hidden="true"> <label for="collapse-section14" aria-hidden="true">v5.3.1 / 09-Nov-2023</label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
 <h3 id="maintenance-release">Maintenance release</h3>
@@ -51,6 +52,48 @@ <h2 id="contents">Contents</h2>
 </thead>
 <tbody>
 <tr class="odd">
+<td style="text-align: left;">Protect DMA intitialization function</td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">Block Fast Role Swap detection when Power Delivery is not activated</td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">Add management of DRP low power</td>
+</tr>
+</tbody>
+</table>
+<h2 id="known-limitations">Known Limitations</h2>
+<p>Outstanding bugs list : None</p>
+<p>Requirements not met or planned in a forthcoming release : None</p>
+<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
+<ul>
+<li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6</li>
+<li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li>
+<li>STM32CubeIDE V1.8.0</li>
+</ul>
+<h2 id="supported-devices-and-boards">Supported Devices and boards</h2>
+<p>All STM32G4xx devices embedding USBPD IP</p>
+<h2 id="backward-compatibility">Backward compatibility</h2>
+<p>No compatibility break with previous version</p>
+<h2 id="dependencies">Dependencies</h2>
+<p>This software release is compatible with USB-C Power Delivery Core Stack Library v4.1.0 or higher</p>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section13" aria-hidden="true"> <label for="collapse-section13" aria-hidden="true">v5.3.0 / 27-Jan-2023</label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<h3 id="maintenance-release-1">Maintenance release</h3>
+<h2 id="contents-1">Contents</h2>
+<p><strong>Fixed bugs list</strong></p>
+<table>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Headline</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
 <td style="text-align: left;">Align function name to official FRS BSP service</td>
 </tr>
 <tr class="even">
@@ -82,29 +125,29 @@ <h2 id="contents">Contents</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations">Known Limitations</h2>
+<h2 id="known-limitations-1">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li>
 <li>STM32CubeIDE V1.8.0</li>
 </ul>
-<h2 id="supported-devices-and-boards">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility">Backward compatibility</h2>
+<h2 id="backward-compatibility-1">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies">Dependencies</h2>
+<h2 id="dependencies-1">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v4.1.0 or higher</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true">v5.2.0 / 13-December-2021</label>
 <div>
-<h2 id="main-changes-1">Main Changes</h2>
-<h3 id="maintenance-release-1">Maintenance release</h3>
-<h2 id="contents-1">Contents</h2>
+<h2 id="main-changes-2">Main Changes</h2>
+<h3 id="maintenance-release-2">Maintenance release</h3>
+<h2 id="contents-2">Contents</h2>
 <p><strong>Fixed bugs list</strong></p>
 <table>
 <thead>
@@ -124,29 +167,29 @@ <h2 id="contents-1">Contents</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-1">Known Limitations</h2>
+<h2 id="known-limitations-2">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li>
 <li>STM32CubeIDE V1.7.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-1">Backward compatibility</h2>
+<h2 id="backward-compatibility-2">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-1">Dependencies</h2>
+<h2 id="dependencies-2">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v4.0.0 or higher</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true">v5.1.0 / 06-Jul-2021</label>
 <div>
-<h2 id="main-changes-2">Main Changes</h2>
-<h3 id="maintenance-release-2">Maintenance release</h3>
-<h2 id="contents-2">Contents</h2>
+<h2 id="main-changes-3">Main Changes</h2>
+<h3 id="maintenance-release-3">Maintenance release</h3>
+<h2 id="contents-3">Contents</h2>
 <p><strong>Fixed bugs list</strong></p>
 <table>
 <thead>
@@ -169,29 +212,29 @@ <h2 id="contents-2">Contents</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-2">Known Limitations</h2>
+<h2 id="known-limitations-3">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li>
 <li>STM32CubeIDE V1.7.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-3">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-2">Backward compatibility</h2>
+<h2 id="backward-compatibility-3">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-2">Dependencies</h2>
+<h2 id="dependencies-3">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v4.0.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">v5.0.0 / 26-Nov-2020</label>
 <div>
-<h2 id="main-changes-3">Main Changes</h2>
-<h3 id="maintenance-release-3">Maintenance release</h3>
-<h2 id="contents-3">Contents</h2>
+<h2 id="main-changes-4">Main Changes</h2>
+<h3 id="maintenance-release-4">Maintenance release</h3>
+<h2 id="contents-4">Contents</h2>
 <p><strong>Fixed bugs list</strong></p>
 <table>
 <thead>
@@ -214,28 +257,28 @@ <h2 id="contents-3">Contents</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-3">Known Limitations</h2>
+<h2 id="known-limitations-4">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27</li>
 <li>STM32CubeIDE V1.4.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-3">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-4">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-3">Backward compatibility</h2>
+<h2 id="backward-compatibility-4">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-3">Dependencies</h2>
+<h2 id="dependencies-4">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v3.3.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">v4.1.0 / 17-Sep-2020</label>
 <div>
-<h2 id="main-changes-4">Main Changes</h2>
-<h3 id="maintenance-release-4">Maintenance release</h3>
+<h2 id="main-changes-5">Main Changes</h2>
+<h3 id="maintenance-release-5">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -263,28 +306,28 @@ <h3 id="maintenance-release-4">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-4">Known Limitations</h2>
+<h2 id="known-limitations-5">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27</li>
 <li>STM32CubeIDE V1.2.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-4">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-5">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-4">Backward compatibility</h2>
+<h2 id="backward-compatibility-5">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-4">Dependencies</h2>
+<h2 id="dependencies-5">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v3.2.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true">V4.0.1 / 6-June-2020</label>
 <div>
-<h2 id="main-changes-5">Main Changes</h2>
-<h3 id="maintenance-release-5">Maintenance release</h3>
+<h2 id="main-changes-6">Main Changes</h2>
+<h3 id="maintenance-release-6">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -300,27 +343,27 @@ <h3 id="maintenance-release-5">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-5">Known Limitations</h2>
+<h2 id="known-limitations-6">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27</li>
 <li>STM32CubeIDE V1.2.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-5">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-6">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-5">Backward compatibility</h2>
-<h2 id="dependencies-5">Dependencies</h2>
+<h2 id="backward-compatibility-6">Backward compatibility</h2>
+<h2 id="dependencies-6">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v3.0.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">V4.0.0 / 26-Mar-2020</label>
 <div>
-<h2 id="main-changes-6">Main Changes</h2>
-<h3 id="maintenance-release-6">Maintenance release</h3>
+<h2 id="main-changes-7">Main Changes</h2>
+<h3 id="maintenance-release-7">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -345,28 +388,28 @@ <h3 id="maintenance-release-6">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-6">Known Limitations</h2>
+<h2 id="known-limitations-7">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-7">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27</li>
 <li>STM32CubeIDE V1.2.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-6">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-7">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-6">Backward compatibility</h2>
+<h2 id="backward-compatibility-7">Backward compatibility</h2>
 <p>Implementation of CR Ticket 81963 and Ticket 81964 leads to some interface changes between USBPD Core and USBPD Device driver modules. In order to use this version of USBPD Device driver module, please ensure version of USBPD Core module is v3.0.0 or higher.</p>
-<h2 id="dependencies-6">Dependencies</h2>
+<h2 id="dependencies-7">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v3.0.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section8"  aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">v3.1.0 / 04-Feb-2020</label>
 <div>
-<h2 id="main-changes-7">Main Changes</h2>
-<h3 id="maintenance-release-7">Maintenance release</h3>
+<h2 id="main-changes-8">Main Changes</h2>
+<h3 id="maintenance-release-8">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -391,28 +434,28 @@ <h3 id="maintenance-release-7">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-7">Known Limitations</h2>
+<h2 id="known-limitations-8">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-7">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-8">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27</li>
 <li>STM32CubeIDE v1.2.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-7">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-8">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-7">Backward compatibility</h2>
+<h2 id="backward-compatibility-8">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-7">Dependencies</h2>
+<h2 id="dependencies-8">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v2.9.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section7"  aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V3.0.0 / 20-Dec-2019</label>
 <div>
-<h2 id="main-changes-8">Main Changes</h2>
-<h3 id="maintenance-release-8">Maintenance release</h3>
+<h2 id="main-changes-9">Main Changes</h2>
+<h3 id="maintenance-release-9">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -443,29 +486,29 @@ <h3 id="maintenance-release-8">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-8">Known Limitations</h2>
+<h2 id="known-limitations-9">Known Limitations</h2>
 <p>Outstanding bugs list :</p>
 <p>Identified issue on LeCroy test 4.10.2 regarding remaining VBUS voltage when externally powered. TC 4.10.2 OK requires either a Resistor value change on G4 EVAL board (MB1397) or an update in BSP drivers =&gt; [EVAL-G4] UCPD VBUS value when 5V external supply connected</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-8">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-9">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.26</li>
 <li>STM32CubeIDE v1.2.0</li>
 </ul>
-<h2 id="supported-devices-and-boards-8">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-9">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-8">Backward compatibility</h2>
+<h2 id="backward-compatibility-9">Backward compatibility</h2>
 <p>Application needs to provide new interface to manage introduction of dynamic voltage (USBPD_PWR_IF_GetVBUSStatus function).</p>
-<h2 id="dependencies-8">Dependencies</h2>
+<h2 id="dependencies-9">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v2.9.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V2.8.0 / 06-May-2019</label>
 <div>
-<h2 id="main-changes-9">Main Changes</h2>
-<h3 id="maintenance-release-9">Maintenance release</h3>
+<h2 id="main-changes-10">Main Changes</h2>
+<h3 id="maintenance-release-10">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -490,28 +533,28 @@ <h3 id="maintenance-release-9">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-9">Known Limitations</h2>
+<h2 id="known-limitations-10">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-9">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-10">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25</li>
 <li>System Workbench STM32 (SW4STM32) toolchain V2.7.2</li>
 </ul>
-<h2 id="supported-devices-and-boards-9">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-10">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-9">Backward compatibility</h2>
+<h2 id="backward-compatibility-10">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-9">Dependencies</h2>
+<h2 id="dependencies-10">Dependencies</h2>
 <p>This software release is compatible with USB-C Power Delivery Core Stack Library v2.6.0</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V2.7.0 / 25-Mar-2019</label>
 <div>
-<h2 id="main-changes-10">Main Changes</h2>
-<h3 id="maintenance-release-10">Maintenance release</h3>
+<h2 id="main-changes-11">Main Changes</h2>
+<h3 id="maintenance-release-11">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -533,28 +576,28 @@ <h3 id="maintenance-release-10">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-10">Known Limitations</h2>
+<h2 id="known-limitations-11">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-10">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-11">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25</li>
 <li>System Workbench STM32 (SW4STM32) toolchain V2.7.2</li>
 </ul>
-<h2 id="supported-devices-and-boards-10">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-11">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-10">Backward compatibility</h2>
+<h2 id="backward-compatibility-11">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-10">Dependencies</h2>
+<h2 id="dependencies-11">Dependencies</h2>
 <p>NA</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true">V2.6.0 / 23-Jan-2019</label>
 <div>
-<h2 id="main-changes-11">Main Changes</h2>
-<h3 id="maintenance-release-11">Maintenance release</h3>
+<h2 id="main-changes-12">Main Changes</h2>
+<h3 id="maintenance-release-12">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -570,28 +613,28 @@ <h3 id="maintenance-release-11">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-11">Known Limitations</h2>
+<h2 id="known-limitations-12">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-11">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-12">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25</li>
 <li>System Workbench STM32 (SW4STM32) toolchain V2.7.2</li>
 </ul>
-<h2 id="supported-devices-and-boards-11">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-12">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-11">Backward compatibility</h2>
+<h2 id="backward-compatibility-12">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-11">Dependencies</h2>
+<h2 id="dependencies-12">Dependencies</h2>
 <p>NA</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V2.5.0 / 10-Dec-2018</label>
 <div>
-<h2 id="main-changes-12">Main Changes</h2>
-<h3 id="maintenance-release-12">Maintenance release</h3>
+<h2 id="main-changes-13">Main Changes</h2>
+<h3 id="maintenance-release-13">Maintenance release</h3>
 <table>
 <thead>
 <tr class="header">
@@ -604,27 +647,27 @@ <h3 id="maintenance-release-12">Maintenance release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-12">Known Limitations</h2>
+<h2 id="known-limitations-13">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-12">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-13">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25</li>
 <li>System Workbench STM32 (SW4STM32) toolchain V2.7.2</li>
 </ul>
-<h2 id="supported-devices-and-boards-12">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-13">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-12">Backward compatibility</h2>
+<h2 id="backward-compatibility-13">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-12">Dependencies</h2>
+<h2 id="dependencies-13">Dependencies</h2>
 <p>NA</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V2.4.0 / 15-Nov-2018</label>
 <div>
-<h2 id="main-changes-13">Main Changes</h2>
+<h2 id="main-changes-14">Main Changes</h2>
 <h3 id="initial-release">Initial release</h3>
 <table>
 <thead>
@@ -647,20 +690,20 @@ <h3 id="initial-release">Initial release</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-13">Known Limitations</h2>
+<h2 id="known-limitations-14">Known Limitations</h2>
 <p>Outstanding bugs list : None</p>
 <p>Requirements not met or planned in a forthcoming release : None</p>
-<h2 id="development-toolchains-and-compilers-13">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-14">Development Toolchains and Compilers</h2>
 <ul>
 <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2</li>
 <li>Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25</li>
 <li>System Workbench STM32 (SW4STM32) toolchain V2.7.2</li>
 </ul>
-<h2 id="supported-devices-and-boards-13">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-14">Supported Devices and boards</h2>
 <p>All STM32G4xx devices embedding USBPD IP</p>
-<h2 id="backward-compatibility-13">Backward compatibility</h2>
+<h2 id="backward-compatibility-14">Backward compatibility</h2>
 <p>No compatibility break with previous version</p>
-<h2 id="dependencies-13">Dependencies</h2>
+<h2 id="dependencies-14">Dependencies</h2>
 <p>NA</p>
 </div>
 </div>
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h
index 901480db0..e7200c02a 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h
@@ -52,10 +52,10 @@ extern "C" {
       usbpd_hw.c
 -------------------------------------------------------------------------------*/
 
-/* defined used to configure function : USBPD_HW_GetUSPDInstance */
+/* Define used to configure function : USBPD_HW_GetUSPDInstance */
 #define UCPD_INSTANCE0 UCPD1
 
-/* defined used to configure function : USBPD_HW_Init_DMARxInstance,USBPD_HW_DeInit_DMARxInstance */
+/* Define used to configure function : USBPD_HW_Init_DMARxInstance,USBPD_HW_DeInit_DMARxInstance */
 #define UCPDDMA_INSTANCE0_CLOCKENABLE_RX                   \
   do                                                       \
   {                                                        \
@@ -71,7 +71,7 @@ extern "C" {
 
 #define UCPDDMA_INSTANCE0_CHANNEL_RX   DMA1_Channel5
 
-/* defined used to configure function : USBPD_HW_Init_DMATxInstance, USBPD_HW_DeInit_DMATxInstance */
+/* Define used to configure function : USBPD_HW_Init_DMATxInstance, USBPD_HW_DeInit_DMATxInstance */
 #define UCPDDMA_INSTANCE0_CLOCKENABLE_TX                   \
   do                                                       \
   {                                                        \
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h
index c88610000..73ab9fe35 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h
@@ -16,8 +16,13 @@
   ******************************************************************************
   */
 
-#ifndef USBPD_HW_H
-#define USBPD_HW_H
+#ifndef __USBPD_HW_H_
+#define __USBPD_HW_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* Includes ------------------------------------------------------------------*/
 /* Private typedef -----------------------------------------------------------*/
 /* Variable containing ADC conversions results */
@@ -30,5 +35,9 @@ DMA_Channel_TypeDef *USBPD_HW_Init_DMATxInstance(uint8_t PortNum);
 void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum);
 uint32_t USBPD_HW_GetRpResistorValue(uint8_t Portnum);
 void USBPD_HW_SetFRSSignalling(uint8_t Portnum, uint8_t cc);
-#endif /* USBPD_BSP_HW_H */
 
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_HW_H_ */
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c
index 3fa97c265..9fba1debe 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c
@@ -112,11 +112,11 @@ typedef struct
   uint32_t                           CAD_tDebounceAcc_flag  : 1;
   uint32_t                           CAD_ErrorRecoveryflag  : 1;
   uint32_t                           CAD_ResistorUpdateflag : 1;
-  USBPD_CAD_STATE                    cstate                 : 5; /* current state  */
+  USBPD_CAD_STATE                    cstate                 : 5; /* Current state  */
   uint32_t                           CAD_Accessory_SRC      : 1;
   uint32_t                           CAD_Accessory_SNK      : 1;
   uint32_t                           reserved               : 1;
-  USBPD_CAD_STATE                    pstate                 : 5; /* previous state */
+  USBPD_CAD_STATE                    pstate                 : 5; /* Previous state */
 #if defined(USBPDCORE_VPD)
   uint32_t                           CAD_VPD_SRC            : 1;
   uint32_t                           CAD_VPD_SNK            : 1;
@@ -136,8 +136,8 @@ typedef struct
   */
 
 /* Private define ------------------------------------------------------------*/
-#define CAD_TPDDEBOUCE_THRESHOLD         12u          /**< tPDDebounce threshold between 10 to 20ms           */
-#define CAD_TCCDEBOUCE_THRESHOLD         120u         /**< tCCDebounce threshold between 100 to 200ms         */
+#define CAD_TPDDEBOUNCE_THRESHOLD        12u          /**< tPDDebounce threshold between 10 to 20ms           */
+#define CAD_TCCDEBOUNCE_THRESHOLD        120u         /**< tCCDebounce threshold between 100 to 200ms         */
 #define CAD_TSRCDISCONNECT_THRESHOLD     2u           /**< tSRCDisconnect detach threshold between 0 to 20ms  */
 #define CAD_INFINITE_TIME                0xFFFFFFFFu  /**< infinite time to wait a new interrupt event        */
 #define CAD_TERROR_RECOVERY_TIME         26u          /**< tErrorRecovery min 25ms                            */
@@ -160,7 +160,7 @@ typedef struct
 /* Private macro -------------------------------------------------------------*/
 
 /* Private variables ---------------------------------------------------------*/
-/* handle to manage the detection state machine */
+/* Handle to manage the detection state machine */
 static CAD_HW_HandleTypeDef CAD_HW_Handles[USBPD_PORT_COUNT];
 
 /* Private function prototypes -----------------------------------------------*/
@@ -175,7 +175,7 @@ static void CAD_Check_HW_SRC(uint8_t PortNum);
 static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX);
 static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX);
 static uint32_t ManageStateDetached_SNK(uint8_t PortNum);
-static void CAD_Check_HW_SNK(uint8_t PortNum);
+static void     CAD_Check_HW_SNK(uint8_t PortNum);
 #endif /* _DRP || _SNK */
 
 #if defined(_DRP)
@@ -228,10 +228,10 @@ void CAD_HW_IF_VBUSDetectCallback(uint32_t PortNum,
   */
 
 /**
-  * @brief  function to initialize the cable detection state machine
-  * @param  PortNum       port
+  * @brief  Function to initialize the cable detection state machine
+  * @param  PortNum       Port number
   * @param  pSettings     Pointer on PD settings based on @ref USBPD_SettingsTypeDef
-  * @param  pParams       Pointer on PD params based on @ref USBPD_ParamsTypeDef
+  * @param  pParams       Pointer on PD parameters based on @ref USBPD_ParamsTypeDef
   * @param  WakeUp        Wake-up callback function used for waking up CAD
   * @retval None
   */
@@ -245,14 +245,16 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
   Ports[PortNum].params->RpResistor = Ports[PortNum].settings->CAD_DefaultResistor;
   Ports[PortNum].params->SNKExposedRP_AtAttach = vRd_Undefined;
 
+  /* Reset handle */
   memset(_handle, 0, sizeof(CAD_HW_HandleTypeDef));
 
+  /* Register CAD wake up callback */
   Ports[PortNum].USBPD_CAD_WakeUp = WakeUp;
 
   /* Initialize the USBPD_IP */
   Ports[PortNum].husbpd = USBPD_HW_GetUSPDInstance(PortNum);
 
-  /* Initialize usbpd */
+  /* Initialize UCPD */
   LL_UCPD_StructInit(&settings);
   (void)LL_UCPD_Init(Ports[PortNum].husbpd, &settings);
   LL_UCPD_SetRxOrderSet(Ports[PortNum].husbpd,
@@ -267,6 +269,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
   LL_UCPD_WakeUpEnable(Ports[PortNum].husbpd);
 #endif /* _LOW_POWER */
 
+  /* Disable dead battery */
   LL_PWR_DisableUCPDDeadBattery(); /* PWR->CR3 |= (1 << 14); */
   LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); /* GPIOB enable RCC->AHB2ENR |= 2; */
 
@@ -317,6 +320,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
 #if defined(_DRP)
   if (Ports[PortNum].settings->CAD_RoleToggle == USBPD_TRUE)
   {
+    /* Set current state machine to DRP state machine */
     _handle->CAD_PtrStateMachine = CAD_StateMachine_DRP;
     _handle->CAD_Accessory_SRC = Ports[PortNum].settings->CAD_AccesorySupport;
 #if defined(USBPDCORE_VPD)
@@ -327,8 +331,10 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
 #endif /* _DRP */
   {
 #if defined(_SRC)
+    /* If default role is source */
     if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].settings->PE_DefaultRole)
     {
+      /* Set current state machine to SRC state machine */
       _handle->CAD_PtrStateMachine = CAD_StateMachine_SRC;
       _handle->CAD_Accessory_SRC = Ports[PortNum].settings->CAD_AccesorySupport;
 #if defined(USBPDCORE_VPD)
@@ -339,6 +345,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
 #endif /* _SRC */
     {
 #if defined(_SNK)
+      /* Set current state machine to SNK state machine */
       _handle->CAD_PtrStateMachine = CAD_StateMachine_SNK;
       _handle->CAD_Accessory_SNK = Ports[PortNum].settings->CAD_AccesorySupport;
 #if defined(USBPDCORE_VPD)
@@ -349,8 +356,10 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
   }
 #else  /* USBPDCORE_LIB_NO_PD */
 #if defined(_SRC)
+  /* If default role is source */
   if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].settings->PE_DefaultRole)
   {
+    /* Set current state machine to SRC state machine */
     _handle->CAD_PtrStateMachine = CAD_StateMachine_SRC;
 #if defined(USBPDCORE_VPD)
     _handle->CAD_VPD_SRC = Ports[PortNum].settings->CAD_VPDSupport;
@@ -360,6 +369,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
 #endif /* _SRC */
   {
 #if defined(_SNK)
+    /* Set current state machine to SNK state machine */
     _handle->CAD_PtrStateMachine = CAD_StateMachine_SNK;
 #if defined(USBPDCORE_VPD)
     _handle->CAD_VPD_SNK = Ports[PortNum].settings->CAD_VPDSupport;
@@ -370,22 +380,23 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
 }
 
 /**
-  * @brief  function to force CAD state machine into error recovery state
+  * @brief  Function to force CAD state machine into error recovery state
   * @param  PortNum Index of current used port
   * @retval None
   */
 void CAD_Enter_ErrorRecovery(uint8_t PortNum)
 {
-  /* remove the ucpd resistor */
+  /* Remove the ucpd resistor */
   USBPDM1_EnterErrorRecovery(PortNum);
-  /* set the error recovery flag to allow the stack to switch into errorRecovery Flag */
+  /* Set the error recovery flag to allow the stack to switch into errorRecovery Flag */
   CAD_HW_Handles[PortNum].CAD_ErrorRecoveryflag = USBPD_TRUE;
+  /* Wake up CAD task */
   Ports[PortNum].USBPD_CAD_WakeUp();
 }
 
 #if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC)
 /**
-  * @brief  function to force the value of the RP resistor
+  * @brief  Function to force the value of the RP resistor
   * @note   Must be called only if you want change the settings value
   * @param  PortNum Index of current used port
   * @param  RpValue RP value to set in devices based on @ref CAD_RP_Source_Current_Adv_Typedef
@@ -393,11 +404,12 @@ void CAD_Enter_ErrorRecovery(uint8_t PortNum)
   */
 uint32_t CAD_SRC_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue)
 {
-  /* update the information about the default resistor value presented in detach mode */
+  /* Update the information about the default resistor value presented in detach mode */
   Ports[PortNum].params->RpResistor = RpValue;
 
-  /* inform state machine about a resistor update */
+  /* Inform state machine about a resistor update */
   CAD_HW_Handles[PortNum].CAD_ResistorUpdateflag = USBPD_TRUE;
+  /* Wake up CAD task */
   Ports[PortNum].USBPD_CAD_WakeUp();
   return 0;
 }
@@ -411,14 +423,14 @@ uint32_t CAD_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef R
 
 
 /**
-  * @brief  CAD State machine
+  * @brief  CAD State machine for sink role
   * @param  PortNum Port
   * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
   * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
   * @retval Timeout value
   */
 #if defined(_SNK)
-/* function to handle SNK and SNK  + ACCESSORY OPTION */
+/* Function to handle SNK and SNK  + ACCESSORY OPTION */
 uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -428,7 +440,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
   BSP_USBPD_PWR_VCCSetState(PortNum, 1);
 #endif /* USBPDM1_VCC_FEATURE_ENABLED */
 
-  /*Check CAD STATE*/
+  /* Check CAD STATE */
   switch (_handle->cstate)
   {
     case USBPD_CAD_STATE_DETACHED:
@@ -502,8 +514,8 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
       {
         case LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRA :      /* Audio accessory */
         {
-          /* check if the device is still connected after the debouce timing */
-          if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUCE_THRESHOLD)
+          /* Check if the device is still connected after the debounce timing */
+          if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUNCE_THRESHOLD)
           {
             _handle->cstate = USBPD_CAD_STATE_AUDIO_ACCESSORY;
             *pEvent = USBPD_CAD_EVENT_ACCESSORY;
@@ -514,7 +526,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
         case  LL_UCPD_SRC_CC1_VRD | LL_UCPD_SRC_CC2_VRA:   /* VPD CC1 */
         case  LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRD:   /* VPD CC2 */
         {
-          if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUCE_THRESHOLD)
+          if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUNCE_THRESHOLD)
           {
             _handle->cstate = USBPD_CAD_STATE_POWERED_ACCESSORY;
             *pEvent = USPPD_CAD_EVENT_VPD;
@@ -536,7 +548,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
 #endif /* USBPDCORE_VPD */
         default :
         {
-          if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > CAD_TCCDEBOUCE_THRESHOLD)
+          if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > CAD_TCCDEBOUNCE_THRESHOLD)
           {
             /* Get the time of this event */
             _handle->CAD_tToggle_start = HAL_GetTick();
@@ -551,7 +563,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
 
     case USBPD_CAD_STATE_AUDIO_ACCESSORY:
     {
-      /* check if the device is still connected after the debouce timing */
+      /* Check if the device is still connected after the debounce timing */
       if ((LL_UCPD_SRC_CC1_VRA != (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1))
           && (LL_UCPD_SRC_CC2_VRA != (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2)))
       {
@@ -559,11 +571,11 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
         {
           _handle->CAD_tDebounce_start = HAL_GetTick();
           _handle->CAD_tDebounce_flag = USBPD_TRUE;
-          _timing = CAD_TCCDEBOUCE_THRESHOLD + 49U;
+          _timing = CAD_TCCDEBOUNCE_THRESHOLD + 49U;
         }
         else
         {
-          if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > (CAD_TCCDEBOUCE_THRESHOLD + 50U))
+          if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > (CAD_TCCDEBOUNCE_THRESHOLD + 50U))
           {
             _handle->CAD_tToggle_start = HAL_GetTick();
             _handle->CAD_tDebounce_flag = USBPD_FALSE;
@@ -589,7 +601,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
       uint32_t cc;
       cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2);
 
-      /* if SRC.Open detected on the monitored PIN switch to Unattached.SNK */
+      /* If SRC.Open detected on the monitored PIN switch to Unattached.SNK */
       if (((CC1 == _handle->cc) && (LL_UCPD_SRC_CC1_OPEN == (cc & UCPD_SR_TYPEC_VSTATE_CC1))) ||
           ((CC2 == _handle->cc) && (LL_UCPD_SRC_CC2_OPEN == (cc & UCPD_SR_TYPEC_VSTATE_CC2))))
       {
@@ -610,12 +622,12 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
           USBPDM1_AssertRd(PortNum);
           Ports[PortNum].params->PE_VPDStatus = VPD_NONE;
         }
-        /* if the port is PD but doesn't enter Alternate mode within tAMETimeout switch to Unsupported.Accessory */
+        /* If the port is PD but doesn't enter Alternate mode within tAMETimeout switch to Unsupported.Accessory */
         else if (VPD_FAILED_ENTER_ALTERNATE == Ports[PortNum].params->CAD_VPDStatus)
         {
           _handle->cstate = USBPD_CAD_STATE_UNSUPPORTED_ACCESSORY;
         }
-        /* if Powered USB DEvice confirmed transition to CTUnattached.SNK */
+        /* If Powered USB DEvice confirmed transition to CTUnattached.SNK */
         else if (VPD_DETECTED == Ports[PortNum].params->CAD_VPDStatus)
         {
           _handle->cstate = USBPD_CAD_STATE_CTVPD_UNATTACHED;
@@ -629,7 +641,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
       uint32_t cc;
       cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2);
 
-      /* if SRC.Open detected on the monitored PIN switch to Unattached.SNK */
+      /* If SRC.Open detected on the monitored PIN switch to Unattached.SNK */
       if ((LL_UCPD_SRC_CC1_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC1)) ||
           (LL_UCPD_SRC_CC2_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC2)))
       {
@@ -645,7 +657,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
     {
       if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_VSAFE5V)) /* Check if Vbus is on */
       {
-        /* the charger/SRC has been plug */
+        /* The charger/SRC has been plug */
         _handle->cstate = USBPD_CAD_STATE_CTVPD_ATTACHED;
       }
       else
@@ -653,7 +665,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
         uint32_t cc;
         cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2);
 
-        /* if VBUS is VSafe0V and CC low for tVPDDetach = 10/20ms */
+        /* If VBUS is VSafe0V and CC low for tVPDDetach = 10/20ms */
         if (((LL_UCPD_SRC_CC1_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC1)) ||
              (LL_UCPD_SRC_CC2_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC2))) &&
             (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_BELOWVSAFE0V)))
@@ -683,10 +695,10 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
 
     case USBPD_CAD_STATE_CTVPD_ATTACHED:
     {
-      /* if VBUS removed */
+      /* If VBUS removed */
       if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_SNKDETACH))
       {
-        /* the charger/SRC has been unplug */
+        /* The charger/SRC has been unplug */
         _handle->cstate = USBPD_CAD_STATE_CTVPD_UNATTACHED;
       }
       break;
@@ -707,7 +719,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
     case USBPD_CAD_STATE_ATTACHED:
     case USBPD_CAD_STATE_ERRORRECOVERY :
     case USBPD_CAD_STATE_ERRORRECOVERY_EXIT:
-      /* nothing to do, the VCC must stay high */
+      /* Nothing to do, the VCC must stay high */
       break;
     default :
       BSP_USBPD_PWR_VCCSetState(PortNum, 0);
@@ -720,7 +732,13 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
 #endif /* _SNK */
 
 #if defined(_SRC)
-/* function to handle SRC */
+/**
+  * @brief  CAD State machine for source role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 uint32_t CAD_StateMachine_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -813,7 +831,13 @@ uint32_t CAD_StateMachine_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
 #endif /* _SRC */
 
 #if defined(_DRP)
-/* function to handle DRP */
+/**
+  * @brief  CAD State machine for dual role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 uint32_t CAD_StateMachine_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -921,14 +945,22 @@ uint32_t CAD_StateMachine_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
 #endif /* _DRP */
 
 #if !defined(USBPDCORE_LIB_NO_PD)
+/**
+  * @brief  Main CAD State machine
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
   uint32_t _timing = CAD_DEFAULT_TIME;
 
-  /* set by default event to none */
+  /* Set by default event to none */
   *pEvent = USBPD_CAD_EVENT_NONE;
 
+  /* If a swap is on going, return default timing */
   if (USBPD_TRUE == Ports[PortNum].params->PE_SwapOngoing)
   {
     return _timing;
@@ -949,16 +981,20 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
     case USBPD_CAD_STATE_RESET:
     {
 #if !defined(_LOW_POWER) && !defined(USBPDM1_VCC_FEATURE_ENABLED)
+      /* Enable TypeCEvents Interrupts */
       LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
       LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
 #elif defined(_LOW_POWER)
+      /* If port role is source */
       if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
       {
+        /* Enable TypeCEvents Interrupts */
         LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
         LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
       }
 #endif /* !_LOW_POWER && !USBPDM1_VCC_FEATURE_ENABLED */
 
+      /* Enable IRQ */
       UCPD_INSTANCE0_ENABLEIRQ;
 #if defined(_DRP) || defined(_ACCESSORY_SNK)
       _handle->CAD_tToggle_start = HAL_GetTick();
@@ -973,13 +1009,13 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
       /* Enter recovery = Switch to SRC with no resistor */
       USBPDM1_EnterErrorRecovery(PortNum);
 
-      /* forward detach event to DPM */
+      /* Forward detach event to DPM */
       Ports[PortNum].CCx = CCNONE;
       *pCCXX = CCNONE;
       _handle->cc = CCNONE;
       *pEvent = USBPD_CAD_EVENT_DETACHED;
 
-      /* start tErrorRecovery timeout */
+      /* Start tErrorRecovery timeout */
       _handle->CAD_tDebounce_start = HAL_GetTick();
       _timing = CAD_TERROR_RECOVERY_TIME;
       _handle->cstate = USBPD_CAD_STATE_ERRORRECOVERY_EXIT;
@@ -990,7 +1026,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
     {
       if ((HAL_GetTick() - _handle->CAD_tDebounce_start) >  CAD_TERROR_RECOVERY_TIME)
       {
-        /* reconfigure the port
+        /* Reconfigure the port
         port source  to src
         port snk     to snk
         port drp     to src   */
@@ -1009,7 +1045,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
           USBPDM1_AssertRd(PortNum);
         }
 #endif /* _SNK || _DRP */
-        /* switch to state detach */
+        /* Switch to state detach */
 #if defined(_DRP) || defined(_ACCESSORY_SNK)
         _handle->CAD_tToggle_start = HAL_GetTick();
 #endif /* _DRP || _ACCESSORY_SNK */
@@ -1020,7 +1056,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
 
     default:
     {
-      /* call the state machine corresponding to the port SNK or SRC or DRP */
+      /* Call the state machine corresponding to the port SNK or SRC or DRP */
       _timing = _handle->CAD_PtrStateMachine(PortNum, pEvent, pCCXX);
       break;
     }
@@ -1051,12 +1087,19 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
 
 #else
 /* USBPDCORE_LIB_NO_PD */
+/**
+  * @brief  Main CAD State machine
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
   uint32_t _timing = CAD_DEFAULT_TIME;
 
-  /* set by default event to none */
+  /* Set by default event to none */
   *pEvent = USBPD_CAD_EVENT_NONE;
 
   switch (_handle->cstate)
@@ -1064,16 +1107,20 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
     case USBPD_CAD_STATE_RESET:
     {
 #ifndef _LOW_POWER
+      /* Enable TypeCEvents Interrupts */
       LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
       LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
 #else
+      /* If port role is source */
       if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
       {
+        /* Enable TypeCEvents Interrupts */
         LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
         LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
       }
 #endif /* !_LOW_POWER */
 
+      /* Enable IRQ */
       UCPD_INSTANCE0_ENABLEIRQ;
 #if defined(_DRP) || defined(_ACCESSORY_SNK)
       _handle->CAD_tToggle_start = HAL_GetTick();
@@ -1084,7 +1131,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
 
     default:
     {
-      /* call the state machine corresponding to the port SNK or SRC or DRP */
+      /* Call the state machine corresponding to the port SNK or SRC or DRP */
       _timing = _handle->CAD_PtrStateMachine(PortNum, pEvent, pCCXX);
       break;
     }
@@ -1122,16 +1169,16 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
   * @{
   */
 
+#if defined(_DRP) || defined(_SNK)
 /**
   * @brief  Check CCx HW condition
-  * @param  PortNum                     port
+  * @param  PortNum Port
   * @retval none
   */
-#if defined(_DRP) || defined(_SNK)
 void CAD_Check_HW_SNK(uint8_t PortNum)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
-  /* done to prevent code optimization issue with GCC */
+  /* Done to prevent code optimization issue with GCC */
   uint32_t CC1_value;
   uint32_t CC2_value;
 
@@ -1189,6 +1236,11 @@ void CAD_Check_HW_SNK(uint8_t PortNum)
 #endif /* _DRP || _SNK */
 
 #if defined(_DRP) || defined(_SRC)
+/**
+  * @brief  Check CCx HW condition
+  * @param  PortNum Port
+  * @retval none
+  */
 void CAD_Check_HW_SRC(uint8_t PortNum)
 {
 #if !defined(_RTOS)
@@ -1196,7 +1248,7 @@ void CAD_Check_HW_SRC(uint8_t PortNum)
   uint32_t CC2_value_temp;
 #endif /* !_RTOS */
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
-  /* done to prevent code optimization issue with GCC */
+  /* Done to prevent code optimization issue with GCC */
   uint32_t CC1_value;
   uint32_t CC2_value;
 
@@ -1213,9 +1265,25 @@ void CAD_Check_HW_SRC(uint8_t PortNum)
   | 1: Sink   |                   |             |xx vRa|vRdUSB| vRd1.5 |vRd3.0|
   -----------------------------------------------------------------------------
   */
+#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED)
+  /* Enable type C state machine */
+  CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS);
+
+  for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++)
+  {
+    __DSB();
+  };
+
+  /* Read the CC line */
+  CC1_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos;
+  CC2_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos;
 
+  /* Disable the C state machine */
+  SET_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS);
+#else
   CC1_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos;
   CC2_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos;
+#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */
 
 #if !defined(_RTOS)
   /* Workaround linked to issue with Ellisys test TD.PC.E5
@@ -1251,6 +1319,11 @@ void CAD_Check_HW_SRC(uint8_t PortNum)
 #endif /* _DRP || _SRC */
 
 #if defined(_DRP) || defined(_SNK)
+/**
+  * @brief  Manage the detached state for sink role
+  * @param  PortNum Port
+  * @retval Timeout value
+  */
 static uint32_t ManageStateDetached_SNK(uint8_t PortNum)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1261,7 +1334,7 @@ static uint32_t ManageStateDetached_SNK(uint8_t PortNum)
   if (_handle->CurrentHWcondition == HW_Detachment)
   {
 #if defined(_LOW_POWER)
-    /* value returned by a SRC or a SINK */
+    /* Value returned by a SRC or a SINK */
     _timing = CAD_DETACH_POLLING; /* 100ms in the sink cases */
 #elif defined(USBPDM1_VCC_FEATURE_ENABLED)
     _timing = CAD_DEFAULT_TIME;
@@ -1312,6 +1385,11 @@ static uint32_t ManageStateDetached_SNK(uint8_t PortNum)
 #endif /* _DRP || _SNK */
 
 #if defined(_SRC) || defined(_DRP)
+/**
+  * @brief  Manage the detached state for source role
+  * @param  PortNum Port
+  * @retval Timeout value
+  */
 static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1319,11 +1397,11 @@ static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
 
   if (_handle->CAD_ResistorUpdateflag == USBPD_TRUE)
   {
-    /* update the resistor value */
+    /* Update the resistor value */
     USBPDM1_AssertRp(PortNum);
     _handle->CAD_ResistorUpdateflag = USBPD_FALSE;
 
-    /* let time to internal state machine update */
+    /* Let time to internal state machine update */
     HAL_Delay(1);
   }
 
@@ -1331,8 +1409,8 @@ static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
   /* Change the status on the basis of the HW event given by CAD_Check_HW() */
   if (_handle->CurrentHWcondition == HW_Detachment)
   {
-#ifdef _LOW_POWER
-    /* value returned for a SRC */
+#if defined(_LOW_POWER)
+    /* Value returned for a SRC */
     _timing = CAD_DETACH_POLLING;
 #else
     _timing = CAD_INFINITE_TIME;
@@ -1358,6 +1436,11 @@ static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
 #endif /* _SRC || _DRP */
 
 #if defined(_DRP)
+/**
+  * @brief  Manage the detached state for dual role
+  * @param  PortNum Port
+  * @retval Timeout value
+  */
 static uint32_t ManageStateDetached_DRP(uint8_t PortNum)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1407,10 +1490,17 @@ static uint32_t ManageStateDetached_DRP(uint8_t PortNum)
 #endif /* _DRP */
 
 #if defined(_DRP) || defined(_SRC)
+/**
+  * @brief  Manage the attached wait state for source role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
-  uint32_t _timing = 2;
+  uint32_t _timing = CAD_DEFAULT_TIME;
 
   /* Evaluate elapsed time in Attach_Wait state */
   uint32_t CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start;
@@ -1420,13 +1510,13 @@ static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pE
   {
     if (USBPD_FALSE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_BELOWVSAFE0V))
     {
-      /* reset the timing because VBUS threshold not yet reach */
+      /* Reset the timing because VBUS threshold not yet reach */
       _handle->CAD_tDebounce_start = HAL_GetTick();
-      return CAD_TCCDEBOUCE_THRESHOLD;
+      return CAD_TCCDEBOUNCE_THRESHOLD;
     }
 
     /* Check tCCDebounce */
-    if (CAD_tDebounce > CAD_TCCDEBOUCE_THRESHOLD)
+    if (CAD_tDebounce > CAD_TCCDEBOUNCE_THRESHOLD)
     {
       switch (_handle->CurrentHWcondition)
       {
@@ -1468,16 +1558,16 @@ static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pE
           _handle->cstate             = USBPD_CAD_STATE_DETACH_SRC;
 #endif /* _ACCESSORY_SRC */
           break;
-      } /* end of switch */
+      } /* End of switch */
       *pCCXX = _handle->cc;
-      _timing = 2;
+      _timing = CAD_DEFAULT_TIME;
     }
-    /* reset the flag for CAD_tDebounce */
+    /* Reset the flag for CAD_tDebounce */
     _handle->CAD_tDebounce_flag = USBPD_FALSE;
   }
   else /* CAD_HW_Condition[PortNum] = HW_Detachment */
   {
-    /* start counting of CAD_tDebounce */
+    /* Start counting of CAD_tDebounce */
     if (USBPD_FALSE == _handle->CAD_tDebounce_flag)
     {
       _handle->CAD_tDebounce_start  = HAL_GetTick();
@@ -1486,7 +1576,7 @@ static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pE
     }
     else /* CAD_tDebounce already running */
     {
-      /* evaluate CAD_tDebounce */
+      /* Evaluate CAD_tDebounce */
       CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start;
       if (CAD_tDebounce > CAD_TSRCDISCONNECT_THRESHOLD)
       {
@@ -1517,13 +1607,13 @@ static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_
     case HW_PwrCable_Sink_Attachment:
     case HW_Attachment :
       _handle->cstate = USBPD_CAD_STATE_ATTACHED_WAIT;
-      _handle->CAD_tDebounce_start = HAL_GetTick() - 5u;  /* this is only to check cable presence */
+      _handle->CAD_tDebounce_start = HAL_GetTick() - 5u;  /* This is only to check cable presence */
       BSP_USBPD_PWR_VBUSInit(PortNum);
-      _timing = 2;
+      _timing = CAD_DEFAULT_TIME;
       break;
     case HW_PwrCable_NoSink_Attachment:
     default :
-      /* nothing to do still the same status */
+      /* Nothing to do still the same status */
 #if defined(_DRP)
       if (USBPD_TRUE == Ports[PortNum].settings->CAD_RoleToggle)
       {
@@ -1534,7 +1624,7 @@ static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_
         _timing = 0;
       }
 #else
-      _timing = 2;
+      _timing = CAD_DEFAULT_TIME;
 #endif /* _DRP */
       break;
   }
@@ -1543,6 +1633,13 @@ static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_
 #endif /* _DRP || _SRC */
 
 #if defined(_DRP)
+/**
+  * @brief  Manage the attached state for dual role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 static uint32_t ManageStateAttached_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
@@ -1563,6 +1660,13 @@ static uint32_t ManageStateAttached_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
 #endif /* _DRP */
 
 #if defined(_DRP) || (defined(_ACCESSORY) && defined(_SNK))
+/**
+  * @brief  Manage the attached wait state for dual role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 static uint32_t ManageStateAttachedWait_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
@@ -1574,8 +1678,24 @@ static uint32_t ManageStateAttachedWait_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pE
 #endif /* _DRP || (_ACCESSORY && _SNK) */
 
 #if defined(_SRC) || defined(_DRP)
+/**
+  * @brief  Manage the attached state for source role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
+#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED)
+  /* Enable type C state machine */
+  CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS);
+
+  for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++)
+  {
+    __DSB();
+  };
+#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
   uint32_t _timing = CAD_DEFAULT_TIME;
 
@@ -1586,7 +1706,7 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
   /* Check if CC lines is opened or switch to debug accessory */
   if (comp != ccx)
   {
-    /* start counting of CAD_tDebounce */
+    /* Start counting of CAD_tDebounce */
     if (USBPD_FALSE == _handle->CAD_tDebounce_flag)
     {
       _handle->CAD_tDebounce_flag   = USBPD_TRUE;
@@ -1595,7 +1715,7 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
     }
     else /* CAD_tDebounce already running */
     {
-      /* evaluate CAD_tDebounce */
+      /* Evaluate CAD_tDebounce */
       uint32_t CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start;
       if (CAD_tDebounce > CAD_TSRCDISCONNECT_THRESHOLD)
       {
@@ -1607,7 +1727,7 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
         }
 #endif /* _DRP */
         _handle->CAD_tDebounce_flag = USBPD_FALSE;
-        /* move inside state DETACH to avoid wrong VCONN level*/
+        /* Move inside state DETACH to avoid wrong VCONN level*/
         _handle->cstate             = USBPD_CAD_STATE_DETACH_SRC;
         *pEvent                     = USBPD_CAD_EVENT_DETACHED;
         *pCCXX                      = CCNONE;
@@ -1619,7 +1739,11 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
   {
     /* Reset tPDDebounce flag*/
     _handle->CAD_tDebounce_flag   = USBPD_FALSE;
+#if  defined(_LOW_POWER)
+    _timing = CAD_VBUS_POLLING_TIME;
+#else
     _timing = CAD_INFINITE_TIME;
+#endif /* _LOW_POWER */
   }
 
   return _timing;
@@ -1627,6 +1751,13 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
 #endif /* _SRC || _DRP */
 
 #if defined(_SNK) || defined(_DRP)
+/**
+  * @brief  Manage the attached wait state for sink role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1636,11 +1767,12 @@ static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pE
   CAD_Check_HW_SNK(PortNum);
   if (_handle->CurrentHWcondition == HW_Attachment)
   {
-    if (CAD_tDebounce > CAD_TCCDEBOUCE_THRESHOLD)
+    if (CAD_tDebounce > CAD_TCCDEBOUNCE_THRESHOLD)
     {
       if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_VSAFE5V)) /* Check if Vbus is on */
       {
         HW_SignalAttachement(PortNum, _handle->cc);
+        /* Go to attached state */
         _handle->cstate = USBPD_CAD_STATE_ATTACHED;
         *pEvent = USBPD_CAD_EVENT_ATTACHED;
         *pCCXX = _handle->cc;
@@ -1650,17 +1782,17 @@ static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pE
   }
   else
   {
-    /* start counting of CAD_tDebounce */
+    /* Start counting of CAD_tDebounce */
     if (USBPD_FALSE == _handle->CAD_tDebounce_flag)
     {
       _handle->CAD_tDebounce_start = HAL_GetTick();
       _handle->CAD_tDebounce_flag = USBPD_TRUE;
-      _timing = CAD_TPDDEBOUCE_THRESHOLD;
+      _timing = CAD_TPDDEBOUNCE_THRESHOLD;
     }
     else /* CAD_tDebounce already running */
     {
-      /* evaluate CAD_tDebounce */
-      if ((HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TPDDEBOUCE_THRESHOLD))
+      /* Evaluate CAD_tDebounce */
+      if ((HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TPDDEBOUNCE_THRESHOLD))
       {
         _handle->CAD_tDebounce_flag = USBPD_FALSE;
         _handle->cstate             = USBPD_CAD_STATE_DETACHED;
@@ -1677,6 +1809,13 @@ static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pE
   return _timing;
 }
 
+/**
+  * @brief  Manage the attached state for sink role
+  * @param  PortNum Port
+  * @param  pEvent  Pointer on CAD event based on @ref USBPD_CAD_EVENT
+  * @param  pCCXX   Pointer on CC Pin based on @ref CCxPin_TypeDef
+  * @retval Timeout value
+  */
 static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
 {
   CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1732,9 +1871,16 @@ static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
 #endif /* _SNK || _DRP */
 
 #if defined(TCPP0203_SUPPORT)
+/**
+  * @brief  VBUS detect callback
+  * @param  PortNum Port
+  * @param  VBUSConnectionStatus   VBUS connection status, based on @ref USBPD_PWR_VBUSConnectionStatusTypeDef
+  * @retval None
+  */
 void CAD_HW_IF_VBUSDetectCallback(uint32_t PortNum,
                                   USBPD_PWR_VBUSConnectionStatusTypeDef VBUSConnectionStatus)
 {
+  /* If VBUS is connected */
   if (VBUSConnectionStatus == VBUS_CONNECTED)
   {
 #if defined(_TRACE)
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c
index 1b5d81942..8b4769fb7 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c
@@ -31,6 +31,7 @@ UCPD_TypeDef *USBPD_HW_GetUSPDInstance(uint8_t PortNum)
   return UCPD_INSTANCE0;
 }
 
+#if !defined(USBPDCORE_LIB_NO_PD)
 DMA_Channel_TypeDef *USBPD_HW_Init_DMARxInstance(uint8_t PortNum)
 {
   LL_DMA_InitTypeDef DMA_InitStruct;
@@ -92,6 +93,7 @@ void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum)
 {
   (void)PortNum;
 }
+#endif /* !USBPDCORE_LIB_NO_PD */
 
 uint32_t USBPD_HW_GetRpResistorValue(uint8_t PortNum)
 {
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c
index b6f00a133..16827a253 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c
@@ -117,7 +117,7 @@ USBPD_StatusTypeDef USBPD_PHY_Init(uint8_t PortNum, const USBPD_PHY_Callbacks *p
 {
   (void)PowerRole;
 
-  /* set all callbacks */
+  /* Set all callbacks */
   Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted            = pCallbacks->USBPD_PHY_TxCompleted;
   Ports[PortNum].cbs.USBPD_HW_IF_BistCompleted          = pCallbacks->USBPD_PHY_BistCompleted;
   Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication     = pCallbacks->USBPD_PHY_ResetIndication;
@@ -165,8 +165,8 @@ uint16_t USBPD_PHY_GetMinGOODCRCTimerValue(uint8_t PortNum)
 void USBPD_PHY_Reset(uint8_t PortNum)
 {
   (void)PortNum;
-  /* reset PHY layer   */
-  /* reset HW_IF layer */
+  /* Reset PHY layer   */
+  /* Reset HW_IF layer */
 }
 
 /**
@@ -322,13 +322,13 @@ void PHY_Rx_Completed(uint8_t PortNum, uint32_t MsgType)
 
   _msgtype = tab_sop_value[MsgType];
 
-  /* check if the message must be forwarded to usbpd stack */
+  /* Check if the message must be forwarded to usbpd stack */
   switch (_msgtype)
   {
     case USBPD_SOPTYPE_CABLE_RESET :
       if (0x1Eu == (PHY_Ports[PortNum].SupportedSOP & 0x1Eu))
       {
-        /* nothing to do the message will be discarded and the port partner retry the send */
+        /* Nothing to do the message will be discarded and the port partner retry the send */
         Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication(PortNum, USBPD_SOPTYPE_CABLE_RESET);
       }
       break;
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c
index 18d83c206..909b08fa3 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c
@@ -49,6 +49,7 @@ void USBPD_HW_IF_GlobalHwInit(void)
   /* PWR register access (for disabling dead battery feature) */
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
+
 }
 
 #if !defined(USBPDCORE_LIB_NO_PD)
@@ -146,6 +147,11 @@ void USBPD_HW_IF_Send_BIST_Pattern(uint8_t PortNum)
 }
 #endif /* !USBPDCORE_LIB_NO_PD */
 
+/**
+  * @brief  Assert Rp resistors
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPDM1_AssertRp(uint8_t PortNum)
 {
   switch (Ports[PortNum].params->RpResistor)
@@ -178,13 +184,22 @@ void USBPDM1_AssertRp(uint8_t PortNum)
   BSP_USBPD_PWR_SetRole(PortNum, POWER_ROLE_SOURCE);
 #endif /* TCPP0203_SUPPORT */
 }
-
+/**
+  * @brief  De-assert Rp resistors
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPDM1_DeAssertRp(uint8_t PortNum)
 {
-  /* not needed on STM32G4xx, so nothing to do, keep only for compatibility */
+  /* Not needed on STM32G4xx, so nothing to do, keep only for compatibility */
   UNUSED(PortNum);
 }
 
+/**
+  * @brief  Assert Rd resistors
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPDM1_AssertRd(uint8_t PortNum)
 {
   LL_UCPD_TypeCDetectionCC2Disable(Ports[PortNum].husbpd);
@@ -214,34 +229,55 @@ void USBPDM1_AssertRd(uint8_t PortNum)
 #endif /* TCPP0203_SUPPORT */
 }
 
+/**
+  * @brief  Assert Rd resistors
+  * @param  PortNum Port
+  * @retval none
+  */
 void USBPDM1_DeAssertRd(uint8_t PortNum)
 {
-  /* not needed on STM32G4xx, so nothing to do, keep only for compatibility */
+  /* Not needed on STM32G4xx, so nothing to do, keep only for compatibility */
   UNUSED(PortNum);
 }
 
+/**
+  * @brief  Enter error recovery
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPDM1_EnterErrorRecovery(uint8_t PortNum)
 {
   LL_UCPD_SetSRCRole(Ports[PortNum].husbpd);
   LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_NONE);
   LL_UCPD_RxDisable(Ports[PortNum].husbpd);
 
-#if defined(USBPD_REV30_SUPPORT)
+#if !defined(USBPDCORE_LIB_NO_PD)
   if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE)
   {
-    /* Set GPIO to disallow the FRSTX handling */
+    /* Set GPIO to disallow the FRS RX handling */
     LL_UCPD_FRSDetectionDisable(Ports[PortNum].husbpd);
   }
-#endif /* USBPD_REV30_SUPPORT */
+#endif /* USBPDCORE_LIB_NO_PD */
 }
 
+/**
+  * @brief  Set the correct CC pin on the comparator
+  * @param  PortNum Port
+  * @param  cc CC pin based on @ref CCxPin_TypeDef
+  * @retval None
+  */
 void USBPDM1_Set_CC(uint8_t PortNum, CCxPin_TypeDef cc)
 {
-  /* Set the correct pin on the comparator*/
+  /* Set the correct pin on the comparator */
   Ports[PortNum].CCx = cc;
   LL_UCPD_SetCCPin(Ports[PortNum].husbpd, (cc == CC1) ? LL_UCPD_CCPIN_CC1 : LL_UCPD_CCPIN_CC2);
 }
 
+/**
+  * @brief  Enable RX interrupt
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPDM1_RX_EnableInterrupt(uint8_t PortNum)
 {
   /* Enable the RX interrupt process */
@@ -251,11 +287,21 @@ void USBPDM1_RX_EnableInterrupt(uint8_t PortNum)
   LL_UCPD_RxDMAEnable(Ports[PortNum].husbpd);
 }
 
+/**
+  * @brief  Enable RX
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPD_HW_IF_EnableRX(uint8_t PortNum)
 {
   LL_UCPD_RxEnable(Ports[PortNum].husbpd);
 }
 
+/**
+  * @brief  Disable RX
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPD_HW_IF_DisableRX(uint8_t PortNum)
 {
   LL_UCPD_RxDisable(Ports[PortNum].husbpd);
@@ -287,7 +333,7 @@ void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc)
   _temp = (uint32_t)&Ports[PortNum].husbpd->TXDR;
   Ports[PortNum].hdmatx->CPAR = _temp;
 
-  /* disabled non Rd line set CC line enable */
+  /* Disabled non Rd line set CC line enable */
 #define INTERRUPT_MASK  UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_HRSTDISCIE  | UCPD_IMR_HRSTSENTIE |  \
   UCPD_IMR_TXMSGABTIE  | UCPD_IMR_TXUNDIE     | UCPD_IMR_RXORDDETIE  | UCPD_IMR_RXHRSTDETIE | \
   UCPD_IMR_RXOVRIE     | UCPD_IMR_RXMSGENDIE
@@ -308,15 +354,14 @@ void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc)
   (void)BSP_USBPD_PWR_VCONNInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u);
 #endif /* _VCONN_SUPPORT */
 
-#if defined(USBPD_REV30_SUPPORT)
   if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE)
   {
-    /* Set GPIO to allow the FRSTX handling */
+    /* Set GPIO to allow the FRS TX handling */
     USBPD_HW_SetFRSSignalling(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u);
+    /* Enable FRS RX */
     LL_UCPD_FRSDetectionEnable(Ports[PortNum].husbpd);
     Ports[PortNum].husbpd->IMR |= UCPD_IMR_FRSEVTIE;
   }
-#endif /* USBPD_REV30_SUPPORT */
 
   /* Disable the Resistor on Vconn PIN */
   if (Ports[PortNum].CCx == CC1)
@@ -339,7 +384,7 @@ void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc)
 void HW_SignalDetachment(uint8_t PortNum)
 {
 #if !defined(USBPDCORE_LIB_NO_PD)
-  /* stop DMA RX/TX */
+  /* Stop DMA RX/TX */
   LL_UCPD_RxDMADisable(Ports[PortNum].husbpd);
   LL_UCPD_TxDMADisable(Ports[PortNum].husbpd);
   LL_UCPD_RxDisable(Ports[PortNum].husbpd);
@@ -348,11 +393,13 @@ void HW_SignalDetachment(uint8_t PortNum)
   /* Enable only detection interrupt */
   WRITE_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE);
 #elif defined(_LOW_POWER)
+#if !defined(_DRP)
   if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
   {
     /* Enable detection interrupt */
     WRITE_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE);
   }
+#endif /* !_DRP */
 #endif /* !_LOW_POWER && !USBPDM1_VCC_FEATURE_ENABLED */
 
   USBPD_HW_DeInit_DMATxInstance(PortNum);
@@ -370,13 +417,11 @@ void HW_SignalDetachment(uint8_t PortNum)
     (void)BSP_USBPD_PWR_VBUSDeInit(PortNum);
   }
 
-#if defined(USBPD_REV30_SUPPORT)
   if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE)
   {
-    /* Set GPIO to disallow the FRSTX handling */
+    /* Set GPIO to disallow the FRS RX handling */
     LL_UCPD_FRSDetectionDisable(Ports[PortNum].husbpd);
   }
-#endif /* USBPD_REV30_SUPPORT */
 
 #endif /* !USBPDCORE_LIB_NO_PD */
   Ports[PortNum].CCx = CCNONE;
@@ -386,18 +431,33 @@ void HW_SignalDetachment(uint8_t PortNum)
 #endif /* !USBPDCORE_LIB_NO_PD */
 }
 
+/**
+  * @brief  Set resistors to SinkTxNG
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPD_HW_IF_SetResistor_SinkTxNG(uint8_t PortNum)
 {
-  /* set the resistor SinkTxNG 1.5A5V */
+  /* Set the resistor SinkTxNG 1.5A5V */
   LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_1_5A);
 }
 
+/**
+  * @brief  Set resistors to SinkTxOk
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPD_HW_IF_SetResistor_SinkTxOK(uint8_t PortNum)
 {
-  /* set the resistor SinkTxNG 3.0A5V */
+  /* Set the resistor SinkTxNG 3.0A5V */
   LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_3_0A);
 }
 
+/**
+  * @brief  Check if resistors are set to SinkTxOk
+  * @param  PortNum Port
+  * @retval USBPD_TRUE if resistor is set to SinkTxOk, else USBPD_FALSE
+  */
 uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum)
 {
 #if defined(_LOW_POWER)
@@ -438,6 +498,11 @@ uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum)
   return USBPD_FALSE;
 }
 
+/**
+  * @brief  Signal a Fast Role Swap
+  * @param  PortNum Port
+  * @retval None
+  */
 void USBPD_HW_IF_FastRoleSwapSignalling(uint8_t PortNum)
 {
   LL_UCPD_SignalFRSTX(Ports[PortNum].husbpd);
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c
index d82d852ad..70ce6fdb0 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c
@@ -55,11 +55,19 @@ void USBPD_TIM_Init(void)
     /* Counter mode: select up-counting mode */
     LL_TIM_SetCounterMode(TIMX, LL_TIM_COUNTERMODE_UP);
 
+#if defined(TIMX_CLK_FREQ)
+    /* Set the pre-scaler value to have TIMx counter clock equal to 1 MHz */
+    LL_TIM_SetPrescaler(TIMX, __LL_TIM_CALC_PSC(TIMX_CLK_FREQ, 1000000u));
+
+    /* Set the auto-reload value to have a counter frequency of 100Hz */
+    LL_TIM_SetAutoReload(TIMX, __LL_TIM_CALC_ARR(TIMX_CLK_FREQ, LL_TIM_GetPrescaler(TIMX), 100u));
+#else
     /* Set the pre-scaler value to have TIMx counter clock equal to 1 MHz */
     LL_TIM_SetPrescaler(TIMX, __LL_TIM_CALC_PSC(SystemCoreClock, 1000000u));
 
     /* Set the auto-reload value to have a counter frequency of 100Hz */
     LL_TIM_SetAutoReload(TIMX, __LL_TIM_CALC_ARR(SystemCoreClock, LL_TIM_GetPrescaler(TIMX), 100u));
+#endif /* TIMX_CLK_FREQ */
 
     /*********************************/
     /* Output waveform configuration */
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : {
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
 
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : {
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
 
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : {
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
 
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : {
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
 
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : {
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
 
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld
index be490e7da..dbc0cfa01 100644
--- a/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 6a9b33079..81f30b683 100644
--- a/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c
index 290477a7c..600d3261d 100644
--- a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
 static void MX_USART3_UART_Init(void);
 /* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
 #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/
@@ -240,10 +243,30 @@ static void MX_GPIO_Init(void)
 }
 
 /* USER CODE BEGIN 4 */
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the USART.
-  * @param  None
-  * @retval None
   */
 PUTCHAR_PROTOTYPE
 {
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index dceb786ff..6120bb75d 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : {
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
 
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
index c5c095d93..660471448 100644
--- a/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
index c5c095d93..660471448 100644
--- a/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 030ba6b88..b56b1e4db 100644
--- a/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld
index 0169aab90..399ba0f86 100644
--- a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 030ba6b88..b56b1e4db 100644
--- a/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 030ba6b88..b56b1e4db 100644
--- a/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
index 751ca19a7..ba4c98f70 100644
--- a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
@@ -39,13 +39,16 @@
 
 /* Private macro -------------------------------------------------------------*/
 /* USER CODE BEGIN PM */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
 #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 /* USER CODE END PM */
 
 /* Private variables ---------------------------------------------------------*/
@@ -239,10 +242,30 @@ static void MX_GPIO_Init(void)
 }
 
 /* USER CODE BEGIN 4 */
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the USART.
-  * @param  None
-  * @retval None
   */
 PUTCHAR_PROTOTYPE
 {
diff --git a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3ecb55b60..ca7ba76e8 100644
--- a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld
index 12c5470bc..54ce32a9c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld
index 683e35125..bbaeff980 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c
index f1551f7a0..002a5951c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
 static void MX_LPUART1_UART_Init(void);
 /* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
 #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/
@@ -235,10 +238,30 @@ static void MX_GPIO_Init(void)
 }
 
 /* USER CODE BEGIN 4 */
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the USART.
-  * @param  None
-  * @retval None
   */
 PUTCHAR_PROTOTYPE
 {
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 63af15f45..9b74597d6 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index fb4cbf778..1535cba0a 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -105,13 +105,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -119,7 +121,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -128,7 +130,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -138,7 +140,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -163,13 +165,11 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
     
   } >RAM AT> ROM
-.ROarraySection : 
-{
- *(.ROarraySection*)
- 
- }
- 
- >RAM1
+
+  .ROarraySection (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    *(.ROarraySection*)
+  } >RAM1
  
   /* Uninitialized data section into "RAM" Ram type memory */
   . = ALIGN(4);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
deleted file mode 100644
index 861dedcad..000000000
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
+++ /dev/null
@@ -1,7 +0,0 @@
-[ProjectFiles]
-HeaderPath=
-[Others]
-Define=
-HALModule=
-[Groups]
-Doc=../readme.txt;
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
deleted file mode 100644
index d8ee410aa..000000000
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
+++ /dev/null
@@ -1,24 +0,0 @@
-[PreviousLibFiles]
-LibFiles=Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g431xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
-
-[PreviousUsedIarFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G431xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G431xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Src\main.c;Src\stm32g4xx_it.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;readme.txt;;;
-HeaderPath=..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\Drivers\CMSIS\Include;Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G431xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousGenFiles]
-HeaderPath=..\Inc
-HeaderFiles=stm32g4xx_it.h;stm32_assert.h;main.h;
-SourcePath=..\Src
-SourceFiles=stm32g4xx_it.c;main.c;
-
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
index 6bc20ec64..3885cd9c4 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -16,87 +15,53 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __MAIN_H
 #define __MAIN_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 /* Includes ------------------------------------------------------------------*/
-#include "stm32g4xx_ll_rcc.h"
 #include "stm32g4xx_ll_bus.h"
-#include "stm32g4xx_ll_crs.h"
+#include "stm32g4xx_ll_rcc.h"
 #include "stm32g4xx_ll_system.h"
-#include "stm32g4xx_ll_exti.h"
-#include "stm32g4xx_ll_cortex.h"
 #include "stm32g4xx_ll_utils.h"
 #include "stm32g4xx_ll_pwr.h"
-#include "stm32g4xx_ll_dma.h"
 #include "stm32g4xx_ll_gpio.h"
-
+#include "stm32g4xx_ll_exti.h"
 #if defined(USE_FULL_ASSERT)
 #include "stm32_assert.h"
 #endif /* USE_FULL_ASSERT */
 
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
 /* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
 /* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
-/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/**
+  * @brief LED2
+  */
 
-/* Exported functions prototypes ---------------------------------------------*/
-void Error_Handler(void);
+#define LED2_PIN                           LL_GPIO_PIN_5
+#define LED2_GPIO_PORT                     GPIOA
+#define LED2_GPIO_CLK_ENABLE()             LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA)
 
-/* USER CODE BEGIN EFP */
+/**
+  * @brief Key push-button
+  */
+#define USER_BUTTON_PIN                         LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_PORT                   GPIOC
+#define USER_BUTTON_GPIO_CLK_ENABLE()           LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC)
+#define USER_BUTTON_EXTI_LINE                   LL_EXTI_LINE_13
+#define USER_BUTTON_EXTI_IRQn                   EXTI15_10_IRQn
+#define USER_BUTTON_EXTI_LINE_ENABLE()          LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE()  LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_IS_ACTIVE_FLAG()       LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_CLEAR_FLAG()           LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_SYSCFG_SET_EXTI()           do {\
+                                                  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);\
+                                                } while(0)
+#define USER_BUTTON_IRQHANDLER                  EXTI15_10_IRQHandler
 
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
 /* IRQ Handler treatment UserKey_Callback*/
-void UserButton_Callback(void);
-
-/* USER CODE END EFP */
-
-/* Private defines -----------------------------------------------------------*/
-#define LED2_Pin LL_GPIO_PIN_5
-#define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
-#ifndef NVIC_PRIORITYGROUP_0
-#define NVIC_PRIORITYGROUP_0         ((uint32_t)0x00000007) /*!< 0 bit  for pre-emption priority,
-                                                                 4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1         ((uint32_t)0x00000006) /*!< 1 bit  for pre-emption priority,
-                                                                 3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2         ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
-                                                                 2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3         ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
-                                                                 1 bit  for subpriority */
-#define NVIC_PRIORITYGROUP_4         ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
-                                                                 0 bit  for subpriority */
-#endif
-
-/* USER CODE BEGIN Private defines */
-
-/* USER CODE END Private defines */
-
-#ifdef __cplusplus
-}
-#endif
+void UserButton_Callback(void); 
 
 #endif /* __MAIN_H */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
index 584b7e5b7..787cbd1b8 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -16,37 +15,23 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32G4xx_IT_H
 #define __STM32G4xx_IT_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
 
 /* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
 /* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
 /* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/* Exported functions ------------------------------------------------------- */
 
-/* Exported functions prototypes ---------------------------------------------*/
 void NMI_Handler(void);
 void HardFault_Handler(void);
 void MemManage_Handler(void);
@@ -56,11 +41,7 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
-void EXTI15_10_IRQHandler(void);
-/* USER CODE BEGIN EFP */
-
-/* USER CODE END EFP */
+void USER_BUTTON_IRQHANDLER(void);
 
 #ifdef __cplusplus
 }
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
index 250413b00..7b16b5902 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -19,214 +18,173 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
+
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
 
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
+/** @addtogroup STM32G4xx_LL_Examples
+  * @{
+  */
 
-/* USER CODE END Includes */
+/** @addtogroup EXTI_ToggleLedOnIT
+  * @{
+  */
 
 /* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
 /* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
 /* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
 /* Private variables ---------------------------------------------------------*/
-
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
 /* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-/* USER CODE BEGIN PFP */
-/* USER CODE END PFP */
+void     SystemClock_Config(void);
+void     Configure_EXTI(void);
+void     LED_Init(void);
 
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
+/* Private functions ---------------------------------------------------------*/
 
 /**
-  * @brief  The application entry point.
-  * @retval int
+  * @brief  Main program
+  * @param  None
+  * @retval None
   */
 int main(void)
 {
-  /* USER CODE BEGIN 1 */
-  /* USER CODE END 1 */
-
-  /* MCU Configuration--------------------------------------------------------*/
-
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  /* Enable SYSCFG and PWR Clock. */
   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
 
-  /* System interrupt init*/
-  NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
-
-  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
-  */
-  LL_PWR_DisableUCPDDeadBattery();
-
-  /* USER CODE BEGIN Init */
+  /* Configure the system clock to 170 MHz */
+  SystemClock_Config();
 
-  /* USER CODE END Init */
+  /* Initialize LED2 */
+  LED_Init();
+  
+  /* Configure the EXTI Line on User Button */
+  Configure_EXTI();
 
-  /* Configure the system clock */
-  SystemClock_Config();
+  /* Infinite loop */
+  while (1)
+  {
+  }
+}
 
-  /* USER CODE BEGIN SysInit */
+/**
+  * @brief  This function configures EXTI Line as Push-Button
+  * @note   Peripheral configuration is minimal configuration from reset values.  
+  * @param  None
+  * @retval None
+  */
+void Configure_EXTI()
+{
+  /* -1- GPIO Config */
+  /* Enable GPIO Clock (to be able to program the configuration registers) */
+  USER_BUTTON_GPIO_CLK_ENABLE();
+  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);  
+  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);  
 
-  /* USER CODE END SysInit */
+  /**/
+  LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
 
-  /* Initialize all configured peripherals */
-  MX_GPIO_Init();
-  /* USER CODE BEGIN 2 */
+  /**/
+  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
 
-  /* USER CODE END 2 */
+  /**/
+  
+  /* Configure IO */
+  LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
+  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_PULL_NO); 
+
+  /* -2- Connect External Line to the GPIO*/
+  USER_BUTTON_SYSCFG_SET_EXTI();
+  
+  /*-3- Enable a falling trigger EXTI line 13 Interrupt */
+  USER_BUTTON_EXTI_LINE_ENABLE();
+  USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
+  
+  /*-4- Configure NVIC for EXTI10_15_IRQn */
+  NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+  NVIC_EnableIRQ(EXTI15_10_IRQn);
+}
 
-  /* Infinite loop */
-  /* USER CODE BEGIN WHILE */
-  while (1)
-  {
-    /* USER CODE END WHILE */
+/**
+  * @brief  Initialize LED2.
+  * @param  None
+  * @retval None
+  */
+void LED_Init(void)
+{
+  /* Enable the LED2 Clock */
+  LED2_GPIO_CLK_ENABLE();
 
-    /* USER CODE BEGIN 3 */
-  }
-  /* USER CODE END 3 */
+  /* Configure IO in output push-pull mode to drive external LED2 */
+  LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
 }
 
 /**
-  * @brief System Clock Configuration
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follows :
+  *            System Clock source            = PLL (HSI)
+  *            SYSCLK(Hz)                     = 170000000
+  *            HCLK(Hz)                       = 170000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 1
+  *            APB2 Prescaler                 = 1
+  *            PLL_M                          = 4
+  *            PLL_N                          = 85
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 2
+  *            PLL_R                          = 2
+  *            Flash Latency(WS)              = 8
+  * @param  None
   * @retval None
   */
 void SystemClock_Config(void)
 {
+  /* Flash Latency configuration */
   LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
-  while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_4)
-  {
-  }
+
+  /* Enable boost mode to be able to reach 170MHz */
   LL_PWR_EnableRange1BoostMode();
+
+  /* HSI configuration and activation */
   LL_RCC_HSI_Enable();
-   /* Wait till HSI is ready */
   while(LL_RCC_HSI_IsReady() != 1)
   {
-  }
+  };
 
-  LL_RCC_HSI_SetCalibTrimming(64);
+  /* Main PLL configuration and activation */
   LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2);
-  LL_RCC_PLL_EnableDomain_SYS();
   LL_RCC_PLL_Enable();
-   /* Wait till PLL is ready */
+  LL_RCC_PLL_EnableDomain_SYS();
   while(LL_RCC_PLL_IsReady() != 1)
   {
-  }
+  };
 
-  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+  /* Sysclk activation on the main PLL */
   LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
-   /* Wait till System clock is ready */
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
   while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
   {
-  }
-
-  /* Insure 1us transition state at intermediate medium speed clock*/
-  for (__IO uint32_t i = (170 >> 1); i !=0; i--);
+  };
 
-  /* Set AHB prescaler*/
   LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+  /* Insure 1�s transition state at intermediate medium speed clock based on DWT */
+  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+  DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+  while(DWT->CYCCNT < 100);
+  /* Set APB1 & APB2 prescaler*/
   LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
   LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
 
+  /* Set systick to 1ms in using frequency set to 170MHz */
+  /* This frequency can be calculated through LL RCC macro */
+  /* ex: __LL_RCC_CALC_PLLCLK_FREQ(__LL_RCC_CALC_HSI_FREQ(),
+                                  LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2)*/
   LL_Init1msTick(170000000);
 
+  /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
   LL_SetSystemCoreClock(170000000);
 }
 
-/**
-  * @brief GPIO Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_GPIO_Init(void)
-{
-  LL_EXTI_InitTypeDef EXTI_InitStruct = {0};
-  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-/* USER CODE BEGIN MX_GPIO_Init_1 */
-/* USER CODE END MX_GPIO_Init_1 */
-
-  /* GPIO Ports Clock Enable */
-  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
-  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
-
-  /**/
-  LL_GPIO_ResetOutputPin(LED2_GPIO_Port, LED2_Pin);
-
-  /**/
-  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
-
-  /**/
-  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
-  /**/
-  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
-  EXTI_InitStruct.LineCommand = ENABLE;
-  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
-  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
-  LL_EXTI_Init(&EXTI_InitStruct);
-
-  /**/
-  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
-  EXTI_InitStruct.LineCommand = ENABLE;
-  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
-  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
-  LL_EXTI_Init(&EXTI_InitStruct);
-
-  /**/
-  LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
-  /**/
-  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
-  /**/
-  LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
-
-  /**/
-  LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
-
-  /**/
-  GPIO_InitStruct.Pin = LED2_Pin;
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-  LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
-
-  /* EXTI interrupt init*/
-  NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-  NVIC_EnableIRQ(EXTI4_IRQn);
-  NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-  NVIC_EnableIRQ(EXTI15_10_IRQn);
-
-/* USER CODE BEGIN MX_GPIO_Init_2 */
-/* USER CODE END MX_GPIO_Init_2 */
-}
-
-/* USER CODE BEGIN 4 */
-
 /******************************************************************************/
 /*   USER IRQ HANDLER TREATMENT                                               */
 /******************************************************************************/
@@ -237,24 +195,11 @@ static void MX_GPIO_Init(void)
   */
 void UserButton_Callback(void)
 {
-  LL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);  
-}
-
-/* USER CODE END 4 */
-
-/**
-  * @brief  This function is executed in case of error occurrence.
-  * @retval None
-  */
-void Error_Handler(void)
-{
-  /* USER CODE BEGIN Error_Handler_Debug */
-  /* User can add his own implementation to report the HAL error return state */
- 
-  /* USER CODE END Error_Handler_Debug */
+  LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);  
 }
 
 #ifdef  USE_FULL_ASSERT
+
 /**
   * @brief  Reports the name of the source file and the source line number
   *         where the assert_param error has occurred.
@@ -264,9 +209,22 @@ void Error_Handler(void)
   */
 void assert_failed(uint8_t *file, uint32_t line)
 {
-  /* USER CODE BEGIN 6 */
   /* User can add his own implementation to report the file name and line number,
-     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-  /* USER CODE END 6 */
+     ex: printf("Wrong parameters value: file %s on line %d", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
 }
-#endif /* USE_FULL_ASSERT */
+#endif
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
index efc1d9372..42d6bf6ce 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /** 
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -18,230 +17,155 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
 
 /* Includes ------------------------------------------------------------------*/
-#include "main.h"
 #include "stm32g4xx_it.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
 
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
+/** @addtogroup STM32G4xx_LL_Examples
+  * @{
+  */
 
-/* USER CODE END TD */
+/** @addtogroup EXTI_ToggleLedOnIT
+  * @{
+  */
 
+/* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
- 
-/* USER CODE END PD */
-
 /* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
 /* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
 
 /* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-
-/* USER CODE BEGIN EV */
-
-/* USER CODE END EV */
+/* Private functions ---------------------------------------------------------*/
 
 /******************************************************************************/
-/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/*            Cortex-M4 Processor Exceptions Handlers                         */
 /******************************************************************************/
+
 /**
-  * @brief This function handles Non maskable interrupt.
+  * @brief  This function handles NMI exception.
+  * @param  None
+  * @retval None
   */
 void NMI_Handler(void)
 {
-  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
-  /* USER CODE END NonMaskableInt_IRQn 0 */
-  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
-  /* USER CODE END NonMaskableInt_IRQn 1 */
 }
 
 /**
-  * @brief This function handles Hard fault interrupt.
+  * @brief  This function handles Hard Fault exception.
+  * @param  None
+  * @retval None
   */
 void HardFault_Handler(void)
 {
-  /* USER CODE BEGIN HardFault_IRQn 0 */
-
-  /* USER CODE END HardFault_IRQn 0 */
+  /* Go to infinite loop when Hard Fault exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
-    /* USER CODE END W1_HardFault_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles Memory management fault.
+  * @brief  This function handles Memory Manage exception.
+  * @param  None
+  * @retval None
   */
 void MemManage_Handler(void)
 {
-  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
-  /* USER CODE END MemoryManagement_IRQn 0 */
+  /* Go to infinite loop when Memory Manage exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
-    /* USER CODE END W1_MemoryManagement_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles Prefetch fault, memory access fault.
+  * @brief  This function handles Bus Fault exception.
+  * @param  None
+  * @retval None
   */
 void BusFault_Handler(void)
 {
-  /* USER CODE BEGIN BusFault_IRQn 0 */
-
-  /* USER CODE END BusFault_IRQn 0 */
+  /* Go to infinite loop when Bus Fault exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
-    /* USER CODE END W1_BusFault_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles Undefined instruction or illegal state.
+  * @brief  This function handles Usage Fault exception.
+  * @param  None
+  * @retval None
   */
 void UsageFault_Handler(void)
 {
-  /* USER CODE BEGIN UsageFault_IRQn 0 */
-
-  /* USER CODE END UsageFault_IRQn 0 */
+  /* Go to infinite loop when Usage Fault exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
-    /* USER CODE END W1_UsageFault_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles System service call via SWI instruction.
+  * @brief  This function handles SVCall exception.
+  * @param  None
+  * @retval None
   */
 void SVC_Handler(void)
 {
-  /* USER CODE BEGIN SVCall_IRQn 0 */
-
-  /* USER CODE END SVCall_IRQn 0 */
-  /* USER CODE BEGIN SVCall_IRQn 1 */
-
-  /* USER CODE END SVCall_IRQn 1 */
 }
 
 /**
-  * @brief This function handles Debug monitor.
+  * @brief  This function handles Debug Monitor exception.
+  * @param  None
+  * @retval None
   */
 void DebugMon_Handler(void)
 {
-  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
-
-  /* USER CODE END DebugMonitor_IRQn 0 */
-  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
-  /* USER CODE END DebugMonitor_IRQn 1 */
 }
 
 /**
-  * @brief This function handles Pendable request for system service.
+  * @brief  This function handles PendSVC exception.
+  * @param  None
+  * @retval None
   */
 void PendSV_Handler(void)
 {
-  /* USER CODE BEGIN PendSV_IRQn 0 */
-
-  /* USER CODE END PendSV_IRQn 0 */
-  /* USER CODE BEGIN PendSV_IRQn 1 */
-
-  /* USER CODE END PendSV_IRQn 1 */
 }
 
 /**
-  * @brief This function handles System tick timer.
+  * @brief  This function handles SysTick Handler.
+  * @param  None
+  * @retval None
   */
 void SysTick_Handler(void)
 {
-  /* USER CODE BEGIN SysTick_IRQn 0 */
-
-  /* USER CODE END SysTick_IRQn 0 */
-
-  /* USER CODE BEGIN SysTick_IRQn 1 */
-
-  /* USER CODE END SysTick_IRQn 1 */
 }
 
 /******************************************************************************/
-/* STM32G4xx Peripheral Interrupt Handlers                                    */
-/* Add here the Interrupt Handlers for the used peripherals.                  */
-/* For the available peripheral interrupt handler names,                      */
-/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/*                 STM32G4xx Peripherals Interrupt Handlers                   */
+/*  Add here the Interrupt Handler for the used peripheral(s) (EXTI), for the  */
+/*  available peripheral interrupt handler's name please refer to the startup */
+/*  file (startup_stm32g4xx.s).                                               */
 /******************************************************************************/
 
 /**
-  * @brief This function handles EXTI line4 interrupt.
+  * @brief  This function handles external line 4_15 interrupt request.
+  * @param  None
+  * @retval None
   */
-void EXTI4_IRQHandler(void)
+void USER_BUTTON_IRQHANDLER(void)
 {
-  /* USER CODE BEGIN EXTI4_IRQn 0 */
-
-  /* USER CODE END EXTI4_IRQn 0 */
-  if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
+  /* Manage Flags */
+  if(USER_BUTTON_EXTI_IS_ACTIVE_FLAG() != RESET)
   {
-    LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
-    /* USER CODE BEGIN LL_EXTI_LINE_4 */
-    
-    /* USER CODE END LL_EXTI_LINE_4 */
-  }
-  /* USER CODE BEGIN EXTI4_IRQn 1 */
+    USER_BUTTON_EXTI_CLEAR_FLAG();
 
-  /* USER CODE END EXTI4_IRQn 1 */
+    /* Manage code in main.c.*/
+    UserButton_Callback(); 
+  }
 }
 
 /**
-  * @brief This function handles EXTI line[15:10] interrupts.
+  * @}
   */
-void EXTI15_10_IRQHandler(void)
-{
-  /* USER CODE BEGIN EXTI15_10_IRQn 0 */
-
-  /* USER CODE END EXTI15_10_IRQn 0 */
-  if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_13) != RESET)
-  {
-    LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_13);
-    /* USER CODE BEGIN LL_EXTI_LINE_13 */
-
-    /* Manage code in main.c */
-    UserButton_Callback();
-    /* USER CODE END LL_EXTI_LINE_13 */
-  }
-  /* USER CODE BEGIN EXTI15_10_IRQn 1 */
 
-  /* USER CODE END EXTI15_10_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
+/**
+  * @}
+  */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
index dbef7a3dd..b05cf48f3 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
@@ -21,9 +21,8 @@
 
 @par Example Description
 
-This example describes how to configure the EXTI 
-and use GPIOs to toggle the user LEDs available on the board when 
-a user button is pressed. This example is based on the
+How to configure the EXTI and use GPIOs to toggle the user LEDs 
+available on the board when a user button is pressed. It is based on the
 STM32G4xx LL API. The peripheral initialization uses LL unitary service
 functions for optimization purposes (performance and size).
 
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
index e63e61a02..b2f1ce951 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
@@ -14,10 +14,9 @@ Mcu.Name=STM32G431R(6-8-B)Tx
 Mcu.Package=LQFP64
 Mcu.Pin0=PC13
 Mcu.Pin1=PA5
-Mcu.Pin2=PC4
-Mcu.Pin3=VP_SYS_VS_Systick
-Mcu.Pin4=VP_SYS_VS_DBSignals
-Mcu.PinsNb=5
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32G431RBTx
@@ -26,7 +25,6 @@ MxDb.Version=DB.6.0.100
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -40,14 +38,11 @@ PA5.GPIOParameters=GPIO_Label
 PA5.GPIO_Label=LED2
 PA5.Locked=true
 PA5.Signal=GPIO_Output
+PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
+PC13.GPIO_Label=USER_BUTTON
+PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
 PC13.Locked=true
 PC13.Signal=GPXTI13
-PC4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PC4.GPIO_Label=USER_BUTTON
-PC4.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC4.GPIO_PuPd=GPIO_PULLUP
-PC4.Locked=true
-PC4.Signal=GPXTI4
 PinOutPanel.RotationAngle=0
 ProjectManager.AskForMigrate=true
 ProjectManager.BackupPrevious=false
@@ -56,6 +51,8 @@ ProjectManager.ComputerToolchain=false
 ProjectManager.CoupleFile=false
 ProjectManager.DeletePrevious=true
 ProjectManager.DeviceId=STM32G431RBTx
+ProjectManager.Example=EXTI_ToggleLedOnIT_Init
+ProjectManager.ExampleSource=CubeFw
 ProjectManager.FreePins=false
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
@@ -123,12 +120,8 @@ RCC.VCOInputFreq_Value=4000000
 RCC.VCOOutputFreq_Value=340000000
 SH.GPXTI13.0=GPIO_EXTI13
 SH.GPXTI13.ConfNb=1
-SH.GPXTI4.0=GPIO_EXTI4
-SH.GPXTI4.ConfNb=1
 VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
 VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
 VP_SYS_VS_Systick.Mode=SysTick
 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
 board=custom
-ProjectManager.Example=EXTI_ToggleLedOnIT_Init
-ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
index 077a66c0d..956e62de2 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
@@ -73,11 +73,11 @@ void UserButton_Callback(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
+#define USER_BUTTON_Pin LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_Port GPIOC
+#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
 #define LED2_Pin LL_GPIO_PIN_5
 #define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
 #ifndef NVIC_PRIORITYGROUP_0
 #define NVIC_PRIORITYGROUP_0         ((uint32_t)0x00000007) /*!< 0 bit  for pre-emption priority,
                                                                  4 bits for subpriority */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
index 3e928ec44..6e2054929 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
@@ -56,7 +56,6 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
 void EXTI15_10_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
index 3c80b077d..f30e63e54 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
@@ -178,31 +178,15 @@ static void MX_GPIO_Init(void)
   /**/
   LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
 
-  /**/
-  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
   /**/
   EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
   EXTI_InitStruct.LineCommand = ENABLE;
   EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
-  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
-  LL_EXTI_Init(&EXTI_InitStruct);
-
-  /**/
-  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
-  EXTI_InitStruct.LineCommand = ENABLE;
-  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
   EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
   LL_EXTI_Init(&EXTI_InitStruct);
 
   /**/
-  LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
-  /**/
-  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
-  /**/
-  LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
+  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_NO);
 
   /**/
   LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
@@ -216,8 +200,6 @@ static void MX_GPIO_Init(void)
   LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
 
   /* EXTI interrupt init*/
-  NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-  NVIC_EnableIRQ(EXTI4_IRQn);
   NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
   NVIC_EnableIRQ(EXTI15_10_IRQn);
 
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
index 1209a6406..9c59bf31d 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
@@ -200,26 +200,6 @@ void SysTick_Handler(void)
 /* please refer to the startup file (startup_stm32g4xx.s).                    */
 /******************************************************************************/
 
-/**
-  * @brief This function handles EXTI line4 interrupt.
-  */
-void EXTI4_IRQHandler(void)
-{
-  /* USER CODE BEGIN EXTI4_IRQn 0 */
-
-  /* USER CODE END EXTI4_IRQn 0 */
-  if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
-  {
-    LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
-    /* USER CODE BEGIN LL_EXTI_LINE_4 */
-    
-    /* USER CODE END LL_EXTI_LINE_4 */
-  }
-  /* USER CODE BEGIN EXTI4_IRQn 1 */
-
-  /* USER CODE END EXTI4_IRQn 1 */
-}
-
 /**
   * @brief This function handles EXTI line[15:10] interrupts.
   */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 63af15f45..9b74597d6 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c
index 99c7d8f04..c426043bd 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c
@@ -58,8 +58,8 @@
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Buffers used for displaying Time and Date */
-uint8_t aShowTime[] = "hh:ms:ss";
-uint8_t aShowDate[] = "dd/mm/aaaa";
+uint8_t aShowTime[16] = "hh:ms:ss";
+uint8_t aShowDate[16] = "dd/mm/aaaa";
 
 #if (USE_TIMEOUT == 1)
 uint32_t Timeout = 0; /* Variable used for Timeout management */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
index 751ca19a7..ba4c98f70 100644
--- a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
@@ -39,13 +39,16 @@
 
 /* Private macro -------------------------------------------------------------*/
 /* USER CODE BEGIN PM */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
 #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 /* USER CODE END PM */
 
 /* Private variables ---------------------------------------------------------*/
@@ -239,10 +242,30 @@ static void MX_GPIO_Init(void)
 }
 
 /* USER CODE BEGIN 4 */
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the USART.
-  * @param  None
-  * @retval None
   */
 PUTCHAR_PROTOTYPE
 {
diff --git a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 5ec6a0abb..71168834b 100644
--- a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 5c85c88f3..bb6d93bdb 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c
index c13c95510..45a7defb6 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c
@@ -316,6 +316,10 @@ static void MX_GPIO_Init(void)
   */
 static void Emulate_Forward_Direction(TIM_HandleTypeDef* htim)
 {
+  /*## -1- Make sure channels are not started ############################## */
+  HAL_TIM_OC_Stop(htim, TIM_CHANNEL_1);
+  HAL_TIM_OC_Stop(htim, TIM_CHANNEL_2);
+
   /*## -1- Re-Configure the Pulse  ########################################## */
   sEmulConfigOC.Pulse = PULSE1_VALUE;
   if(HAL_TIM_OC_ConfigChannel(htim, &sEmulConfigOC, TIM_CHANNEL_1) != HAL_OK)
@@ -351,6 +355,10 @@ static void Emulate_Forward_Direction(TIM_HandleTypeDef* htim)
   */
 static void Emulate_Backward_Direction(TIM_HandleTypeDef* htim)
 {
+  /*## -1- Make sure channels are not started ############################## */
+  HAL_TIM_OC_Stop(htim, TIM_CHANNEL_1);
+  HAL_TIM_OC_Stop(htim, TIM_CHANNEL_2);
+
   /*## -1- Re-Configure the Pulse  ########################################## */
   sEmulConfigOC.Pulse = PULSE2_VALUE;
   if(HAL_TIM_OC_ConfigChannel(htim, &sEmulConfigOC, TIM_CHANNEL_1) != HAL_OK)
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c
index f1551f7a0..002a5951c 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
 static void MX_LPUART1_UART_Init(void);
 /* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
 #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/
@@ -235,10 +238,30 @@ static void MX_GPIO_Init(void)
 }
 
 /* USER CODE BEGIN 4 */
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the USART.
-  * @param  None
-  * @retval None
   */
 PUTCHAR_PROTOTYPE
 {
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index d9440a7b9..c0267c6a3 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
index c0fdb3c55..964812b6d 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -105,13 +105,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -119,7 +121,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -128,7 +130,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -138,7 +140,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -164,12 +166,11 @@ SECTIONS
     
   } >RAM AT> ROM
   
-.ROarraySection : 
-{
- *(.ROarraySection*)
- 
- }  
- >RAM1
+  .ROarraySection (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    *(.ROarraySection*)
+  } >RAM1
+
   /* Uninitialized data section into "RAM" Ram type memory */
   . = ALIGN(4);
   .bss :
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
deleted file mode 100644
index 861dedcad..000000000
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
+++ /dev/null
@@ -1,7 +0,0 @@
-[ProjectFiles]
-HeaderPath=
-[Others]
-Define=
-HALModule=
-[Groups]
-Doc=../readme.txt;
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
deleted file mode 100644
index 8db7e3e3f..000000000
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
+++ /dev/null
@@ -1,24 +0,0 @@
-[PreviousLibFiles]
-LibFiles=Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
-
-[PreviousUsedIarFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G474xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G474xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Src\main.c;Src\stm32g4xx_it.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;readme.txt;;;
-HeaderPath=..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\Drivers\CMSIS\Include;Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G474xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousGenFiles]
-HeaderPath=..\Inc
-HeaderFiles=stm32g4xx_it.h;stm32_assert.h;main.h;
-SourcePath=..\Src
-SourceFiles=stm32g4xx_it.c;main.c;
-
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
index 6bc20ec64..3885cd9c4 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -16,87 +15,53 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __MAIN_H
 #define __MAIN_H
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 /* Includes ------------------------------------------------------------------*/
-#include "stm32g4xx_ll_rcc.h"
 #include "stm32g4xx_ll_bus.h"
-#include "stm32g4xx_ll_crs.h"
+#include "stm32g4xx_ll_rcc.h"
 #include "stm32g4xx_ll_system.h"
-#include "stm32g4xx_ll_exti.h"
-#include "stm32g4xx_ll_cortex.h"
 #include "stm32g4xx_ll_utils.h"
 #include "stm32g4xx_ll_pwr.h"
-#include "stm32g4xx_ll_dma.h"
 #include "stm32g4xx_ll_gpio.h"
-
+#include "stm32g4xx_ll_exti.h"
 #if defined(USE_FULL_ASSERT)
 #include "stm32_assert.h"
 #endif /* USE_FULL_ASSERT */
 
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
 /* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
 /* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
-/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/**
+  * @brief LED2
+  */
 
-/* Exported functions prototypes ---------------------------------------------*/
-void Error_Handler(void);
+#define LED2_PIN                           LL_GPIO_PIN_5
+#define LED2_GPIO_PORT                     GPIOA
+#define LED2_GPIO_CLK_ENABLE()             LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA)
 
-/* USER CODE BEGIN EFP */
+/**
+  * @brief Key push-button
+  */
+#define USER_BUTTON_PIN                         LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_PORT                   GPIOC
+#define USER_BUTTON_GPIO_CLK_ENABLE()           LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC)
+#define USER_BUTTON_EXTI_LINE                   LL_EXTI_LINE_13
+#define USER_BUTTON_EXTI_IRQn                   EXTI15_10_IRQn
+#define USER_BUTTON_EXTI_LINE_ENABLE()          LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE()  LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_IS_ACTIVE_FLAG()       LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_CLEAR_FLAG()           LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_SYSCFG_SET_EXTI()           do {\
+                                                  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);\
+                                                } while(0)
+#define USER_BUTTON_IRQHANDLER                  EXTI15_10_IRQHandler
 
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
 /* IRQ Handler treatment UserKey_Callback*/
-void UserButton_Callback(void);
-
-/* USER CODE END EFP */
-
-/* Private defines -----------------------------------------------------------*/
-#define LED2_Pin LL_GPIO_PIN_5
-#define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
-#ifndef NVIC_PRIORITYGROUP_0
-#define NVIC_PRIORITYGROUP_0         ((uint32_t)0x00000007) /*!< 0 bit  for pre-emption priority,
-                                                                 4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1         ((uint32_t)0x00000006) /*!< 1 bit  for pre-emption priority,
-                                                                 3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2         ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
-                                                                 2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3         ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
-                                                                 1 bit  for subpriority */
-#define NVIC_PRIORITYGROUP_4         ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
-                                                                 0 bit  for subpriority */
-#endif
-
-/* USER CODE BEGIN Private defines */
-
-/* USER CODE END Private defines */
-
-#ifdef __cplusplus
-}
-#endif
+void UserButton_Callback(void); 
 
 #endif /* __MAIN_H */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
index 584b7e5b7..787cbd1b8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -16,37 +15,23 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32G4xx_IT_H
 #define __STM32G4xx_IT_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
 
 /* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
 /* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
 /* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/* Exported functions ------------------------------------------------------- */
 
-/* Exported functions prototypes ---------------------------------------------*/
 void NMI_Handler(void);
 void HardFault_Handler(void);
 void MemManage_Handler(void);
@@ -56,11 +41,7 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
-void EXTI15_10_IRQHandler(void);
-/* USER CODE BEGIN EFP */
-
-/* USER CODE END EFP */
+void USER_BUTTON_IRQHANDLER(void);
 
 #ifdef __cplusplus
 }
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
index 250413b00..7b16b5902 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -19,214 +18,173 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
+
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
 
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
+/** @addtogroup STM32G4xx_LL_Examples
+  * @{
+  */
 
-/* USER CODE END Includes */
+/** @addtogroup EXTI_ToggleLedOnIT
+  * @{
+  */
 
 /* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
 /* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
 /* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
 /* Private variables ---------------------------------------------------------*/
-
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
 /* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-/* USER CODE BEGIN PFP */
-/* USER CODE END PFP */
+void     SystemClock_Config(void);
+void     Configure_EXTI(void);
+void     LED_Init(void);
 
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
+/* Private functions ---------------------------------------------------------*/
 
 /**
-  * @brief  The application entry point.
-  * @retval int
+  * @brief  Main program
+  * @param  None
+  * @retval None
   */
 int main(void)
 {
-  /* USER CODE BEGIN 1 */
-  /* USER CODE END 1 */
-
-  /* MCU Configuration--------------------------------------------------------*/
-
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  /* Enable SYSCFG and PWR Clock. */
   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
 
-  /* System interrupt init*/
-  NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
-
-  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
-  */
-  LL_PWR_DisableUCPDDeadBattery();
-
-  /* USER CODE BEGIN Init */
+  /* Configure the system clock to 170 MHz */
+  SystemClock_Config();
 
-  /* USER CODE END Init */
+  /* Initialize LED2 */
+  LED_Init();
+  
+  /* Configure the EXTI Line on User Button */
+  Configure_EXTI();
 
-  /* Configure the system clock */
-  SystemClock_Config();
+  /* Infinite loop */
+  while (1)
+  {
+  }
+}
 
-  /* USER CODE BEGIN SysInit */
+/**
+  * @brief  This function configures EXTI Line as Push-Button
+  * @note   Peripheral configuration is minimal configuration from reset values.  
+  * @param  None
+  * @retval None
+  */
+void Configure_EXTI()
+{
+  /* -1- GPIO Config */
+  /* Enable GPIO Clock (to be able to program the configuration registers) */
+  USER_BUTTON_GPIO_CLK_ENABLE();
+  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);  
+  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);  
 
-  /* USER CODE END SysInit */
+  /**/
+  LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
 
-  /* Initialize all configured peripherals */
-  MX_GPIO_Init();
-  /* USER CODE BEGIN 2 */
+  /**/
+  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
 
-  /* USER CODE END 2 */
+  /**/
+  
+  /* Configure IO */
+  LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
+  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_PULL_NO); 
+
+  /* -2- Connect External Line to the GPIO*/
+  USER_BUTTON_SYSCFG_SET_EXTI();
+  
+  /*-3- Enable a falling trigger EXTI line 13 Interrupt */
+  USER_BUTTON_EXTI_LINE_ENABLE();
+  USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
+  
+  /*-4- Configure NVIC for EXTI10_15_IRQn */
+  NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+  NVIC_EnableIRQ(EXTI15_10_IRQn);
+}
 
-  /* Infinite loop */
-  /* USER CODE BEGIN WHILE */
-  while (1)
-  {
-    /* USER CODE END WHILE */
+/**
+  * @brief  Initialize LED2.
+  * @param  None
+  * @retval None
+  */
+void LED_Init(void)
+{
+  /* Enable the LED2 Clock */
+  LED2_GPIO_CLK_ENABLE();
 
-    /* USER CODE BEGIN 3 */
-  }
-  /* USER CODE END 3 */
+  /* Configure IO in output push-pull mode to drive external LED2 */
+  LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
 }
 
 /**
-  * @brief System Clock Configuration
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follows :
+  *            System Clock source            = PLL (HSI)
+  *            SYSCLK(Hz)                     = 170000000
+  *            HCLK(Hz)                       = 170000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 1
+  *            APB2 Prescaler                 = 1
+  *            PLL_M                          = 4
+  *            PLL_N                          = 85
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 2
+  *            PLL_R                          = 2
+  *            Flash Latency(WS)              = 8
+  * @param  None
   * @retval None
   */
 void SystemClock_Config(void)
 {
+  /* Flash Latency configuration */
   LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
-  while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_4)
-  {
-  }
+
+  /* Enable boost mode to be able to reach 170MHz */
   LL_PWR_EnableRange1BoostMode();
+
+  /* HSI configuration and activation */
   LL_RCC_HSI_Enable();
-   /* Wait till HSI is ready */
   while(LL_RCC_HSI_IsReady() != 1)
   {
-  }
+  };
 
-  LL_RCC_HSI_SetCalibTrimming(64);
+  /* Main PLL configuration and activation */
   LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2);
-  LL_RCC_PLL_EnableDomain_SYS();
   LL_RCC_PLL_Enable();
-   /* Wait till PLL is ready */
+  LL_RCC_PLL_EnableDomain_SYS();
   while(LL_RCC_PLL_IsReady() != 1)
   {
-  }
+  };
 
-  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+  /* Sysclk activation on the main PLL */
   LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
-   /* Wait till System clock is ready */
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
   while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
   {
-  }
-
-  /* Insure 1us transition state at intermediate medium speed clock*/
-  for (__IO uint32_t i = (170 >> 1); i !=0; i--);
+  };
 
-  /* Set AHB prescaler*/
   LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+  /* Insure 1�s transition state at intermediate medium speed clock based on DWT */
+  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+  DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+  while(DWT->CYCCNT < 100);
+  /* Set APB1 & APB2 prescaler*/
   LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
   LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
 
+  /* Set systick to 1ms in using frequency set to 170MHz */
+  /* This frequency can be calculated through LL RCC macro */
+  /* ex: __LL_RCC_CALC_PLLCLK_FREQ(__LL_RCC_CALC_HSI_FREQ(),
+                                  LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2)*/
   LL_Init1msTick(170000000);
 
+  /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
   LL_SetSystemCoreClock(170000000);
 }
 
-/**
-  * @brief GPIO Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_GPIO_Init(void)
-{
-  LL_EXTI_InitTypeDef EXTI_InitStruct = {0};
-  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-/* USER CODE BEGIN MX_GPIO_Init_1 */
-/* USER CODE END MX_GPIO_Init_1 */
-
-  /* GPIO Ports Clock Enable */
-  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
-  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
-
-  /**/
-  LL_GPIO_ResetOutputPin(LED2_GPIO_Port, LED2_Pin);
-
-  /**/
-  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
-
-  /**/
-  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
-  /**/
-  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
-  EXTI_InitStruct.LineCommand = ENABLE;
-  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
-  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
-  LL_EXTI_Init(&EXTI_InitStruct);
-
-  /**/
-  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
-  EXTI_InitStruct.LineCommand = ENABLE;
-  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
-  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
-  LL_EXTI_Init(&EXTI_InitStruct);
-
-  /**/
-  LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
-  /**/
-  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
-  /**/
-  LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
-
-  /**/
-  LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
-
-  /**/
-  GPIO_InitStruct.Pin = LED2_Pin;
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-  LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
-
-  /* EXTI interrupt init*/
-  NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-  NVIC_EnableIRQ(EXTI4_IRQn);
-  NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-  NVIC_EnableIRQ(EXTI15_10_IRQn);
-
-/* USER CODE BEGIN MX_GPIO_Init_2 */
-/* USER CODE END MX_GPIO_Init_2 */
-}
-
-/* USER CODE BEGIN 4 */
-
 /******************************************************************************/
 /*   USER IRQ HANDLER TREATMENT                                               */
 /******************************************************************************/
@@ -237,24 +195,11 @@ static void MX_GPIO_Init(void)
   */
 void UserButton_Callback(void)
 {
-  LL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);  
-}
-
-/* USER CODE END 4 */
-
-/**
-  * @brief  This function is executed in case of error occurrence.
-  * @retval None
-  */
-void Error_Handler(void)
-{
-  /* USER CODE BEGIN Error_Handler_Debug */
-  /* User can add his own implementation to report the HAL error return state */
- 
-  /* USER CODE END Error_Handler_Debug */
+  LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);  
 }
 
 #ifdef  USE_FULL_ASSERT
+
 /**
   * @brief  Reports the name of the source file and the source line number
   *         where the assert_param error has occurred.
@@ -264,9 +209,22 @@ void Error_Handler(void)
   */
 void assert_failed(uint8_t *file, uint32_t line)
 {
-  /* USER CODE BEGIN 6 */
   /* User can add his own implementation to report the file name and line number,
-     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-  /* USER CODE END 6 */
+     ex: printf("Wrong parameters value: file %s on line %d", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
 }
-#endif /* USE_FULL_ASSERT */
+#endif
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
index efc1d9372..42d6bf6ce 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
 /** 
   ******************************************************************************
   * @file    Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -18,230 +17,155 @@
   *
   ******************************************************************************
   */
-/* USER CODE END Header */
 
 /* Includes ------------------------------------------------------------------*/
-#include "main.h"
 #include "stm32g4xx_it.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
 
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
+/** @addtogroup STM32G4xx_LL_Examples
+  * @{
+  */
 
-/* USER CODE END TD */
+/** @addtogroup EXTI_ToggleLedOnIT
+  * @{
+  */
 
+/* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
- 
-/* USER CODE END PD */
-
 /* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
 /* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
 
 /* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-
-/* USER CODE BEGIN EV */
-
-/* USER CODE END EV */
+/* Private functions ---------------------------------------------------------*/
 
 /******************************************************************************/
-/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/*            Cortex-M4 Processor Exceptions Handlers                         */
 /******************************************************************************/
+
 /**
-  * @brief This function handles Non maskable interrupt.
+  * @brief  This function handles NMI exception.
+  * @param  None
+  * @retval None
   */
 void NMI_Handler(void)
 {
-  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
-  /* USER CODE END NonMaskableInt_IRQn 0 */
-  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
-  /* USER CODE END NonMaskableInt_IRQn 1 */
 }
 
 /**
-  * @brief This function handles Hard fault interrupt.
+  * @brief  This function handles Hard Fault exception.
+  * @param  None
+  * @retval None
   */
 void HardFault_Handler(void)
 {
-  /* USER CODE BEGIN HardFault_IRQn 0 */
-
-  /* USER CODE END HardFault_IRQn 0 */
+  /* Go to infinite loop when Hard Fault exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
-    /* USER CODE END W1_HardFault_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles Memory management fault.
+  * @brief  This function handles Memory Manage exception.
+  * @param  None
+  * @retval None
   */
 void MemManage_Handler(void)
 {
-  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
-  /* USER CODE END MemoryManagement_IRQn 0 */
+  /* Go to infinite loop when Memory Manage exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
-    /* USER CODE END W1_MemoryManagement_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles Prefetch fault, memory access fault.
+  * @brief  This function handles Bus Fault exception.
+  * @param  None
+  * @retval None
   */
 void BusFault_Handler(void)
 {
-  /* USER CODE BEGIN BusFault_IRQn 0 */
-
-  /* USER CODE END BusFault_IRQn 0 */
+  /* Go to infinite loop when Bus Fault exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
-    /* USER CODE END W1_BusFault_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles Undefined instruction or illegal state.
+  * @brief  This function handles Usage Fault exception.
+  * @param  None
+  * @retval None
   */
 void UsageFault_Handler(void)
 {
-  /* USER CODE BEGIN UsageFault_IRQn 0 */
-
-  /* USER CODE END UsageFault_IRQn 0 */
+  /* Go to infinite loop when Usage Fault exception occurs */
   while (1)
   {
-    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
-    /* USER CODE END W1_UsageFault_IRQn 0 */
   }
 }
 
 /**
-  * @brief This function handles System service call via SWI instruction.
+  * @brief  This function handles SVCall exception.
+  * @param  None
+  * @retval None
   */
 void SVC_Handler(void)
 {
-  /* USER CODE BEGIN SVCall_IRQn 0 */
-
-  /* USER CODE END SVCall_IRQn 0 */
-  /* USER CODE BEGIN SVCall_IRQn 1 */
-
-  /* USER CODE END SVCall_IRQn 1 */
 }
 
 /**
-  * @brief This function handles Debug monitor.
+  * @brief  This function handles Debug Monitor exception.
+  * @param  None
+  * @retval None
   */
 void DebugMon_Handler(void)
 {
-  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
-
-  /* USER CODE END DebugMonitor_IRQn 0 */
-  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
-  /* USER CODE END DebugMonitor_IRQn 1 */
 }
 
 /**
-  * @brief This function handles Pendable request for system service.
+  * @brief  This function handles PendSVC exception.
+  * @param  None
+  * @retval None
   */
 void PendSV_Handler(void)
 {
-  /* USER CODE BEGIN PendSV_IRQn 0 */
-
-  /* USER CODE END PendSV_IRQn 0 */
-  /* USER CODE BEGIN PendSV_IRQn 1 */
-
-  /* USER CODE END PendSV_IRQn 1 */
 }
 
 /**
-  * @brief This function handles System tick timer.
+  * @brief  This function handles SysTick Handler.
+  * @param  None
+  * @retval None
   */
 void SysTick_Handler(void)
 {
-  /* USER CODE BEGIN SysTick_IRQn 0 */
-
-  /* USER CODE END SysTick_IRQn 0 */
-
-  /* USER CODE BEGIN SysTick_IRQn 1 */
-
-  /* USER CODE END SysTick_IRQn 1 */
 }
 
 /******************************************************************************/
-/* STM32G4xx Peripheral Interrupt Handlers                                    */
-/* Add here the Interrupt Handlers for the used peripherals.                  */
-/* For the available peripheral interrupt handler names,                      */
-/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/*                 STM32G4xx Peripherals Interrupt Handlers                   */
+/*  Add here the Interrupt Handler for the used peripheral(s) (EXTI), for the  */
+/*  available peripheral interrupt handler's name please refer to the startup */
+/*  file (startup_stm32g4xx.s).                                               */
 /******************************************************************************/
 
 /**
-  * @brief This function handles EXTI line4 interrupt.
+  * @brief  This function handles external line 4_15 interrupt request.
+  * @param  None
+  * @retval None
   */
-void EXTI4_IRQHandler(void)
+void USER_BUTTON_IRQHANDLER(void)
 {
-  /* USER CODE BEGIN EXTI4_IRQn 0 */
-
-  /* USER CODE END EXTI4_IRQn 0 */
-  if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
+  /* Manage Flags */
+  if(USER_BUTTON_EXTI_IS_ACTIVE_FLAG() != RESET)
   {
-    LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
-    /* USER CODE BEGIN LL_EXTI_LINE_4 */
-    
-    /* USER CODE END LL_EXTI_LINE_4 */
-  }
-  /* USER CODE BEGIN EXTI4_IRQn 1 */
+    USER_BUTTON_EXTI_CLEAR_FLAG();
 
-  /* USER CODE END EXTI4_IRQn 1 */
+    /* Manage code in main.c.*/
+    UserButton_Callback(); 
+  }
 }
 
 /**
-  * @brief This function handles EXTI line[15:10] interrupts.
+  * @}
   */
-void EXTI15_10_IRQHandler(void)
-{
-  /* USER CODE BEGIN EXTI15_10_IRQn 0 */
-
-  /* USER CODE END EXTI15_10_IRQn 0 */
-  if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_13) != RESET)
-  {
-    LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_13);
-    /* USER CODE BEGIN LL_EXTI_LINE_13 */
-
-    /* Manage code in main.c */
-    UserButton_Callback();
-    /* USER CODE END LL_EXTI_LINE_13 */
-  }
-  /* USER CODE BEGIN EXTI15_10_IRQn 1 */
 
-  /* USER CODE END EXTI15_10_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
+/**
+  * @}
+  */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
index 908d4296b..0d3ff46bd 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
@@ -21,9 +21,8 @@
 
 @par Example Description
 
-This example describes how to configure the EXTI 
-and use GPIOs to toggle the user LEDs available on the board when 
-a user button is pressed. This example is based on the
+How to configure the EXTI and use GPIOs to toggle the user LEDs 
+available on the board when a user button is pressed. It is based on the
 STM32G4xx LL API. The peripheral initialization uses LL unitary service
 functions for optimization purposes (performance and size).
 
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
index 726f029af..a44cc0a41 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
@@ -14,10 +14,9 @@ Mcu.Name=STM32G474R(B-C-E)Tx
 Mcu.Package=LQFP64
 Mcu.Pin0=PC13
 Mcu.Pin1=PA5
-Mcu.Pin2=PC4
-Mcu.Pin3=VP_SYS_VS_Systick
-Mcu.Pin4=VP_SYS_VS_DBSignals
-Mcu.PinsNb=5
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32G474RETx
@@ -26,7 +25,6 @@ MxDb.Version=DB.6.0.100
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -40,14 +38,11 @@ PA5.GPIOParameters=GPIO_Label
 PA5.GPIO_Label=LED2
 PA5.Locked=true
 PA5.Signal=GPIO_Output
+PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
+PC13.GPIO_Label=USER_BUTTON
+PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
 PC13.Locked=true
 PC13.Signal=GPXTI13
-PC4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PC4.GPIO_Label=USER_BUTTON
-PC4.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC4.GPIO_PuPd=GPIO_PULLUP
-PC4.Locked=true
-PC4.Signal=GPXTI4
 PinOutPanel.RotationAngle=0
 ProjectManager.AskForMigrate=true
 ProjectManager.BackupPrevious=false
@@ -56,6 +51,8 @@ ProjectManager.ComputerToolchain=false
 ProjectManager.CoupleFile=false
 ProjectManager.DeletePrevious=true
 ProjectManager.DeviceId=STM32G474RETx
+ProjectManager.Example=EXTI_ToggleLedOnIT_Init
+ProjectManager.ExampleSource=CubeFw
 ProjectManager.FreePins=false
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
@@ -128,12 +125,8 @@ RCC.VCOInputFreq_Value=4000000
 RCC.VCOOutputFreq_Value=340000000
 SH.GPXTI13.0=GPIO_EXTI13
 SH.GPXTI13.ConfNb=1
-SH.GPXTI4.0=GPIO_EXTI4
-SH.GPXTI4.ConfNb=1
 VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
 VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
 VP_SYS_VS_Systick.Mode=SysTick
 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
 board=custom
-ProjectManager.Example=EXTI_ToggleLedOnIT_Init
-ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
index 077a66c0d..956e62de2 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
@@ -73,11 +73,11 @@ void UserButton_Callback(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
+#define USER_BUTTON_Pin LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_Port GPIOC
+#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
 #define LED2_Pin LL_GPIO_PIN_5
 #define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
 #ifndef NVIC_PRIORITYGROUP_0
 #define NVIC_PRIORITYGROUP_0         ((uint32_t)0x00000007) /*!< 0 bit  for pre-emption priority,
                                                                  4 bits for subpriority */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
index 3e928ec44..6e2054929 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
@@ -56,7 +56,6 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
 void EXTI15_10_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
index 3c80b077d..f30e63e54 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
@@ -178,31 +178,15 @@ static void MX_GPIO_Init(void)
   /**/
   LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
 
-  /**/
-  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
   /**/
   EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
   EXTI_InitStruct.LineCommand = ENABLE;
   EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
-  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
-  LL_EXTI_Init(&EXTI_InitStruct);
-
-  /**/
-  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
-  EXTI_InitStruct.LineCommand = ENABLE;
-  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
   EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
   LL_EXTI_Init(&EXTI_InitStruct);
 
   /**/
-  LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
-  /**/
-  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
-  /**/
-  LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
+  LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_NO);
 
   /**/
   LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
@@ -216,8 +200,6 @@ static void MX_GPIO_Init(void)
   LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
 
   /* EXTI interrupt init*/
-  NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-  NVIC_EnableIRQ(EXTI4_IRQn);
   NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
   NVIC_EnableIRQ(EXTI15_10_IRQn);
 
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
index 1209a6406..9c59bf31d 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
@@ -200,26 +200,6 @@ void SysTick_Handler(void)
 /* please refer to the startup file (startup_stm32g4xx.s).                    */
 /******************************************************************************/
 
-/**
-  * @brief This function handles EXTI line4 interrupt.
-  */
-void EXTI4_IRQHandler(void)
-{
-  /* USER CODE BEGIN EXTI4_IRQn 0 */
-
-  /* USER CODE END EXTI4_IRQn 0 */
-  if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
-  {
-    LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
-    /* USER CODE BEGIN LL_EXTI_LINE_4 */
-    
-    /* USER CODE END LL_EXTI_LINE_4 */
-  }
-  /* USER CODE BEGIN EXTI4_IRQn 1 */
-
-  /* USER CODE END EXTI4_IRQn 1 */
-}
-
 /**
   * @brief This function handles EXTI line[15:10] interrupts.
   */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
index 70a633b9d..da82944c1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
@@ -58,8 +58,8 @@
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Buffers used for displaying Time and Date */
-uint8_t aShowTime[] = "hh:ms:ss";
-uint8_t aShowDate[] = "dd/mm/aaaa";
+uint8_t aShowTime[16] = "hh:ms:ss";
+uint8_t aShowDate[16] = "dd/mm/aaaa";
 
 #if (USE_TIMEOUT == 1)
 uint32_t Timeout = 0; /* Variable used for Timeout management */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 822b22aaa..3078fcde4 100644
--- a/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
index 73bced99d..d980ad9e3 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
@@ -58,8 +58,8 @@
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Buffers used for displaying Time and Date */
-uint8_t aShowTime[] = "hh:ms:ss";
-uint8_t aShowDate[] = "dd/mm/aaaa";
+uint8_t aShowTime[16] = "hh:ms:ss";
+uint8_t aShowDate[16] = "dd/mm/aaaa";
 
 #if (USE_TIMEOUT == 1)
 uint32_t Timeout = 0; /* Variable used for Timeout management */
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/Release_Notes.html b/Projects/Release_Notes.html
index 5c6d3d392..b04a14808 100644
--- a/Projects/Release_Notes.html
+++ b/Projects/Release_Notes.html
@@ -47,9 +47,50 @@ <h1 id="purpose">Purpose</h1>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history">Update History</h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section8" checked aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V1.5.2 / 15-DEC-2023</label>
+<input type="checkbox" id="collapse-section9" checked aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V1.6.0 / 05-June-2024</label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
+<ul>
+<li>Add new projects for STM32G474E-EVAL1 board (64 in total)</li>
+<li>Fix printf() API implementation to be compliant with IAR 9.x.</li>
+</ul>
+<h2 id="known-limitations">Known Limitations</h2>
+<ul>
+<li>The following STM32CubeIDE project include only Debug configuration :
+<ul>
+<li>STM32G474E-EVAL/Demonstrations/Demo</li>
+</ul></li>
+</ul>
+<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
+<table>
+<caption>Development Toolchains :</caption>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Name</th>
+<th style="text-align: center;">Version</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td style="text-align: left;">IAR Embedded Workbench for ARM (EWARM)toolchain</td>
+<td style="text-align: center;"><strong>V8.50.9</strong></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">RealView Microcontroller DevelopmentKit (MDK-ARM) toolchain</td>
+<td style="text-align: center;"><strong>V5.38</strong></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">STM32CubeIDE toolchain (gcc9_2020_q2_update)</td>
+<td style="text-align: center;"><strong>V1.14.0</strong></td>
+</tr>
+</tbody>
+</table>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V1.5.2 / 15-DEC-2023</label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
 <h3 id="patch-release">Patch Release</h3>
 <ul>
 <li>Fix PWR_STANDBY_RTC examples in order to execute correctly entering/exiting Standby mode.</li>
@@ -270,14 +311,14 @@ <h3 id="projects">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations">Known Limitations</h2>
+<h2 id="known-limitations-1">Known Limitations</h2>
 <ul>
 <li>The following STM32CubeIDE project include only Debug configuration :
 <ul>
 <li>STM32G474E-EVAL/Demonstrations/Demo</li>
 </ul></li>
 </ul>
-<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -306,7 +347,7 @@ <h2 id="development-toolchains-and-compilers">Development Toolchains and Compile
 <div class="collapse">
 <input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V1.5.1 / 17-June-2022</label>
 <div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
 <h3 id="patch-release-1">Patch Release</h3>
 <ul>
 <li>Add and upgrade the Digital Power applications provided for the B-G474E-DPOW1 discovery kit, showcasing the control of Buck and Boost DC-DC converters.</li>
@@ -347,8 +388,8 @@ <h3 id="projects-1">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-1">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-2">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -381,7 +422,7 @@ <h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compi
 <div class="collapse">
 <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V1.5.0 / 10-November-2021</label>
 <div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
 <h3 id="maintenance-release">Maintenance release</h3>
 <p>Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx/91xx devices.</p>
 <table>
@@ -630,8 +671,8 @@ <h3 id="projects-2">Projects</h3>
 </table>
 <p><br />
 </p>
-<h2 id="known-limitations-2">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-3">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -732,7 +773,7 @@ <h2 id="other-compatibilities">Other compatibilities</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V1.4.0 / 28-January-2021</label>
 <div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
 <h3 id="maintenance-release-1">Maintenance release</h3>
 <p>Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx/91xx devices.</p>
 <table>
@@ -1018,8 +1059,8 @@ <h3 id="projects-3">Projects</h3>
 </table>
 <p><br />
 </p>
-<h2 id="known-limitations-3">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-4">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -1116,7 +1157,7 @@ <h2 id="other-compatibilities-1">Other compatibilities</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section4"  aria-hidden="true"> <label for="collapse-section4" aria-hidden="true">V1.2.0 / 14-February-2020</label>
 <div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
 <h3 id="maintenance-release-2">Maintenance release</h3>
 <p>Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx devices.</p>
 <table>
@@ -1387,8 +1428,8 @@ <h3 id="projects-4">Projects</h3>
 </table>
 <p><br />
 </p>
-<h2 id="known-limitations-4">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-5">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -1478,7 +1519,7 @@ <h2 id="other-compatibilities-2">Other compatibilities</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V1.1.0 / 28-June-2019</label>
 <div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
 <h3 id="maintenance-release-3">Maintenance release</h3>
 <p>Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx devices and introducing Discovery Kit B-G474E-DPOW1.</p>
 <table>
@@ -1725,8 +1766,8 @@ <h3 id="projects-5">Projects</h3>
 </table>
 <p><br />
 </p>
-<h2 id="known-limitations-5">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-6">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -1816,7 +1857,7 @@ <h2 id="other-compatibilities-3">Other compatibilities</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V1.0.1 / 29-May-2019</label>
 <div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
 <h3 id="patch-release-2">Patch Release</h3>
 <p>HRTIM/BasicPWM project released in V1.0.0 is now split in 4 different projects on NUCLEO-G474RE (using HAL and Low-layer interfaces):</p>
 <ul>
@@ -1860,7 +1901,7 @@ <h3 id="projects-6">Projects</h3>
 <div class="collapse">
 <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V1.0.0 / 12-April-2019</label>
 <div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
 <h3 id="first-release">First release</h3>
 <p>First Official release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx devices and introducing NUCLEO-G431KB, NUCLEO-G431RB, NUCLEO-G474RE and STM32G474E-EVAL boards.</p>
 <h2 id="contents-7">Contents</h2>
@@ -2049,12 +2090,12 @@ <h3 id="projects-7">Projects</h3>
 </table>
 <p><br />
 </p>
-<h2 id="known-limitations-6">Known Limitations</h2>
+<h2 id="known-limitations-7">Known Limitations</h2>
 <ul>
 <li>STM32G474E-EVAL : Project Template in HAL is not yet ported on Keil and SW4STM32 toolchains</li>
 <li>USB Device : Warning in compilation of Keil and SW4STM32 Toolchains ("__ALIGN_END" is redefined in the usbd_def.h)</li>
 </ul>
-<h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-7">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
diff --git a/Projects/STM32CubeProjectsList.html b/Projects/STM32CubeProjectsList.html
index f86e5230e..902940fa2 100644
--- a/Projects/STM32CubeProjectsList.html
+++ b/Projects/STM32CubeProjectsList.html
@@ -1,9 +1,8 @@
 <!DOCTYPE html>
-<html><head><title>Projects Overview</title>
+<html>
 
-
-  
-    
+  <head>
+    <title>Projects Overview</title>
     <style>
       .descriptionColumn { min-width:550px;}
       em{color:red;font-weight: bold;}
@@ -13,69 +12,42 @@
       .picture{text-align: center}
       .copyright{text-align: center}
       h1{text-align: center;font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);}
-    </style></head><body>
+    </style>
+  </head>
+  <body>
 
     <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 
-    <p class="copyright">Copyright 2019 STMicroelectronics</p>
+    <p class="copyright">Copyright 2021 STMicroelectronics</p>
 
     <div class="picture">
-      <img alt="" id="_x0000_i1025" src="../_htmresc/st_logo.png" style="border: 0px solid ; width: 104px; height: 77px;">
+      <img alt="" id="_x0000_i1025" src="../_htmresc/st_logo_2020.png" style="border: 0px solid ; width: 104px; height: 77px;"/>
     </div>
 
-    <p>The
-STM32CubeG4 Firmware package comes with a rich set of examples running
-on STMicroelectronics boards, organized by board and provided with
-preconfigured projects for the main supported toolchains.</p>
+    <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 
     <div class="picture">
-      <img alt="" src="../_htmresc/STM32Cube.bmp">
+      <img alt="" src="../_htmresc/STM32Cube.bmp"/>
     </div>
 
     <p>The examples are classified depending on the STM32Cube level they apply to, and are named as follows:</p>
 
     <ul>
-      <li id="Examples"><b>Examples</b>
-uses only the HAL and BSP drivers (Middleware not used), having as
-objective to demonstrate the product/peripherals features and usage.
-The examples are organized per peripheral (a folder for each
-peripheral, ex. TIM) and offers different complexity level from basic
-usage of a given peripheral (ex. PWM generation using timer) till
-integration of several peripherals(use DAC for signals generation with
-synchronization from TIM6 and DMA). Board resources usage is reduced to
-the strict minimum.</li>
-      <li id="Examples_LL"><b>Examples_LL</b>
-uses only the LL drivers (HAL and Middleware not used), offering
-optimum implementation of typical use cases of the peripheral features
-and configuration procedures. The examples are organized per peripheral
-(a folder for each peripheral, ex. TIM) and runs exclusively on Nucleo
-board.</li>
-      <li id="Examples_MIX"><b>Examples_MIX</b> uses only
-HAL, BSP and LL drivers (Middleware are not used), having as objective
-to demonstrate how to use both HAL and LL APIs in the same application,
-to combine the advantages of both APIs (HAL offers high level and
-functionalities oriented APIs, with high portability level and hide
-product or IPs complexity to end user. While LL offers low level APIs
-at registers level with better optimization). The examples are
-organized per peripheral (a folder for each peripheral, ex. TIM) and
-runs exclusively on Nucleo board.</li>
-      <li id="Applications"><b>Applications</b>
-intends to demonstrate the product performance and how to use the
-different Middleware stacks available. The Applications are organized
-per Middleware (a folder for each Middleware, ex. USB Host) or product
-feature that need high level firmware bricks (ex. Audio). Integration
-Applications that use several Middleware stacks are provided as well.</li>
+      <li id="Examples"><b>Examples</b> uses only the HAL and BSP drivers (Middleware not used), having as objective to demonstrate the product/peripherals features and usage. The examples are organized per peripheral (a folder for each peripheral, ex. TIM) and offers different complexity level from basic usage of a given peripheral (ex. PWM generation using timer) till integration of several peripherals(use DAC for signals generation with synchronization from TIM6 and DMA). Board resources usage is reduced to the strict minimum.</li>
+      <li id="Examples_LL"><b>Examples_LL</b> uses only the LL drivers (HAL and Middleware not used), offering optimum implementation of typical use cases of the peripheral features and configuration procedures. The examples are organized per peripheral (a folder for each peripheral, ex. TIM) and runs exclusively on Nucleo board.</li>
+      <li id="Examples_MIX"><b>Examples_MIX</b> uses only HAL, BSP and LL drivers (Middleware are not used), having as objective to demonstrate how to use both HAL and LL APIs in the same application, to combine the advantages of both APIs (HAL offers high level and functionalities oriented APIs, with high portability level and hide product or IPs complexity to end user. While LL offers low level APIs at registers level with better optimization). The examples are organized per peripheral (a folder for each peripheral, ex. TIM) and runs exclusively on Nucleo board.</li>
+      <li id="Applications"><b>Applications</b> intends to demonstrate the product performance and how to use the different Middleware stacks available. The Applications are organized per Middleware (a folder for each Middleware, ex. USB Host) or product feature that need high level firmware bricks (ex. Audio). Integration Applications that use several Middleware stacks are provided as well.</li>
       <li id="Demonstrations"><b>Demonstrations</b> aims to integrate and run the maximum of peripherals and Middleware stacks to showcase the product features and performance.</li>
       <li>A Template project is provided to allow user to quickly build any firmware application on a given board.</li>
     </ul>
 
-    <p>The examples are located under STM32Cube_FW_STM32CubeG4_VX.Y.Z\Projects\, and all of them have the same structure:</p>
+    <p>The examples are located under STM32Cube_FW_G4_VX.Y.Z\Projects\, and all of them have the same structure:</p>
 
     <ul>
       <li>\Inc folder that contains all header files.</li>
       <li>\Src folder for the sources code.</li>
-      <li>\EWARM and \MDK-ARM folders contain the preconfigured project for each toolchain.</li>
-      <li>readme.txt describing the example behavior and the environment required to run the example.</li>
+      <li>\EWARM, \MDK-ARM and \STM32CubeIDE folders contain the preconfigured project for each toolchain.</li>
+      <li>A readme describing the example behavior and the environment required to run the example.</li>
     </ul>
 
     <p>To run the example, you have to do the following:</p>
@@ -83,29 +55,21 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
     <ul>
       <li>Open the example using your preferred toolchain.</li>
       <li>Rebuild all files and load the image into target memory.</li>
-      <li>Run the example by following the readme.txt instructions.</li>
+      <li>Run the example by following the readme instructions.</li>
       <li>
-        <i><u>Note</u>:
-refer to section "Development Toolchains and Compilers" and "Supported
-Devices and EVAL boards" of the Firmware package release notes to know
-about the SW/HW environment used for the Firmware development and
-validation. The correct operation of the provided examples is not
-guaranteed on some environments, for example when using different
-compiler or board versions.</i>
+        <i><u>Note</u>: refer to section "Development Toolchains and Compilers" and "Supported Devices and EVAL, Nucleo and Discovery boards" of the Firmware package release notes to know about the SW/HW environment used for the Firmware development and validation. The correct operation of the provided examples is not guaranteed on some environments, for example when using different compiler or board versions.</i>
       </li>
     </ul>
 
-    <p>The
-provided examples can be tailored to run on any compatible hardware;
-user simply need to update the BSP drivers for his board, if it has the
-same hardware functions (LED, LCD display, pushbuttons...etc.). The BSP
-is based on a modular architecture that allows it to be ported easily
-to any hardware by just implementing the low level routines.</p>
+    <p>The provided examples can be tailored to run on any compatible hardware; user simply need to update the BSP drivers for his board, if it has the same hardware functions (LED, LCD display, pushbuttons...etc.). The BSP is based on a modular architecture that allows it to be ported easily to any hardware by just implementing the low level routines.</p>
 
-    <p>The table below contains the list of examples provided within STM32CubeG4 Firmware package.</p>
+    <p>
+      <div>The table below contains the list of examples provided within STM32Cube_FW_G4 Firmware package.</div>
+      <div>In this table, the label <b>CubeMX</b> means the projects have been created using <a href="https://www.st.com/en/development-tools/stm32cubemx.html" target="_blank">STM32CubeMX</a>, the STM32Cube initialization code generator. Those projects can be opened with this tools to modify the projects itself. The others projects are manually created to demonstrate the product features.</div>
+    </p>
 
     <p id="STM32G4xxImportantLink">
-      </p><div>Reference materials available on <a href="http://www.st.com/stm32cubefw" target="_blank">www.st.com/stm32cubefw</a></div>
+      <div>Reference materials available on <a href="http://www.st.com/stm32cubefw" target="_blank">www.st.com/stm32cubefw</a></div>
       <ul>
         <li><a href="https://www.st.com/resource/en/user_manual/DM00550255.pdf" target="_blank">UM2492</a>: Getting started with STM32CubeG4 for STM32G4xx Series.</li>
         <li><a href="https://www.st.com/resource/en/user_manual/DM00610707.pdf" target="_blank">UM2570</a>: Description of STM32G4 HAL and low-layer drivers</li>
@@ -114,13 +78,14 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <li><a href="http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_manual/DM00105259.pdf" target="_blank">UM1721</a>: Developing Applications on STM32Cube with FatFs.</li>
         <li><a href="http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_manual/DM00105262.pdf" target="_blank">UM1722</a>: Developing Applications on STM32Cube with RTOS.</li>
       </ul>
-    
-		<table bgcolor="#f0f0ff" border="1">
-			<tbody><tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
+    </p>
+		<table border='1' bgcolor='#f0f0fF' >
+			<tr align=center style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;">
 				<td><b>Level</b></td>
 				<td><b>Module Name</b></td>
 				<td><b>Project Name</b></td>
 				<td class="descriptionColumn"><b>Description</b></td>
+				<td>STM32G474E-EVAL1</td>
 				<td>STM32G474E-EVAL</td>
 				<td>NUCLEO-G491RE</td>
 				<td>NUCLEO-G474RE</td>
@@ -128,23 +93,25 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 				<td>NUCLEO-G431KB</td>
 				<td>B-G474E-DPOW1</td>
 			</tr>
-      <tr align="center">
-        <td style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" rowspan="2"><p id="Templates">Templates</p></td>
-        <td rowspan="1" align="left"><p id="-">-</p></td>
-        <td align="left"><p id="Starter project">Starter project</p></td>
-        <td align="left">
+      <tr align=center>
+        <td style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" rowspan=2><p id="Templates">Templates</p></td>
+        <td align=left rowspan=1><p id="-">-</p></td>
+        <td align=left><p id="Starter project">Starter project</p></td>
+        <td align=left>
 This project provides a reference template based on the STM32Cube HAL API that can be used
 to build any firmware application.
 </td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
-        <td colspan="3"><b>Total number of templates: 6</b></td>
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
+        <td colspan="3"><b>Total number of templates: 7</b></td>
+        <td>1</td>
         <td>1</td>
         <td>1</td>
         <td>1</td>
@@ -152,22 +119,24 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <td>1</td>
         <td>1</td>
       </tr>
-      <tr align="center">
-        <td style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" rowspan="2"><p id="Templates_LL">Templates_LL</p></td>
-        <td rowspan="1" align="left"><p id="-">-</p></td>
-        <td align="left"><p id="Starter project">Starter project</p></td>
-        <td align="left">
+      <tr align=center>
+        <td style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" rowspan=2><p id="Templates_LL">Templates_LL</p></td>
+        <td align=left rowspan=1><p id="-">-</p></td>
+        <td align=left><p id="Starter project">Starter project</p></td>
+        <td align=left>
 This projects provides a reference template through the LL API that can be used to build any firmware application.
 </td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
-        <td colspan="3"><b>Total number of templates_ll: 6</b></td>
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
+        <td colspan="3"><b>Total number of templates_ll: 7</b></td>
+        <td>1</td>
         <td>1</td>
         <td>1</td>
         <td>1</td>
@@ -175,529 +144,568 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <td>1</td>
         <td>1</td>
       </tr>
-      <tr align="center">
-        <td style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" rowspan="130"><p id="Examples">Examples</p></td>
-        <td rowspan="1" align="left"><p id="-">-</p></td>
-        <td align="left"><p id="BSP">BSP</p></td>
-        <td align="left">
+      <tr align=center>
+        <td style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" rowspan=131><p id="Examples">Examples</p></td>
+        <td align=left rowspan=1><p id="-">-</p></td>
+        <td align=left><p id="BSP">BSP</p></td>
+        <td align=left>
 This example provides a short description of how to use the BSP to interface with
-the EVAL board
+the EVAL1 board
 
 At the beginning of the main program the HAL_Init() function is called to reset
 all the peripherals, initialize the Flash interface and the systick.
 </td>
-        <td><font color="green" size="5">X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
+        <td><font size="5" color=green>X</font></td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="ADC">ADC</p></td>
-        <td align="left"><p id="ADC_ContinuousConversion_TriggerSW">ADC_ContinuousConversion_TriggerSW</p></td>
-        <td align="left">This example provides a short description of how to use the ADC peripheral to
+      <tr align=center>
+        <td align=left rowspan=4><p id="ADC">ADC</p></td>
+        <td align=left><p id="ADC_ContinuousConversion_TriggerSW">ADC_ContinuousConversion_TriggerSW</p></td>
+        <td align=left>This example provides a short description of how to use the ADC peripheral to
 perform conversions in continuous mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_GainCompensation">ADC_GainCompensation</p></td>
-        <td align="left">Use ADC Gain compensation feature to get directly voltage in mVolt from conversion
+      <tr align=center>
+        <td align=left><p id="ADC_GainCompensation">ADC_GainCompensation</p></td>
+        <td align=left>Use ADC Gain compensation feature to get directly voltage in mVolt from conversion
 without need of data post computing.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_GroupsRegularInjected">ADC_GroupsRegularInjected</p></td>
-        <td align="left">Use ADC to perform conversions using the two ADC groups: regular group
+      <tr align=center>
+        <td align=left><p id="ADC_GroupsRegularInjected">ADC_GroupsRegularInjected</p></td>
+        <td align=left>Use ADC to perform conversions using the two ADC groups: regular group
 for ADC conversion on main stream and injected group for ADC conversions
 limited on specific events (conversions injected within main conversions
 stream).
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_OffsetCompensation">ADC_OffsetCompensation</p></td>
-        <td align="left">Use ADC Offset compensation feature to translate directly conversion result from
+      <tr align=center>
+        <td align=left><p id="ADC_OffsetCompensation">ADC_OffsetCompensation</p></td>
+        <td align=left>Use ADC Offset compensation feature to translate directly conversion result from
 the ADC range to an application specific range without need of post computing.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="COMP">COMP</p></td>
-        <td align="left"><p id="COMP_CompareGpioVsDacInt_OutputGpio">COMP_CompareGpioVsDacInt_OutputGpio</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="COMP">COMP</p></td>
+        <td align=left><p id="COMP_CompareGpioVsDacInt_OutputGpio">COMP_CompareGpioVsDacInt_OutputGpio</p></td>
+        <td align=left>
 This example shows how to configure the COMP peripheral to compare the external
 voltage applied on a specific pin with a sawtooth signal generated by a DAC. 
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="COMP_CompareGpioVsVrefInt_IT">COMP_CompareGpioVsVrefInt_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="COMP_CompareGpioVsVrefInt_IT">COMP_CompareGpioVsVrefInt_IT</p></td>
+        <td align=left>
 How to configure the COMP peripheral to compare the external
 voltage applied on a specific pin with the Internal Voltage Reference. 
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="COMP_CompareGpioVsVrefInt_OutputGpio">COMP_CompareGpioVsVrefInt_OutputGpio</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="COMP_CompareGpioVsVrefInt_OutputGpio">COMP_CompareGpioVsVrefInt_OutputGpio</p></td>
+        <td align=left>
 This example shows how to configure the COMP peripheral to compare the external
 voltage applied on a specific pin with an internal reference. 
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="COMP_OutputBlanking">COMP_OutputBlanking</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="COMP_OutputBlanking">COMP_OutputBlanking</p></td>
+        <td align=left>
 How to use the comparator-peripheral output blanking feature. The purpose of the
 output blanking feature in motor control is to prevent tripping of the current
 regulation upon short current spikes at the beginning of the PWM period.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="CORDIC">CORDIC</p></td>
-        <td align="left"><p id="CORDIC_SinCos_DMA_Perf">CORDIC_SinCos_DMA_Perf</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="CORDIC">CORDIC</p></td>
+        <td align=left><p id="CORDIC_SinCos_DMA_Perf">CORDIC_SinCos_DMA_Perf</p></td>
+        <td align=left>
 How to use the CORDIC peripheral to calculate sines and cosines array in DMA mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CORDIC_Sin_DMA">CORDIC_Sin_DMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CORDIC_Sin_DMA">CORDIC_Sin_DMA</p></td>
+        <td align=left>
 How to use the CORDIC peripheral to calculate array of sines in DMA mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="CORTEX">CORTEX</p></td>
-        <td align="left"><p id="CORTEXM_MPU">CORTEXM_MPU</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="CORTEX">CORTEX</p></td>
+        <td align=left><p id="CORTEXM_MPU">CORTEXM_MPU</p></td>
+        <td align=left>
 Presentation of the MPU feature. This example configures a memory area as 
 privileged read-only, and attempts to perform read and write operations in
 different modes.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CORTEXM_ModePrivilege">CORTEXM_ModePrivilege</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CORTEXM_ModePrivilege">CORTEXM_ModePrivilege</p></td>
+        <td align=left>
 How to modify the Thread mode privilege access and stack. Thread mode is entered
 on reset or when returning from an exception.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CORTEXM_ProcessStack">CORTEXM_ProcessStack</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CORTEXM_ProcessStack">CORTEXM_ProcessStack</p></td>
+        <td align=left>
 How to modify the Thread mode stack. Thread mode is entered on reset, and can be
 entered as a result of an exception return.  
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CORTEXM_SysTick">CORTEXM_SysTick</p></td>
-        <td align="left">  
+      <tr align=center>
+        <td align=left><p id="CORTEXM_SysTick">CORTEXM_SysTick</p></td>
+        <td align=left>  
 How to use the default SysTick configuration with a 1 ms timebase to toggle LEDs.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="CRC">CRC</p></td>
-        <td align="left"><p id="CRC_Bytes_Stream_7bit_CRC">CRC_Bytes_Stream_7bit_CRC</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="CRC">CRC</p></td>
+        <td align=left><p id="CRC_Bytes_Stream_7bit_CRC">CRC_Bytes_Stream_7bit_CRC</p></td>
+        <td align=left>
 How to configure the CRC using the HAL API. The CRC (cyclic
 redundancy check) calculation unit computes 7-bit CRC codes derived from buffers
 of 8-bit data (bytes). The user-defined generating polynomial is manually set
 to 0x65, that is, X^7 + X^6 + X^5 + X^2 + 1, as used in the Train Communication
 Network, IEC 60870-5[17].
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CRC_Data_Reversing_16bit_CRC">CRC_Data_Reversing_16bit_CRC</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CRC_Data_Reversing_16bit_CRC">CRC_Data_Reversing_16bit_CRC</p></td>
+        <td align=left>
 How to configure the CRC using the HAL API. The CRC (cyclic
 redundancy check) calculation unit computes a 16-bit CRC code derived from a
 buffer of 8-bit data (bytes). Input and output data reversal features are
 enabled. The user-defined generating polynomial is manually set to 0x1021,
 that is, X^16 + X^12 + X^5 + 1 which is the CRC-CCITT generating polynomial.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CRC_Example">CRC_Example</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CRC_Example">CRC_Example</p></td>
+        <td align=left>
 How to configure the CRC using the HAL API. The CRC (cyclic
 redundancy check) calculation unit computes the CRC code of a given buffer of
 32-bit data words, using a fixed generator polynomial (0x4C11DB7).
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CRC_UserDefinedPolynomial">CRC_UserDefinedPolynomial</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CRC_UserDefinedPolynomial">CRC_UserDefinedPolynomial</p></td>
+        <td align=left>
 How to configure the CRC using the HAL API. The CRC (cyclic
 redundancy check) calculation unit computes the 8-bit CRC code for a given
 buffer of 32-bit data words, based on a user-defined generating polynomial.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="CRYP">CRYP</p></td>
-        <td align="left"><p id="CRYP_DMA">CRYP_DMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="CRYP">CRYP</p></td>
+        <td align=left><p id="CRYP_DMA">CRYP_DMA</p></td>
+        <td align=left>
 How to use the AES peripheral to encrypt and decrypt data using AES 128
 Algorithm with ECB chaining mode in DMA mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="Cortex">Cortex</p></td>
-        <td align="left"><p id="CORTEXM_MPU">CORTEXM_MPU</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="Cortex">Cortex</p></td>
+        <td align=left><p id="CORTEXM_MPU">CORTEXM_MPU</p></td>
+        <td align=left>
 Presentation of the MPU feature. This example configures a memory area as 
 privileged read-only, and attempts to perform read and write operations in
 different modes.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CORTEXM_ModePrivilege">CORTEXM_ModePrivilege</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CORTEXM_ModePrivilege">CORTEXM_ModePrivilege</p></td>
+        <td align=left>
 How to modify the Thread mode privilege access and stack. Thread mode is entered
 on reset or when returning from an exception.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CORTEXM_ProcessStack">CORTEXM_ProcessStack</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CORTEXM_ProcessStack">CORTEXM_ProcessStack</p></td>
+        <td align=left>
 How to modify the Thread mode stack. Thread mode is entered on reset, and can be
 entered as a result of an exception return.  
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CORTEXM_SysTick">CORTEXM_SysTick</p></td>
-        <td align="left">  
+      <tr align=center>
+        <td align=left><p id="CORTEXM_SysTick">CORTEXM_SysTick</p></td>
+        <td align=left>  
 How to use the default SysTick configuration with a 1 ms timebase to toggle LEDs.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="DAC">DAC</p></td>
-        <td align="left"><p id="DAC_DMADoubleDataMode">DAC_DMADoubleDataMode</p></td>
-        <td align="left">Use DAC DMA double data mode to save AHB bandwidth and to be able to output 2 different
+      <tr align=center>
+        <td align=left rowspan=4><p id="DAC">DAC</p></td>
+        <td align=left><p id="DAC_DMADoubleDataMode">DAC_DMADoubleDataMode</p></td>
+        <td align=left>Use DAC DMA double data mode to save AHB bandwidth and to be able to output 2 different
 250kHz sine wave sampled at 15MSps by 2 different DAC converters.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="DAC_DualConversion">DAC_DualConversion</p></td>
-        <td align="left">Use DAC dual channel mode to generate signal on both DAC channels at the same time.
+      <tr align=center>
+        <td align=left><p id="DAC_DualConversion">DAC_DualConversion</p></td>
+        <td align=left>Use DAC dual channel mode to generate signal on both DAC channels at the same time.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="DAC_DualConversionFromDMA">DAC_DualConversionFromDMA</p></td>
-        <td align="left">Use DAC dual channel mode with DMA to generate signal on both DAC channels at the same time.
+      <tr align=center>
+        <td align=left><p id="DAC_DualConversionFromDMA">DAC_DualConversionFromDMA</p></td>
+        <td align=left>Use DAC dual channel mode with DMA to generate signal on both DAC channels at the same time.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="DAC_SignalsGeneration2">DAC_SignalsGeneration2</p></td>
-        <td align="left">Use the DAC peripheral to generate several signals using the DMA
+      <tr align=center>
+        <td align=left><p id="DAC_SignalsGeneration2">DAC_SignalsGeneration2</p></td>
+        <td align=left>Use the DAC peripheral to generate several signals using the DMA
 controller and the DAC internal wave generator.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="DMA">DMA</p></td>
-        <td align="left"><p id="DMA_FLASHToRAM">DMA_FLASHToRAM</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="DMA">DMA</p></td>
+        <td align=left><p id="DMA_FLASHToRAM">DMA_FLASHToRAM</p></td>
+        <td align=left>
 How to use a DMA to transfer a word data buffer from Flash memory to embedded 
 SRAM through the HAL API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="DMA_MUXSYNC">DMA_MUXSYNC</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="DMA_MUXSYNC">DMA_MUXSYNC</p></td>
+        <td align=left>
 How to use the DMA with the DMAMUX to synchronize a transfer with the LPTIM1
 output signal. USART1 is used in DMA synchronized mode to send a countdown from
 10 to 00, with a period of 2 seconds. 
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="FDCAN">FDCAN</p></td>
-        <td align="left"><p id="FDCAN_Classic_Frame_Networking">FDCAN_Classic_Frame_Networking</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="FDCAN">FDCAN</p></td>
+        <td align=left><p id="FDCAN_Classic_Frame_Networking">FDCAN_Classic_Frame_Networking</p></td>
+        <td align=left>
 How to configure the FDCAN peripheral to send and receive Classic CAN frames.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FDCAN_Com_IT">FDCAN_Com_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FDCAN_Com_IT">FDCAN_Com_IT</p></td>
+        <td align=left>
 How to achieve Interrupt Process Communication between two FDCAN units.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FDCAN_Com_polling">FDCAN_Com_polling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FDCAN_Com_polling">FDCAN_Com_polling</p></td>
+        <td align=left>
 How to achieve Polling Process Communication between two FDCAN units.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FDCAN_Loopback">FDCAN_Loopback</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FDCAN_Loopback">FDCAN_Loopback</p></td>
+        <td align=left>
 How to configure the FDCAN to operate in loopback mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="FLASH">FLASH</p></td>
-        <td align="left"><p id="FLASH_DualBoot">FLASH_DualBoot</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="FLASH">FLASH</p></td>
+        <td align=left><p id="FLASH_DualBoot">FLASH_DualBoot</p></td>
+        <td align=left>
 This example guides you through the different configuration steps by mean of HAL API
-how to program bank1 and bank2 of the STM32G4xx internal Flash memory mounted on STM32G474E-EVAL Rev B
+how to program bank1 and bank2 of the STM32G4xx internal Flash memory mounted on STM32G474E-EVAL1 Rev B
 and swap between both of them.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FLASH_EraseProgram">FLASH_EraseProgram</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FLASH_EraseProgram">FLASH_EraseProgram</p></td>
+        <td align=left>
 How to configure and use the FLASH HAL API to erase and program the internal
 Flash memory.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FLASH_FastProgram">FLASH_FastProgram</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FLASH_FastProgram">FLASH_FastProgram</p></td>
+        <td align=left>
 How to configure and use the FLASH HAL API to erase and fast program the
 internal Flash memory.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FLASH_WriteProtection">FLASH_WriteProtection</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FLASH_WriteProtection">FLASH_WriteProtection</p></td>
+        <td align=left>
 How to configure and use the FLASH HAL API to enable and disable the write
 protection of the internal Flash memory.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="6" align="left"><p id="FMAC">FMAC</p></td>
-        <td align="left"><p id="FMAC_Adaptive_FIR_AN5305">FMAC_Adaptive_FIR_AN5305</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=6><p id="FMAC">FMAC</p></td>
+        <td align=left><p id="FMAC_Adaptive_FIR_AN5305">FMAC_Adaptive_FIR_AN5305</p></td>
+        <td align=left>
 How to use the FMAC peripheral to implement an adaptive FIR filter in DMA mode.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FMAC_Buck_VoltageMode_HW_AN5305">FMAC_Buck_VoltageMode_HW_AN5305</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FMAC_Buck_VoltageMode_HW_AN5305">FMAC_Buck_VoltageMode_HW_AN5305</p></td>
+        <td align=left>
 How to use the FMAC peripheral to implement a 3p3z controller.
 </td>
         <td>-</td>
@@ -705,359 +713,387 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FMAC_FIR_DMAToIT">FMAC_FIR_DMAToIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FMAC_FIR_DMAToIT">FMAC_FIR_DMAToIT</p></td>
+        <td align=left>
 How to use the FMAC peripheral to perform a FIR filter from DMA mode to IT mode.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FMAC_FIR_PollingToIT">FMAC_FIR_PollingToIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FMAC_FIR_PollingToIT">FMAC_FIR_PollingToIT</p></td>
+        <td align=left>
 How to use the FMAC peripheral to perform a FIR filter from polling mode to IT mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FMAC_IIR_ITToPolling">FMAC_IIR_ITToPolling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FMAC_IIR_ITToPolling">FMAC_IIR_ITToPolling</p></td>
+        <td align=left>
 How to use the FMAC peripheral to perform an IIR filter from IT mode to polling mode.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FMAC_IIR_PollingToDMA">FMAC_IIR_PollingToDMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FMAC_IIR_PollingToDMA">FMAC_IIR_PollingToDMA</p></td>
+        <td align=left>
 How to use the FMAC peripheral to perform an IIR filter from polling mode to DMA mode.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="FMC">FMC</p></td>
-        <td align="left"><p id="FMC_SRAM">FMC_SRAM</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="FMC">FMC</p></td>
+        <td align=left><p id="FMC_SRAM">FMC_SRAM</p></td>
+        <td align=left>
 This example describes how to configure the FMC controller to access the SRAM
 memory.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="GPIO">GPIO</p></td>
-        <td align="left"><p id="GPIO_EXTI">GPIO_EXTI</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="GPIO">GPIO</p></td>
+        <td align=left><p id="GPIO_EXTI">GPIO_EXTI</p></td>
+        <td align=left>
 How to configure external interrupt lines.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="GPIO_IOToggle">GPIO_IOToggle</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="GPIO_IOToggle">GPIO_IOToggle</p></td>
+        <td align=left>
 How to configure and use GPIOs through the HAL API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="HAL">HAL</p></td>
-        <td align="left"><p id="HAL_TimeBase_TIM">HAL_TimeBase_TIM</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="HAL">HAL</p></td>
+        <td align=left><p id="HAL_TimeBase_TIM">HAL_TimeBase_TIM</p></td>
+        <td align=left>
 How to customize HAL using a general-purpose timer as main source of time base 
 instead of Systick.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="HRTIM">HRTIM</p></td>
-        <td align="left"><p id="HRTIM_Basic_ArbitraryWaveform">HRTIM_Basic_ArbitraryWaveform</p></td>
-        <td align="left">  This example describes how to generate basic non-PWM waveforms with the 
+      <tr align=center>
+        <td align=left rowspan=4><p id="HRTIM">HRTIM</p></td>
+        <td align=left><p id="HRTIM_Basic_ArbitraryWaveform">HRTIM_Basic_ArbitraryWaveform</p></td>
+        <td align=left>  This example describes how to generate basic non-PWM waveforms with the 
   HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Basic_MultiplePWM">HRTIM_Basic_MultiplePWM</p></td>
-        <td align="left">  This example describes how to generate basic PWM waveforms PWM on multiple outputs 
+      <tr align=center>
+        <td align=left><p id="HRTIM_Basic_MultiplePWM">HRTIM_Basic_MultiplePWM</p></td>
+        <td align=left>  This example describes how to generate basic PWM waveforms PWM on multiple outputs 
   with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Basic_PWMMaster">HRTIM_Basic_PWMMaster</p></td>
-        <td align="left">  This example describes how to generate basic PWM waveforms with HRTIM timers 
+      <tr align=center>
+        <td align=left><p id="HRTIM_Basic_PWMMaster">HRTIM_Basic_PWMMaster</p></td>
+        <td align=left>  This example describes how to generate basic PWM waveforms with HRTIM timers 
   other than the timing unit itself, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Basic_SinglePWM">HRTIM_Basic_SinglePWM</p></td>
-        <td align="left">  This example describes how to check HRTIM outputs and to generate elementary
+      <tr align=center>
+        <td align=left><p id="HRTIM_Basic_SinglePWM">HRTIM_Basic_SinglePWM</p></td>
+        <td align=left>  This example describes how to check HRTIM outputs and to generate elementary
   PWM waveforms with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="6" align="left"><p id="I2C">I2C</p></td>
-        <td align="left"><p id="I2C_TwoBoards_AdvComIT">I2C_TwoBoards_AdvComIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=6><p id="I2C">I2C</p></td>
+        <td align=left><p id="I2C_TwoBoards_AdvComIT">I2C_TwoBoards_AdvComIT</p></td>
+        <td align=left>
 How to handle I2C data buffer transmission/reception between two boards, 
 using an interrupt.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_ComDMA">I2C_TwoBoards_ComDMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_ComDMA">I2C_TwoBoards_ComDMA</p></td>
+        <td align=left>
 How to handle I2C data buffer transmission/reception between two boards, 
 via DMA.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_ComIT">I2C_TwoBoards_ComIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_ComIT">I2C_TwoBoards_ComIT</p></td>
+        <td align=left>
 How to handle I2C data buffer transmission/reception between two boards, 
 using an interrupt.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_ComPolling">I2C_TwoBoards_ComPolling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_ComPolling">I2C_TwoBoards_ComPolling</p></td>
+        <td align=left>
 How to handle I2C data buffer transmission/reception between two boards, 
 in polling mode.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_RestartComIT">I2C_TwoBoards_RestartComIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_RestartComIT">I2C_TwoBoards_RestartComIT</p></td>
+        <td align=left>
 How to handle single I2C data buffer transmission/reception between two boards, 
 in interrupt mode and with restart condition.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_WakeUpFromStop">I2C_WakeUpFromStop</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_WakeUpFromStop">I2C_WakeUpFromStop</p></td>
+        <td align=left>
 How to handle I2C data buffer transmission/reception between two boards, 
 using an interrupt when the device is in Stop mode.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="IWDG">IWDG</p></td>
-        <td align="left"><p id="IWDG_Reset">IWDG_Reset</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="IWDG">IWDG</p></td>
+        <td align=left><p id="IWDG_Reset">IWDG_Reset</p></td>
+        <td align=left>
 How to handle the IWDG reload counter and simulate a software fault that generates 
 an MCU IWDG reset after a preset laps of time.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="IWDG_WindowMode">IWDG_WindowMode</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="IWDG_WindowMode">IWDG_WindowMode</p></td>
+        <td align=left>
 How to periodically update the IWDG reload counter and simulate a software fault that generates 
 an MCU IWDG reset after a preset laps of time.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="LPTIM">LPTIM</p></td>
-        <td align="left"><p id="LPTIM_PWMExternalClock">LPTIM_PWMExternalClock</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="LPTIM">LPTIM</p></td>
+        <td align=left><p id="LPTIM_PWMExternalClock">LPTIM_PWMExternalClock</p></td>
+        <td align=left>
 How to configure and use, through the HAL LPTIM API, the LPTIM peripheral using an external counter clock, 
 to generate a PWM signal at the lowest power consumption.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="LPTIM_PWM_LSE">LPTIM_PWM_LSE</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="LPTIM_PWM_LSE">LPTIM_PWM_LSE</p></td>
+        <td align=left>
 How to configure and use, through the HAL LPTIM API, the LPTIM peripheral using LSE 
 as counter clock, to generate a PWM signal, in a low-power mode.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="LPTIM_PulseCounter">LPTIM_PulseCounter</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="LPTIM_PulseCounter">LPTIM_PulseCounter</p></td>
+        <td align=left>
 How to configure and use, through the LPTIM HAL API, the LPTIM peripheral 
 to count pulses.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="LPTIM_Timeout">LPTIM_Timeout</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="LPTIM_Timeout">LPTIM_Timeout</p></td>
+        <td align=left>
 How to implement, through the HAL LPTIM API, a timeout with the LPTIMER peripheral, to wake up 
 the system from a low-power mode.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="5" align="left"><p id="OPAMP">OPAMP</p></td>
-        <td align="left"><p id="OPAMP_Calibration">OPAMP_Calibration</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=5><p id="OPAMP">OPAMP</p></td>
+        <td align=left><p id="OPAMP_Calibration">OPAMP_Calibration</p></td>
+        <td align=left>
 This example shows how to calibrate the OPAMP.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="OPAMP_InternalFollower">OPAMP_InternalFollower</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="OPAMP_InternalFollower">OPAMP_InternalFollower</p></td>
+        <td align=left>
 This example provides a short description of how to configure the OPAMP in internal 
 follower mode (unity gain). The signal applied on OPAMP non-inverting input is 
 reproduced on OPAMP output.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="OPAMP_PGA">OPAMP_PGA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="OPAMP_PGA">OPAMP_PGA</p></td>
+        <td align=left>
 This example shows how to use the built-in PGA mode (OPAMP programmable gain).
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="OPAMP_PGA_ExternalBias">OPAMP_PGA_ExternalBias</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="OPAMP_PGA_ExternalBias">OPAMP_PGA_ExternalBias</p></td>
+        <td align=left>
 This example is configuring OPAMP1 as follow:
 - Inverting input: PA3 (pin 42 on connector CN6)
 - Non inverting input: PA7 (pin 37 on connector CN6)
@@ -1091,16 +1127,17 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
           PA2 (pin 43 on connector CN6)
       - Connect sine wave and bias to the OPAMP inputs and make the bias vary to observe OPAMP behavior evolution.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="OPAMP_TimerControlMux">OPAMP_TimerControlMux</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="OPAMP_TimerControlMux">OPAMP_TimerControlMux</p></td>
+        <td align=left>
 This mode allows upon a timer trigger to change OPAMP configuration from a primary
 one to a secondary one. Possibilities are as follow:
 
@@ -1115,948 +1152,1034 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 - Primary configuration is follower with non inverting input on DAC4
 generating a triangle wave.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="13" align="left"><p id="PWR">PWR</p></td>
-        <td align="left"><p id="PWR_CurrentConsumption">PWR_CurrentConsumption</p></td>
-        <td align="left">How to configure the system to measure the current consumption in different 
+      <tr align=center>
+        <td align=left rowspan=13><p id="PWR">PWR</p></td>
+        <td align=left><p id="PWR_CurrentConsumption">PWR_CurrentConsumption</p></td>
+        <td align=left>How to configure the system to measure the current consumption in different 
 low-power modes.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_LPRUN">PWR_LPRUN</p></td>
-        <td align="left"> 
+      <tr align=center>
+        <td align=left><p id="PWR_LPRUN">PWR_LPRUN</p></td>
+        <td align=left> 
 How to enter and exit the Low-power run mode.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_LPRUN_SRAM1">PWR_LPRUN_SRAM1</p></td>
-        <td align="left"> 
+      <tr align=center>
+        <td align=left><p id="PWR_LPRUN_SRAM1">PWR_LPRUN_SRAM1</p></td>
+        <td align=left> 
 This example shows how to enter and exit the Low Power Run mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_LPSLEEP">PWR_LPSLEEP</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="PWR_LPSLEEP">PWR_LPSLEEP</p></td>
+        <td align=left>
 How to enter the Low-power sleep mode and wake up from this mode by using 
 an interrupt.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_PVD">PWR_PVD</p></td>
-        <td align="left">How to configure the programmable voltage detector by using an external interrupt 
+      <tr align=center>
+        <td align=left><p id="PWR_PVD">PWR_PVD</p></td>
+        <td align=left>How to configure the programmable voltage detector by using an external interrupt 
 line. External DC supply must be used to supply Vdd.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_SHUTDOWN">PWR_SHUTDOWN</p></td>
-        <td align="left"> 
+      <tr align=center>
+        <td align=left><p id="PWR_SHUTDOWN">PWR_SHUTDOWN</p></td>
+        <td align=left> 
 This example shows how to enter the system in SHUTDOWN mode and wake-up from this
 mode using external RESET or WKUP pin.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_SLEEP">PWR_SLEEP</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="PWR_SLEEP">PWR_SLEEP</p></td>
+        <td align=left>
 How to enter the Sleep mode and wake up from this mode by using an interrupt.
 </td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_STANDBY">PWR_STANDBY</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="PWR_STANDBY">PWR_STANDBY</p></td>
+        <td align=left>
 How to enter the Standby mode and wake up from this mode by using an external
 reset or the WKUP pin.
 </td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_STANDBY_RTC">PWR_STANDBY_RTC</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="PWR_STANDBY_RTC">PWR_STANDBY_RTC</p></td>
+        <td align=left>
 How to enter the Standby mode and wake-up from this mode by using an external 
 reset or the RTC wakeup timer.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_STOP0">PWR_STOP0</p></td>
-        <td align="left"> 
+      <tr align=center>
+        <td align=left><p id="PWR_STOP0">PWR_STOP0</p></td>
+        <td align=left> 
 This example shows how to enter Stop 0 mode and wake up from this mode using 
 an interrupt.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_STOP0_RTC">PWR_STOP0_RTC</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="PWR_STOP0_RTC">PWR_STOP0_RTC</p></td>
+        <td align=left>
 This example shows how to enter Stop 0 mode and wake up from this mode using 
 an interrupt from RTC Wake-up Timer. 
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_STOP1">PWR_STOP1</p></td>
-        <td align="left"> 
+      <tr align=center>
+        <td align=left><p id="PWR_STOP1">PWR_STOP1</p></td>
+        <td align=left> 
 This example shows how to enter Stop 1 mode and wake up from this mode using 
 an interrupt.
 </td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_STOP1_RTC">PWR_STOP1_RTC</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="PWR_STOP1_RTC">PWR_STOP1_RTC</p></td>
+        <td align=left>
 This example shows how to enter Stop 1 mode and wake up from this mode using 
 an interrupt from RTC Wake-up Timer. 
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="6" align="left"><p id="QSPI">QSPI</p></td>
-        <td align="left"><p id="QSPI_ExecuteInPlace">QSPI_ExecuteInPlace</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=6><p id="QSPI">QSPI</p></td>
+        <td align=left><p id="QSPI_ExecuteInPlace">QSPI_ExecuteInPlace</p></td>
+        <td align=left>
 This example describes how to execute a part of the code from the QSPI memory. To do this, 
 a section is created where the function is stored.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="QSPI_MemoryMapped">QSPI_MemoryMapped</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="QSPI_MemoryMapped">QSPI_MemoryMapped</p></td>
+        <td align=left>
 This example describes how to erase part of the QSPI memory, write data in DMA mode
 and access to QSPI memory in memory-mapped mode to check the data in a forever loop.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="QSPI_MemoryMappedDual">QSPI_MemoryMappedDual</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="QSPI_MemoryMappedDual">QSPI_MemoryMappedDual</p></td>
+        <td align=left>
 This example describes how to use QSPI interface in memory mapped dual flash mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="QSPI_ReadWriteDual_DMA">QSPI_ReadWriteDual_DMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="QSPI_ReadWriteDual_DMA">QSPI_ReadWriteDual_DMA</p></td>
+        <td align=left>
 This example describes how to use QSPI interface in dual flash mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="QSPI_ReadWrite_DMA">QSPI_ReadWrite_DMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="QSPI_ReadWrite_DMA">QSPI_ReadWrite_DMA</p></td>
+        <td align=left>
 This example describes how to erase part of the QSPI memory, write data in DMA mode,
 read data in DMA mode and compare the result in a forever loop.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="QSPI_ReadWrite_IT">QSPI_ReadWrite_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="QSPI_ReadWrite_IT">QSPI_ReadWrite_IT</p></td>
+        <td align=left>
 This example describes how to erase part of the QSPI memory, write data in IT mode,
 read data in IT mode and compare the result in a forever loop.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="3" align="left"><p id="RCC">RCC</p></td>
-        <td align="left"><p id="RCC_CRS_Synchronization_IT">RCC_CRS_Synchronization_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=3><p id="RCC">RCC</p></td>
+        <td align=left><p id="RCC_CRS_Synchronization_IT">RCC_CRS_Synchronization_IT</p></td>
+        <td align=left>
 Configuration of the clock recovery service (CRS) in Interrupt mode, using the RCC HAL API.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RCC_CRS_Synchronization_Polling">RCC_CRS_Synchronization_Polling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RCC_CRS_Synchronization_Polling">RCC_CRS_Synchronization_Polling</p></td>
+        <td align=left>
 Configuration of the clock recovery service (CRS) in Polling mode, using the RCC HAL API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RCC_ClockConfig">RCC_ClockConfig</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RCC_ClockConfig">RCC_ClockConfig</p></td>
+        <td align=left>
 Configuration of the system clock (SYSCLK) and modification of the clock settings in Run mode, using the RCC HAL API.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="RNG">RNG</p></td>
-        <td align="left"><p id="RNG_MultiRNG">RNG_MultiRNG</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="RNG">RNG</p></td>
+        <td align=left><p id="RNG_MultiRNG">RNG_MultiRNG</p></td>
+        <td align=left>
 Configuration of the RNG using the HAL API. This example uses the RNG to generate 32-bit long random numbers.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RNG_MultiRNG_IT">RNG_MultiRNG_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RNG_MultiRNG_IT">RNG_MultiRNG_IT</p></td>
+        <td align=left>
 Configuration of the RNG using the HAL API. This example uses RNG interrupts to generate 32-bit long random numbers.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="3" align="left"><p id="RTC">RTC</p></td>
-        <td align="left"><p id="RTC_Alarm">RTC_Alarm</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=3><p id="RTC">RTC</p></td>
+        <td align=left><p id="RTC_Alarm">RTC_Alarm</p></td>
+        <td align=left>
 Configuration and generation of an RTC alarm using the RTC HAL API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RTC_Calendar">RTC_Calendar</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RTC_Calendar">RTC_Calendar</p></td>
+        <td align=left>
 Configuration of the calendar using the RTC HAL API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RTC_LSI">RTC_LSI</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RTC_LSI">RTC_LSI</p></td>
+        <td align=left>
 Use of the LSI clock source autocalibration to get a precise RTC clock. 
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="SAI">SAI</p></td>
-        <td align="left"><p id="SAI_AudioPlay">SAI_AudioPlay</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="SAI">SAI</p></td>
+        <td align=left><p id="SAI_AudioPlay">SAI_AudioPlay</p></td>
+        <td align=left>
 This example shows how to use the SAI HAL API to play an audio file using the DMA
 circular mode and how to handle the buffer update.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="SMARTCARD">SMARTCARD</p></td>
-        <td align="left"><p id="SMARTCARD_T0_MFX">SMARTCARD_T0_MFX</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="SMARTCARD">SMARTCARD</p></td>
+        <td align=left><p id="SMARTCARD_T0_MFX">SMARTCARD_T0_MFX</p></td>
+        <td align=left>
 This example describes a firmware smartcard Interface based on USART.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="SMBUS">SMBUS</p></td>
-        <td align="left"><p id="SMBUS_TSENSOR">SMBUS_TSENSOR</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="SMBUS">SMBUS</p></td>
+        <td align=left><p id="SMBUS_TSENSOR">SMBUS_TSENSOR</p></td>
+        <td align=left>
 This example shows how to ensure SMBUS Data buffer transmission and reception with 
 IT. The communication is done with a SMBUS temperature sensor.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="6" align="left"><p id="SPI">SPI</p></td>
-        <td align="left"><p id="SPI_FullDuplex_ComDMA_Master">SPI_FullDuplex_ComDMA_Master</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=6><p id="SPI">SPI</p></td>
+        <td align=left><p id="SPI_FullDuplex_ComDMA_Master">SPI_FullDuplex_ComDMA_Master</p></td>
+        <td align=left>
 Data buffer transmission/reception between two boards via SPI using DMA.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_FullDuplex_ComDMA_Slave">SPI_FullDuplex_ComDMA_Slave</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_FullDuplex_ComDMA_Slave">SPI_FullDuplex_ComDMA_Slave</p></td>
+        <td align=left>
 Data buffer transmission/reception between two boards via SPI using DMA.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_FullDuplex_ComIT_Master">SPI_FullDuplex_ComIT_Master</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_FullDuplex_ComIT_Master">SPI_FullDuplex_ComIT_Master</p></td>
+        <td align=left>
 Data buffer transmission/reception between two boards via SPI using Interrupt mode.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_FullDuplex_ComIT_Slave">SPI_FullDuplex_ComIT_Slave</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_FullDuplex_ComIT_Slave">SPI_FullDuplex_ComIT_Slave</p></td>
+        <td align=left>
 Data buffer transmission/reception between two boards via SPI using Interrupt mode.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_FullDuplex_ComPolling_Master">SPI_FullDuplex_ComPolling_Master</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_FullDuplex_ComPolling_Master">SPI_FullDuplex_ComPolling_Master</p></td>
+        <td align=left>
 Data buffer transmission/reception between two boards via SPI using Polling mode.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_FullDuplex_ComPolling_Slave">SPI_FullDuplex_ComPolling_Slave</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_FullDuplex_ComPolling_Slave">SPI_FullDuplex_ComPolling_Slave</p></td>
+        <td align=left>
 Data buffer transmission/reception between two boards via SPI using Polling mode.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="13" align="left"><p id="TIM">TIM</p></td>
-        <td align="left"><p id="TIM_CascadeSynchro">TIM_CascadeSynchro</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=13><p id="TIM">TIM</p></td>
+        <td align=left><p id="TIM_CascadeSynchro">TIM_CascadeSynchro</p></td>
+        <td align=left>
 This example shows how to synchronize TIM2 and Timers (TIM3 and TIM4) in cascade mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_Combined">TIM_Combined</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_Combined">TIM_Combined</p></td>
+        <td align=left>
 This example shows how to configure the TIM1 peripheral to generate 3 PWM combined 
 signals with TIM1 Channel5.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_ComplementarySignals">TIM_ComplementarySignals</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_ComplementarySignals">TIM_ComplementarySignals</p></td>
+        <td align=left>
 This example shows how to configure the TIM1 peripheral to generate three 
 complementary TIM1 signals, to insert a defined dead time value, to use the break 
 feature and to lock the desired parameters.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_DMA">TIM_DMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_DMA">TIM_DMA</p></td>
+        <td align=left>
 Use of the DMA with TIMER Update request 
 to transfer data from memory to TIMER Capture Compare Register 3 (TIMx_CCR3).
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_DMABurst">TIM_DMABurst</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_DMABurst">TIM_DMABurst</p></td>
+        <td align=left>
 How to update the TIMER channel 1 period and duty cycle using the TIMER DMA burst feature.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_Dithering">TIM_Dithering</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_Dithering">TIM_Dithering</p></td>
+        <td align=left>
 This example shows how to configure the TIM3 peripheral in PWM mode with dithering.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_Encoder">TIM_Encoder</p></td>
-        <td align="left">                      
+      <tr align=center>
+        <td align=left><p id="TIM_Encoder">TIM_Encoder</p></td>
+        <td align=left>                      
 This example shows how to configure the TIM1 peripheral in encoder mode to
 determinate the rotation direction.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_EncoderIndex_PulseOnCompare">TIM_EncoderIndex_PulseOnCompare</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_EncoderIndex_PulseOnCompare">TIM_EncoderIndex_PulseOnCompare</p></td>
+        <td align=left>
 This example shows how to configure the TIM3 peripheral in encoder mode with index
 and generate a pulse on a certain value of encoder interface counter with pulse on compare.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_InputCapture">TIM_InputCapture</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_InputCapture">TIM_InputCapture</p></td>
+        <td align=left>
 How to use the TIM peripheral to measure an external signal frequency.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_OCToggle">TIM_OCToggle</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_OCToggle">TIM_OCToggle</p></td>
+        <td align=left>
 Configuration of the TIM peripheral to generate four different 
 signals at four different frequencies.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_OnePulse">TIM_OnePulse</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_OnePulse">TIM_OnePulse</p></td>
+        <td align=left>
 This example shows how to use the TIMER peripheral to generate a single pulse when
 a rising edge of an external signal is received on the TIMER Input pin.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_PWMInput">TIM_PWMInput</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_PWMInput">TIM_PWMInput</p></td>
+        <td align=left>
 How to use the TIM peripheral to measure the frequency and 
 duty cycle of an external signal.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_PWMOutput">TIM_PWMOutput</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_PWMOutput">TIM_PWMOutput</p></td>
+        <td align=left>
 This example shows how to configure the TIM peripheral in PWM (Pulse Width Modulation) 
 mode.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td rowspan="9" align="left"><p id="UART">UART</p></td>
-        <td align="left"><p id="LPUART_TwoBoards_ComIT">LPUART_TwoBoards_ComIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=10><p id="UART">UART</p></td>
+        <td align=left><p id="LPUART_TwoBoards_ComIT">LPUART_TwoBoards_ComIT</p></td>
+        <td align=left>
 LPUART transmission (transmit/receive) in Interrupt mode
 between two boards.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="LPUART_WakeUpFromStop">LPUART_WakeUpFromStop</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="LPUART_WakeUpFromStop">LPUART_WakeUpFromStop</p></td>
+        <td align=left>
 Configuration of an LPUART to wake up the MCU from Stop mode 
 when a given stimulus is received.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_HyperTerminal_DMA">UART_HyperTerminal_DMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_HyperTerminal_DMA">UART_HyperTerminal_DMA</p></td>
+        <td align=left>
 UART transmission (transmit/receive) in DMA mode
 between a board and an HyperTerminal PC application.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_HyperTerminal_IT">UART_HyperTerminal_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_HyperTerminal_IT">UART_HyperTerminal_IT</p></td>
+        <td align=left>
 UART transmission (transmit/receive) in Interrupt mode between a board and
 an HyperTerminal PC application.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_Printf">UART_Printf</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_Printf">UART_Printf</p></td>
+        <td align=left>
 Re-routing of the C library printf function to the UART.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_TwoBoards_ComDMA">UART_TwoBoards_ComDMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_ReceptionToIdle_CircularDMA">UART_ReceptionToIdle_CircularDMA</p></td>
+        <td align=left>
+How to use the HAL UART API for reception to IDLE event in circular DMA mode.
+</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td>-</td>
+      </tr>
+      <tr align=center>
+        <td align=left><p id="UART_TwoBoards_ComDMA">UART_TwoBoards_ComDMA</p></td>
+        <td align=left>
 UART transmission (transmit/receive) in DMA mode 
 between two boards.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_TwoBoards_ComIT">UART_TwoBoards_ComIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_TwoBoards_ComIT">UART_TwoBoards_ComIT</p></td>
+        <td align=left>
 UART transmission (transmit/receive) in Interrupt mode 
 between two boards.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_TwoBoards_ComPolling">UART_TwoBoards_ComPolling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_TwoBoards_ComPolling">UART_TwoBoards_ComPolling</p></td>
+        <td align=left>
 UART transmission (transmit/receive) in Polling mode 
 between two boards.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_WakeUpFromStopUsingFIFO">UART_WakeUpFromStopUsingFIFO</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_WakeUpFromStopUsingFIFO">UART_WakeUpFromStopUsingFIFO</p></td>
+        <td align=left>
 This example shows how to use UART HAL API to wake up the MCU from STOP mode
 using the UART FIFO level.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="USART">USART</p></td>
-        <td align="left"><p id="USART_SlaveMode">USART_SlaveMode</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="USART">USART</p></td>
+        <td align=left><p id="USART_SlaveMode">USART_SlaveMode</p></td>
+        <td align=left>
 This example describes an USART-SPI communication (transmit/receive) between two
 boards where the USART is configured as a slave.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="WWDG">WWDG</p></td>
-        <td align="left"><p id="WWDG_Example">WWDG_Example</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="WWDG">WWDG</p></td>
+        <td align=left><p id="WWDG_Example">WWDG_Example</p></td>
+        <td align=left>
 Configuration of the HAL API to periodically update the WWDG counter and simulate a software fault that
 generates an MCU WWDG reset when a predefined time period has elapsed.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
-        <td colspan="3"><b>Total number of examples: 312</b></td>
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
+        <td colspan="3"><b>Total number of examples: 364</b></td>
+        <td>50</td>
         <td>72</td>
         <td>34</td>
-        <td>92</td>
-        <td>77</td>
+        <td>93</td>
+        <td>78</td>
         <td>21</td>
         <td>16</td>
       </tr>
-      <tr align="center">
-        <td style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" rowspan="83"><p id="Examples_LL">Examples_LL</p></td>
-        <td rowspan="6" align="left"><p id="ADC">ADC</p></td>
-        <td align="left"><p id="ADC_AnalogWatchdog_Init">ADC_AnalogWatchdog_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" rowspan=83><p id="Examples_LL">Examples_LL</p></td>
+        <td align=left rowspan=6><p id="ADC">ADC</p></td>
+        <td align=left><p id="ADC_AnalogWatchdog_Init">ADC_AnalogWatchdog_Init</p></td>
+        <td align=left>
 How to use an ADC peripheral with an ADC analog watchdog to monitor a channel 
 and detect when the corresponding conversion data is outside the window 
 thresholds.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_ContinuousConversion_TriggerSW_Init">ADC_ContinuousConversion_TriggerSW_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="ADC_ContinuousConversion_TriggerSW_Init">ADC_ContinuousConversion_TriggerSW_Init</p></td>
+        <td align=left>
 How to use an ADC peripheral to perform continuous ADC conversions on a 
 channel, from a software start.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_GroupsRegularInjected_Init">ADC_GroupsRegularInjected_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="ADC_GroupsRegularInjected_Init">ADC_GroupsRegularInjected_Init</p></td>
+        <td align=left>
 How to use an ADC peripheral with both ADC groups (regular and injected) 
 in their intended use cases.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_Oversampling_Init">ADC_Oversampling_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="ADC_Oversampling_Init">ADC_Oversampling_Init</p></td>
+        <td align=left>
 How to use an ADC peripheral with ADC oversampling.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_SingleConversion_TriggerSW_IT_Init">ADC_SingleConversion_TriggerSW_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="ADC_SingleConversion_TriggerSW_IT_Init">ADC_SingleConversion_TriggerSW_IT_Init</p></td>
+        <td align=left>
 How to use an ADC peripheral to perform a single ADC conversion on a channel, 
 at each software start. This example uses the interrupt programming model 
 (for polling or DMA programming models, please refer to other examples).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="ADC_SingleConversion_TriggerSW_Init">ADC_SingleConversion_TriggerSW_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="ADC_SingleConversion_TriggerSW_Init">ADC_SingleConversion_TriggerSW_Init</p></td>
+        <td align=left>
 How to use an ADC peripheral to perform a single ADC conversion on a channel 
 at each software start. This example uses the polling programming model (for 
 interrupt or DMA programming models, please refer to other examples).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="3" align="left"><p id="COMP">COMP</p></td>
-        <td align="left"><p id="COMP_CompareGpioVsVrefInt_IT">COMP_CompareGpioVsVrefInt_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=3><p id="COMP">COMP</p></td>
+        <td align=left><p id="COMP_CompareGpioVsVrefInt_IT">COMP_CompareGpioVsVrefInt_IT</p></td>
+        <td align=left>
 How to use a comparator peripheral to compare a voltage level applied on a GPIO
 pin to the internal voltage reference (VREFINT), in interrupt mode. This example
 is based on the STM32G4xx COMP LL API. The peripheral initialization
 uses LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="COMP_CompareGpioVsVrefInt_IT_Init">COMP_CompareGpioVsVrefInt_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="COMP_CompareGpioVsVrefInt_IT_Init">COMP_CompareGpioVsVrefInt_IT_Init</p></td>
+        <td align=left>
 How to use a comparator peripheral to compare a voltage level applied on a GPIO
 pin to the the internal voltage reference (VREFINT), in interrupt mode. This example
 is based on the STM32G4xx COMP LL API. The peripheral initialization
 uses the LL initialization function to demonstrate LL init usage.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="COMP_CompareGpioVsVrefInt_OutputGpio_Init">COMP_CompareGpioVsVrefInt_OutputGpio_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="COMP_CompareGpioVsVrefInt_OutputGpio_Init">COMP_CompareGpioVsVrefInt_OutputGpio_Init</p></td>
+        <td align=left>
 How to use a comparator peripheral to compare a voltage level applied on a GPIO
 pin to the internal voltage reference (VREFINT). The comparator output is connected
 to a GPIO. This example is based on the STM32G4xx COMP LL API.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="CORDIC">CORDIC</p></td>
-        <td align="left"><p id="CORDIC_CosSin">CORDIC_CosSin</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="CORDIC">CORDIC</p></td>
+        <td align=left><p id="CORDIC_CosSin">CORDIC_CosSin</p></td>
+        <td align=left>
 How to use the CORDIC peripheral to calculate cosine and sine.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="CORTEX">CORTEX</p></td>
-        <td align="left"><p id="CORTEX_MPU">CORTEX_MPU</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="CORTEX">CORTEX</p></td>
+        <td align=left><p id="CORTEX_MPU">CORTEX_MPU</p></td>
+        <td align=left>
 Presentation of the MPU feature. This example configures a memory area as 
 privileged read-only, and attempts to perform read and write operations in
 different modes.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="CRC">CRC</p></td>
-        <td align="left"><p id="CRC_CalculateAndCheck">CRC_CalculateAndCheck</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="CRC">CRC</p></td>
+        <td align=left><p id="CRC_CalculateAndCheck">CRC_CalculateAndCheck</p></td>
+        <td align=left>
 How to configure the CRC calculation unit to compute a CRC code for a given data
 buffer, based on a fixed generator polynomial (default value 0x4C11DB7). The
 peripheral initialization is done using LL unitary service functions for
@@ -2064,14 +2187,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CRC_UserDefinedPolynomial">CRC_UserDefinedPolynomial</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CRC_UserDefinedPolynomial">CRC_UserDefinedPolynomial</p></td>
+        <td align=left>
 How to configure and use the CRC calculation unit to compute an 8-bit CRC code
 for a given data buffer, based on a user-defined generating polynomial. The
 peripheral initialization is done using LL unitary service functions for
@@ -2079,59 +2203,63 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="CRS">CRS</p></td>
-        <td align="left"><p id="CRS_Synchronization_IT">CRS_Synchronization_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="CRS">CRS</p></td>
+        <td align=left><p id="CRS_Synchronization_IT">CRS_Synchronization_IT</p></td>
+        <td align=left>
 How to configure the clock recovery service in IT mode through the
 STM32G4xx CRS LL API. The peripheral initialization uses LL unitary
 service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="CRS_Synchronization_Polling">CRS_Synchronization_Polling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="CRS_Synchronization_Polling">CRS_Synchronization_Polling</p></td>
+        <td align=left>
 How to configure the clock recovery service in polling mode through the
 STM32G4xx CRS LL API. The peripheral initialization uses LL unitary
 service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="3" align="left"><p id="DAC">DAC</p></td>
-        <td align="left"><p id="DAC_GenerateConstantSignal_TriggerSW_Init">DAC_GenerateConstantSignal_TriggerSW_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=3><p id="DAC">DAC</p></td>
+        <td align=left><p id="DAC_GenerateConstantSignal_TriggerSW_Init">DAC_GenerateConstantSignal_TriggerSW_Init</p></td>
+        <td align=left>
 How to use the DAC peripheral to generate a constant voltage signal. This
 example is based on the STM32G4xx DAC LL API. The peripheral 
 initialization uses LL unitary service functions for optimization purposes
 (performance and size).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="DAC_GenerateConstantSignal_TriggerSW_LP_Init">DAC_GenerateConstantSignal_TriggerSW_LP_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="DAC_GenerateConstantSignal_TriggerSW_LP_Init">DAC_GenerateConstantSignal_TriggerSW_LP_Init</p></td>
+        <td align=left>
 How to use the DAC peripheral to generate a constant voltage signal with the DAC
 low-power feature sample-and-hold. To be effective, a capacitor must be
 connected to the DAC channel output and the sample-and-hold timings must be
@@ -2140,62 +2268,65 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="DAC_GenerateWaveform_TriggerHW_Init">DAC_GenerateWaveform_TriggerHW_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="DAC_GenerateWaveform_TriggerHW_Init">DAC_GenerateWaveform_TriggerHW_Init</p></td>
+        <td align=left>
 How to use the DAC peripheral to generate a voltage waveform from a digital data
 stream transferred by DMA. This example is based on the STM32G4xx 
 DAC LL API. The peripheral initialization uses LL initialization
 functions to demonstrate LL init usage.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="DMA">DMA</p></td>
-        <td align="left"><p id="DMA_CopyFromFlashToMemory_Init">DMA_CopyFromFlashToMemory_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="DMA">DMA</p></td>
+        <td align=left><p id="DMA_CopyFromFlashToMemory_Init">DMA_CopyFromFlashToMemory_Init</p></td>
+        <td align=left>
 How to use a DMA channel to transfer a word data buffer
 from Flash memory to embedded SRAM. The peripheral initialization uses LL
 initialization functions to demonstrate LL init usage.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="EXTI">EXTI</p></td>
-        <td align="left"><p id="EXTI_ToggleLedOnIT">EXTI_ToggleLedOnIT</p></td>
-        <td align="left">
-This example describes how to configure the EXTI 
-and use GPIOs to toggle the user LEDs available on the board when 
-a user button is pressed. This example is based on the
+      <tr align=center>
+        <td align=left rowspan=2><p id="EXTI">EXTI</p></td>
+        <td align=left><p id="EXTI_ToggleLedOnIT">EXTI_ToggleLedOnIT</p></td>
+        <td align=left>
+How to configure the EXTI and use GPIOs to toggle the user LEDs 
+available on the board when a user button is pressed. It is based on the
 STM32G4xx LL API. The peripheral initialization uses LL unitary service
 functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="EXTI_ToggleLedOnIT_Init">EXTI_ToggleLedOnIT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="EXTI_ToggleLedOnIT_Init">EXTI_ToggleLedOnIT_Init</p></td>
+        <td align=left>
 This example describes how to configure the EXTI and use
 GPIOs to toggle the user LEDs available on the board when
 a user button is pressed. This example is based on the
@@ -2204,189 +2335,203 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="FMAC">FMAC</p></td>
-        <td align="left"><p id="FMAC_IIR_Polling">FMAC_IIR_Polling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="FMAC">FMAC</p></td>
+        <td align=left><p id="FMAC_IIR_Polling">FMAC_IIR_Polling</p></td>
+        <td align=left>
 How to use the FMAC peripheral to achieve IIR filtering in polling mode.
 </td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="GPIO">GPIO</p></td>
-        <td align="left"><p id="GPIO_InfiniteLedToggling">GPIO_InfiniteLedToggling</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="GPIO">GPIO</p></td>
+        <td align=left><p id="GPIO_InfiniteLedToggling">GPIO_InfiniteLedToggling</p></td>
+        <td align=left>
 How to configure and use GPIOs to toggle the on-board user LEDs 
 every 250 ms. This example is based on the STM32G4xx LL API. The peripheral 
 is initialized with LL unitary service functions to optimize 
 for performance and size.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="GPIO_InfiniteLedToggling_Init">GPIO_InfiniteLedToggling_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="GPIO_InfiniteLedToggling_Init">GPIO_InfiniteLedToggling_Init</p></td>
+        <td align=left>
 How to configure and use GPIOs to toggle the on-board user LEDs 
 every 250 ms. This example is based on the STM32G4xx LL API. The peripheral 
 is initialized with LL initialization function to demonstrate LL init usage.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="5" align="left"><p id="HRTIM">HRTIM</p></td>
-        <td align="left"><p id="HRTIM_Basic_Arbitrary_Waveform">HRTIM_Basic_Arbitrary_Waveform</p></td>
-        <td align="left">  This example describes how to generate basic non-PWM waveforms with the 
+      <tr align=center>
+        <td align=left rowspan=5><p id="HRTIM">HRTIM</p></td>
+        <td align=left><p id="HRTIM_Basic_Arbitrary_Waveform">HRTIM_Basic_Arbitrary_Waveform</p></td>
+        <td align=left>  This example describes how to generate basic non-PWM waveforms with the 
   HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Basic_Multiple_PWM">HRTIM_Basic_Multiple_PWM</p></td>
-        <td align="left">  This example describes how to generate basic PWM waveforms PWM on multiple outputs 
+      <tr align=center>
+        <td align=left><p id="HRTIM_Basic_Multiple_PWM">HRTIM_Basic_Multiple_PWM</p></td>
+        <td align=left>  This example describes how to generate basic PWM waveforms PWM on multiple outputs 
   with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Basic_PWM_Master">HRTIM_Basic_PWM_Master</p></td>
-        <td align="left">  This example describes how to generate basic PWM waveforms with HRTIM timers 
+      <tr align=center>
+        <td align=left><p id="HRTIM_Basic_PWM_Master">HRTIM_Basic_PWM_Master</p></td>
+        <td align=left>  This example describes how to generate basic PWM waveforms with HRTIM timers 
   other than the timing unit itself, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Basic_Single_PWM">HRTIM_Basic_Single_PWM</p></td>
-        <td align="left">  This example describes how to check HRTIM outputs and to generate elementary
+      <tr align=center>
+        <td align=left><p id="HRTIM_Basic_Single_PWM">HRTIM_Basic_Single_PWM</p></td>
+        <td align=left>  This example describes how to check HRTIM outputs and to generate elementary
   PWM waveforms with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_CBC_Deadtime">HRTIM_CBC_Deadtime</p></td>
-        <td align="left">  This example describes how to implement a cycle-by-cycle (CBC) current control 
+      <tr align=center>
+        <td align=left><p id="HRTIM_CBC_Deadtime">HRTIM_CBC_Deadtime</p></td>
+        <td align=left>  This example describes how to implement a cycle-by-cycle (CBC) current control 
   with complementary signals and dead time insertion.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="9" align="left"><p id="I2C">I2C</p></td>
-        <td align="left"><p id="I2C_OneBoard_AdvCommunication_DMAAndIT_Init">I2C_OneBoard_AdvCommunication_DMAAndIT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=9><p id="I2C">I2C</p></td>
+        <td align=left><p id="I2C_OneBoard_AdvCommunication_DMAAndIT_Init">I2C_OneBoard_AdvCommunication_DMAAndIT_Init</p></td>
+        <td align=left>
 How to exchange data between an I2C master device in DMA mode and an I2C slave
 device in interrupt mode. The peripheral is initialized with LL unitary service
 functions to optimize for performance and size.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_OneBoard_Communication_DMAAndIT_Init">I2C_OneBoard_Communication_DMAAndIT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_OneBoard_Communication_DMAAndIT_Init">I2C_OneBoard_Communication_DMAAndIT_Init</p></td>
+        <td align=left>
 How to transmit data bytes from an I2C master device using DMA mode
 to an I2C slave device using interrupt mode. The peripheral is initialized with
 LL unitary service functions to optimize for performance and size.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_OneBoard_Communication_IT">I2C_OneBoard_Communication_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_OneBoard_Communication_IT">I2C_OneBoard_Communication_IT</p></td>
+        <td align=left>
 How to handle the reception of one data byte from an I2C slave device 
 by an I2C master device. Both devices operate in interrupt mode. The peripheral is initialized 
 with LL unitary service functions to  optimize for performance and size.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_OneBoard_Communication_IT_Init">I2C_OneBoard_Communication_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_OneBoard_Communication_IT_Init">I2C_OneBoard_Communication_IT_Init</p></td>
+        <td align=left>
 How to handle the reception of one data byte from an I2C slave device
 by an I2C master device. Both devices operate in interrupt mode. The peripheral is initialized
 with LL initialization function to demonstrate LL init usage.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_OneBoard_Communication_PollingAndIT_Init">I2C_OneBoard_Communication_PollingAndIT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_OneBoard_Communication_PollingAndIT_Init">I2C_OneBoard_Communication_PollingAndIT_Init</p></td>
+        <td align=left>
 How to transmit data bytes from an I2C master device using polling mode
 to an I2C slave device using interrupt mode. The peripheral is initialized
 with LL unitary service functions to optimize for performance and size.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_MasterRx_SlaveTx_IT_Init">I2C_TwoBoards_MasterRx_SlaveTx_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_MasterRx_SlaveTx_IT_Init">I2C_TwoBoards_MasterRx_SlaveTx_IT_Init</p></td>
+        <td align=left>
 How to handle the reception of one data byte from an I2C slave device
 by an I2C master device. Both devices operate in interrupt mode. The peripheral
 is initialized with LL unitary service functions to optimize for performance
@@ -2394,42 +2539,45 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init">I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init">I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init</p></td>
+        <td align=left>
 How to transmit data bytes from an I2C master device using DMA mode
 to an I2C slave device using DMA mode. The peripheral is initialized
 with LL unitary service functions to optimize for performance and size.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_MasterTx_SlaveRx_Init">I2C_TwoBoards_MasterTx_SlaveRx_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_MasterTx_SlaveRx_Init">I2C_TwoBoards_MasterTx_SlaveRx_Init</p></td>
+        <td align=left>
 How to transmit data bytes from an I2C master device using polling mode
 to an I2C slave device using interrupt mode. The peripheral is initialized
 with LL unitary service functions to optimize for performance and size.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="I2C_TwoBoards_WakeUpFromStop_IT_Init">I2C_TwoBoards_WakeUpFromStop_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="I2C_TwoBoards_WakeUpFromStop_IT_Init">I2C_TwoBoards_WakeUpFromStop_IT_Init</p></td>
+        <td align=left>
 How to handle the reception of a data byte from an I2C slave device in
 Stop 1 mode by an I2C master device, both using interrupt mode. The
 peripheral is initialized with LL unitary service functions to optimize for
@@ -2437,46 +2585,49 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="LPTIM">LPTIM</p></td>
-        <td align="left"><p id="LPTIM_PulseCounter">LPTIM_PulseCounter</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="LPTIM">LPTIM</p></td>
+        <td align=left><p id="LPTIM_PulseCounter">LPTIM_PulseCounter</p></td>
+        <td align=left>
 How to use the LPTIM peripheral in counter mode to generate a PWM output signal 
 and update its duty cycle. This example is based on the STM32G4xx
 LPTIM LL API. The peripheral is initialized with LL unitary service 
 functions to optimize for performance and size.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="LPTIM_PulseCounter_Init">LPTIM_PulseCounter_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="LPTIM_PulseCounter_Init">LPTIM_PulseCounter_Init</p></td>
+        <td align=left>
 How to use the LPTIM peripheral in counter mode to generate a PWM output signal 
 and update its duty cycle. This example is based on the STM32G4xx
 LPTIM LL API. The peripheral is initialized with LL initialization 
 function to demonstrate LL init usage.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="LPUART">LPUART</p></td>
-        <td align="left"><p id="LPUART_WakeUpFromStop">LPUART_WakeUpFromStop</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="LPUART">LPUART</p></td>
+        <td align=left><p id="LPUART_WakeUpFromStop">LPUART_WakeUpFromStop</p></td>
+        <td align=left>
 Configuration of GPIO and LPUART peripherals to allow characters
 received on LPUART_RX pin to wake up the MCU from low-power mode. This example is based
 on the LPUART LL API. The peripheral initialization uses LL unitary
@@ -2484,14 +2635,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="LPUART_WakeUpFromStop_Init">LPUART_WakeUpFromStop_Init</p></td>
-        <td align="left">  
+      <tr align=center>
+        <td align=left><p id="LPUART_WakeUpFromStop_Init">LPUART_WakeUpFromStop_Init</p></td>
+        <td align=left>  
 Configuration of GPIO and LPUART peripherals to allow characters 
 received on LPUART_RX pin to wake up the MCU from low-power mode. This example is based 
 on the LPUART LL API. The peripheral initialization uses LL 
@@ -2499,30 +2651,32 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="OPAMP">OPAMP</p></td>
-        <td align="left"><p id="OPAMP_Follower">OPAMP_Follower</p></td>
-        <td align="left">How to use the OPAMP peripheral in follower mode. To test OPAMP in this example, 
+      <tr align=center>
+        <td align=left rowspan=2><p id="OPAMP">OPAMP</p></td>
+        <td align=left><p id="OPAMP_Follower">OPAMP_Follower</p></td>
+        <td align=left>How to use the OPAMP peripheral in follower mode. To test OPAMP in this example, 
 a voltage waveform is generated by the DAC peripheral and can be connected to 
 OPAMP input. This example is based on the STM32G4xx OPAMP LL API. The 
 peripheral is initialized with LL unitary service functions to optimize for 
 performance and size.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="OPAMP_PGA">OPAMP_PGA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="OPAMP_PGA">OPAMP_PGA</p></td>
+        <td align=left>
 How to use the OPAMP peripheral in PGA mode (programmable gain amplifier). To test 
 OPAMP, a voltage waveform is generated by the DAC and feeds the OPAMP input. This 
 example is based on the STM32G4xx OPAMP LL API. The peripheral
@@ -2530,188 +2684,201 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 performance and size.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="PWR">PWR</p></td>
-        <td align="left"><p id="PWR_EnterStandbyMode">PWR_EnterStandbyMode</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="PWR">PWR</p></td>
+        <td align=left><p id="PWR_EnterStandbyMode">PWR_EnterStandbyMode</p></td>
+        <td align=left>
 How to enter the Standby mode and wake up from this mode by using an external 
 reset or a wakeup pin.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="PWR_EnterStopMode">PWR_EnterStopMode</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="PWR_EnterStopMode">PWR_EnterStopMode</p></td>
+        <td align=left>
 How to enter the Stop 1 mode.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="3" align="left"><p id="RCC">RCC</p></td>
-        <td align="left"><p id="RCC_OutputSystemClockOnMCO">RCC_OutputSystemClockOnMCO</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=3><p id="RCC">RCC</p></td>
+        <td align=left><p id="RCC_OutputSystemClockOnMCO">RCC_OutputSystemClockOnMCO</p></td>
+        <td align=left>
 Configuration of MCO pin (PA8) to output the system clock.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RCC_UseHSEasSystemClock">RCC_UseHSEasSystemClock</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RCC_UseHSEasSystemClock">RCC_UseHSEasSystemClock</p></td>
+        <td align=left>
 Use of the RCC LL API to start the HSE and use it as system clock.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RCC_UseHSI_PLLasSystemClock">RCC_UseHSI_PLLasSystemClock</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RCC_UseHSI_PLLasSystemClock">RCC_UseHSI_PLLasSystemClock</p></td>
+        <td align=left>
 Modification of the PLL parameters in run time.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="RNG">RNG</p></td>
-        <td align="left"><p id="RNG_GenerateRandomNumbers">RNG_GenerateRandomNumbers</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="RNG">RNG</p></td>
+        <td align=left><p id="RNG_GenerateRandomNumbers">RNG_GenerateRandomNumbers</p></td>
+        <td align=left>
 Configuration of the RNG to generate 32-bit long random numbers. The peripheral initialization uses LL unitary service
 functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RNG_GenerateRandomNumbers_IT">RNG_GenerateRandomNumbers_IT</p></td>
-        <td align="left">
-Configuration of the RNG to generate 32-bit long random numbers using
-interrupts. The peripheral initialization uses LL unitary service
+      <tr align=center>
+        <td align=left><p id="RNG_GenerateRandomNumbers_IT">RNG_GenerateRandomNumbers_IT</p></td>
+        <td align=left>
+Configuration of the RNG to generate 32-bit long random numbers using interrupts. The peripheral initialization uses LL unitary service
 functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="6" align="left"><p id="RTC">RTC</p></td>
-        <td align="left"><p id="RTC_Alarm">RTC_Alarm</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=6><p id="RTC">RTC</p></td>
+        <td align=left><p id="RTC_Alarm">RTC_Alarm</p></td>
+        <td align=left>
 Configuration of the RTC LL API to configure and generate an alarm using the RTC peripheral. The peripheral initialization 
 uses LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RTC_Alarm_Init">RTC_Alarm_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RTC_Alarm_Init">RTC_Alarm_Init</p></td>
+        <td align=left>
 Configuration of the RTC LL API to configure and generate an alarm using the RTC peripheral. The peripheral 
 initialization uses the LL initialization function.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RTC_ExitStandbyWithWakeUpTimer_Init">RTC_ExitStandbyWithWakeUpTimer_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RTC_ExitStandbyWithWakeUpTimer_Init">RTC_ExitStandbyWithWakeUpTimer_Init</p></td>
+        <td align=left>
 Configuration of the RTC to wake up from Standby mode 
 using the RTC Wakeup timer. The peripheral initialization uses LL unitary service 
 functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RTC_ProgrammingTheWakeUpTimer">RTC_ProgrammingTheWakeUpTimer</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RTC_ProgrammingTheWakeUpTimer">RTC_ProgrammingTheWakeUpTimer</p></td>
+        <td align=left>
 Configuration of the RTC to use the WUT. The peripheral 
 initialization uses LL unitary service functions for optimization purposes 
 (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RTC_Tamper_Init">RTC_Tamper_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RTC_Tamper_Init">RTC_Tamper_Init</p></td>
+        <td align=left>
 Configuration of the Tamper using the RTC LL API. The peripheral initialization 
 uses LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="RTC_TimeStamp_Init">RTC_TimeStamp_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="RTC_TimeStamp_Init">RTC_TimeStamp_Init</p></td>
+        <td align=left>
 Configuration of the Timestamp using the RTC LL API. The peripheral initialization 
 uses LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="SPI">SPI</p></td>
-        <td align="left"><p id="SPI_OneBoard_HalfDuplex_DMA">SPI_OneBoard_HalfDuplex_DMA</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="SPI">SPI</p></td>
+        <td align=left><p id="SPI_OneBoard_HalfDuplex_DMA">SPI_OneBoard_HalfDuplex_DMA</p></td>
+        <td align=left>
 Configuration of GPIO and SPI peripherals to transmit
 bytes from a SPI Master device to a SPI Slave device in DMA mode. This example
 is based on the STM32G4xx SPI LL API. The peripheral initialization uses
@@ -2719,14 +2886,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_OneBoard_HalfDuplex_IT_Init">SPI_OneBoard_HalfDuplex_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_OneBoard_HalfDuplex_IT_Init">SPI_OneBoard_HalfDuplex_IT_Init</p></td>
+        <td align=left>
 Configuration of GPIO and SPI peripherals to transmit bytes 
 from an SPI Master device to an SPI Slave device in Interrupt mode. This example
 is based on the STM32G4xx SPI LL API. The peripheral initialization uses 
@@ -2734,43 +2902,46 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_TwoBoards_FullDuplex_DMA_Master_Init">SPI_TwoBoards_FullDuplex_DMA_Master_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_TwoBoards_FullDuplex_DMA_Master_Init">SPI_TwoBoards_FullDuplex_DMA_Master_Init</p></td>
+        <td align=left>
 Data buffer transmission and receptionvia SPI using DMA mode. This example is 
 based on the STM32G4xx SPI LL API. The peripheral initialization uses 
 LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="SPI_TwoBoards_FullDuplex_DMA_Slave_Init">SPI_TwoBoards_FullDuplex_DMA_Slave_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="SPI_TwoBoards_FullDuplex_DMA_Slave_Init">SPI_TwoBoards_FullDuplex_DMA_Slave_Init</p></td>
+        <td align=left>
 Data buffer transmission and receptionvia SPI using DMA mode. This example is 
 based on the STM32G4xx SPI LL API. The peripheral initialization uses 
 LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="7" align="left"><p id="TIM">TIM</p></td>
-        <td align="left"><p id="TIM_BreakAndDeadtime_Init">TIM_BreakAndDeadtime_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=7><p id="TIM">TIM</p></td>
+        <td align=left><p id="TIM_BreakAndDeadtime_Init">TIM_BreakAndDeadtime_Init</p></td>
+        <td align=left>
 Configuration of the TIM peripheral to
  generate three center-aligned PWM and complementary PWM signals,
  insert a defined deadtime value,
@@ -2779,14 +2950,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_DMA_Init">TIM_DMA_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_DMA_Init">TIM_DMA_Init</p></td>
+        <td align=left>
 Use of the DMA with a timer update request 
 to transfer data from memory to Timer Capture Compare Register 3 (TIMx_CCR3). This 
 example is based on the STM32G4xx TIM LL API. The peripheral initialization 
@@ -2794,14 +2966,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_InputCapture_Init">TIM_InputCapture_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_InputCapture_Init">TIM_InputCapture_Init</p></td>
+        <td align=left>
 Use of the TIM peripheral to measure a periodic signal frequency 
 provided either by an external signal generator or by 
 another timer instance. This example is based on the STM32G4xx TIM 
@@ -2809,15 +2982,16 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 for optimization purposes (performance and size).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_OnePulse_Init">TIM_OnePulse_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_OnePulse_Init">TIM_OnePulse_Init</p></td>
+        <td align=left>
 Configuration of a timer to generate a positive pulse in 
 Output Compare mode with a length of tPULSE and after a delay of tDELAY. This example 
 is based on the STM32G4xx TIM LL API. The peripheral initialization uses 
@@ -2825,14 +2999,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_OutputCompare_Init">TIM_OutputCompare_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_OutputCompare_Init">TIM_OutputCompare_Init</p></td>
+        <td align=left>
 Configuration of the TIM peripheral to generate an output 
 waveform in different output compare modes. This example is based on the 
 STM32G4xx TIM LL API. The peripheral initialization uses 
@@ -2840,14 +3015,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_PWMOutput">TIM_PWMOutput</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_PWMOutput">TIM_PWMOutput</p></td>
+        <td align=left>
 Use of a timer peripheral to generate a 
 PWM output signal and update the PWM duty cycle. This example is based on the 
 STM32G4xx TIM LL API. The peripheral initialization uses 
@@ -2855,14 +3031,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="TIM_PWMOutput_Init">TIM_PWMOutput_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="TIM_PWMOutput_Init">TIM_PWMOutput_Init</p></td>
+        <td align=left>
 Use of a timer peripheral to generate a 
 PWM output signal and update the PWM duty cycle. This example is based on the 
 STM32G4xx TIM LL API. The peripheral initialization uses 
@@ -2870,57 +3047,61 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="11" align="left"><p id="USART">USART</p></td>
-        <td align="left"><p id="USART_Communication_Rx_IT">USART_Communication_Rx_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=11><p id="USART">USART</p></td>
+        <td align=left><p id="USART_Communication_Rx_IT">USART_Communication_Rx_IT</p></td>
+        <td align=left>
 Configuration of GPIO and USART peripherals to receive characters 
 from an HyperTerminal (PC) in Asynchronous mode using an interrupt. The peripheral initialization 
 uses LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_Communication_Rx_IT_Continuous_Init">USART_Communication_Rx_IT_Continuous_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_Communication_Rx_IT_Continuous_Init">USART_Communication_Rx_IT_Continuous_Init</p></td>
+        <td align=left>
 This example shows how to configure GPIO and USART peripheral for continuously receiving characters
 from HyperTerminal (PC) in Asynchronous mode using Interrupt mode. Peripheral initialization is 
 done using LL unitary services functions for optimization purpose (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_Communication_Rx_IT_Init">USART_Communication_Rx_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_Communication_Rx_IT_Init">USART_Communication_Rx_IT_Init</p></td>
+        <td align=left>
 This example shows how to configure GPIO and USART peripheral for receiving characters
 from HyperTerminal (PC) in Asynchronous mode using Interrupt mode. Peripheral initialization is done
 using LL initialization function to demonstrate LL init usage.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_Communication_TxRx_DMA_Init">USART_Communication_TxRx_DMA_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_Communication_TxRx_DMA_Init">USART_Communication_TxRx_DMA_Init</p></td>
+        <td align=left>
 This example shows how to configure GPIO and USART peripheral
 to send characters asynchronously to/from an HyperTerminal (PC) in
 DMA mode. This example is based on STM32G4xx USART LL API. Peripheral
@@ -2929,14 +3110,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_Communication_Tx_IT_Init">USART_Communication_Tx_IT_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_Communication_Tx_IT_Init">USART_Communication_Tx_IT_Init</p></td>
+        <td align=left>
 This example shows how to configure GPIO and USART peripheral to send characters
 asynchronously to HyperTerminal (PC) in Interrupt mode. This example is based on
 STM32G4xx USART LL API. Peripheral initialization is done using LL unitary services
@@ -2944,14 +3126,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_Communication_Tx_Init">USART_Communication_Tx_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_Communication_Tx_Init">USART_Communication_Tx_Init</p></td>
+        <td align=left>
 This example shows how to configure GPIO and USART peripherals to send characters 
 asynchronously to an HyperTerminal (PC) in Polling mode. If the transfer could not
 be completed within the allocated time, a timeout allows to exit from the sequence
@@ -2961,14 +3144,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_HardwareFlowControl">USART_HardwareFlowControl</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_HardwareFlowControl">USART_HardwareFlowControl</p></td>
+        <td align=left>
 Configuration of GPIO and USART1 peripheral
 to receive characters asynchronously from an HyperTerminal (PC) in Interrupt mode 
 with the Hardware Flow Control feature enabled. This example is based on STM32G4xx 
@@ -2977,30 +3161,30 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_SyncCommunication_FullDuplex_DMA">USART_SyncCommunication_FullDuplex_DMA</p></td>
-        <td align="left">Configuration
-of GPIO, USART, DMA and SPI peripherals to transmit bytes between a
-USART and an SPI (in slave mode) in DMA mode. This example is based on
-the STM32G4xx USART LL API. The peripheral initialization uses LL
-unitary service functions for optimization purposes (performance and
-size).
+      <tr align=center>
+        <td align=left><p id="USART_SyncCommunication_FullDuplex_DMA">USART_SyncCommunication_FullDuplex_DMA</p></td>
+        <td align=left>
+Configuration of GPIO, USART, DMA and SPI peripherals to transmit 
+bytes between a USART and an SPI (in slave mode) in DMA mode. This example is based on the STM32G4xx USART LL API. The peripheral 
+initialization uses LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_SyncCommunication_FullDuplex_IT">USART_SyncCommunication_FullDuplex_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_SyncCommunication_FullDuplex_IT">USART_SyncCommunication_FullDuplex_IT</p></td>
+        <td align=left>
 Configuration of GPIO, USART, DMA and SPI peripherals to transmit 
 bytes between a USART and an SPI (in slave mode) in Interrupt mode. This example is based on the STM32G4xx USART LL API 
 (the SPI uses the DMA to receive/transmit characters sent from/received by the USART). The peripheral 
@@ -3008,14 +3192,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_WakeUpFromStop1">USART_WakeUpFromStop1</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USART_WakeUpFromStop1">USART_WakeUpFromStop1</p></td>
+        <td align=left>
 Configuration of GPIO and USART peripherals 
 to receive characters on USART_RX pin and wake up the MCU from low-power mode. This example is based on 
 the STM32G4xx USART LL API. The peripheral initialization 
@@ -3023,78 +3208,84 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USART_WakeUpFromStop_Init">USART_WakeUpFromStop_Init</p></td>
-        <td align="left">
-Configuration of GPIO and USART1 peripherals to allow the characters
-received on USART_RX pin to wake up the MCU from low-power mode. </td>
+      <tr align=center>
+        <td align=left><p id="USART_WakeUpFromStop_Init">USART_WakeUpFromStop_Init</p></td>
+        <td align=left>  
+Configuration of GPIO and USART1 peripherals to allow the characters received on USART_RX pin to wake up the MCU from low-power mode. 
+</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="UTILS">UTILS</p></td>
-        <td align="left"><p id="UTILS_ConfigureSystemClock">UTILS_ConfigureSystemClock</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="UTILS">UTILS</p></td>
+        <td align=left><p id="UTILS_ConfigureSystemClock">UTILS_ConfigureSystemClock</p></td>
+        <td align=left>
 Use of UTILS LL API to configure the system clock using PLL with HSI as source clock. 
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UTILS_ReadDeviceInfo">UTILS_ReadDeviceInfo</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UTILS_ReadDeviceInfo">UTILS_ReadDeviceInfo</p></td>
+        <td align=left>
 This example reads the UID, Device ID and Revision ID and saves 
 them into a global information buffer.
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="WWDG">WWDG</p></td>
-        <td align="left"><p id="WWDG_RefreshUntilUserEvent_Init">WWDG_RefreshUntilUserEvent_Init</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="WWDG">WWDG</p></td>
+        <td align=left><p id="WWDG_RefreshUntilUserEvent_Init">WWDG_RefreshUntilUserEvent_Init</p></td>
+        <td align=left>
 Configuration of the WWDG to periodically update the counter and 
 generate an MCU WWDG reset when a user button is pressed. The peripheral initialization 
 uses the LL unitary service functions for optimization purposes (performance and size).
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
         <td colspan="3"><b>Total number of examples_ll: 186</b></td>
         <td>0</td>
+        <td>0</td>
         <td>29</td>
         <td>81</td>
         <td>76</td>
         <td>0</td>
         <td>0</td>
       </tr>
-      <tr align="center">
-        <td style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" rowspan="10"><p id="Examples_MIX">Examples_MIX</p></td>
-        <td rowspan="1" align="left"><p id="ADC">ADC</p></td>
-        <td align="left"><p id="ADC_SingleConversion_TriggerSW_IT">ADC_SingleConversion_TriggerSW_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" rowspan=10><p id="Examples_MIX">Examples_MIX</p></td>
+        <td align=left rowspan=1><p id="ADC">ADC</p></td>
+        <td align=left><p id="ADC_SingleConversion_TriggerSW_IT">ADC_SingleConversion_TriggerSW_IT</p></td>
+        <td align=left>
 How to use the ADC to perform a single ADC channel conversion at each 
 software start. This example uses the interrupt programming model (for 
 polling and DMA programming models, please refer to other examples). It is 
@@ -3102,31 +3293,33 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 for performance improvement.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="1" align="left"><p id="DMA">DMA</p></td>
-        <td align="left"><p id="DMA_FLASHToRAM">DMA_FLASHToRAM</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=1><p id="DMA">DMA</p></td>
+        <td align=left><p id="DMA_FLASHToRAM">DMA_FLASHToRAM</p></td>
+        <td align=left>
 How to use a DMA to transfer a word data buffer from Flash memory to embedded
 SRAM through the STM32G4xx DMA HAL and LL API. The LL API is used for 
 performance improvement.
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td colspan="1" rowspan="4" align="left"><p id="HRTIM">HRTIM</p></td>
-        <td align="left"><p id="HRTIM_Buck_Boost">HRTIM_Buck_Boost</p></td>
-        <td align="left">  This example shows how to configure the HRTIM to control a non-inverting
+      <tr align=center>
+        <td align=left rowspan=4><p id="HRTIM">HRTIM</p></td>
+        <td align=left><p id="HRTIM_Buck_Boost">HRTIM_Buck_Boost</p></td>
+        <td align=left>  This example shows how to configure the HRTIM to control a non-inverting
   buck-boost converter timer. 
 </td>
         <td>-</td>
@@ -3134,11 +3327,12 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Buck_Sync_Rect">HRTIM_Buck_Sync_Rect</p></td>
-        <td align="left">  This example shows how to configure the HRTIM to control a buck converter
+      <tr align=center>
+        <td align=left><p id="HRTIM_Buck_Sync_Rect">HRTIM_Buck_Sync_Rect</p></td>
+        <td align=left>  This example shows how to configure the HRTIM to control a buck converter
   with synchronous rectification.
 </td>
         <td>-</td>
@@ -3146,11 +3340,12 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HRTIM_Dual_Buck">HRTIM_Dual_Buck</p></td>
-        <td align="left">  This example shows how to configure the HRTIM to have 2 buck converters 
+      <tr align=center>
+        <td align=left><p id="HRTIM_Dual_Buck">HRTIM_Dual_Buck</p></td>
+        <td align=left>  This example shows how to configure the HRTIM to have 2 buck converters 
   controlled by a single timer unit.
 </td>
         <td>-</td>
@@ -3158,52 +3353,44 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-      </tr>
-      <tr>
-      <td style="vertical-align: top; text-align: left;">
-      <p>HRTIM_PFC_TransitionMode</p>
-      </td>
-      <td style="vertical-align: top;">This example shows the usage of HRTIM1 on STM32G4 to control a boost PFC plant in transition mode.<br>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p><font color="green" size="5">CubeMx</font></p>
-      </td>
-    </tr>
-<tr align="center">
-        <td rowspan="1" align="left"><p id="PWR">PWR</p></td>
-        <td align="left"><p id="PWR_STOP1">PWR_STOP1</p></td>
-        <td align="left"> 
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+      </tr>
+      <tr align=center>
+        <td align=left><p id="HRTIM_PFC_TransitionMode">HRTIM_PFC_TransitionMode</p></td>
+        <td align=left>
+This example uses HRTIM to: 
+- Generate a PWM as if it were controlling a PFC type converter in transition mode
+- Generate the OverCurrent and ZeroCurrentDetection events of such system.  
+</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+      </tr>
+      <tr align=center>
+        <td align=left rowspan=1><p id="PWR">PWR</p></td>
+        <td align=left><p id="PWR_STOP1">PWR_STOP1</p></td>
+        <td align=left> 
 How to enter the STOP 1 mode and wake up from this mode by using external 
 reset or wakeup interrupt (all the RCC function calls use RCC LL API 
 for minimizing footprint and maximizing performance).
 </td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="UART">UART</p></td>
-        <td align="left"><p id="UART_HyperTerminal_IT">UART_HyperTerminal_IT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="UART">UART</p></td>
+        <td align=left><p id="UART_HyperTerminal_IT">UART_HyperTerminal_IT</p></td>
+        <td align=left>
 Use of a UART to transmit data (transmit/receive)
 between a board and an HyperTerminal PC application in Interrupt mode. This example
 describes how to use the USART peripheral through the STM32G4xx UART HAL
@@ -3211,14 +3398,15 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="UART_HyperTerminal_TxPolling_RxIT">UART_HyperTerminal_TxPolling_RxIT</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="UART_HyperTerminal_TxPolling_RxIT">UART_HyperTerminal_TxPolling_RxIT</p></td>
+        <td align=left>
 Use of a UART to transmit data (transmit/receive)
 between a board and an HyperTerminal PC application both in Polling and Interrupt
 modes. This example describes how to use the USART peripheral through
@@ -3226,40 +3414,94 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
 </td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
         <td colspan="3"><b>Total number of examples_mix: 17</b></td>
         <td>0</td>
+        <td>0</td>
         <td>3</td>
         <td>5</td>
         <td>5</td>
         <td>0</td>
-        <td>4<br>
-</td>
+        <td>4</td>
       </tr>
-      <tr align="center">
-        <td style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" rowspan="24"><p id="Applications">Applications</p></td>
-        <td rowspan="1" align="left"><p id="-">-</p></td>
-        <td align="left"><p id="OpenBootloader">OpenBootloader</p></td>
-        <td align="left">
+      <tr align=center>
+        <td style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" rowspan=24><p id="Applications">Applications</p></td>
+        <td align=left rowspan=1><p id="-">-</p></td>
+        <td align=left><p id="OpenBootloader">OpenBootloader</p></td>
+        <td align=left>
 This application exploits OpenBootloader Middleware to demonstrate how to develop an IAP application
 and how use it.
 </td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+      </tr>
+      <tr align=center>
+        <td align=left rowspan=5><p id="Digital_Power">Digital_Power</p></td>
+        <td align=left><p id="Boost_VoltageMode_HW">Boost_VoltageMode_HW</p></td>
+        <td align=left>
+This application runs a Boost converter to output a regulated voltage at 5VDC through two selectable embedded loads.
+</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+      </tr>
+      <tr align=center>
+        <td align=left><p id="Buck_CurrentMode_HW">Buck_CurrentMode_HW</p></td>
+        <td align=left>
+This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
+</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+      </tr>
+      <tr align=center>
+        <td align=left><p id="Buck_CurrentMode_SW">Buck_CurrentMode_SW</p></td>
+        <td align=left>
+This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
+</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+      </tr>
+      <tr align=center>
+        <td align=left><p id="Buck_VoltageMode_HW">Buck_VoltageMode_HW</p></td>
+        <td align=left>
+This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
+</td>
+        <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td colspan="1" rowspan="5" align="left"><p id="Digital_Power">Digital_Power</p></td>
-        <td align="left"><p id="Buck_VoltageMode_HW">Buck_VoltageMode_HW</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="Buck_VoltageMode_SW">Buck_VoltageMode_SW</p></td>
+        <td align=left>
 This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
 </td>
         <td>-</td>
@@ -3267,400 +3509,313 @@ <h1>STM32CubeG4 Firmware Examples for STM32G4xx Series</h1>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-      </tr>
-      <tr>
-      <td style="vertical-align: top;">
-      <p>Boost_VoltageMode_HW</p>
-      </td>
-      <td style="vertical-align: top;">This application runs a Boost converter to output a regulated voltage at 5VDC through two selectable embedded loads.<br>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p><font color="green" size="5">CubeMx</font></p>
-      </td>
-    </tr>
-    <tr>
-      <td style="vertical-align: top;">
-      <p>Buck_CurrentMode_HW</p>
-      </td>
-      <td style="vertical-align: top;">This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.<br>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p><font color="green" size="5">CubeMx</font></p>
-      </td>
-    </tr>
-    <tr>
-      <td style="vertical-align: top;">
-      <p>Buck_CurrentMode_SW</p>
-      </td>
-      <td style="vertical-align: top;">This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.<br>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p><font color="green" size="5">CubeMx</font></p>
-      </td>
-    </tr>
-    <tr>
-      <td style="vertical-align: top;">
-      <p>Buck_VoltageMode_SW</p>
-      </td>
-      <td style="vertical-align: top;">This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.<br>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p>-</p>
-      </td>
-      <td style="vertical-align: top; text-align: center;">
-      <p><font color="green" size="5">CubeMx</font></p>
-      </td>
-    </tr>
-<tr align="center">
-        <td rowspan="2" align="left"><p id="FatFs">FatFs</p></td>
-        <td align="left"><p id="FatFs_RAMDisk">FatFs_RAMDisk</p></td>
-        <td align="left">
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+      </tr>
+      <tr align=center>
+        <td align=left rowspan=2><p id="FatFs">FatFs</p></td>
+        <td align=left><p id="FatFs_RAMDisk">FatFs_RAMDisk</p></td>
+        <td align=left>
 This application provides a description on how to use STM32Cube firmware with FatFs 
 middleware component as a generic FAT file system module, in order to develop an
 application exploiting FatFs offered features with RAM disk (SDRAM) drive 
 configuration. 
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FatFs_uSD_Standalone">FatFs_uSD_Standalone</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FatFs_uSD_Standalone">FatFs_uSD_Standalone</p></td>
+        <td align=left>
 How to use STM32Cube firmware with FatFs middleware component as a generic FAT
 file system module. This example develops an application that exploits FatFs
 features to configure a microSD drive.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="9" align="left"><p id="FreeRTOS">FreeRTOS</p></td>
-        <td align="left"><p id="FreeRTOS_Mail">FreeRTOS_Mail</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=9><p id="FreeRTOS">FreeRTOS</p></td>
+        <td align=left><p id="FreeRTOS_Mail">FreeRTOS_Mail</p></td>
+        <td align=left>
 How to use mail queues with CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_Mutexes">FreeRTOS_Mutexes</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_Mutexes">FreeRTOS_Mutexes</p></td>
+        <td align=left>
 How to use mutexes with CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_Queues">FreeRTOS_Queues</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_Queues">FreeRTOS_Queues</p></td>
+        <td align=left>
 How to use message queues with CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_Semaphore">FreeRTOS_Semaphore</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_Semaphore">FreeRTOS_Semaphore</p></td>
+        <td align=left>
 How to use semaphores with CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_SemaphoreFromISR">FreeRTOS_SemaphoreFromISR</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_SemaphoreFromISR">FreeRTOS_SemaphoreFromISR</p></td>
+        <td align=left>
 How to use semaphore from ISR with CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_Signal">FreeRTOS_Signal</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_Signal">FreeRTOS_Signal</p></td>
+        <td align=left>
 How to perform thread signaling using CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_SignalFromISR">FreeRTOS_SignalFromISR</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_SignalFromISR">FreeRTOS_SignalFromISR</p></td>
+        <td align=left>
 This application shows the usage of CMSIS-OS Signal API from ISR context.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_ThreadCreation">FreeRTOS_ThreadCreation</p></td>
-        <td align="left">
-How to implement thread creation using CMSIS RTOS API. 
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_ThreadCreation">FreeRTOS_ThreadCreation</p></td>
+        <td align=left>
+How to implement thread creation using CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="FreeRTOS_Timers">FreeRTOS_Timers</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="FreeRTOS_Timers">FreeRTOS_Timers</p></td>
+        <td align=left>
 How to use timers of CMSIS RTOS API.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="2" align="left"><p id="USB-PD">USB-PD</p></td>
-        <td align="left"><p id="USB-PD_Consumer_1port">USB-PD_Consumer_1port</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=2><p id="USB-PD">USB-PD</p></td>
+        <td align=left><p id="USB-PD_Consumer_1port">USB-PD_Consumer_1port</p></td>
+        <td align=left>
 How to create a simple type C Consumer.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="USB-PD_Provider_1port">USB-PD_Provider_1port</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="USB-PD_Provider_1port">USB-PD_Provider_1port</p></td>
+        <td align=left>
 How to create a simple type C provider.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td rowspan="4" align="left"><p id="USB_Device">USB_Device</p></td>
-        <td align="left"><p id="CDC_Standalone">CDC_Standalone</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left rowspan=4><p id="USB_Device">USB_Device</p></td>
+        <td align=left><p id="CDC_Standalone">CDC_Standalone</p></td>
+        <td align=left>
 This application describes how to use USB device application based on the Device
 Communication Class (CDC) following the PSTN sub-protocol on the STM32G4xx devices.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="DFU_Standalone">DFU_Standalone</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="DFU_Standalone">DFU_Standalone</p></td>
+        <td align=left>
 Compliant implementation of the Device Firmware Upgrade (DFU)
 capability to program the embedded Flash memory through the USB peripheral.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="HID_Standalone">HID_Standalone</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="HID_Standalone">HID_Standalone</p></td>
+        <td align=left>
 Use of the USB device application based on the Human Interface (HID).
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="MSC_Standalone">MSC_Standalone</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="MSC_Standalone">MSC_Standalone</p></td>
+        <td align=left>
 This application shows how to use the USB device application based on the Mass Storage Class (MSC) on the STM32G4xx devices.
 </td>
-        <td><font color="green" size="5">CubeMx</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>CubeMx</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
-        <td colspan="3"><b>Total number of applications: 37</b></td>
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
+        <td colspan="3"><b>Total number of applications: 49</b></td>
+        <td>12</td>
         <td>18</td>
         <td>4</td>
         <td>4</td>
         <td>4</td>
         <td>1</td>
-        <td>6<br>
-</td>
+        <td>6</td>
       </tr>
-      <tr align="center">
-        <td style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" rowspan="5"><p id="Demonstrations">Demonstrations</p></td>
-        <td rowspan="4" align="left"><p id="-">-</p></td>
-        <td align="left"><p id="Adafruit_LCD_1_8_SD_Joystick">Adafruit_LCD_1_8_SD_Joystick</p></td>
-        <td align="left">
+      <tr align=center>
+        <td style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" rowspan=4><p id="Demonstrations">Demonstrations</p></td>
+        <td align=left rowspan=3><p id="-">-</p></td>
+        <td align=left><p id="Adafruit_LCD_1_8_SD_Joystick">Adafruit_LCD_1_8_SD_Joystick</p></td>
+        <td align=left>
 This demonstration provides a short description of how to use the BSP drivers.
 </td>
-        <td>-</td>
-        <td>-</td>
-        <td><font color="green" size="5">X</font></td>
-        <td><font color="green" size="5">X</font></td>
-        <td>-</td>
-        <td>-</td>
-      </tr>
-      <tr align="center">
-        <td align="left"><p id="Binary">Binary</p></td>
-        <td align="left"><br>
-</td>
-        <td><font color="green" size="5">X</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
+        <td><font size="5" color=green>X</font></td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="Demo">Demo</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="Demo">Demo</p></td>
+        <td align=left>
 This demonstration firmware is based on STM32Cube. It helps you to discover
 STM32 Cortex-M devices that can be plugged on a STM32 Discovery board.
 </td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
+        <td><font size="5" color=green>X</font></td>
       </tr>
-      <tr align="center">
-        <td align="left"><p id="Led_Jumper">Led_Jumper</p></td>
-        <td align="left">
+      <tr align=center>
+        <td align=left><p id="Led_Jumper">Led_Jumper</p></td>
+        <td align=left>
 This demonstration provides a short description of how to use the BSP drivers.
 </td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
         <td>-</td>
-        <td><font color="green" size="5">X</font></td>
+        <td>-</td>
+        <td><font size="5" color=green>X</font></td>
         <td>-</td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
-        <td colspan="3"><b>Total number of demonstrations: 6</b></td>
-        <td>2</td>
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
+        <td colspan="3"><b>Total number of demonstrations: 5</b></td>
+        <td>0</td>
+        <td>1</td>
         <td>0</td>
         <td>1</td>
         <td>1</td>
         <td>1</td>
         <td>1</td>
       </tr>
-      <tr style="background-repeat: no-repeat; background-position: right center; background-color: rgb(57, 169, 220); color: rgb(255, 255, 255);" align="center">
-      	<td colspan="4"><b>Total number of projects: 565</b></td>
-      	<td>94</td>
+      <tr style="background-repeat: no-repeat;background-position: right center;background-color: #39A9DC;color: #FFF;" align=center>
+      	<td colspan="4"><b>Total number of projects: 635</b></td>
+      	<td>64</td>
+      	<td>93</td>
       	<td>72</td>
-      	<td>185</td>
-      	<td>165</td>
+      	<td>186</td>
+      	<td>166</td>
       	<td>25</td>
-      	<td>24</td>
+      	<td>29</td>
       </tr>
-    </tbody></table>
-  </body></html>
\ No newline at end of file
+    </table>
+  </body>
+</html>
diff --git a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld
index b536c903f..25a4e5f66 100644
--- a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 6e7f01108..53f95e954 100644
--- a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 7643e1940..9d0348e32 100644
--- a/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
index b2750aca1..8c258dd5f 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
index b2750aca1..8c258dd5f 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 7afbb14dd..9342ef9f0 100644
--- a/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c b/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c
index 1ba595276..4d98836c1 100644
--- a/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c
+++ b/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c
@@ -435,7 +435,7 @@ static void Calendar_DateDisplay(uint8_t Year, uint8_t Month, uint8_t Day)
 {
   uint32_t mline = 0, mcolumn = 319, month = 0;
   uint32_t monthlength = 0;
-  char linedisplay[25];
+  char linedisplay[26];
   uint32_t pXSize;
 
   if (Month == 2)
diff --git a/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c b/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c
index ca16e5d30..63be1a8a6 100644
--- a/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c
+++ b/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c
@@ -360,7 +360,7 @@ static void Display_power(void)
 {
   uint32_t vsense = 0;
   int32_t isense = 0;
-  char  pstr[26]={0};
+  char  pstr[27]={0};
   static uint8_t counter = 0;
 
   counter++;
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7afbb14dd..9342ef9f0 100644
--- a/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld
index 01eb212fc..9432493f0 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c
index 89f3f8dc5..987477623 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c
+++ b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c
@@ -98,6 +98,16 @@ static void Display_DecryptedData(uint8_t mode, uint16_t keysize, uint32_t datal
 extern void initialise_monitor_handles(void);
 #endif
 
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
+#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/
@@ -453,19 +463,32 @@ static void Display_EncryptedData(uint8_t mode, uint16_t keysize, uint32_t datal
 }
 
 #if (USE_VCP_CONNECTION == 1)
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the USARTx.
-  * @param  ch: character to send
-  * @param  f: pointer to file (not used)
-  * @retval The character transmitted
   */
-#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-int __io_putchar(int ch)
-#else
-int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+PUTCHAR_PROTOTYPE
 {
   /* Place your implementation of fputc here */
   /* e.g. write a character to the EVAL_COM1 and Loop until the end of transmission */
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 4dcbedc34..a3efc4267 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 4dcbedc34..a3efc4267 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 4dcbedc34..a3efc4267 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
index aaffa7e88..5d1b706fc 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1dbfc70bc..c3e1ebc15 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -104,8 +104,12 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
-  .ARM : {
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } >FLASH
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     __exidx_start = .;
     *(.ARM.exidx*)
     __exidx_end = .;
@@ -125,7 +129,7 @@ _qspi_init_base = LOADADDR(.qspi);
   } >QSPI AT> FLASH
 
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -134,7 +138,7 @@ _qspi_init_base = LOADADDR(.qspi);
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -144,7 +148,7 @@ _qspi_init_base = LOADADDR(.qspi);
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld
index f39f51073..76966f58a 100644
--- a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c
index 449388d8b..ecf0fa347 100644
--- a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c
+++ b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c
@@ -76,13 +76,16 @@ static void MX_USART1_UART_Init(void);
 static void MX_USART3_SMARTCARD_Init(void);
 /* USER CODE BEGIN PFP */
 #if defined(HAL_UART_MODULE_ENABLED)
-#ifdef __GNUC__
-/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
 #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 #endif /* HAL_UART_MODULE_ENABLED */
 /* USER CODE END PFP */
 
@@ -727,11 +730,30 @@ void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsc)
 }
 
 #if defined(HAL_UART_MODULE_ENABLED)
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the huart1.
-  * @param  ch: character to send
-  * @param  f: pointer to file (not used)
-  * @retval The character transmitted
   */
 PUTCHAR_PROTOTYPE
 {
diff --git a/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
index f39f51073..76966f58a 100644
--- a/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c
index 8052821e5..27e202c69 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
 static void MX_USART1_UART_Init(void);
 /* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
-   set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
 #define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/
@@ -236,10 +239,30 @@ static void MX_GPIO_Init(void)
 }
 
 /* USER CODE BEGIN 4 */
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
 /**
   * @brief  Retargets the C library printf function to the USART.
-  * @param  None
-  * @retval None
   */
 PUTCHAR_PROTOTYPE
 {
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
index f39f51073..76966f58a 100644
--- a/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >FLASH
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
index e745e1fee..2e6a15f00 100644
--- a/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
   
-  .ARM : {
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
     . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .preinit_array     :
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .init_array :
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
   
-  .fini_array :
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
     . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/.extSettings
new file mode 100644
index 000000000..b0855ed61
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/app_freertos.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_msp.c;../Src/stm32g4xx_hal_timebase_tim.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewd
new file mode 100644
index 000000000..376d37d66
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_Mail</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewp
new file mode 100644
index 000000000..8126e69d4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_Mail</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_Mail/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_Mail/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_Mail/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
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+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/Project.eww
new file mode 100644
index 000000000..09fd40032
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_Mail.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/FreeRTOS_Mail.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/FreeRTOS_Mail.ioc
new file mode 100644
index 000000000..58c3c6f11
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/FreeRTOS_Mail.ioc
@@ -0,0 +1,183 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=0
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelayUntil,INCLUDE_vTaskDelay,INCLUDE_xTaskResumeFromISR,INCLUDE_xQueueGetMutexHolder,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_eTaskGetState,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=MailQueueProduc,-1,128,MailQueueProducer,Default,NULL,Dynamic,NULL,NULL;MailQueueConsum,-1,128,MailQueueConsumer,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=0
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Mail.ioc
+ProjectManager.ProjectName=FreeRTOS_Mail
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Mail
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..cedc02ed4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)3072)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configIDLE_SHOULD_YIELD                  0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              0
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/main.h
new file mode 100644
index 000000000..d86c9ecb7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mail/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..33223ce9f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvoptx
new file mode 100644
index 000000000..3b092bcd4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_Mail</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</PathWithFileName>
+      <FilenameWithoutPath>cmsis_os.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>9</GroupNumber>
+      <FileNumber>41</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</PathWithFileName>
+      <FilenameWithoutPath>heap_4.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>9</GroupNumber>
+      <FileNumber>42</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</PathWithFileName>
+      <FilenameWithoutPath>port.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvprojx
new file mode 100644
index 000000000..025fd0c10
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_Mail</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_Mail\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_Mail</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_Mail"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..10000a608
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.10070408">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.10070408" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.10070408" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.10070408." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2120053303" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.499369524" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1964862512" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1627867648" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.74975496" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1803195804" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.823524872" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.187902694" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.408481405" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1446347806" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.126696200" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_Mail}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1510517731" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1403394624" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1557713276" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.2055451632" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1216743970" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.15088138" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+				</configuration>
+			</storageModule>
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+							<builder buildPath="${workspace_loc:/FreeRTOS_Mail}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1405991350" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.805372783" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1595312873" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1057388360" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.312482353" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1573173943" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.348337236" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.370571055" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1612206401" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1881205985" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1049595242" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.294013315" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.2001486807" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1595399395" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1952856011" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.477959700" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1082503109" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1869571824" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1959807991" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1712411591" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1551157346" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.854465206" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1306542397" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1109192386" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1677867274" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1485542749" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_Mail.null.49705759" name="FreeRTOS_Mail"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.10070408;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.10070408.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.355096579;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.51294870">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.173721843;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.173721843.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.312482353;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1881205985">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.project
new file mode 100644
index 000000000..6aeabf037
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_Mail</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_Mail.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Mail.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/heap_4.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/list.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/port.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/queue.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/stream_buffer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/tasks.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/timers.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/app_freertos.c
new file mode 100644
index 000000000..175f6d097
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mail/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/main.c
new file mode 100644
index 000000000..910986003
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/main.c
@@ -0,0 +1,362 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mail/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+typedef struct
+{ /* Mail object structure */
+  uint32_t var1; /* var1 is a uint32_t */
+  uint32_t var2; /* var2 is a uint32_t */
+  uint8_t var3; /* var3 is a uint8_t */
+} Amail_TypeDef;
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define blckqSTACK_SIZE   configMINIMAL_STACK_SIZE
+#define MAIL_SIZE        (uint32_t) 1
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId MailQueueProducHandle;
+osThreadId MailQueueConsumHandle;
+/* USER CODE BEGIN PV */
+osMailQId mailId;
+
+uint32_t ProducerValue1 = 0, ProducerValue2 = 0;
+uint8_t ProducerValue3 = 0;
+__IO uint32_t ProducerErrors = 0;
+uint32_t ConsumerValue1 = 0, ConsumerValue2 = 0;
+uint8_t ConsumerValue3 = 0;
+__IO uint32_t ConsumerErrors = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void MailQueueProducer(void const * argument);
+void MailQueueConsumer(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+  /* Create the mail queue used by the two tasks to pass the struct Amail_TypeDef */
+  osMailQDef(mail, MAIL_SIZE, Amail_TypeDef); /* Define mail queue */
+
+  mailId = osMailCreate(osMailQ(mail), NULL); /* create mail queue */
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of MailQueueProduc */
+  osThreadDef(MailQueueProduc, MailQueueProducer, osPriorityBelowNormal, 0, 128);
+  MailQueueProducHandle = osThreadCreate(osThread(MailQueueProduc), NULL);
+
+  /* definition and creation of MailQueueConsum */
+  osThreadDef(MailQueueConsum, MailQueueConsumer, osPriorityBelowNormal, 0, 128);
+  MailQueueConsumHandle = osThreadCreate(osThread(MailQueueConsum), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_MailQueueProducer */
+/**
+  * @brief  Function implementing the MailQueueProduc thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_MailQueueProducer */
+void MailQueueProducer(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  Amail_TypeDef *pTMail;
+
+  for(;;)
+  {
+
+    pTMail = osMailAlloc(mailId, osWaitForever); /* Allocate memory */
+    pTMail->var1 = ProducerValue1; /* Set the mail content */
+    pTMail->var2 = ProducerValue2;
+    pTMail->var3 = ProducerValue3;
+
+    if(osMailPut(mailId, pTMail) != osOK) /* Send Mail */
+    {
+      ++ProducerErrors;
+
+      /* Toggle LED3 to indicate error */
+      BSP_LED_Toggle(LED3);
+    }
+    else
+    {
+      /* Increment the variables we are going to post next time round.  The
+      consumer will expect the numbers to follow in numerical order. */
+      ++ProducerValue1;
+      ProducerValue2 += 2;
+      ProducerValue3 += 3;
+
+      /* Toggle LED1 to indicate a correct number received  */
+      BSP_LED_Toggle(LED1);
+
+      osDelay(250);
+    }
+  }
+  /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_MailQueueConsumer */
+/**
+* @brief Function implementing the MailQueueConsum thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_MailQueueConsumer */
+void MailQueueConsumer(void const * argument)
+{
+  /* USER CODE BEGIN MailQueueConsumer */
+  osEvent event;
+  Amail_TypeDef *pRMail;
+
+  for(;;)
+  {
+    /* Get the message from the queue */
+    event = osMailGet(mailId, osWaitForever); /* wait for mail */
+
+    if(event.status == osEventMail)
+    {
+      pRMail = event.value.p;
+
+      if((pRMail->var1 != ConsumerValue1) || (pRMail->var2 != ConsumerValue2) || (pRMail->var3 != ConsumerValue3))
+      {
+        /* Catch-up. */
+        ConsumerValue1 = pRMail->var1;
+        ConsumerValue2 = pRMail->var2;
+        ConsumerValue3 = pRMail->var3;
+
+        ++ConsumerErrors;
+
+        /* Toggle LED3 to indicate error */
+        BSP_LED_Toggle(LED3);
+      }
+      else
+      {
+        /* Calculate values we expect to remove from the mail queue next time
+        round. */
+        ++ConsumerValue1;
+        ConsumerValue2 += 2;
+        ConsumerValue3 += 3;
+      }
+
+      osMailFree(mailId, pRMail); /* free memory allocated for mail */
+    }
+  }
+  /* USER CODE END MailQueueConsumer */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..224d218c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..09af9948c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c
@@ -0,0 +1,179 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/readme.txt
new file mode 100644
index 000000000..bd39a2fc4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/readme.txt
@@ -0,0 +1,93 @@
+/**
+  @page FreeRTOS_Mail FreeRTOS mail example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mail/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS Mail example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to use mail queues with CMSIS RTOS API.
+
+This application creates two threads that send and receive mail
+the mail to send/receive is a structure that holds three variables (var1 and var2 are uint32, var3 is a uint8)
+
+One thread acts as a producer and the other as the consumer.
+The consumer is a higher priority than the producer and is set to block on mail receiving.
+
+The Mail queue has space for one item. The producer allocates the mail and put it on the mail queue.
+As soon as the producer posts a mail on the queue the consumer will unblock, preempt the producer,
+get the mail and free it.
+
+Add the following variables to LiveWatch, the three producer values must respectively remain equals to the three consumer values all the time:
+ - ConsumerValue1 must remain equal to ProducerValue1
+ - ConsumerValue2 must remain equal to ProducerValue2
+ - ConsumerValue3 must remain equal to ProducerValue3
+
+LEDs can be used to monitor the application status:
+  - LED1 should toggle when the application runs successfully.
+  - LED3 is toggling when any error occurs.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Mail, Queues,
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_Mail/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_Mail/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_Mail/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/.extSettings
new file mode 100644
index 000000000..1871b3caf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;../Src/stm32g4xx_hal_msp.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewd
new file mode 100644
index 000000000..8d3bae234
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_Mutexes</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewp
new file mode 100644
index 000000000..1ed6ce328
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_Mutexes</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_Mutexes/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_Mutexes/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_Mutexes/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
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+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/Project.eww
new file mode 100644
index 000000000..a3327a905
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_Mutexes.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/FreeRTOS_Mutexes.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/FreeRTOS_Mutexes.ioc
new file mode 100644
index 000000000..7f6f6fd24
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/FreeRTOS_Mutexes.ioc
@@ -0,0 +1,183 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,INCLUDE_xTaskResumeFromISR,Mutexes01,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Mutexes01=osMutex
+FREERTOS.Tasks01=MutHigh,-1,128,MutexHighPriorityThreadr,Default,NULL,Dynamic,NULL,NULL;MutMedium,-2,128,MutexMediumPriorityThread,Default,NULL,Dynamic,NULL,NULL;MutLow,-3,128,MutexLowPriorityThread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Mutexes.ioc
+ProjectManager.ProjectName=FreeRTOS_Mutexes
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Mutexes
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..ecfee31a5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)3072)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              0
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_xQueueGetMutexHolder         1
+#define INCLUDE_eTaskGetState                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/main.h
new file mode 100644
index 000000000..985c6a730
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS\FreeRTOS_Mutexes\Inc\main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..78e22f972
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvoptx
new file mode 100644
index 000000000..25d6da58d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_Mutexes</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
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+  </Group>
+
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+    <GroupName>Application/User</GroupName>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvprojx
new file mode 100644
index 000000000..d7110104a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_Mutexes</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_Mutexes\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_Mutexes</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_Mutexes"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..7e21c5992
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.404557706">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.404557706" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.404557706" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.404557706." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.874667458" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1807242229" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.272980910" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1315101588" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.996689887" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1036568977" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1819141638" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1759889894" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.164530689" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1657877014" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.206131660" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_Mutexes}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.102825695" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.324327555;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.324327555.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1639161502;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.209589980">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.project
new file mode 100644
index 000000000..7aaf9561a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_Mutexes</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_Mutexes.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Mutexes.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/heap_4.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/list.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/port.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/queue.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/stream_buffer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/tasks.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/timers.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/app_freertos.c
new file mode 100644
index 000000000..7a1f14077
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mutexes/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/main.c
new file mode 100644
index 000000000..d6016f0b8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/main.c
@@ -0,0 +1,463 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mutexes/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define mutexSHORT_DELAY     ((uint32_t) 20)
+#define mutexNO_DELAY        ((uint32_t) 0)
+#define mutexTWO_TICK_DELAY  ((uint32_t) 2)
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId MutHighHandle;
+osThreadId MutMediumHandle;
+osThreadId MutLowHandle;
+osMutexId osMutexHandle;
+/* USER CODE BEGIN PV */
+
+/* Variables used to detect and latch errors */
+__IO uint32_t HighPriorityThreadCycles = 0, MediumPriorityThreadCycles = 0, LowPriorityThreadCycles = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void MutexHighPriorityThreadr(void const * argument);
+void MutexMediumPriorityThread(void const * argument);
+void MutexLowPriorityThread(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LEDs */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  BSP_LED_Init(LED4);
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Create the mutex(es) */
+  /* definition and creation of osMutex */
+  osMutexDef(osMutex);
+  osMutexHandle = osMutexCreate(osMutex(osMutex));
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of MutHigh */
+  osThreadDef(MutHigh, MutexHighPriorityThreadr, osPriorityBelowNormal, 0, 128);
+  MutHighHandle = osThreadCreate(osThread(MutHigh), NULL);
+
+  /* definition and creation of MutMedium */
+  osThreadDef(MutMedium, MutexMediumPriorityThread, osPriorityLow, 0, 128);
+  MutMediumHandle = osThreadCreate(osThread(MutMedium), NULL);
+
+  /* definition and creation of MutLow */
+  osThreadDef(MutLow, MutexLowPriorityThread, osPriorityIdle, 0, 128);
+  MutLowHandle = osThreadCreate(osThread(MutLow), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_MutexHighPriorityThreadr */
+/**
+  * @brief  Function implementing the MutHigh thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_MutexHighPriorityThreadr */
+void MutexHighPriorityThreadr(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  /* Just to remove compiler warning */
+  (void) argument;
+  /* Infinite loop */
+  for (;;)
+  {
+    /* The first time through the mutex will be immediately available, on
+    subsequent times through the mutex will be held by the low priority thread
+    at this point and this Take will cause the low priority thread to inherit
+    the priority of this thread.  In this case the block time must be
+    long enough to ensure the low priority thread will execute again before the
+    block time expires.  If the block time does expire then the error
+    flag will be set here */
+    if (osMutexWait(osMutexHandle, mutexTWO_TICK_DELAY) != osOK)
+    {
+      /* Toggle LED3 to indicate error */
+      BSP_LED_Toggle(LED3);
+    }
+
+    /* Ensure the other thread attempting to access the mutex
+    are able to execute to ensure they either block (where a block
+    time is specified) or return an error (where no block time is
+    specified) as the mutex is held by this task */
+    osDelay(mutexSHORT_DELAY);
+
+    /* We should now be able to release the mutex .
+    When the mutex is available again the medium priority thread
+    should be unblocked but not run because it has a lower priority
+    than this thread.  The low priority thread should also not run
+    at this point as it too has a lower priority than this thread */
+    if (osMutexRelease(osMutexHandle) != osOK)
+    {
+      /* Toggle LED3 to indicate error */
+      BSP_LED_Toggle(LED3);
+    }
+
+    /* Keep count of the number of cycles this thread has performed */
+    HighPriorityThreadCycles++;
+    BSP_LED_Toggle(LED1);
+
+    /* Suspend ourselves to the medium priority thread can execute */
+    osThreadSuspend(NULL);
+  }
+  /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_MutexMediumPriorityThread */
+/**
+* @brief Function implementing the MutMedium thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_MutexMediumPriorityThread */
+void MutexMediumPriorityThread(void const * argument)
+{
+  /* USER CODE BEGIN MutexMediumPriorityThread */
+  /* Just to remove compiler warning */
+  (void) argument;
+
+  /* Infinite loop */
+  for (;;)
+  {
+    /* This thread will run while the high-priority thread is blocked, and the
+    high-priority thread will block only once it has the mutex - therefore
+    this call should block until the high-priority thread has given up the
+    mutex, and not actually execute past this call until the high-priority
+    thread is suspended */
+    if (osMutexWait(osMutexHandle, osWaitForever) == osOK)
+    {
+      if (osThreadGetState(MutHighHandle) != osThreadSuspended)
+      {
+        /* Did not expect to execute until the high priority thread was
+        suspended.
+        Toggle LED3 to indicate error */
+        BSP_LED_Toggle(LED3);
+      }
+      else
+      {
+        /* Give the mutex back before suspending ourselves to allow
+        the low priority thread to obtain the mutex */
+        if (osMutexRelease(osMutexHandle) != osOK)
+        {
+          /* Toggle LED3 to indicate error */
+          BSP_LED_Toggle(LED3);
+        }
+        osThreadSuspend(NULL);
+      }
+    }
+    else
+    {
+      /* We should not leave the osMutexWait() function
+      until the mutex was obtained.
+      Toggle LED3 to indicate error */
+      BSP_LED_Toggle(LED3);
+    }
+
+    /* The High and Medium priority threads should be in lock step */
+    if (HighPriorityThreadCycles != (MediumPriorityThreadCycles + 1))
+    {
+      /* Toggle LED3 to indicate error */
+      BSP_LED_Toggle(LED3);
+    }
+
+    /* Keep count of the number of cycles this task has performed so a
+    stall can be detected */
+    MediumPriorityThreadCycles++;
+    BSP_LED_Toggle(LED2);
+  }
+  /* USER CODE END MutexMediumPriorityThread */
+}
+
+/* USER CODE BEGIN Header_MutexLowPriorityThread */
+/**
+* @brief Function implementing the MutLow thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_MutexLowPriorityThread */
+void MutexLowPriorityThread(void const * argument)
+{
+  /* USER CODE BEGIN MutexLowPriorityThread */
+  /* Just to remove compiler warning */
+  (void) argument;
+
+  /* Infinite loop */
+  for (;;)
+  {
+    /* Keep attempting to obtain the mutex.  We should only obtain it when
+    the medium-priority thread has suspended itself, which in turn should only
+    happen when the high-priority thread is also suspended */
+    if (osMutexWait(osMutexHandle, mutexNO_DELAY) == osOK)
+    {
+      /* Is the high and medium-priority threads suspended? */
+      if ((osThreadGetState(MutHighHandle) != osThreadSuspended) || (osThreadGetState(MutMediumHandle) != osThreadSuspended))
+      {
+        /* Toggle LED3 to indicate error */
+        BSP_LED_Toggle(LED3);
+      }
+      else
+      {
+        /* Keep count of the number of cycles this task has performed
+        so a stall can be detected */
+        LowPriorityThreadCycles++;
+        BSP_LED_Toggle(LED4);
+
+        /* We can resume the other tasks here even though they have a
+        higher priority than the this thread. When they execute they
+        will attempt to obtain the mutex but fail because the low-priority
+        thread is still the mutex holder.  this thread will then inherit
+        the higher priority.  The medium-priority thread will block indefinitely
+        when it attempts to obtain the mutex, the high-priority thread will only
+        block for a fixed period and an error will be latched if the
+        high-priority thread has not returned the mutex by the time this
+        fixed period has expired */
+        osThreadResume(MutMediumHandle);
+        osThreadResume(MutHighHandle);
+
+        /* The other two tasks should now have executed and no longer
+        be suspended */
+        if ((osThreadGetState(MutHighHandle) == osThreadSuspended) || (osThreadGetState(MutMediumHandle) == osThreadSuspended))
+        {
+          /* Toggle LED3 to indicate error */
+          BSP_LED_Toggle(LED3);
+        }
+
+        /* Release the mutex, disinheriting the higher priority again */
+        if (osMutexRelease(osMutexHandle) != osOK)
+        {
+          /* Toggle LED3 to indicate error */
+          BSP_LED_Toggle(LED3);
+        }
+      }
+    }
+
+#if configUSE_PREEMPTION == 0
+    {
+      taskYIELD();
+    }
+#endif
+  }
+  /* USER CODE END MutexLowPriorityThread */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..6fa0f3219
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..4f4f0d049
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/readme.txt
new file mode 100644
index 000000000..a1cd1c3ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/readme.txt
@@ -0,0 +1,108 @@
+/**
+  @page FreeRTOS_Mutexes FreeRTOS Mutexes example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Mutexes/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS Mutexes example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to use mutexes with CMSIS RTOS API.
+
+This application creates three threads, with different priorities, that access the
+same mutex, as described below:
+
+MutexHighPriorityThread() has the highest priority so executes
+first and grabs the mutex and sleeps for a short period to let the lower
+priority threads execute.  When it has completed its demo functionality
+it gives the mutex back before suspending itself.
+At that point, LED1 toggles.
+
+MutexMediumPriorityThread() attempts to access the mutex by performing
+a blocking 'wait'.  This thread blocks when the mutex is already taken
+by the high priority thread. It does not unblock until the highest
+priority thread  has released the mutex, and it does not actually run until
+the highest priority thread has suspended itself.
+When it eventually does obtain the mutex all it does is give the mutex back
+prior to also suspending itself.
+At this point both the high and medium priority threads are suspended and LED2 toggles.
+
+MutexLowPriorityThread() runs at the idle priority.  It spins round
+a tight loop attempting to obtain the mutex with a non-blocking call.  As
+the lowest priority thread it will not successfully obtain the mutex until
+both high and medium priority threads are suspended.  Once it eventually
+does obtains the mutex, it first resumes both suspended threads (and LED4 toggles
+at that time) prior to giving the mutex back - resulting in the low priority
+thread temporarily inheriting the highest thread priority.
+
+In case of error, LED3 toggles.
+
+The following variables can be displayed on the debugger via LiveWatch:
+ - HighPriorityThreadCycles
+ - MediumPriorityThreadCycles
+ - LowPriorityThreadCycles
+ These variables must remain equals all the time. If not equal, it means a stall has occurred.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Mutexes
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_Mutexes/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_Mutexes/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_Mutexes/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/.extSettings
new file mode 100644
index 000000000..1871b3caf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;../Src/stm32g4xx_hal_msp.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewd
new file mode 100644
index 000000000..8fa52901f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_Queues</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewp
new file mode 100644
index 000000000..5690a30be
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_Queues</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_Queues/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_Queues/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_Queues/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state>$PROJ_DIR$\..\Inc</state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>FreeRTOS_Queues.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>FreeRTOS_Queues.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/Project.eww
new file mode 100644
index 000000000..d9a015be4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_Queues.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/FreeRTOS_Queues.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/FreeRTOS_Queues.ioc
new file mode 100644
index 000000000..78c33e6b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/FreeRTOS_Queues.ioc
@@ -0,0 +1,184 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,INCLUDE_xTaskResumeFromISR,Queues01,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Queues01=osQueue,1,uint16_t,0,Dynamic,NULL,NULL
+FREERTOS.Tasks01=MessageQueuePro,-1,128,MessageQueueProducer,Default,NULL,Dynamic,NULL,NULL;MessageQueueCon,-1,128,MessageQueueConsumer,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Queues.ioc
+ProjectManager.ProjectName=FreeRTOS_Queues
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Queues
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..ecfee31a5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)3072)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              0
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_xQueueGetMutexHolder         1
+#define INCLUDE_eTaskGetState                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/main.h
new file mode 100644
index 000000000..4f9bd6516
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Queues/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..844885f98
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvoptx
new file mode 100644
index 000000000..6c52a3fad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_Queues</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvprojx
new file mode 100644
index 000000000..8e54e264e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_Queues</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_Queues\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_Queues</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
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+            <UserProg1Name></UserProg1Name>
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+          </BeforeMake>
+          <AfterMake>
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+          </AfterMake>
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+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
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+          <RVCTZI>0</RVCTZI>
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+          <IncludeInBuild>1</IncludeInBuild>
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+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
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+          </OPTHX>
+        </DebugOption>
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+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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+          </Flash1>
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+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
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+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_Queues"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..af895c095
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1830468659">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1830468659" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1830468659" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1830468659." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.104069189" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1227933017" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.2121845174" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.561130570" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1327431334" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.119642869" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1323777719" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1338882648" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1360449747" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.354148447" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1558177857" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_Queues}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.917364428" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.451488857" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.364631266" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.551316467" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1899984361" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.586874191" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.228443586" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.745060981" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.783345265" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1146660962" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.884039848" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.867824864" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1272060147" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1744395853" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1665741531" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.278689693" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1660581767" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.2065900664" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1101509321" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.18952533" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1098059267" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.308528945" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1882568917" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.916931382" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1961421431" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
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+				</configuration>
+			</storageModule>
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+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.783344546." name="/" resourcePath="">
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+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.198124527" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1240958539" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.54762358" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1578094062" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1990279796" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1176932589" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.454137946" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_Queues}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1549265853" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.644096288" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1702511660" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1182792000" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.773880787" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.938700041" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.623415445" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.302810631" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1730796909" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.584114753" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1291251879" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.2073337150" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1140908798" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1405602153" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.979187530" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.757593149" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1351552030" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.285074440" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.2004297287" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1713224213" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1673187785" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.558962077" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.2068908638" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.813634274" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.928642458" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_Queues.null.1134986114" name="FreeRTOS_Queues"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1830468659;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1830468659.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1899984361;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1146660962">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.783344546;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.783344546.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1182792000;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1730796909">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.project
new file mode 100644
index 000000000..f1c16327d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_Queues</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_Queues.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Queues.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/heap_4.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/list.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/port.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/queue.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/stream_buffer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/tasks.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/timers.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/app_freertos.c
new file mode 100644
index 000000000..7e165d46d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Queues/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/main.c
new file mode 100644
index 000000000..32094236b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/main.c
@@ -0,0 +1,335 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Queues/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define blckqSTACK_SIZE   configMINIMAL_STACK_SIZE
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId MessageQueueProHandle;
+osThreadId MessageQueueConHandle;
+osMessageQId osQueueHandle;
+/* USER CODE BEGIN PV */
+uint32_t ProducerValue = 0, ConsumerValue = 0;
+__IO uint32_t ProducerErrors = 0, ConsumerErrors = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void MessageQueueProducer(void const * argument);
+void MessageQueueConsumer(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LEDs */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* Create the queue(s) */
+  /* definition and creation of osQueue */
+  osMessageQDef(osQueue, 1, uint16_t);
+  osQueueHandle = osMessageCreate(osMessageQ(osQueue), NULL);
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of MessageQueuePro */
+  osThreadDef(MessageQueuePro, MessageQueueProducer, osPriorityBelowNormal, 0, 128);
+  MessageQueueProHandle = osThreadCreate(osThread(MessageQueuePro), NULL);
+
+  /* definition and creation of MessageQueueCon */
+  osThreadDef(MessageQueueCon, MessageQueueConsumer, osPriorityBelowNormal, 0, 128);
+  MessageQueueConHandle = osThreadCreate(osThread(MessageQueueCon), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_MessageQueueProducer */
+/**
+  * @brief  Function implementing the MessageQueuePro thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_MessageQueueProducer */
+void MessageQueueProducer(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for (;;)
+  {
+    if (osMessagePut(osQueueHandle, ProducerValue, 100) != osOK)
+    {
+      ++ProducerErrors;
+
+      /* Toggle LED3 to indicate error  */
+      BSP_LED_Toggle(LED3);
+    }
+    else
+    {
+      /* Increment the variable we are going to post next time round.  The
+      consumer will expect the numbers to follow in numerical order */
+      ++ProducerValue;
+
+      /* Toggle LED1 to indicate a correct number received  */
+      BSP_LED_Toggle(LED1);
+      osDelay(1000);
+    }
+  }
+  /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_MessageQueueConsumer */
+/**
+* @brief Function implementing the MessageQueueCon thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_MessageQueueConsumer */
+void MessageQueueConsumer(void const * argument)
+{
+  /* USER CODE BEGIN MessageQueueConsumer */
+  osEvent event;
+
+  for (;;)
+  {
+    /* Get the message from the queue */
+    event = osMessageGet(osQueueHandle, 100);
+
+    if (event.status == osEventMessage)
+    {
+      if (event.value.v != ConsumerValue)
+      {
+        /* Catch-up */
+        ConsumerValue = event.value.v;
+
+        ++ConsumerErrors;
+
+      /* Toggle LED3 to indicate error */
+        BSP_LED_Toggle(LED3);
+      }
+      else
+      {
+        /* Increment the value we expect to remove from the queue next time
+        round */
+        ++ConsumerValue;
+      }
+    }
+  }
+  /* USER CODE END MessageQueueConsumer */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..1e3848129
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..1ba48f7b3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/readme.txt
new file mode 100644
index 000000000..11787a937
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/readme.txt
@@ -0,0 +1,91 @@
+/**
+  @page FreeRTOS_Queues FreeRTOS Queues example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Queues/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS Queues example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to use message queues with CMSIS RTOS API.
+
+This application creates two threads that send and receive an incrementing number
+to/from a queue, as following:
+One thread acts as a producer and the other as the consumer. The consumer
+is a higher priority than the producer and is set to block on queue reads.
+The queue only has space for one item, as soon as the producer posts a
+message on the queue (every 1 second) the consumer will unblock, preempt
+the producer, and remove the item.
+
+Add the following variables to LiveWatch, these variables must remain equals all the time:
+ - ProducerValue
+ - ConsumerValue
+
+STM32G474E-EVAL1 Rev B's LEDs can be used to monitor the application status:
+  - LED1 should toggle as soon as the producer posts a
+    message on the queue (every 1 second).
+  - LED3 should toggle each time any error occurs.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Message, Queues
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_Queues/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_Queues/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_Queues/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewd
new file mode 100644
index 000000000..0ba16ca9f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_Semaphore</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewp
new file mode 100644
index 000000000..763a2ee8b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_Semaphore</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_Semaphore/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_Semaphore/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_Semaphore/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
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+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/Project.eww
new file mode 100644
index 000000000..7ab62b75c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_Semaphore.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/FreeRTOS_Semaphore.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/FreeRTOS_Semaphore.ioc
new file mode 100644
index 000000000..95fe7c650
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/FreeRTOS_Semaphore.ioc
@@ -0,0 +1,183 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.BinarySemaphores01=osSemaphore,Dynamic,NULL
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_xTaskResumeFromISR,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,BinarySemaphores01,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelayUntil,INCLUDE_vTaskDelay,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=SEM_Thread1,-2,128,SemaphoreThread1,Default,(void *) osSemaphoreHandle,Dynamic,NULL,NULL;SEM_Thread2,-3,128,SemaphoreThread2,Default,(void *) osSemaphoreHandle,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=0
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Semaphore.ioc
+ProjectManager.ProjectName=FreeRTOS_Semaphore
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Semaphore
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..f56ec2c56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h
@@ -0,0 +1,145 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)3072)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configIDLE_SHOULD_YIELD                  0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              0
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_xQueueGetMutexHolder         1
+#define INCLUDE_eTaskGetState                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/main.h
new file mode 100644
index 000000000..cfec88d21
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Semaphore/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..cc3b757ef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvoptx
new file mode 100644
index 000000000..fa72f901b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_Semaphore</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <GroupNumber>2</GroupNumber>
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+      <FileType>1</FileType>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
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+    </File>
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+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_hal_msp.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_msp.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
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+      <bDave2>0</bDave2>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvprojx
new file mode 100644
index 000000000..1e83dc566
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_Semaphore</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
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+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_Semaphore"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..20205ce1c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.789612666">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.789612666" moduleId="org.eclipse.cdt.core.settings" name="Debug">
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+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.390892041" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.907400813" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2030807271" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1979867687" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.302508888" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.204283857" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1572386494" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.2137752912" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.86045870" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1354053003" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.397717234" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1725994201" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1363331259" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.253743956" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.505254424" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.728545191" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1960858757" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_Semaphore.null.682433517" name="FreeRTOS_Semaphore"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.830527385;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.830527385.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1514005130;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.390892041">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.789612666;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.789612666.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.751980435;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1444612418">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.project
new file mode 100644
index 000000000..58ad6a713
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_Semaphore</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_Semaphore.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Semaphore.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/heap_4.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/list.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/port.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/queue.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/stream_buffer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/tasks.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/timers.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/app_freertos.c
new file mode 100644
index 000000000..060d7d61b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Semaphore/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/main.c
new file mode 100644
index 000000000..370a817d6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/main.c
@@ -0,0 +1,350 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Semaphore/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define semtstSTACK_SIZE      configMINIMAL_STACK_SIZE
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId SEM_Thread1Handle;
+osThreadId SEM_Thread2Handle;
+osSemaphoreId osSemaphoreHandle;
+/* USER CODE BEGIN PV */
+__IO uint32_t OsStatus = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void SemaphoreThread1(void const * argument);
+void SemaphoreThread2(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LEDs */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* Create the semaphores(s) */
+  /* definition and creation of osSemaphore */
+  osSemaphoreDef(osSemaphore);
+  osSemaphoreHandle = osSemaphoreCreate(osSemaphore(osSemaphore), 1);
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of SEM_Thread1 */
+  osThreadDef(SEM_Thread1, SemaphoreThread1, osPriorityLow, 0, 128);
+  SEM_Thread1Handle = osThreadCreate(osThread(SEM_Thread1), (void *) osSemaphoreHandle);
+
+  /* definition and creation of SEM_Thread2 */
+  osThreadDef(SEM_Thread2, SemaphoreThread2, osPriorityIdle, 0, 128);
+  SEM_Thread2Handle = osThreadCreate(osThread(SEM_Thread2), (void *) osSemaphoreHandle);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_SemaphoreThread1 */
+/**
+  * @brief  Function implementing the SEM_Thread1 thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_SemaphoreThread1 */
+void SemaphoreThread1(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  uint32_t count = 0;
+  osSemaphoreId semaphore = (osSemaphoreId) argument;
+  /* Infinite loop */
+  for (;;)
+  {
+
+    if (semaphore != NULL)
+    {
+    OsStatus = osSemaphoreWait(semaphore , 100);
+      /* Try to obtain the semaphore */
+      if (OsStatus == osOK)
+      {
+        count = osKernelSysTick() + 5000;
+
+        /* Toggle LED1 every 200 ms for 5 seconds */
+        while (count > osKernelSysTick())
+        {
+          /* Toggle LED1 */
+          BSP_LED_Toggle(LED1);
+
+          /* Delay 200 ms */
+          osDelay(200);
+        }
+
+        /* Turn off LED1*/
+        BSP_LED_Off(LED1);
+        /* Release the semaphore */
+        OsStatus = osSemaphoreRelease(semaphore);
+
+        /* Suspend ourseleves to execute thread 2 (lower priority)  */
+        OsStatus = osThreadSuspend(NULL);
+      }
+    }
+  }
+  /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_SemaphoreThread2 */
+/**
+* @brief Function implementing the SEM_Thread2 thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_SemaphoreThread2 */
+void SemaphoreThread2(void const * argument)
+{
+  /* USER CODE BEGIN SemaphoreThread2 */
+  uint32_t count = 0;
+  osSemaphoreId semaphore = (osSemaphoreId) argument;
+  /* Infinite loop */
+  for (;;)
+  {
+    if (semaphore != NULL)
+    {
+      /* Try to obtain the semaphore */
+      if (osSemaphoreWait(semaphore , 0) == osOK)
+      {
+        /* Resume Thread 1 (higher priority)*/
+        OsStatus = osThreadResume(SEM_Thread1Handle);
+
+        count = osKernelSysTick() + 5000;
+
+        /* Toggle LED2 every 200 ms for 5 seconds*/
+        while (count > osKernelSysTick())
+        {
+          BSP_LED_Toggle(LED2);
+
+          osDelay(200);
+        }
+
+        /* Turn off LED2 */
+        BSP_LED_Off(LED2);
+
+        /* Release the semaphore to unblock Thread 1 (higher priority)  */
+        OsStatus = osSemaphoreRelease(semaphore);
+      }
+    }
+  }
+  /* USER CODE END SemaphoreThread2 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..d5f0aeafb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..41cd8aab7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/readme.txt
new file mode 100644
index 000000000..2a45505b8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/readme.txt
@@ -0,0 +1,88 @@
+/**
+  @page FreeRTOS_Semaphore FreeRTOS Semaphore example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Semaphore/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS Semaphore example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to use semaphores with CMSIS RTOS API.
+
+This application creates two threads that toggle LEDs through a shared semaphore,
+as following:
+
+The first thread which have the higher priority obtains the semaphore and
+toggle the LED1 each 200 ms. After 5 seconds it releases the semaphore and
+suspends itself.
+
+The low priority thread can execute now, it obtains the semaphore and
+resume execution of the first thread, as it has the higher priority
+the first thread will try to obtain the semaphore but it fails because
+the semaphore is already taken by the low priority thread, which will
+toggle the LED2 each 200 ms for 5 seconds before releasing the semaphore
+to begin a new cycle
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Semaphore, Priorities
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_Semaphore/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_Semaphore/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_Semaphore/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewd
new file mode 100644
index 000000000..916f359b4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_SemaphoreFromISR</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewp
new file mode 100644
index 000000000..5698239e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_SemaphoreFromISR</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_SemaphoreFromISR/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_SemaphoreFromISR/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_SemaphoreFromISR/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
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+          <name>IlinkIcfOverride</name>
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+        <option>
+          <name>IlinkLogUnusedFragments</name>
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+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
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+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptInline</name>
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+        <option>
+          <name>IlinkOptExceptionsAllow</name>
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+          <name>IlinkCmsis</name>
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+          <name>IlinkStackControlFile</name>
+          <state></state>
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+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
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+        <option>
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+        </option>
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+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
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+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
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+        </option>
+        <option>
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+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
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+        <version>0</version>
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+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/Project.eww
new file mode 100644
index 000000000..f8f3a27ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_SemaphoreFromISR.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/FreeRTOS_SemaphoreFromISR.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/FreeRTOS_SemaphoreFromISR.ioc
new file mode 100644
index 000000000..24c4eef56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/FreeRTOS_SemaphoreFromISR.ioc
@@ -0,0 +1,185 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.BinarySemaphores01=osSemaphore,Dynamic,NULL
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=0
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,configUSE_TIMERS,INCLUDE_vTaskDelayUntil,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,INCLUDE_xTaskResumeFromISR,Timers01,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskDelay,BinarySemaphores01,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=SEM_Thread,0,128,SemaphoreTest,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.Timers01=LEDTimer,osTimerCallback,osTimerPeriodic,Default,NULL,Dynamic,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=2048
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_SemaphoreFromISR.ioc
+ProjectManager.ProjectName=FreeRTOS_SemaphoreFromISR
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_SemaphoreFromISR
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..b048bdf61
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h
@@ -0,0 +1,142 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)2048)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              0
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h
new file mode 100644
index 000000000..36c8df83e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b5f34ce05
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvoptx
new file mode 100644
index 000000000..53a87d677
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_SemaphoreFromISR</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
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+      <OPTHX>
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+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
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+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
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+        <bEvRecOn>1</bEvRecOn>
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+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
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+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
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+          <Name>(105=-1,-1,-1,-1,0)</Name>
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+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
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+      </Tracepoint>
+      <DebugFlag>
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+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
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+      <LintExecutable></LintExecutable>
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+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
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+  </Target>
+
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diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvprojx
new file mode 100644
index 000000000..fd4489f56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_SemaphoreFromISR</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_SemaphoreFromISR\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_SemaphoreFromISR</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
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+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
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+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
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+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
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+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
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+                <StartAddress>0x0</StartAddress>
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+              </Ocm2>
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+              </Ocm3>
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+                <StartAddress>0x0</StartAddress>
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+              </Ocm5>
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+                <StartAddress>0x0</StartAddress>
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+                <StartAddress>0x8000000</StartAddress>
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+              <XRAM>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+                <StartAddress>0x0</StartAddress>
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+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_SemaphoreFromISR"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..4b1c45819
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.315634015">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.315634015" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.315634015" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.315634015." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1822538092" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1959687911" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.869778176" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.701820739" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1883645236" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.544144206" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.703174247" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1057294587" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.2035088942" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1400588" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.356058767" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_SemaphoreFromISR}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1574400390" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.888322153" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.926355057" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1695424869" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.196068862" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.906071674" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.374445466" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.149653463" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.705305850" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1280978504" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1873879291" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.2059442449" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1545033299" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1378027055" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.999880397" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1323266257" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.993498248" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1963716828" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
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+				</configuration>
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+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.984926052." name="/" resourcePath="">
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+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1844019630" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.767344160" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1958377648" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.803997122" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1381762059" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1421147304" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.841079368" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_SemaphoreFromISR}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1751201948" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1663391503" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1390825105" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1267631215" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.111426978" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.366300595" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.495716077" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1161299377" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1668834329" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.167333478" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1078379667" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1335215491" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1377544989" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1933774633" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1014092108" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1891752709" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1054474156" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1512475335" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.290113145" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1432328874" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2014105279" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.365241659" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1590712246" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1331559716" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1222223487" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_SemaphoreFromISR.null.332118483" name="FreeRTOS_SemaphoreFromISR"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.315634015;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.315634015.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.196068862;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1280978504">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.984926052;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.984926052.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1267631215;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1668834329">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.project
new file mode 100644
index 000000000..53bc3d90a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_SemaphoreFromISR</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_SemaphoreFromISR.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_SemaphoreFromISR.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/heap_4.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/list.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/port.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/queue.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/stream_buffer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/tasks.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/timers.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_freertos.c
new file mode 100644
index 000000000..2aebf0089
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c
new file mode 100644
index 000000000..e36fcbdec
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c
@@ -0,0 +1,292 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define semtstSTACK_SIZE      configMINIMAL_STACK_SIZE
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId SEM_ThreadHandle;
+osSemaphoreId osSemaphoreHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void SemaphoreTest(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LED */
+  BSP_LED_Init(LED1);
+
+  /* Initialize buttons */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* Create the semaphores(s) */
+  /* definition and creation of osSemaphore */
+  osSemaphoreDef(osSemaphore);
+  osSemaphoreHandle = osSemaphoreCreate(osSemaphore(osSemaphore), 1);
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of SEM_Thread */
+  osThreadDef(SEM_Thread, SemaphoreTest, osPriorityNormal, 0, 128);
+  SEM_ThreadHandle = osThreadCreate(osThread(SEM_Thread), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  EXTI line detection callbacks
+  * @param  GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  osSemaphoreRelease(osSemaphoreHandle);
+}
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_SemaphoreTest */
+/**
+  * @brief  Function implementing the SEM_Thread thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_SemaphoreTest */
+void SemaphoreTest(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for (;;)
+  {
+
+    if (osSemaphoreHandle != NULL)
+    {
+      /* Try to obtain the semaphore */
+      if (osSemaphoreWait(osSemaphoreHandle , 0) == osOK)
+      {
+        BSP_LED_Toggle(LED1);
+
+      }
+    }
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..7d8c13525
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..8bf229bf5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c
@@ -0,0 +1,198 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt
new file mode 100644
index 000000000..9e618c37e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt
@@ -0,0 +1,79 @@
+/**
+  @page FreeRTOS_SemaphoreFromISR FreeRTOS semaphore from ISR example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS semaphore from ISR example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to use semaphore from ISR with CMSIS RTOS API.
+
+This application creates a thread that toggle a LED through semaphore given from ISR.
+
+Each time the user pushes the User push-button of the STM32G474E-EVAL1 Rev B board the semaphore
+is given to the SemaphoreTest thread to toggle the LED1.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Semaphore, Priorities, ISR, Interrupt
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/.extSettings
new file mode 100644
index 000000000..1871b3caf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;../Src/stm32g4xx_hal_msp.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewd
new file mode 100644
index 000000000..fac4846af
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_Signal</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewp
new file mode 100644
index 000000000..df09b95b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_Signal</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_Signal/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_Signal/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_Signal/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
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+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
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+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
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+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
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+          <name>DSPExtension</name>
+          <state>1</state>
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+          <state></state>
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+          <name>CCSignedPlainChar</name>
+          <state>1</state>
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+          <name>CCRequirePrototypes</name>
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+          <name>CCDiagWarnAreErr</name>
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+          <state></state>
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+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
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+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
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+          <name>CCCodeSection</name>
+          <state>.text</state>
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+          <state>3</state>
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+          <name>IccCDialect</name>
+          <state>1</state>
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+          <name>IccCmsis</name>
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+        <option>
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+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
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+          <name>CCOptStrategySlave</name>
+          <version>0</version>
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+          <name>CCGuardCalls</name>
+          <state>1</state>
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+          <name>CCEncSource</name>
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+          <name>CCEncOutput</name>
+          <state>0</state>
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+          <name>CCEncOutputBom</name>
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+          <name>CCEncInput</name>
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+          <state>0</state>
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+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
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+          <name>AEndian</name>
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+          <state>1</state>
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+          <name>AWarnWhat</name>
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+          <name>AWarnOne</name>
+          <state></state>
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+          <name>AWarnRange1</name>
+          <state></state>
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+          <name>AWarnRange2</name>
+          <state></state>
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+          <state>80</state>
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+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
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+          <name>AUserIncludes</name>
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+          <name>AExtraOptionsV2</name>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>FreeRTOS_Signal.hex</state>
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+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
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+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
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+      <archiveVersion>1</archiveVersion>
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+          <name>XLinkMisraHandler</name>
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+          <name>IlinkInputFileSlave</name>
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+        <option>
+          <name>IlinkOutputFile</name>
+          <state>FreeRTOS_Signal.out</state>
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+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
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+          <name>IlinkKeepSymbols</name>
+          <state></state>
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+          <name>IlinkRawBinaryFile</name>
+          <state></state>
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+          <name>IlinkRawBinarySymbol</name>
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+          <name>IlinkRawBinarySegment</name>
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+          <name>IlinkRawBinaryAlign</name>
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+          <name>IlinkLogFile</name>
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+          <name>IlinkLogModule</name>
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+          <name>IlinkLogSection</name>
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+          <name>IlinkLogVeneer</name>
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+          <name>IlinkIcfOverride</name>
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+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
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+          <name>IlinkIcfFileSlave</name>
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+          <name>IlinkEnableRemarks</name>
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+          <state></state>
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+          <name>IlinkTreatAsWarn</name>
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+          <state></state>
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+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/Project.eww
new file mode 100644
index 000000000..045a94115
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_Signal.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/FreeRTOS_Signal.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/FreeRTOS_Signal.ioc
new file mode 100644
index 000000000..e58e2fa15
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/FreeRTOS_Signal.ioc
@@ -0,0 +1,188 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=1
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskGetSchedulerState=1
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.INCLUDE_xTimerPendFunctionCall=0
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,configMAX_PRIORITIES,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskDelay,INCLUDE_xTaskGetSchedulerState,INCLUDE_xTaskResumeFromISR,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configTIMER_TASK_PRIORITY,configTIMER_QUEUE_LENGTH,configTIMER_TASK_STACK_DEPTH,INCLUDE_vTaskSuspend,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,INCLUDE_xTimerPendFunctionCall,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=THREAD1,0,128,LED_Thread1,Default,NULL,Dynamic,NULL,NULL;THREAD2,0,128,LED_Thread2,Default,NULL,Dynamic,NULL,NULL;SIGNAL_GEN,0,128,Signal_Gen_Thread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=0
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=8
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTIMER_QUEUE_LENGTH=10
+FREERTOS.configTIMER_TASK_PRIORITY=2
+FREERTOS.configTIMER_TASK_STACK_DEPTH=256
+FREERTOS.configTOTAL_HEAP_SIZE=5120
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=1
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Signal.ioc
+ProjectManager.ProjectName=FreeRTOS_Signal
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Signal
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..5f479eea5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 8 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)5120)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configENABLE_BACKWARD_COMPATIBILITY      0
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                         1
+#define configTIMER_TASK_PRIORITY                ( 2 )
+#define configTIMER_QUEUE_LENGTH                 10
+#define configTIMER_TASK_STACK_DEPTH             256
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        1
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              1
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_eTaskGetState                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/main.h
new file mode 100644
index 000000000..169f574ad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Signal/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..905bb714e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvoptx
new file mode 100644
index 000000000..7e01343b4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_Signal</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
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+    <RteFlg>1</RteFlg>
+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvprojx
new file mode 100644
index 000000000..5befb9a1b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_Signal</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_Signal\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_Signal</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
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+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_Signal"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..020318e21
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.314719682">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.314719682" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.314719682" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.314719682." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1780684794" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1039807800" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.31115681" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1102473723" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1046669509" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1308532864" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2142291455" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1677004433" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.2061758786" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1456157722" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1964065730" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_Signal}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1064584546" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1452312082" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1065989000" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1756381110" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1491729693" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1938192485" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.280232727" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.532900258" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1112459406" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1002524161" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.74394485" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1180048839" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.199680303" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1161892681" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.226622486" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.696607577" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1759300168" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.529280736" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.549318617">
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.549318617" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
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+							<builder buildPath="${workspace_loc:/FreeRTOS_Signal}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.736485852" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.2016827396" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.241855406" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.400356176" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.71697482" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.466882562" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.156158694" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1119130840" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.916116004" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1096307170" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1843628275" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1891859956" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.621932973" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.166691781" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1452213733" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.2081819472" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.2123191301" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1396320217" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.902936225" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_Signal.null.688059099" name="FreeRTOS_Signal"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.549318617;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.549318617.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1824001074;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1246940078">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.314719682;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.314719682.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1491729693;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1128879352">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.project
new file mode 100644
index 000000000..566419de9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_Signal</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_Signal.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Signal.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
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+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/app_freertos.c
new file mode 100644
index 000000000..480a99650
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Signal/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/main.c
new file mode 100644
index 000000000..b912045bc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/main.c
@@ -0,0 +1,331 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Signal/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+   #define BIT_0  ( 1 << 0 )
+   #define BIT_1  ( 1 << 1 )
+   #define BIT_2  ( 1 << 2 )
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId THREAD1Handle;
+osThreadId THREAD2Handle;
+osThreadId SIGNAL_GENHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void LED_Thread1(void const * argument);
+void LED_Thread2(void const * argument);
+void Signal_Gen_Thread(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LEDs */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of THREAD1 */
+  osThreadDef(THREAD1, LED_Thread1, osPriorityNormal, 0, 128);
+  THREAD1Handle = osThreadCreate(osThread(THREAD1), NULL);
+
+  /* definition and creation of THREAD2 */
+  osThreadDef(THREAD2, LED_Thread2, osPriorityNormal, 0, 128);
+  THREAD2Handle = osThreadCreate(osThread(THREAD2), NULL);
+
+  /* definition and creation of SIGNAL_GEN */
+  osThreadDef(SIGNAL_GEN, Signal_Gen_Thread, osPriorityNormal, 0, 128);
+  SIGNAL_GENHandle = osThreadCreate(osThread(SIGNAL_GEN), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_LED_Thread1 */
+/**
+  * @brief  Function implementing the THREAD1 thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_LED_Thread1 */
+void LED_Thread1(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  (void) argument;
+  osEvent event;
+  /* Infinite loop */
+  for(;;)
+  {
+    event = osSignalWait( BIT_0, osWaitForever);
+    if(event.value.signals == BIT_0)
+    {
+      BSP_LED_Toggle(LED1);
+    }
+  }
+  /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_LED_Thread2 */
+/**
+* @brief Function implementing the THREAD2 thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_LED_Thread2 */
+void LED_Thread2(void const * argument)
+{
+  /* USER CODE BEGIN LED_Thread2 */
+  (void) argument;
+  osEvent event;
+  /* Infinite loop */
+  for(;;)
+  {
+    event = osSignalWait( BIT_1 | BIT_2, osWaitForever);
+    if(event.value.signals == (BIT_1 | BIT_2))
+    {
+     BSP_LED_Toggle(LED2);
+    }
+  }
+  /* USER CODE END LED_Thread2 */
+}
+
+/* USER CODE BEGIN Header_Signal_Gen_Thread */
+/**
+* @brief Function implementing the SIGNAL_GEN thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_Signal_Gen_Thread */
+void Signal_Gen_Thread(void const * argument)
+{
+  /* USER CODE BEGIN Signal_Gen_Thread */
+  (void) argument;
+  /* Infinite loop */
+  for(;;)
+  {
+    osSignalSet(THREAD1Handle, BIT_0 );
+    osDelay(500);
+    osSignalSet(THREAD2Handle, BIT_1 | BIT_2 );
+    osDelay(500);
+  }
+  /* USER CODE END Signal_Gen_Thread */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..18158788f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..bf3c7da24
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/readme.txt
new file mode 100644
index 000000000..ad8653b49
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/readme.txt
@@ -0,0 +1,92 @@
+/**
+  @page FreeRTOS_Signal FreeRTOS Signal example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Signal/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS Signal example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to perform thread signaling using CMSIS RTOS API.
+
+This application creates three threads with the same priority.
+
+Thread1 calls osSignalWait to wait for a signal that sets bit0, then toggles LED1
+
+Thread2 calls osSignalWait to wait for a signal that sets bit1 and bit2, then toggles LED2
+
+Thread3 performs the following actions:
+  - calls osSetSignal to send a signal with bit0 to Thread1
+  - delay for 500ms
+  - calls osSetSignal to send a signal with bit1 and bit2 to Thread2
+  - delay for 500ms
+As a result, LEDs show the following behaviour:
+  - LED1 On, delay 500ms
+  - LED2 On, delay 500ms
+  - LED1 Off, delay 500ms
+  - LED2 off, delay 500ms
+  - loop-back
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Signal,
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_Signal/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_Signal/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_Signal/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewd
new file mode 100644
index 000000000..943eb95d9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_SignalFromISR</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewp
new file mode 100644
index 000000000..bb3b1ca16
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_SignalFromISR</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_SignalFromISR/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_SignalFromISR/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_SignalFromISR/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
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+      <archiveVersion>0</archiveVersion>
+      <data></data>
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+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
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+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
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+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
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+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
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+      <file>
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+      <file>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
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+      <file>
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+      </file>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/Project.eww
new file mode 100644
index 000000000..785648dc7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_SignalFromISR.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/FreeRTOS_SignalFromISR.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/FreeRTOS_SignalFromISR.ioc
new file mode 100644
index 000000000..7e6e00188
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/FreeRTOS_SignalFromISR.ioc
@@ -0,0 +1,188 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=1
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskGetSchedulerState=1
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.INCLUDE_xTimerPendFunctionCall=0
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,configUSE_TIMERS,INCLUDE_vTaskDelayUntil,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,INCLUDE_xTaskResumeFromISR,configENABLE_BACKWARD_COMPATIBILITY,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskDelay,INCLUDE_xTaskGetSchedulerState,INCLUDE_vTaskCleanUpResources,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configTIMER_TASK_PRIORITY,configTIMER_QUEUE_LENGTH,configTIMER_TASK_STACK_DEPTH,INCLUDE_vTaskSuspend,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,INCLUDE_xTimerPendFunctionCall,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=LEDThread,0,128,ToggleLEDsThread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=0
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTIMER_QUEUE_LENGTH=10
+FREERTOS.configTIMER_TASK_PRIORITY=2
+FREERTOS.configTIMER_TASK_STACK_DEPTH=256
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=1
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_SignalFromISR.ioc
+ProjectManager.ProjectName=FreeRTOS_SignalFromISR
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_SignalFromISR
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..863dd1c77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)3072)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configENABLE_BACKWARD_COMPATIBILITY      0
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                         1
+#define configTIMER_TASK_PRIORITY                ( 2 )
+#define configTIMER_QUEUE_LENGTH                 10
+#define configTIMER_TASK_STACK_DEPTH             256
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        1
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              1
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_eTaskGetState                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h
new file mode 100644
index 000000000..376441a9c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..857ab2b5a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvoptx
new file mode 100644
index 000000000..c86b7a7e9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
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+
+  <DaveTm>
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+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_SignalFromISR</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
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+      <OPTTT>
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+        <RunSim>0</RunSim>
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+      <ListingPage>
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+        <CreateLListing>1</CreateLListing>
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+      </OPTFL>
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+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
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+      <DebugFlag>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvprojx
new file mode 100644
index 000000000..f2ac234d8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_SignalFromISR</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_SignalFromISR\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_SignalFromISR</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
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+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
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+            <RwSelD>3</RwSelD>
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+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
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+            <NoZi3>0</NoZi3>
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+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
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+            <Ra1Chk>0</Ra1Chk>
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+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_SignalFromISR"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..0ce62aa49
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1123394236">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1123394236" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1123394236" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1123394236." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1614578904" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1725868221" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.492902539" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.98849213" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1600215149" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1925849913" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1020185574" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1143757523" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1390467059" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.44863049" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1371823339" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_SignalFromISR}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.950880397" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.733389883" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.480867131" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1426174701" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2019254852" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.276469970" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.332476061" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.251790561" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.194856587" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
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+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_SignalFromISR.null.1316111719" name="FreeRTOS_SignalFromISR"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
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+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.project
new file mode 100644
index 000000000..3befa8270
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_SignalFromISR</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_SignalFromISR.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_SignalFromISR.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/heap_4.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/list.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/port.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/queue.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/stream_buffer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/tasks.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/timers.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/app_freertos.c
new file mode 100644
index 000000000..beb90d331
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SignalFromISR/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c
new file mode 100644
index 000000000..052510bdf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c
@@ -0,0 +1,279 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+   #define BIT_0  ( 1 << 0 )
+   #define BIT_1  ( 1 << 1 )
+   #define BIT_2  ( 1 << 2 )
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId LEDThreadHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void ToggleLEDsThread(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LEDs */
+  BSP_LED_Init(LED1);
+
+  /* Initialize buttons */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of LEDThread */
+  osThreadDef(LEDThread, ToggleLEDsThread, osPriorityNormal, 0, 128);
+  LEDThreadHandle = osThreadCreate(osThread(LEDThread), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  osSignalSet( LEDThreadHandle, BIT_1);
+}
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_ToggleLEDsThread */
+/**
+  * @brief  Function implementing the LEDThread thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_ToggleLEDsThread */
+void ToggleLEDsThread(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  (void) argument;
+  osEvent event;
+  /* Infinite loop */
+  for(;;)
+  {
+    event = osSignalWait( BIT_1, osWaitForever);
+  if(event.value.signals == BIT_1)
+    {
+      BSP_LED_Toggle(LED1);
+    }
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..e88407e94
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..624eb470b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c
@@ -0,0 +1,188 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/readme.txt
new file mode 100644
index 000000000..448ba907d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/readme.txt
@@ -0,0 +1,78 @@
+/**
+  @page FreeRTOS_SignalFromISR FreeRTOS Signal from ISR example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_SignalFromISR/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS Signal from ISR example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+This application shows the usage of CMSIS-OS Signal API from ISR context.
+
+Initially all LED are off and a thread that waits for signals is created.
+Each time the user presses the User push-button, generating an interrupt,  an osSignal is sent
+to the thread change the LED1 state from on to off and vice-versa.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Signal, ISR, Interrupt
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_SignalFromISR/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/.extSettings
new file mode 100644
index 000000000..6936c2ab8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_msp.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewd
new file mode 100644
index 000000000..26bba0396
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_ThreadCreation</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewp
new file mode 100644
index 000000000..bbac50869
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_ThreadCreation</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_ThreadCreation/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_ThreadCreation/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_ThreadCreation/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
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+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/Project.eww
new file mode 100644
index 000000000..3d245f8f1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_ThreadCreation.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/FreeRTOS_ThreadCreation.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/FreeRTOS_ThreadCreation.ioc
new file mode 100644
index 000000000..2f41f156b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/FreeRTOS_ThreadCreation.ioc
@@ -0,0 +1,182 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=1
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xTaskResumeFromISR,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=THREAD1,0,128,LED_Thread1,Default,NULL,Dynamic,NULL,NULL;THREAD2,0,128,LED_Thread2,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=2048
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_ThreadCreation.ioc
+ProjectManager.ProjectName=FreeRTOS_ThreadCreation
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_ThreadCreation
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..55a057f66
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)2048)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        1
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              1
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_xQueueGetMutexHolder         1
+#define INCLUDE_eTaskGetState                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h
new file mode 100644
index 000000000..b5ed78bec
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..a2742f205
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvoptx
new file mode 100644
index 000000000..197f960b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_ThreadCreation</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvprojx
new file mode 100644
index 000000000..ee6b8b84e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_ThreadCreation</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_ThreadCreation\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_ThreadCreation</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_ThreadCreation"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..6f66310a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1907725257">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1907725257" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1907725257" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1907725257." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1969311904" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.774413361" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.589414910" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.2050559415" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.2098221499" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.200036392" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1242996838" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.87118933" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1477976180" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1862795628" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.358929754" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_ThreadCreation}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.323722760" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.740030679" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.712184899" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.497618102" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.379476814" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.396443560" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.818788800" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1946836347" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.296712250" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.37081066" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.132193000" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.455668582" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1498996552" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.400673456" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1443507318" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1042915678" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1369502298" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1001460539" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1169847221" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.16146140" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.269160438" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1481416696" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.795138918" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.160728092" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1038877845" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.316442929">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.316442929" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.316442929" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
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+							<builder buildPath="${workspace_loc:/FreeRTOS_ThreadCreation}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.57738537" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1185901965" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1551108862" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1361363821" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1617948308" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2082960429" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.609282444" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.953297772" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.768183150" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.419599553" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.491335021" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1684656336" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1549017457" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1685618462" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1089692452" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.633825977" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1294776456" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1677552936" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1117641857" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1594146034" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1316486777" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.268902584" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_ThreadCreation.null.94020389" name="FreeRTOS_ThreadCreation"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1907725257;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1907725257.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.379476814;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1649626602">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.316442929;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.316442929.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1551108862;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2082960429">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.project
new file mode 100644
index 000000000..adecdcaa3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_ThreadCreation</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_ThreadCreation.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_ThreadCreation.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
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+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
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+		<link>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
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+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/app_freertos.c
new file mode 100644
index 000000000..56cccc461
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_ThreadCreation/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c
new file mode 100644
index 000000000..6976db8ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c
@@ -0,0 +1,335 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId THREAD1Handle;
+osThreadId THREAD2Handle;
+/* USER CODE BEGIN PV */
+__IO uint32_t OsStatus = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void LED_Thread1(void const * argument);
+void LED_Thread2(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LEDs */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of THREAD1 */
+  osThreadDef(THREAD1, LED_Thread1, osPriorityNormal, 0, 128);
+  THREAD1Handle = osThreadCreate(osThread(THREAD1), NULL);
+
+  /* definition and creation of THREAD2 */
+  osThreadDef(THREAD2, LED_Thread2, osPriorityNormal, 0, 128);
+  THREAD2Handle = osThreadCreate(osThread(THREAD2), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_LED_Thread1 */
+/**
+  * @brief  Function implementing the THREAD1 thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_LED_Thread1 */
+void LED_Thread1(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  uint32_t count = 0;
+  (void) argument;
+  /* Infinite loop */
+  for (;;)
+  {
+    count = osKernelSysTick() + 5000;
+
+    /* Toggle LED1 every 200 ms for 5 s */
+    while (count > osKernelSysTick())
+    {
+      BSP_LED_Toggle(LED1);
+
+      osDelay(200);
+    }
+
+    /* Turn off LED1 */
+    BSP_LED_Off(LED1);
+
+    /* Suspend Thread 1 */
+    OsStatus = osThreadSuspend(NULL);
+
+    count = osKernelSysTick() + 5000;
+
+    /* Toggle LED1 every 500 ms for 5 s */
+    while (count > osKernelSysTick())
+    {
+      BSP_LED_Toggle(LED1);
+
+      osDelay(500);
+    }
+
+    /* Resume Thread 2*/
+    OsStatus = osThreadResume(THREAD2Handle);
+  }
+  /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_LED_Thread2 */
+/**
+* @brief Function implementing the THREAD2 thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_LED_Thread2 */
+void LED_Thread2(void const * argument)
+{
+  /* USER CODE BEGIN LED_Thread2 */
+  uint32_t count;
+  (void) argument;
+  /* Infinite loop */
+  for (;;)
+  {
+    count = osKernelSysTick() + 10000;
+
+    /* Toggle LED3 every 500 ms for 10 s */
+    while (count > osKernelSysTick())
+    {
+      BSP_LED_Toggle(LED3);
+
+      osDelay(500);
+    }
+
+    /* Turn off LED3 */
+    BSP_LED_Off(LED3);
+
+    /* Resume Thread 1 */
+    OsStatus = osThreadResume(THREAD1Handle);
+
+    /* Suspend Thread 2 */
+    OsStatus = osThreadSuspend(NULL);
+  }
+  /* USER CODE END LED_Thread2 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..61839c5ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..3c2ba723f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/readme.txt
new file mode 100644
index 000000000..6aca980bc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/readme.txt
@@ -0,0 +1,84 @@
+/**
+  @page FreeRTOS_ThreadCreation FreeRTOS Thread Creation example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_ThreadCreation/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS Thread Creation example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to implement thread creation using CMSIS RTOS API.
+
+This application creates two threads with the same priority, which execute in
+a periodic cycle of 15 seconds.
+
+In the first 5 seconds, the thread 1 toggles LED1 each 200 ms and the
+thread 2 toggles LED3 each 500 ms.
+In the following 5 seconds, the thread 1 suspends itself and the thread 2
+continue toggling LED3.
+In the last 5 seconds, the thread 2 resumes execution of thread 1 then
+suspends itself, the thread 1 toggles the LED1 each 500 ms.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_ThreadCreation/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewd
new file mode 100644
index 000000000..f9a2ccad5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FreeRTOS_Timers</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewp
new file mode 100644
index 000000000..fe1a5feca
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewp
@@ -0,0 +1,1195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FreeRTOS_Timers</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FreeRTOS_Timers/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FreeRTOS_Timers/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FreeRTOS_Timers/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
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+      <archiveVersion>1</archiveVersion>
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+        <prebuild></prebuild>
+        <postbuild></postbuild>
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+    </settings>
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+          <name>IlinkLogVeneer</name>
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+          <name>IlinkIcfOverride</name>
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+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
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+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
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+          <name>IlinkSuppressDiags</name>
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+          <name>IlinkTreatAsRem</name>
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+          <name>IlinkTreatAsWarn</name>
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+          <name>IlinkTreatAsErr</name>
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+          <name>IlinkAutoLibEnable</name>
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+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
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+        </option>
+        <option>
+          <name>CrcFullSize</name>
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+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
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+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
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+        <option>
+          <name>IlinkLogRedirSymbols</name>
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+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
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+        </option>
+        <option>
+          <name>IlinkCmsis</name>
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+        <option>
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+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
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+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
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+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
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+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
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+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
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+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
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+          <name>IarchiveOverride</name>
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+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/app_freertos.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>FreeRTOS</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/Project.eww
new file mode 100644
index 000000000..a7052ef20
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FreeRTOS_Timers.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/FreeRTOS_Timers.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/FreeRTOS_Timers.ioc
new file mode 100644
index 000000000..3ffa96380
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/FreeRTOS_Timers.ioc
@@ -0,0 +1,188 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskGetSchedulerState=1
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.INCLUDE_xTimerPendFunctionCall=0
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,configUSE_TIMERS,INCLUDE_vTaskDelayUntil,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,INCLUDE_xTaskResumeFromISR,Timers01,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configTIMER_TASK_PRIORITY,configTIMER_QUEUE_LENGTH,configTIMER_TASK_STACK_DEPTH,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xTaskGetSchedulerState,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,INCLUDE_xTimerPendFunctionCall,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=LEDThread,0,128,ToggleLEDsThread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.Timers01=LEDTimer,osTimerCallback,osTimerPeriodic,Default,NULL,Dynamic,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTIMER_QUEUE_LENGTH=10
+FREERTOS.configTIMER_TASK_PRIORITY=2
+FREERTOS.configTIMER_TASK_STACK_DEPTH=256
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=1
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Timers.ioc
+ProjectManager.ProjectName=FreeRTOS_Timers
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Timers
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..09def5b9c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          0
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)3072)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                         1
+#define configTIMER_TASK_PRIORITY                ( 2 )
+#define configTIMER_QUEUE_LENGTH                 10
+#define configTIMER_TASK_STACK_DEPTH             256
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              1
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_xQueueGetMutexHolder         1
+#define INCLUDE_eTaskGetState                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/main.h
new file mode 100644
index 000000000..a4ea249f3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Timers/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the main.c
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..fb00b4cdb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvoptx
new file mode 100644
index 000000000..5382b4d0b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvoptx
@@ -0,0 +1,773 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FreeRTOS_Timers</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
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+      </OPTHX>
+      <OPTLEX>
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+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
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+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
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+        <bTchkAxf>0</bTchkAxf>
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+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
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+          <Name></Name>
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+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
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+      <DebugFlag>
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+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
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+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
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+  </Target>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvprojx
new file mode 100644
index 000000000..72f0ea403
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FreeRTOS_Timers</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FreeRTOS_Timers\Exe\</OutputDirectory>
+          <OutputName>FreeRTOS_Timers</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
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+          </BeforeMake>
+          <AfterMake>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopA1X>0</nStopA1X>
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+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
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+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
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+          <TargetDllName>SARMCM3.DLL</TargetDllName>
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+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
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+            <HexOffset>0</HexOffset>
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+          </OPTHX>
+        </DebugOption>
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+          <Flash1>
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+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
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+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
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+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
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+            <RvctDeviceName></RvctDeviceName>
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+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..//Inc</IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+            <File>
+              <FileName>app_freertos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/app_freertos.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/FreeRTOS</GroupName>
+          <Files>
+            <File>
+              <FileName>croutine.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c</FilePath>
+            </File>
+            <File>
+              <FileName>event_groups.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</FilePath>
+            </File>
+            <File>
+              <FileName>list.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>stream_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tasks.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c</FilePath>
+            </File>
+            <File>
+              <FileName>timers.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmsis_os.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</FilePath>
+            </File>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FreeRTOS_Timers"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..7a89eacda
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.75016027">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.75016027" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.75016027" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.75016027." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2013360331" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.776657237" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.528112849" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1501450432" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.161708530" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1319206212" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.947084881" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1485233087" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.551665639" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.2077642551" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1492665038" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_Timers}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.72225037" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.841976255" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.554173498" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1460122317" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1620109107" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.469833501" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.127399045" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.452274879" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.164036591" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1637442508" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.64439068" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1074924919" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.788087862" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FreeRTOS_Timers}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.2082380467" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1530608405" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1825394128" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.832283933" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
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+								</option>
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+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2031629161" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1708867044" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1161685242" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.918780314" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.955248359" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1723733205" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1342246442" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1823121309" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1249208025" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FreeRTOS_Timers.null.329693040" name="FreeRTOS_Timers"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1152214306;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1152214306.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1530608405;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.197416644">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.75016027;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.75016027.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1460122317;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1243662257">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.project
new file mode 100644
index 000000000..3adecef54
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FreeRTOS_Timers</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FreeRTOS_Timers.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Timers.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/app_freertos.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/cmsis_os.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/croutine.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/event_groups.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/heap_4.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/list.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/port.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/queue.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/stream_buffer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/tasks.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/FreeRTOS/timers.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/app_freertos.c
new file mode 100644
index 000000000..d4bee9578
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Timers/Src/freertos.c
+  * @author  MCD Application Team
+  * @brief   Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/main.c
new file mode 100644
index 000000000..3573c0e28
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/main.c
@@ -0,0 +1,290 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS\FreeRTOS_Timers\Src\main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId LEDThreadHandle;
+osTimerId LEDTimerHandle;
+/* USER CODE BEGIN PV */
+__IO uint32_t TimeCounter = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void ToggleLEDsThread(void const * argument);
+void osTimerCallback(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize LEDs */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* Create the timer(s) */
+  /* definition and creation of LEDTimer */
+  osTimerDef(LEDTimer, osTimerCallback);
+  LEDTimerHandle = osTimerCreate(osTimer(LEDTimer), osTimerPeriodic, NULL);
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  osTimerStart(LEDTimerHandle, 200);
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of LEDThread */
+  osThreadDef(LEDThread, ToggleLEDsThread, osPriorityNormal, 0, 128);
+  LEDThreadHandle = osThreadCreate(osThread(LEDThread), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_ToggleLEDsThread */
+/**
+  * @brief  Function implementing the LEDThread thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_ToggleLEDsThread */
+void ToggleLEDsThread(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  (void) argument;
+  /* Infinite loop */
+  for(;;)
+  {
+    /* Toggle LED2 each 400ms */
+    BSP_LED_Toggle(LED2);
+
+    osDelay(400);
+  }
+  /* USER CODE END 5 */
+}
+
+/* osTimerCallback function */
+void osTimerCallback(void const * argument)
+{
+  /* USER CODE BEGIN osTimerCallback */
+  (void) argument;
+
+  /* Toggle LED1*/
+  BSP_LED_Toggle(LED1);
+  if (TimeCounter == 25)
+  {
+      TimeCounter = 0;
+  }
+  /* USER CODE END osTimerCallback */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..0d7a570c9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   HAL time base based on the hardware TIM.
+  *
+  *          This file overrides the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+ @verbatim
+  ==============================================================================
+                        ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    This file must be copied to the application folder and modified as follows:
+    (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+    (#) Add this file and the TIM HAL driver files to your project and make sure
+       HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+    [..]
+    (@) The application needs to ensure that the time base is always set to 1 millisecond
+       to have correct HAL operation.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM6 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim6);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM6 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..2b050f529
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/readme.txt
new file mode 100644
index 000000000..9ebc1702d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/readme.txt
@@ -0,0 +1,77 @@
+/**
+  @page FreeRTOS_Timers FreeRTOS timers example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FreeRTOS/FreeRTOS_Timers/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FreeRTOS timers example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+How to use timers of CMSIS RTOS API.
+
+This application creates a thread that toggle LED2 every 400 ms, and a periodic
+timer that calls a callback function every 200 ms to toggle the LED1.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in HAL time base ISR.
+      This implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the HAL time base interrupt must have higher priority (numerically lower) than
+      the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+      function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+      OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Timer
+
+@par Directory contents
+    - FreeRTOS/FreeRTOS_Timers/Src/main.c                       Main program
+    - FreeRTOS/FreeRTOS_Timers/Src/app_FreeRTOS.c               Code for freertos applications
+    - FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+    - FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c               Interrupt handlers
+    - FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c          MSP Initialization file
+    - FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c           STM32G4xx system clock configuration file
+    - FreeRTOS/FreeRTOS_Timers/Inc/main.h                       Main program header file
+    - FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h         HAL Library Configuration file
+    - FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h               Interrupt handlers header file
+    - FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h             FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G474QETx devices.
+
+  - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/LICENSE.md b/Projects/STM32G474E-EVAL1/Applications/LICENSE.md
new file mode 100644
index 000000000..1af523307
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/LICENSE.md
@@ -0,0 +1,80 @@
+SLA0044 Rev5/February 2018
+
+## Software license agreement
+
+### __ULTIMATE LIBERTY SOFTWARE LICENSE AGREEMENT__
+
+BY INSTALLING, COPYING, DOWNLOADING, ACCESSING OR OTHERWISE USING THIS SOFTWARE
+OR ANY PART THEREOF (AND THE RELATED DOCUMENTATION) FROM STMICROELECTRONICS
+INTERNATIONAL N.V, SWISS BRANCH AND/OR ITS AFFILIATED COMPANIES
+(STMICROELECTRONICS), THE RECIPIENT, ON BEHALF OF HIMSELF OR HERSELF, OR ON
+BEHALF OF ANY ENTITY BY WHICH SUCH RECIPIENT IS EMPLOYED AND/OR ENGAGED AGREES
+TO BE BOUND BY THIS SOFTWARE LICENSE AGREEMENT.
+
+Under STMicroelectronics’ intellectual property rights, the redistribution,
+reproduction and use in source and binary forms of the software or any part
+thereof, with or without modification, are permitted provided that the following
+conditions are met:
+
+1. Redistribution of source code (modified or not) must retain any copyright
+notice, this list of conditions and the disclaimer set forth below as items 10
+and 11.
+
+2. Redistributions in binary form, except as embedded into microcontroller or
+microprocessor device manufactured by or for STMicroelectronics or a software
+update for such device, must reproduce any copyright notice provided with the
+binary code, this list of conditions, and the disclaimer set forth below as
+items 10 and 11, in documentation and/or other materials provided with the
+distribution.
+
+3. Neither the name of STMicroelectronics nor the names of other contributors to
+this software may be used to endorse or promote products derived from this
+software or part thereof without specific written permission.
+
+4. This software or any part thereof, including modifications and/or derivative
+works of this software, must be used and execute solely and exclusively on or in
+combination with a microcontroller or microprocessor device manufactured by or
+for STMicroelectronics.
+
+5. No use, reproduction or redistribution of this software partially or totally
+may be done in any manner that would subject this software to any Open Source
+Terms. “Open Source Terms” shall mean any open source license which requires as
+part of distribution of software that the source code of such software is
+distributed therewith or otherwise made available, or open source license that
+substantially complies with the Open Source definition specified at
+www.opensource.org and any other comparable open source license such as for
+example GNU General Public License (GPL), Eclipse Public License (EPL), Apache
+Software License, BSD license or MIT license.
+
+6. STMicroelectronics has no obligation to provide any maintenance, support or
+updates for the software.
+
+7. The software is and will remain the exclusive property of STMicroelectronics
+and its licensors. The recipient will not take any action that jeopardizes
+STMicroelectronics and its licensors' proprietary rights or acquire any rights
+in the software, except the limited rights specified hereunder.
+
+8. The recipient shall comply with all applicable laws and regulations affecting
+the use of the software or any part thereof including any applicable export
+control law or regulation.
+
+9. Redistribution and use of this software or any part thereof other than as
+permitted under this license is void and will automatically terminate your
+rights under this license.
+
+10. THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS, WHICH ARE
+DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT SHALL
+STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+11. EXCEPT AS EXPRESSLY PERMITTED HEREUNDER, NO LICENSE OR OTHER RIGHTS, WHETHER
+EXPRESS OR IMPLIED, ARE GRANTED UNDER ANY PATENT OR OTHER INTELLECTUAL PROPERTY
+RIGHTS OF STMICROELECTRONICS OR ANY THIRD PARTY.
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/.extSettings b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/.extSettings
new file mode 100644
index 000000000..3d02b5039
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/.extSettings
@@ -0,0 +1,12 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;UART;I2C;EXTI;SPI
+[Groups]
+Application/User/Core=../Core/Src/main.c;../Core/Src/stm32g4xx_it.c;../Core/Src/stm32g4xx_hal_msp.c;../Core/Src/stm32g4xx_hal_msp.c;
+Application/User/USB_Device/App=../USB_Device/App/usbd_desc.c;../USB_Device/App/usbd_cdc_if.c;../USB_Device/App/usb_device.c;
+Application/User/USB_Device/Target=../USB_Device/Target/usbd_conf.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/CDC_Standalone.ioc b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/CDC_Standalone.ioc
new file mode 100644
index 000000000..d6396c5e7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/CDC_Standalone.ioc
@@ -0,0 +1,159 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USB
+Mcu.IP4=USB_DEVICE
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA11
+Mcu.Pin1=PA12
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.USB_LP_IRQn=true\:6\:0\:true\:false\:true\:false\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA11.Mode=Device
+PA11.Signal=USB_DM
+PA12.Mode=Device
+PA12.Signal=USB_DP
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x1000
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CDC_Standalone.ioc
+ProjectManager.ProjectName=CDC_Standalone
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x1000
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USB_Device_Init-USB_DEVICE-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+USB.DeviceSpeed=PCD_SPEED_FULL
+USB.IPParameters=DeviceSpeed,phy_itface,Sof_enable,low_power_enable,lpm_enable,battery_charging_enable
+USB.Sof_enable=DISABLE
+USB.battery_charging_enable=DISABLE
+USB.low_power_enable=DISABLE
+USB.lpm_enable=DISABLE
+USB.phy_itface=PCD_PHY_EMBEDDED
+USB_DEVICE.APP_RX_DATA_SIZE=2048
+USB_DEVICE.APP_TX_DATA_SIZE=2048
+USB_DEVICE.CLASS_NAME_FS=CDC
+USB_DEVICE.CONFIGURATION_STRING_CDC_FS=CDC Config
+USB_DEVICE.INTERFACE_STRING_CDC_FS=CDC Interface
+USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,USBD_MAX_NUM_INTERFACES,USBD_MAX_STR_DESC_SIZ,VID,PID_CDC_FS,PRODUCT_STRING_CDC_FS,USBD_LPM_ENABLED,USBD_MAX_NUM_CONFIGURATION,USBD_SELF_POWERED,USBD_DEBUG_LEVEL,LANGID_STRING,MANUFACTURER_STRING,CONFIGURATION_STRING_CDC_FS,INTERFACE_STRING_CDC_FS,APP_RX_DATA_SIZE,APP_TX_DATA_SIZE
+USB_DEVICE.IPParametersWithoutCheck=USBD_MAX_STR_DESC_SIZ,USBD_MAX_NUM_INTERFACES
+USB_DEVICE.LANGID_STRING=1033
+USB_DEVICE.MANUFACTURER_STRING=STMicroelectronics
+USB_DEVICE.PID_CDC_FS=0x5740
+USB_DEVICE.PRODUCT_STRING_CDC_FS=STM32 Virtual ComPort in FS Mode
+USB_DEVICE.USBD_DEBUG_LEVEL=0
+USB_DEVICE.USBD_LPM_ENABLED=0
+USB_DEVICE.USBD_MAX_NUM_CONFIGURATION=1
+USB_DEVICE.USBD_MAX_NUM_INTERFACES=1
+USB_DEVICE.USBD_MAX_STR_DESC_SIZ=100
+USB_DEVICE.USBD_SELF_POWERED=1
+USB_DEVICE.VID=0x483
+USB_DEVICE.VirtualMode=Cdc
+USB_DEVICE.VirtualModeFS=Cdc_FS
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS
+VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS
+board=STM32G474E-EVAL1
+ProjectManager.Example=CDC_Standalone
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/main.h
new file mode 100644
index 000000000..b0440969a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/CDC_Standalone/Core/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include "usbd_cdc_if.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..86557321b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..1ed472a63
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h
@@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USB_LP_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void USARTx_IRQHandler(void);
+void USARTx_DMA_RX_IRQHandler(void);
+void USARTx_DMA_TX_IRQHandler(void);
+void TIMx_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/main.c
new file mode 100644
index 000000000..4c1aa4e0e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/main.c
@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/CDC_Standalone/Core/Src/main.c
+  * @author  MCD Application Team
+  * @brief   USB device CDC demo main file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USB_Device_Init();
+  /* USER CODE BEGIN 2 */
+  BSP_LED_Init(LED3);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = 64;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief This function provides accurate delay (in milliseconds) based
+  * on SysTick counter flag.
+  * @note This function is declared as __weak to be overwritten in case of other
+  * implementations in user file.
+  * @param Delay: specifies the delay time length, in milliseconds.
+  * @retval None
+  */
+void HAL_Delay(__IO uint32_t Delay)
+{
+  while (Delay)
+  {
+    if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+    {
+      Delay--;
+    }
+  }
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  BSP_LED_On(LED3);
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..720947c4c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,205 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  *          This file provides code for the MSP Initialization
+  *          and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+static DMA_HandleTypeDef hdma_tx;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+/**
+  * @brief TIM MSP Initialization
+  *        This function configures the hardware resources used in this example:
+  *           - Peripheral's clock enable
+  * @param htim: TIM handle pointer
+  * @retval None
+  */
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
+{
+  /*##-1- Enable peripheral clock #################################*/
+  /* TIMx Peripheral clock enable */
+  TIMx_CLK_ENABLE();
+
+  /*##-2- Configure the NVIC for TIMx ########################################*/
+  /* Set the TIMx priority */
+  HAL_NVIC_SetPriority(TIMx_IRQn, 3, 0);
+
+  /* Enable the TIMx global Interrupt */
+  HAL_NVIC_EnableIRQ(TIMx_IRQn);
+}
+
+/**
+  * @brief UART MSP Initialization
+  *        This function configures the hardware resources used in this example:
+  *           - Peripheral's clock enable
+  *           - Peripheral's GPIO Configuration
+  *           - DMA configuration for transmission request by peripheral
+  *           - NVIC configuration for DMA interrupt request enable
+  * @param huart: UART handle pointer
+  * @retval None
+  */
+void HAL_UART_MspInit(UART_HandleTypeDef *huart)
+{
+  GPIO_InitTypeDef  GPIO_InitStruct;
+
+  /*##-1- Enable peripherals and GPIO Clocks #################################*/
+  /* Enable GPIO clock */
+  USARTx_TX_GPIO_CLK_ENABLE();
+  USARTx_RX_GPIO_CLK_ENABLE();
+
+  /* Enable USARTx clock */
+  USARTx_CLK_ENABLE();
+
+  /* Enable DMA clock */
+  DMAx_CLK_ENABLE();
+
+  /*##-2- Configure peripheral GPIO ##########################################*/
+  /* UART TX GPIO pin configuration  */
+  GPIO_InitStruct.Pin       = USARTx_TX_PIN;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_PULLUP;
+  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = USARTx_TX_AF;
+
+  HAL_GPIO_Init(USARTx_TX_GPIO_PORT, &GPIO_InitStruct);
+
+  /* UART RX GPIO pin configuration  */
+  GPIO_InitStruct.Pin = USARTx_RX_PIN;
+  GPIO_InitStruct.Alternate = USARTx_RX_AF;
+
+  HAL_GPIO_Init(USARTx_RX_GPIO_PORT, &GPIO_InitStruct);
+
+  /*##-3- Configure the NVIC for UART ########################################*/
+  HAL_NVIC_SetPriority(USARTx_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(USARTx_IRQn);
+
+  /*##-4- Configure the DMA ##################################################*/
+  /* Configure the DMA handler for Transmission process */
+  hdma_tx.Instance                 = USARTx_TX_DMA_CHANNEL;
+  hdma_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
+  hdma_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
+  hdma_tx.Init.MemInc              = DMA_MINC_ENABLE;
+  hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+  hdma_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
+  hdma_tx.Init.Mode                = DMA_NORMAL;
+  hdma_tx.Init.Priority            = DMA_PRIORITY_LOW;
+  hdma_tx.Init.Request             = USARTx_TX_DMA_REQUEST;
+
+  HAL_DMA_Init(&hdma_tx);
+
+  /* Associate the initialized DMA handle to the UART handle */
+  __HAL_LINKDMA(huart, hdmatx, hdma_tx);
+
+  /*##-4- Configure the NVIC for DMA #########################################*/
+  /* NVIC configuration for DMA transfer complete interrupt (USARTx_TX) */
+  HAL_NVIC_SetPriority(USARTx_DMA_TX_IRQn, 6, 0);
+  HAL_NVIC_EnableIRQ(USARTx_DMA_TX_IRQn);
+}
+
+/**
+  * @brief UART MSP De-Initialization
+  *        This function frees the hardware resources used in this example:
+  *          - Disable the Peripheral's clock
+  *          - Revert GPIO, DMA and NVIC configuration to their default state
+  * @param huart: UART handle pointer
+  * @retval None
+  */
+void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
+{
+
+  /*##-1- Reset peripherals ##################################################*/
+  USARTx_FORCE_RESET();
+  USARTx_RELEASE_RESET();
+
+  /*##-2- Disable peripherals and GPIO Clocks ################################*/
+  /* De-Initialize UART Tx as alternate function  */
+  HAL_GPIO_DeInit(USARTx_TX_GPIO_PORT, USARTx_TX_PIN);
+  /* De-Initialize UART Rx as alternate function  */
+  HAL_GPIO_DeInit(USARTx_RX_GPIO_PORT, USARTx_RX_PIN);
+
+  /*##-3- Disable the DMA Channels ###########################################*/
+  /* De-Initialize the DMA Channel associated to reception process */
+  HAL_DMA_DeInit(&hdma_tx);
+
+  /*##-4- Disable the NVIC for DMA ###########################################*/
+  HAL_NVIC_DisableIRQ(USARTx_DMA_TX_IRQn);
+  HAL_NVIC_DisableIRQ(USARTx_RX_IRQn);
+}
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..73f7a79ba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c
@@ -0,0 +1,252 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+extern TIM_HandleTypeDef    TimHandle;
+extern UART_HandleTypeDef UartHandle;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_FS;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles USB low priority interrupt remap.
+  */
+void USB_LP_IRQHandler(void)
+{
+  /* USER CODE BEGIN USB_LP_IRQn 0 */
+
+  /* USER CODE END USB_LP_IRQn 0 */
+  HAL_PCD_IRQHandler(&hpcd_USB_FS);
+  /* USER CODE BEGIN USB_LP_IRQn 1 */
+
+  /* USER CODE END USB_LP_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/**
+  * @brief  This function handles TIM interrupt request.
+  * @param  None
+  * @retval None
+  */
+void TIMx_IRQHandler(void)
+{
+  HAL_TIM_IRQHandler(&TimHandle);
+}
+
+/**
+  * @brief  This function handles DMA TX interrupt request.
+  * @param  None
+  * @retval None
+  * @Note   This function is redefined in "main.h" and related to DMA stream
+  *         used for USART data reception
+  */
+void USARTx_DMA_TX_IRQHandler(void)
+{
+  HAL_DMA_IRQHandler(UartHandle.hdmatx);
+}
+
+/**
+  * @brief  This function handles USART1 interrupt request.
+  * @param  None
+  * @retval None
+  * @Note   This function is redefined in "main.h" and related to DMA
+  *         used for USART data transmission
+  */
+void USARTx_IRQHandler(void)
+{
+  HAL_UART_IRQHandler(&UartHandle);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewd b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewd
new file mode 100644
index 000000000..bb4bb962f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>CDC_Standalone</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewp b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewp
new file mode 100644
index 000000000..26c8ad088
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewp
@@ -0,0 +1,1208 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>CDC_Standalone</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>CDC_Standalone/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>CDC_Standalone/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>CDC_Standalone/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
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+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Core/Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>USB_Device_Library</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/Project.eww
new file mode 100644
index 000000000..b068189e8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\CDC_Standalone.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..066fa1d35
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvoptx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvoptx
new file mode 100644
index 000000000..37a67468f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvoptx
@@ -0,0 +1,801 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>CDC_Standalone</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U005200303137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User/USB_Device/Target</GroupName>
+    <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_core.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+      <tvExp>0</tvExp>
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+      <PathWithFileName>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_ctlreq.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_ioreq.c</FilenameWithoutPath>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_cdc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
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+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvprojx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvprojx
new file mode 100644
index 000000000..8c4a96402
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvprojx
@@ -0,0 +1,667 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>CDC_Standalone</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>CDC_Standalone\Exe\</OutputDirectory>
+          <OutputName>CDC_Standalone</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
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+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
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+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
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+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
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+              <IncludePath>../USB_Device/App;../USB_Device/Target;../Core/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
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+          <GroupName>::CMSIS</GroupName>
+        </Group>
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+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
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+              <FilePath>startup_stm32g474xx.s</FilePath>
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+          <GroupName>Application/User/USB_Device/Target</GroupName>
+          <Files>
+            <File>
+              <FileName>usbd_conf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../USB_Device/Target/usbd_conf.c</FilePath>
+            </File>
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+          <GroupName>Application/User/USB_Device/App</GroupName>
+          <Files>
+            <File>
+              <FileName>usbd_desc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../USB_Device/App/usbd_desc.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_cdc_if.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../USB_Device/App/usbd_cdc_if.c</FilePath>
+            </File>
+            <File>
+              <FileName>usb_device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../USB_Device/App/usb_device.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User/Core</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
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+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
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+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
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+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pcd_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_usb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/USB_Device_Library</GroupName>
+          <Files>
+            <File>
+              <FileName>usbd_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_ctlreq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_ioreq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_cdc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="CDC_Standalone"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..d51d2e681
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x1000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x1000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..01067a7d0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.cproject
@@ -0,0 +1,181 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718908114">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718908114" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718908114" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718908114." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1831196900" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1889053466" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.788683694" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1936615384" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1963425653" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1244858374" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.893338536" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1461288745" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.603102005" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.292153575" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../Core/Inc | ../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc | ../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../USB_Device/App | ../../USB_Device/Target | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1893624414" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/CDC_Standalone}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.763261288" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.231645323" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1968486169" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.2139449554" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1669554237" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.450990119" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1244551566" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1480787038" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1051315217" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../Core/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../USB_Device/App"/>
+									<listOptionValue builtIn="false" value="../../USB_Device/Target"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1977749444" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1358858825" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.315923599" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1173095113" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.864597385" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.510693798" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.427749028" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1608940473" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.797763511">
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.484218969" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1548851853" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../Core/Inc | ../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc | ../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc | ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../USB_Device/App | ../../USB_Device/Target | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure || Most || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.536219458" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/CDC_Standalone}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1242860652" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1755851021" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.247200256" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1899536459" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1519901060" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.820671436" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1426559537" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1575654746" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.397781720" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../Core/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../USB_Device/App"/>
+									<listOptionValue builtIn="false" value="../../USB_Device/Target"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2120998399" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1176714465" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.117433961" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1509463593" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.314605598" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.731074215" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1378856267" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1036188793" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.957157300" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.104361528" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1139883279" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1449934579" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1737030757" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1611464516" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.982807788" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.580218710" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.836864948" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="CDC_Standalone.null.2041240276" name="CDC_Standalone"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718908114;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718908114.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1669554237;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1032545996">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.797763511;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.797763511.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1519901060;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2120998399">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.project
new file mode 100644
index 000000000..4be5aba2d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.project
@@ -0,0 +1,256 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CDC_Standalone</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>CDC_Standalone.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/CDC_Standalone.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_usb.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_cdc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_core.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_ctlreq.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_ioreq.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usb_device.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usb_device.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usbd_cdc_if.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_cdc_if.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usbd_desc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_desc.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/Target/usbd_conf.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/Target/usbd_conf.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..0cccfacf0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      LinkerScript.ld
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     Linker script for STM32G474QETx Device from STM32G4 series
+ *                      512Kbytes FLASH
+ *                      128Kbytes RAM
+ *
+ *            Set heap size, stack size and stack location according
+ *            to application requirements.
+ *
+ *            Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x1000;	/* required amount of heap  */
+_Min_Stack_Size = 0x1000;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.c
new file mode 100644
index 000000000..1e8b8015d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.c
@@ -0,0 +1,139 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/CDC_Standalone/USB_Device/App/usb_device.c
+  * @author  MCD Application Team
+  * @brief   This file implements the USB Device
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "usb_device.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_cdc.h"
+#include "usbd_cdc_if.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+__IO uint32_t remotewakeupon = 0;
+uint8_t HID_Buffer[4];
+extern PCD_HandleTypeDef hpcd_USB_FS;
+
+/* USER CODE END PV */
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+extern void Error_Handler(void);
+/* USB Device Core handle declaration. */
+USBD_HandleTypeDef hUsbDeviceFS;
+extern USBD_DescriptorsTypeDef CDC_Desc;
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN 0 */
+/**
+  * @brief USB Clock Configuration
+  * @retval None
+  */
+void USBD_Clock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
+
+  /* Enable HSI48 */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
+  {
+    Error_Handler();
+  }
+  /*Configure the clock recovery system (CRS)**********************************/
+
+  /*Enable CRS Clock*/
+  __HAL_RCC_CRS_CLK_ENABLE();
+
+  /* Default Synchro Signal division factor (not divided) */
+  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+  /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+  /* HSI48 is synchronized with USB SOF at 1KHz rate */
+  RCC_CRSInitStruct.ReloadValue =  __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+  RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+  /* Set the TRIM[5:0] to the default value */
+  RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+  /* Start automatic synchronization */
+  HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
+}
+/* USER CODE END 0 */
+
+/*
+ * -- Insert your external function declaration here --
+ */
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/**
+  * Init USB device Library, add supported class and start the library
+  * @retval None
+  */
+void MX_USB_Device_Init(void)
+{
+  /* USER CODE BEGIN USB_Device_Init_PreTreatment */
+  /* USB Clock Initialization */
+   USBD_Clock_Config();
+  /* USER CODE END USB_Device_Init_PreTreatment */
+
+  /* Init Device Library, add supported class and start the library. */
+  if (USBD_Init(&hUsbDeviceFS, &CDC_Desc, DEVICE_FS) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_Start(&hUsbDeviceFS) != USBD_OK) {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USB_Device_Init_PostTreatment */
+
+  /* USER CODE END USB_Device_Init_PostTreatment */
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.h
new file mode 100644
index 000000000..e566641d3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.h
@@ -0,0 +1,103 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/CDC_Standalone/USB_Device/App/usb_device.h
+  * @author         MCD Application Team
+  * @brief          Header for usb_device.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_DEVICE__H__
+#define __USB_DEVICE__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+  * @{
+  */
+
+/** @defgroup USBD_DEVICE USBD_DEVICE
+  * @brief Device file for Usb otg low level driver.
+  * @{
+  */
+
+/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN VARIABLES */
+
+/* USER CODE END VARIABLES */
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype
+  * @brief Declaration of public functions for Usb device.
+  * @{
+  */
+
+/** USB Device initialization function. */
+void MX_USB_Device_Init(void);
+
+/*
+ * -- Insert functions declaration here --
+ */
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DEVICE__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c
new file mode 100644
index 000000000..2b50db97c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c
@@ -0,0 +1,605 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c
+  * @author         MCD Application Team
+  * @brief          This file implements the USB device descriptors.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_cdc_if.h"
+
+/* USER CODE BEGIN INCLUDE */
+#include "main.h"
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @brief Usb device library.
+  * @{
+  */
+
+/** @addtogroup USBD_CDC_IF
+  * @{
+  */
+
+/** @defgroup USBD_CDC_IF_Private_TypesDefinitions USBD_CDC_IF_Private_TypesDefinitions
+  * @brief Private types.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Private_Defines USBD_CDC_IF_Private_Defines
+  * @brief Private defines.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Private_Macros USBD_CDC_IF_Private_Macros
+  * @brief Private macros.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Private_Variables USBD_CDC_IF_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+/* Create buffer for reception and transmission           */
+/* It's up to user to redefine and/or remove those define */
+/** Received data over USB are stored in this buffer      */
+uint8_t UserRxBufferFS[APP_RX_DATA_SIZE];
+
+/** Data to send over USB CDC are stored in this buffer   */
+uint8_t UserTxBufferFS[APP_TX_DATA_SIZE];
+
+/* USER CODE BEGIN PRIVATE_VARIABLES */
+USBD_CDC_LineCodingTypeDef LineCoding =
+{
+  115200, /* baud rate*/
+  0x00,   /* stop bits-1*/
+  0x00,   /* parity - none*/
+  0x08    /* nb. of bits 8*/
+};
+uint32_t BuffLength;
+uint32_t UserTxBufPtrIn;/* Increment this pointer or roll it back to
+                               start address when data are received over USART */
+uint32_t UserTxBufPtrOut; /* Increment this pointer or roll it back to
+                                 start address when data are sent over USB */
+
+__IO uint32_t uwPrescalerValue;
+/* USER CODE END PRIVATE_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+extern USBD_HandleTypeDef hUsbDeviceFS;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+/* UART handler declaration */
+UART_HandleTypeDef UartHandle;
+/* TIM handler declaration */
+TIM_HandleTypeDef  TimHandle;
+/* USB handler declaration */
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Private_FunctionPrototypes USBD_CDC_IF_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+static int8_t CDC_Init_FS(void);
+static int8_t CDC_DeInit_FS(void);
+static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length);
+static int8_t CDC_Receive_FS(uint8_t* pbuf, uint32_t *Len);
+static int8_t CDC_TransmitCplt_FS(uint8_t *pbuf, uint32_t *Len, uint8_t epnum);
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
+ void TIM_Config(void);
+ static void ComPort_Config(void);
+/* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */
+
+/**
+  * @}
+  */
+
+USBD_CDC_ItfTypeDef USBD_Interface_fops_FS =
+{
+  CDC_Init_FS,
+  CDC_DeInit_FS,
+  CDC_Control_FS,
+  CDC_Receive_FS,
+  CDC_TransmitCplt_FS
+};
+
+/* Private functions ---------------------------------------------------------*/
+/**
+  * @brief  Initializes the CDC media low layer over the FS USB IP
+  * @retval USBD_OK if all operations are OK else USBD_FAIL
+  */
+static int8_t CDC_Init_FS(void)
+{
+  /* USER CODE BEGIN 3 */
+  /*##-1- Configure the UART peripheral ######################################*/
+  /* Put the USART peripheral in the Asynchronous mode (UART Mode) */
+  /* USART configured as follow:
+      - Word Length = 8 Bits
+      - Stop Bit    = One Stop bit
+      - Parity      = No parity
+      - BaudRate    = 115200 baud
+      - Hardware flow control disabled (RTS and CTS signals) */
+  UartHandle.Instance          = USARTx;
+  UartHandle.Init.BaudRate     = 115200;
+  UartHandle.Init.WordLength   = UART_WORDLENGTH_8B;
+  UartHandle.Init.StopBits     = UART_STOPBITS_1;
+  UartHandle.Init.Parity       = UART_PARITY_NONE;
+  UartHandle.Init.HwFlowCtl    = UART_HWCONTROL_NONE;
+  UartHandle.Init.Mode         = UART_MODE_TX_RX;
+
+  if(HAL_UART_Init(&UartHandle) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /*##-2- Put UART peripheral in IT reception process ########################*/
+  /* Any data received will be stored in "UserTxBufferFS" buffer  */
+  if(HAL_UART_Receive_IT(&UartHandle, (uint8_t *)UserTxBufferFS, 1) != HAL_OK)
+  {
+    /* Transfer error in reception process */
+    Error_Handler();
+  }
+
+  /*##-3- Configure the TIM Base generation  #################################*/
+  TIM_Config();
+
+  /*##-5- Set Application Buffers ############################################*/
+  USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
+  USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
+
+  return (USBD_OK);
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief  DeInitializes the CDC media low layer
+  * @retval USBD_OK if all operations are OK else USBD_FAIL
+  */
+static int8_t CDC_DeInit_FS(void)
+{
+  /* USER CODE BEGIN 4 */
+  /* DeInitialize the UART peripheral */
+  if(HAL_UART_DeInit(&UartHandle) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+  return (USBD_OK);
+  /* USER CODE END 4 */
+}
+
+/**
+  * @brief  Manage the CDC class requests
+  * @param  cmd: Command code
+  * @param  pbuf: Buffer containing command data (request parameters)
+  * @param  length: Number of data to be sent (in bytes)
+  * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
+  */
+static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
+{
+  /* USER CODE BEGIN 5 */
+  switch (cmd)
+  {
+  case CDC_SEND_ENCAPSULATED_COMMAND:
+    /* Add your code here */
+    break;
+
+  case CDC_GET_ENCAPSULATED_RESPONSE:
+    /* Add your code here */
+    break;
+
+  case CDC_SET_COMM_FEATURE:
+    /* Add your code here */
+    break;
+
+  case CDC_GET_COMM_FEATURE:
+    /* Add your code here */
+    break;
+
+  case CDC_CLEAR_COMM_FEATURE:
+    /* Add your code here */
+    break;
+
+  case CDC_SET_LINE_CODING:
+    LineCoding.bitrate    = (uint32_t)(pbuf[0] | (pbuf[1] << 8) |\
+                            (pbuf[2] << 16) | (pbuf[3] << 24));
+    LineCoding.format     = pbuf[4];
+    LineCoding.paritytype = pbuf[5];
+    LineCoding.datatype   = pbuf[6];
+
+    /* Set the new configuration */
+    ComPort_Config();
+    break;
+
+  case CDC_GET_LINE_CODING:
+    pbuf[0] = (uint8_t)(LineCoding.bitrate);
+    pbuf[1] = (uint8_t)(LineCoding.bitrate >> 8);
+    pbuf[2] = (uint8_t)(LineCoding.bitrate >> 16);
+    pbuf[3] = (uint8_t)(LineCoding.bitrate >> 24);
+    pbuf[4] = LineCoding.format;
+    pbuf[5] = LineCoding.paritytype;
+    pbuf[6] = LineCoding.datatype;
+    break;
+
+  case CDC_SET_CONTROL_LINE_STATE:
+    /* Add your code here */
+    break;
+
+  case CDC_SEND_BREAK:
+     /* Add your code here */
+    break;
+
+  default:
+    break;
+  }
+
+  return (USBD_OK);
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Data received over USB OUT endpoint are sent over CDC interface
+  *         through this function.
+  *
+  *         @note
+  *         This function will issue a NAK packet on any OUT packet received on
+  *         USB endpoint until exiting this function. If you exit this function
+  *         before transfer is complete on CDC interface (ie. using DMA controller)
+  *         it will result in receiving more data while previous ones are still
+  *         not sent.
+  *
+  * @param  Buf: Buffer of data to be received
+  * @param  Len: Number of data received (in bytes)
+  * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
+  */
+static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
+{
+  /* USER CODE BEGIN 6 */
+  HAL_UART_Transmit_DMA(&UartHandle, Buf, *Len);
+  return (USBD_OK);
+  /* USER CODE END 6 */
+}
+
+/**
+  * @brief  CDC_Transmit_FS
+  *         Data to send over USB IN endpoint are sent over CDC interface
+  *         through this function.
+  *         @note
+  *
+  *
+  * @param  Buf: Buffer of data to be sent
+  * @param  Len: Number of data to be sent (in bytes)
+  * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
+  */
+uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
+{
+  uint8_t result = USBD_OK;
+  /* USER CODE BEGIN 7 */
+  USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
+  if (hcdc->TxState != 0){
+  return USBD_BUSY;
+  }
+  USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
+  result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
+  /* USER CODE END 7 */
+  return result;
+}
+
+/**
+  * @brief  CDC_TransmitCplt_FS
+  *         Data transmitted callback
+  *
+  *         @note
+  *         This function is IN transfer complete callback used to inform user that
+  *         the submitted Data is successfully sent over USB.
+  *
+  * @param  Buf: Buffer of data to be received
+  * @param  Len: Number of data received (in bytes)
+  * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
+  */
+static int8_t CDC_TransmitCplt_FS(uint8_t *Buf, uint32_t *Len, uint8_t epnum)
+{
+  uint8_t result = USBD_OK;
+  /* USER CODE BEGIN 13 */
+  UNUSED(Buf);
+  UNUSED(Len);
+  UNUSED(epnum);
+  /* USER CODE END 13 */
+  return result;
+}
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */
+/**
+  * @brief  Tx Transfer completed callback
+  * @param  huart: UART handle
+  * @retval None
+  */
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+  /* Initiate next USB packet transfer once UART completes transfer (transmitting data over Tx line) */
+  USBD_CDC_ReceivePacket(&hUsbDeviceFS);
+}
+
+/**
+  * @brief  ComPort_Config
+  *         Configure the COM Port with the parameters received from host.
+  * @param  None.
+  * @retval None.
+  * @note   When a configuration is not supported, a default value is used.
+  */
+static void ComPort_Config(void)
+{
+  if(HAL_UART_DeInit(&UartHandle) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /* set the Stop bit */
+  switch (LineCoding.format)
+  {
+  case 0:
+    UartHandle.Init.StopBits = UART_STOPBITS_1;
+    break;
+  case 2:
+    UartHandle.Init.StopBits = UART_STOPBITS_2;
+    break;
+  default :
+    UartHandle.Init.StopBits = UART_STOPBITS_1;
+    break;
+  }
+
+  /* set the parity bit*/
+  switch (LineCoding.paritytype)
+  {
+  case 0:
+    UartHandle.Init.Parity = UART_PARITY_NONE;
+    break;
+  case 1:
+    UartHandle.Init.Parity = UART_PARITY_ODD;
+    break;
+  case 2:
+    UartHandle.Init.Parity = UART_PARITY_EVEN;
+    break;
+  default :
+    UartHandle.Init.Parity = UART_PARITY_NONE;
+    break;
+  }
+
+  /*set the data type : only 8bits and 9bits is supported */
+  switch (LineCoding.datatype)
+  {
+  case 0x07:
+    /* With this configuration a parity (Even or Odd) must be set */
+    UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+    break;
+  case 0x08:
+    if(UartHandle.Init.Parity == UART_PARITY_NONE)
+    {
+      UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+    }
+    else
+    {
+      UartHandle.Init.WordLength = UART_WORDLENGTH_9B;
+    }
+
+    break;
+  default :
+    UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+    break;
+  }
+
+  UartHandle.Init.BaudRate     = LineCoding.bitrate;
+  UartHandle.Init.HwFlowCtl    = UART_HWCONTROL_NONE;
+  UartHandle.Init.Mode         = UART_MODE_TX_RX;
+  UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
+
+  if(HAL_UART_Init(&UartHandle) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /* Start reception: provide the buffer pointer with offset and the buffer size */
+  HAL_UART_Receive_IT(&UartHandle, (uint8_t *)(UserTxBufferFS + UserTxBufPtrIn), 1);
+}
+
+/**
+  * @brief  TIM_Config: Configure TIMx timer
+  * @param  None.
+  * @retval None.
+  */
+ void TIM_Config(void)
+{
+   /*##-1- Configure the TIM peripheral #######################################*/
+  /* -----------------------------------------------------------------------
+    In this example TIM2 input clock (TIM2CLK)  is set to APB1 clock (PCLK1),
+    since APB1 prescaler is equal to 1.
+      TIM2CLK = PCLK1
+      PCLK1 = HCLK
+      => TIM2CLK = HCLK = SystemCoreClock
+    To get TIM2 counter clock at 10 KHz, the Prescaler is computed as following:
+    Prescaler = (TIM2CLK / TIM2 counter clock) - 1
+    Prescaler = (SystemCoreClock /10 KHz) - 1
+
+    Note:
+     SystemCoreClock variable holds HCLK frequency and is defined in system_stm32g4xx.c file.
+     Each time the core clock (HCLK) changes, user had to update SystemCoreClock
+     variable value. Otherwise, any configuration based on this variable will be incorrect.
+     This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+  ----------------------------------------------------------------------- */
+
+  /* Compute the prescaler value to have TIMx counter clock equal to 10000 Hz */
+  uwPrescalerValue = (uint32_t)(SystemCoreClock / 10000U) - 1U;
+
+  /* Set TIMx instance */
+  TimHandle.Instance = TIMx;
+
+  /* Initialize TIMx peripheral as follows:
+       + Period = 10000 - 1
+       + Prescaler = (SystemCoreClock/10000) - 1
+       + ClockDivision = 0
+       + Counter direction = Up
+  */
+  TimHandle.Init.Period            = 10000 - 1;
+  TimHandle.Init.Prescaler         = uwPrescalerValue;
+  TimHandle.Init.ClockDivision     = 0;
+  TimHandle.Init.CounterMode       = TIM_COUNTERMODE_UP;
+  TimHandle.Init.RepetitionCounter = 0;
+  TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+
+  if (HAL_TIM_Base_Init(&TimHandle) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /*##-2- Start the TIM Base generation in interrupt mode ####################*/
+  /* Start Channel1 */
+  if (HAL_TIM_Base_Start_IT(&TimHandle) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief  UART error callbacks
+  * @param  UartHandle: UART handle
+  * @retval None
+  */
+void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle)
+{
+  /* Transfer error occurred in reception and/or transmission process */
+  Error_Handler();
+}
+
+/**
+  * @brief  TIM period elapsed callback
+  * @param  htim: TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  uint32_t buffptr;
+  uint32_t buffsize;
+
+  if(UserTxBufPtrOut != UserTxBufPtrIn)
+  {
+    if(UserTxBufPtrOut > UserTxBufPtrIn) /* Rollback */
+    {
+      buffsize = APP_RX_DATA_SIZE - UserTxBufPtrOut;
+    }
+    else
+    {
+      buffsize = UserTxBufPtrIn - UserTxBufPtrOut;
+    }
+
+    buffptr = UserTxBufPtrOut;
+
+    USBD_CDC_SetTxBuffer(&hUsbDeviceFS, (uint8_t*)&UserTxBufferFS[buffptr], buffsize);
+
+    if(USBD_CDC_TransmitPacket(&hUsbDeviceFS) == USBD_OK)
+    {
+      UserTxBufPtrOut += buffsize;
+      if (UserTxBufPtrOut == APP_RX_DATA_SIZE)
+      {
+        UserTxBufPtrOut = 0;
+      }
+    }
+  }
+}
+/**
+  * @brief  Rx Transfer completed callback
+  * @param  huart: UART handle
+  * @retval None
+  */
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+  /* Increment Index for buffer writing */
+  UserTxBufPtrIn++;
+
+  /* To avoid buffer overflow */
+  if(UserTxBufPtrIn == APP_RX_DATA_SIZE)
+  {
+    UserTxBufPtrIn = 0;
+  }
+
+  /* Start another reception: provide the buffer pointer with offset and the buffer size */
+  HAL_UART_Receive_IT(huart, (uint8_t *)(UserTxBufferFS + UserTxBufPtrIn), 1);
+
+
+}
+/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h
new file mode 100644
index 000000000..c6dcd7a78
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h
@@ -0,0 +1,179 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_cdc_if.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CDC_IF_H__
+#define __USBD_CDC_IF_H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_cdc.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @brief For Usb device.
+  * @{
+  */
+
+/** @defgroup USBD_CDC_IF USBD_CDC_IF
+  * @brief Usb VCP device module
+  * @{
+  */
+
+/** @defgroup USBD_CDC_IF_Exported_Defines USBD_CDC_IF_Exported_Defines
+  * @brief Defines.
+  * @{
+  */
+/* Define size for the receive and transmit buffer over CDC */
+#define APP_RX_DATA_SIZE  2048
+#define APP_TX_DATA_SIZE  2048
+/* USER CODE BEGIN EXPORTED_DEFINES */
+#define USARTx                           USART1
+#define USARTx_CLK_ENABLE()              __HAL_RCC_USART1_CLK_ENABLE()
+#define DMAx_CLK_ENABLE()                do {                                \
+                                              __HAL_RCC_DMA1_CLK_ENABLE();    \
+                                              __HAL_RCC_DMAMUX1_CLK_ENABLE(); \
+                                         }while(0)
+#define USARTx_RX_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USARTx_TX_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
+
+#define USARTx_FORCE_RESET()             __HAL_RCC_USART1_FORCE_RESET()
+#define USARTx_RELEASE_RESET()           __HAL_RCC_USART1_RELEASE_RESET()
+
+/* Definition for USARTx Pins */
+#define USARTx_TX_PIN                     GPIO_PIN_9
+#define USARTx_TX_GPIO_PORT               GPIOA
+#define USARTx_TX_AF                      GPIO_AF7_USART1
+#define USARTx_RX_PIN                     GPIO_PIN_10
+#define USARTx_RX_GPIO_PORT               GPIOA
+#define USARTx_RX_AF                      GPIO_AF7_USART1
+
+/* Definition for USARTx's DMA */
+#define USARTx_TX_DMA_CHANNEL             DMA1_Channel1
+#define USARTx_RX_DMA_CHANNEL             DMA1_Channel2
+
+/* Definition for USARTx's DMA Request */
+#define USARTx_TX_DMA_REQUEST             DMA_REQUEST_USART1_TX
+
+/* Definition for USARTx's NVIC */
+#define USARTx_DMA_TX_IRQn                DMA1_Channel1_IRQn
+#define USARTx_RX_IRQn                    DMA1_Channel2_IRQn
+#define USARTx_DMA_TX_IRQHandler          DMA1_Channel1_IRQHandler
+#define USARTx_RX_IRQHandler              DMA1_Channel2_IRQHandler
+
+/* Definition for USARTx's NVIC */
+#define USARTx_IRQn                       USART1_IRQn
+#define USARTx_IRQHandler                 USART1_IRQHandler
+
+/* Size of Reception buffer */
+#define RXBUFFERSIZE                      10
+
+/* Definition for TIMx clock resources */
+#define TIMx                             TIM2
+#define TIMx_CLK_ENABLE                  __HAL_RCC_TIM2_CLK_ENABLE
+#define TIMx_FORCE_RESET()               __HAL_RCC_TIM2_FORCE_RESET()
+#define TIMx_RELEASE_RESET()             __HAL_RCC_TIM2_RELEASE_RESET()
+
+/* Definition for TIMx's NVIC */
+#define TIMx_IRQn                        TIM2_IRQn
+#define TIMx_IRQHandler                  TIM2_IRQHandler
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Exported_Types USBD_CDC_IF_Exported_Types
+  * @brief Types.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Exported_Macros USBD_CDC_IF_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/** CDC Interface callback. */
+extern USBD_CDC_ItfTypeDef USBD_Interface_fops_FS;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CDC_IF_Exported_FunctionsPrototype USBD_CDC_IF_Exported_FunctionsPrototype
+  * @brief Public functions declaration.
+  * @{
+  */
+
+uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len);
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CDC_IF_H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c
new file mode 100644
index 000000000..539c83a43
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c
@@ -0,0 +1,396 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c
+  * @author         MCD Application Team
+  * @brief          This file implements the USB device descriptors.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_conf.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBD_DESC
+  * @{
+  */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions
+  * @brief Private types.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines
+  * @brief Private defines.
+  * @{
+  */
+
+#define USBD_VID     0x483
+#define USBD_LANGID_STRING     1033
+#define USBD_MANUFACTURER_STRING     "STMicroelectronics"
+#define USBD_PID     0x5740
+#define USBD_PRODUCT_STRING     "STM32 Virtual ComPort in FS Mode"
+#define USBD_CONFIGURATION_STRING     "CDC Config"
+#define USBD_INTERFACE_STRING     "CDC Interface"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+  * @}
+  */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros
+  * @brief Private macros.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+static void Get_SerialNum(void);
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+uint8_t * USBD_CDC_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+
+USBD_DescriptorsTypeDef CDC_Desc =
+{
+  USBD_CDC_DeviceDescriptor,
+  USBD_CDC_LangIDStrDescriptor,
+  USBD_CDC_ManufacturerStrDescriptor,
+  USBD_CDC_ProductStrDescriptor,
+  USBD_CDC_SerialStrDescriptor,
+  USBD_CDC_ConfigStrDescriptor,
+  USBD_CDC_InterfaceStrDescriptor
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/** USB standard device descriptor. */
+__ALIGN_BEGIN uint8_t USBD_CDC_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
+{
+  0x12,                       /*bLength */
+  USB_DESC_TYPE_DEVICE,       /*bDescriptorType*/
+  0x00,                       /*bcdUSB */
+  0x02,
+  0x02,                       /*bDeviceClass*/
+  0x02,                       /*bDeviceSubClass*/
+  0x00,                       /*bDeviceProtocol*/
+  USB_MAX_EP0_SIZE,           /*bMaxPacketSize*/
+  LOBYTE(USBD_VID),           /*idVendor*/
+  HIBYTE(USBD_VID),           /*idVendor*/
+  LOBYTE(USBD_PID),           /*idProduct*/
+  HIBYTE(USBD_PID),           /*idProduct*/
+  0x00,                       /*bcdDevice rel. 2.00*/
+  0x02,
+  USBD_IDX_MFC_STR,           /*Index of manufacturer  string*/
+  USBD_IDX_PRODUCT_STR,       /*Index of product string*/
+  USBD_IDX_SERIAL_STR,        /*Index of serial number string*/
+  USBD_MAX_NUM_CONFIGURATION  /*bNumConfigurations*/
+};
+
+/* USB_DeviceDescriptor */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+
+/** USB lang identifier descriptor. */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
+{
+     USB_LEN_LANGID_STR_DESC,
+     USB_DESC_TYPE_STRING,
+     LOBYTE(USBD_LANGID_STRING),
+     HIBYTE(USBD_LANGID_STRING)
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/* Internal string descriptor. */
+__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = {
+  USB_SIZ_STRING_SERIAL,
+  USB_DESC_TYPE_STRING,
+};
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions
+  * @brief Private functions.
+  * @{
+  */
+
+/**
+  * @brief  Return the device descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_CDC_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = sizeof(USBD_CDC_DeviceDesc);
+  return USBD_CDC_DeviceDesc;
+}
+
+/**
+  * @brief  Return the LangID string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_CDC_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = sizeof(USBD_LangIDDesc);
+  return USBD_LangIDDesc;
+}
+
+/**
+  * @brief  Return the product string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_CDC_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == 0)
+  {
+    USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the manufacturer string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_CDC_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the serial number string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_CDC_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = USB_SIZ_STRING_SERIAL;
+
+  /* Update the serial number string descriptor with the data from the unique
+   * ID */
+  Get_SerialNum();
+
+  /* USER CODE BEGIN USBD_CDC_SerialStrDescriptor */
+
+  /* USER CODE END USBD_CDC_SerialStrDescriptor */
+
+  return (uint8_t *) USBD_StringSerial;
+}
+
+/**
+  * @brief  Return the configuration string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_CDC_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == USBD_SPEED_HIGH)
+  {
+    USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the interface string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_CDC_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == 0)
+  {
+    USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Create the serial number string descriptor
+  * @param  None
+  * @retval None
+  */
+static void Get_SerialNum(void)
+{
+  uint32_t deviceserial0;
+  uint32_t deviceserial1;
+  uint32_t deviceserial2;
+
+  deviceserial0 = *(uint32_t *) DEVICE_ID1;
+  deviceserial1 = *(uint32_t *) DEVICE_ID2;
+  deviceserial2 = *(uint32_t *) DEVICE_ID3;
+
+  deviceserial0 += deviceserial2;
+
+  if (deviceserial0 != 0)
+  {
+    IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
+    IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
+  }
+}
+
+/**
+  * @brief  Convert Hex 32Bits value into char
+  * @param  value: value to convert
+  * @param  pbuf: pointer to the buffer
+  * @param  len: buffer length
+  * @retval None
+  */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
+{
+  uint8_t idx = 0;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    if (((value >> 28)) < 0xA)
+    {
+      pbuf[2 * idx] = (value >> 28) + '0';
+    }
+    else
+    {
+      pbuf[2 * idx] = (value >> 28) + 'A' - 10;
+    }
+
+    value = value << 4;
+
+    pbuf[2 * idx + 1] = 0;
+  }
+}
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h
new file mode 100644
index 000000000..dc47aadc3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_desc.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DESC__C__
+#define __USBD_DESC__C__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @{
+  */
+
+/** @defgroup USBD_DESC USBD_DESC
+  * @brief Usb device descriptors module.
+  * @{
+  */
+
+/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants
+  * @brief Constants.
+  * @{
+  */
+#define         DEVICE_ID1          (UID_BASE)
+#define         DEVICE_ID2          (UID_BASE + 0x4)
+#define         DEVICE_ID3          (UID_BASE + 0x8)
+
+#define         USB_SIZ_STRING_SERIAL       0x1A
+
+/* USER CODE BEGIN EXPORTED_CONSTANTS */
+
+/* USER CODE END EXPORTED_CONSTANTS */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines
+  * @brief Defines.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions
+  * @brief Types.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+extern USBD_DescriptorsTypeDef     CDC_Desc;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype
+  * @brief Public functions declaration.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DESC__C__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c
new file mode 100644
index 000000000..dbea6a163
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c
@@ -0,0 +1,747 @@
+/* USER CODE BEGIN Header */
+/**
+******************************************************************************
+  * @file           USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c
+  * @author         MCD Application Team
+  * @brief          This file implements the board support package for the USB device library
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+#include "usbd_core.h"
+
+#include "usbd_cdc.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+PCD_HandleTypeDef hpcd_USB_FS;
+void Error_Handler(void);
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported function prototypes ----------------------------------------------*/
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+
+/* USER CODE END PFP */
+
+/* Private functions ---------------------------------------------------------*/
+static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status);
+/* USER CODE BEGIN 1 */
+static void SystemClockConfig_Resume(void);
+extern void USBD_Clock_Config(void);
+/* USER CODE END 1 */
+extern void SystemClock_Config(void);
+
+/*******************************************************************************
+                       LL Driver Callbacks (PCD -> USB Device Library)
+*******************************************************************************/
+/* MSP Init */
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  if(pcdHandle->Instance==USB)
+  {
+  /* USER CODE BEGIN USB_MspInit 0 */
+
+  /* USER CODE END USB_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_USB_CLK_ENABLE();
+
+    /* Peripheral interrupt init */
+    HAL_NVIC_SetPriority(USB_LP_IRQn, 6, 0);
+    HAL_NVIC_EnableIRQ(USB_LP_IRQn);
+  /* USER CODE BEGIN USB_MspInit 1 */
+
+  /* USER CODE END USB_MspInit 1 */
+  }
+}
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  if(pcdHandle->Instance==USB)
+  {
+  /* USER CODE BEGIN USB_MspDeInit 0 */
+
+  /* USER CODE END USB_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USB_CLK_DISABLE();
+
+    /* Peripheral interrupt Deinit*/
+    HAL_NVIC_DisableIRQ(USB_LP_IRQn);
+
+  /* USER CODE BEGIN USB_MspDeInit 1 */
+    __HAL_RCC_GPIOA_CLK_DISABLE();
+  /* USER CODE END USB_MspDeInit 1 */
+  }
+}
+
+/**
+  * @brief  Setup stage callback
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PreTreatment */
+
+  /* USER CODE END  HAL_PCD_SetupStageCallback_PreTreatment */
+  USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
+  /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PostTreatment */
+
+  /* USER CODE END  HAL_PCD_SetupStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  Data Out stage callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DataOutStageCallback_PreTreatment */
+  USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
+  /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_DataOutStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  Data In stage callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DataInStageCallback_PreTreatment */
+  USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
+  /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PostTreatment  */
+
+  /* USER CODE END HAL_PCD_DataInStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  SOF callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SOFCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_SOFCallback_PreTreatment */
+  USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_SOFCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_SOFCallback_PostTreatment */
+}
+
+/**
+  * @brief  Reset callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ResetCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ResetCallback_PreTreatment */
+  USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
+
+  if ( hpcd->Init.speed != PCD_SPEED_FULL)
+  {
+    Error_Handler();
+  }
+    /* Set Speed. */
+  USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
+
+  /* Reset Device. */
+  USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ResetCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ResetCallback_PostTreatment */
+}
+
+/**
+  * @brief  Suspend callback.
+  * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SuspendCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_SuspendCallback_PreTreatment */
+  /* Inform USB library that core enters in suspend Mode. */
+  USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
+  /* Enter in STOP mode. */
+  /* USER CODE BEGIN 2 */
+  if (hpcd->Init.low_power_enable)
+  {
+    /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
+    SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+  }
+  /* USER CODE END 2 */
+  /* USER CODE BEGIN HAL_PCD_SuspendCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_SuspendCallback_PostTreatment */
+}
+
+/**
+  * @brief  Resume callback.
+  * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ResumeCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ResumeCallback_PreTreatment */
+
+  /* USER CODE BEGIN 3 */
+  if (hpcd->Init.low_power_enable)
+  {
+    /* Reset SLEEPDEEP bit of Cortex System Control Register. */
+    SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+    SystemClockConfig_Resume();
+  }
+  /* USER CODE END 3 */
+
+  USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ResumeCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ResumeCallback_PostTreatment */
+}
+
+/**
+  * @brief  ISOOUTIncomplete callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+  USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+  /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+}
+
+/**
+  * @brief  ISOINIncomplete callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+  USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+  /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+}
+
+/**
+  * @brief  Connect callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ConnectCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ConnectCallback_PreTreatment */
+  USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ConnectCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ConnectCallback_PostTreatment */
+}
+
+/**
+  * @brief  Disconnect callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DisconnectCallback_PreTreatment */
+  USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_DisconnectCallback_PostTreatment */
+}
+
+  /* USER CODE BEGIN LowLevelInterface */
+
+  /* USER CODE END LowLevelInterface */
+
+/*******************************************************************************
+                       LL Driver Interface (USB Device Library --> PCD)
+*******************************************************************************/
+
+/**
+  * @brief  Initializes the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
+{
+  /* Init USB Ip. */
+  hpcd_USB_FS.pData = pdev;
+  /* Link the driver to the stack. */
+  pdev->pData = &hpcd_USB_FS;
+
+  hpcd_USB_FS.Instance = USB;
+  hpcd_USB_FS.Init.dev_endpoints = 8;
+  hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
+  hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+  hpcd_USB_FS.Init.Sof_enable = DISABLE;
+  hpcd_USB_FS.Init.low_power_enable = DISABLE;
+  hpcd_USB_FS.Init.lpm_enable = DISABLE;
+  hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
+
+  #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+  /* register Msp Callbacks (before the Init) */
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPINIT_CB_ID, PCD_MspInit);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPDEINIT_CB_ID, PCD_MspDeInit);
+  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+  if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+  /* Register USB PCD CallBacks */
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SOF_CB_ID, PCD_SOFCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SETUPSTAGE_CB_ID, PCD_SetupStageCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESET_CB_ID, PCD_ResetCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SUSPEND_CB_ID, PCD_SuspendCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESUME_CB_ID, PCD_ResumeCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_CONNECT_CB_ID, PCD_ConnectCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_DISCONNECT_CB_ID, PCD_DisconnectCallback);
+  /* USER CODE BEGIN RegisterCallBackFirstPart */
+
+  /* USER CODE END RegisterCallBackFirstPart */
+  HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_FS, PCD_DataOutStageCallback);
+  HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
+  HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
+  HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
+  /* USER CODE BEGIN RegisterCallBackSecondPart */
+
+  /* USER CODE END RegisterCallBackSecondPart */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+  /* USER CODE BEGIN EndPoint_Configuration */
+  HAL_PCDEx_PMAConfig(&hpcd_USB_FS, 0x00 , PCD_SNG_BUF, 0x14);
+  HAL_PCDEx_PMAConfig(&hpcd_USB_FS, 0x80 , PCD_SNG_BUF, 0x54);
+  /* USER CODE END EndPoint_Configuration */
+  /* USER CODE BEGIN EndPoint_Configuration_CDC */
+  HAL_PCDEx_PMAConfig(&hpcd_USB_FS, CDC_IN_EP, PCD_SNG_BUF, 0x94);
+  HAL_PCDEx_PMAConfig(&hpcd_USB_FS, CDC_OUT_EP, PCD_SNG_BUF, 0xD4);
+  HAL_PCDEx_PMAConfig(&hpcd_USB_FS, CDC_CMD_EP, PCD_SNG_BUF, 0x114);
+  /* USER CODE END EndPoint_Configuration_CDC */
+  return USBD_OK;
+}
+
+/**
+  * @brief  De-Initializes the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_DeInit(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Starts the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_Start(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Stops the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_Stop(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Opens an endpoint of the low level driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  ep_type: Endpoint type
+  * @param  ep_mps: Endpoint max packet size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Closes an endpoint of the low level driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Flushes an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Sets a Stall condition on an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Clears a Stall condition on an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Returns Stall condition.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval Stall (1: Yes, 0: No)
+  */
+uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
+
+  if((ep_addr & 0x80) == 0x80)
+  {
+    return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
+  }
+  else
+  {
+    return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
+  }
+}
+
+/**
+  * @brief  Assigns a USB address to the device.
+  * @param  pdev: Device handle
+  * @param  dev_addr: Device address
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Transmits data over an endpoint.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  pbuf: Pointer to data to be sent
+  * @param  size: Data size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Prepares an endpoint for reception.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  pbuf: Pointer to data to be received
+  * @param  size: Data size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Returns the last transferred packet size.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval Received Data Size
+  */
+uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
+}
+
+/**
+  * @brief  Delays routine for the USB Device Library.
+  * @param  Delay: Delay in ms
+  * @retval None
+  */
+void USBD_LL_Delay(uint32_t Delay)
+{
+  HAL_Delay(Delay);
+}
+
+/**
+  * @brief  Static single allocation.
+  * @param  size: Size of allocated memory
+  * @retval None
+  */
+void *USBD_static_malloc(uint32_t size)
+{
+  static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
+  return mem;
+}
+
+/**
+  * @brief  Dummy memory free
+  * @param  p: Pointer to allocated  memory address
+  * @retval None
+  */
+void USBD_static_free(void *p)
+{
+
+}
+
+/* USER CODE BEGIN 5 */
+/**
+  * @brief  Configures system clock after wake-up from USB resume callBack:
+  *         enable HSI, PLL and select PLL as system clock source.
+  * @retval None
+  */
+void SystemClockConfig_Resume(void)
+{
+  SystemClock_Config();
+  USBD_Clock_Config();
+}
+/* USER CODE END 5 */
+
+/**
+  * @brief  Returns the USB status depending on the HAL status:
+  * @param  hal_status: HAL status
+  * @retval USB status
+  */
+USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
+{
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  switch (hal_status)
+  {
+    case HAL_OK :
+      usb_status = USBD_OK;
+    break;
+    case HAL_ERROR :
+      usb_status = USBD_FAIL;
+    break;
+    case HAL_BUSY :
+      usb_status = USBD_BUSY;
+    break;
+    case HAL_TIMEOUT :
+      usb_status = USBD_FAIL;
+    break;
+    default :
+      usb_status = USBD_FAIL;
+    break;
+  }
+  return usb_status;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h
new file mode 100644
index 000000000..6d8b25b3e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h
@@ -0,0 +1,175 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_conf.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+  * @brief Driver for Usb device.
+  * @{
+  */
+
+/** @defgroup USBD_CONF USBD_CONF
+  * @brief Configuration file for Usb otg low level driver.
+  * @{
+  */
+
+/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines
+  * @brief Defines for configuration of the Usb device.
+  * @{
+  */
+
+/*---------- -----------*/
+#define USBD_MAX_NUM_INTERFACES     1U
+/*---------- -----------*/
+#define USBD_MAX_NUM_CONFIGURATION     1U
+/*---------- -----------*/
+#define USBD_MAX_STR_DESC_SIZ     100U
+/*---------- -----------*/
+#define USBD_DEBUG_LEVEL     0U
+/*---------- -----------*/
+#define USBD_LPM_ENABLED     0U
+/*---------- -----------*/
+#define USBD_SELF_POWERED     1U
+
+/****************************************/
+/* #define for FS and HS identification */
+#define DEVICE_FS 		0
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* Memory management macros */
+
+/** Alias for memory allocation. */
+#define USBD_malloc         (void *)USBD_static_malloc
+
+/** Alias for memory release. */
+#define USBD_free           USBD_static_free
+
+/** Alias for memory set. */
+#define USBD_memset         memset
+
+/** Alias for memory copy. */
+#define USBD_memcpy         memcpy
+
+/** Alias for delay. */
+#define USBD_Delay          HAL_Delay
+
+/* DEBUG macros */
+
+#if (USBD_DEBUG_LEVEL > 0)
+#define USBD_UsrLog(...)    printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_UsrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 1)
+
+#define USBD_ErrLog(...)    printf("ERROR: ") ;\
+                            printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_ErrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 2)
+#define USBD_DbgLog(...)    printf("DEBUG : ") ;\
+                            printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_DbgLog(...)
+#endif
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types
+  * @brief Types.
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype
+  * @brief Declaration of public functions for Usb device.
+  * @{
+  */
+
+/* Exported functions -------------------------------------------------------*/
+void *USBD_static_malloc(uint32_t size);
+void USBD_static_free(void *p);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CONF__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/readme.txt
new file mode 100644
index 000000000..ed97cbd8e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/readme.txt
@@ -0,0 +1,157 @@
+/**
+  @page CDC_Standalone USB Device Communication (CDC) application
+
+  @verbatim
+  ******************************************************************************
+  * @file    USB_Device/CDC_Standalone/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the USB Device CDC application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+This application describes how to use USB device application based on the Device
+Communication Class (CDC) following the PSTN sub-protocol on the STM32G4xx devices.
+
+This example is part of the USB Device Library package using STM32Cube firmware.
+
+This is a typical application on how to use the STM32G4xx USB Device peripheral where the STM32 MCU
+behaves as a USB-to-UART bridge following the Virtual COM Port (VCP) implementation.
+ - On one side, the STM32 exchanges data with a PC host through USB interface in Device mode.
+ - On the other side, the STM32 exchanges data with other devices (same host, other host,
+   other devices�).
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick. The user is
+provided with the SystemClock_Config()function to configure the clock (SYSCLK).
+
+When the VCP application is started, the STM32 MCU is enumerated as serial communication port and is
+configured in the same way (baudrate, data format, parity, stop bit) as it would configure a standard
+COM port. The 7-bit data length with no parity control is NOT supported.
+
+During enumeration phase, three communication pipes "endpoints" are declared in the CDC class
+implementation (PSTN sub-class):
+ - 1 x Bulk IN endpoint for receiving data from STM32 device to PC host:
+   When data are received over UART they are saved in the buffer "UserTxBufferFS". Periodically, in a
+   timer callback the state of the buffer "UserTxBufferFS" is checked. If there are available data, they
+   are transmitted in response to IN token otherwise it is NAKed.
+
+ - 1 x Bulk OUT endpoint for transmitting data from PC host to STM32 device:
+   When data are received through this endpoint they are saved in the buffer "UserRxBufferFS" then they
+   are transmitted over UART using DMA mode and in meanwhile the OUT endpoint is NAKed.
+   Once the transmission is over, the OUT endpoint is prepared to receive next packet in
+   HAL_UART_TxCpltCallback().
+
+ - 1 x Interrupt IN endpoint for setting and getting serial-port parameters:
+   When control setup is received, the corresponding request is executed in CDC_Control_FS().
+   In this application, two requests are implemented:
+    - Set line: Set the bit rate, number of Stop bits, parity, and number of data bits
+    - Get line: Get the bit rate, number of Stop bits, parity, and number of data bits
+   The other requests (send break, control line state) are not implemented.
+
+@note Receiving data over UART is handled by interrupt while transmitting is handled by DMA allowing
+      hence the application to receive data at the same time it is transmitting another data (full-
+      duplex feature).
+
+The support of the VCP interface is managed through the ST Virtual COM Port driver available for
+download from www.st.com.
+
+@note The user has to check the list of the COM ports in Device Manager to find out the number of the
+      COM ports that have been assigned (by OS) to the VCP interface.
+
+This application uses UART as a communication interface. The UART instance and associated resources
+(GPIO, NVIC) can be tailored in "usbd_cdc_if.h" header file according to your hardware
+configuration. Moreover, this application can be customized to communicate with interfaces other than UART.
+For that purpose a template CDC interface is provided in:
+Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src directory.
+
+To run this application, the user can use one of the following configuration:
+
+ - Configuration 1:
+   Connect USB cable to host and UART (RS232) to a different host (PC or other device) or to same host.
+   In this case, you can open two hyperterminals to send/receive data to/from host to/from device.
+
+ - Configuration 2:
+   Connect USB cable to Host and connect UART TX pin to UART RX pin on the STM32G474E-EVAL1 Rev B board
+   (Loopback mode). In this case, you can open one terminal (relative to USB com port)
+   and all data sent from this terminal will be received by the same terminal in loopback mode.
+   This mode is useful for test and performance measurements.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+For more details about the STM32Cube USB Device library, please refer to UM1734
+"STM32Cube USB Device library".
+
+@par Keywords
+
+Connectivity, USB_Device, USB, CDC, Virtual COM Port
+
+@par Directory contents
+
+  - USB_Device/CDC_Standalone/Core/Src/main.c                   Main program
+  - USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c       STM32G4xx system clock configuration file
+  - USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c           Interrupt handlers
+  - USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c      HAL MSP Module
+  - USB_Device/CDC_Standalone/USB_Device/App/usb_device.c       USB Device application code
+  - USB_Device/CDC_Standalone/USB_Device/App/usb_desc.c         USB device descriptor
+  - USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c      CDC interface
+  - USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c     General low level driver configuration
+  - USB_Device/CDC_Standalone/Core/Inc/main.h                   Main program header file
+  - USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h           Interrupt handlers header file
+  - USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h     HAL configuration file
+  - USB_Device/CDC_Standalone/USB_Device/App/usb_device.h       USB Device application header file
+  - USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h        USB device descriptor header file
+  - USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h      CDC interface header file
+  - USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h     USB device driver Configuration file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G4xx devices.
+
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Rev B Set-up
+  - Connect the STM32G474E-EVAL1 Rev B board CN22 to the PC through "TYPE-C" to "Standard A" cable.
+    - For loopback mode test: connect directly USART1 TX and RX pins,
+  The USART1  interface available on PA9 and PA10 of the microcontroller can be
+  connected to ST-LINK MCU. The choice can be changed by setting the related jumpers.
+  By default the USART1  communication between the target MCU and ST-LINK MCU is enabled.
+
+  - Hyperterminal configuration:
+    - BaudRate = 115200 baud
+    - Word Length = 8 Bits
+    - Stop Bit = 1
+    - Parity = None
+    - Flow control = None
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the application
+ - Install the USB virtual COM port driver
+ - Find out the number of the COM port assigned to the STM32 CDC device
+ - Open a serial terminal application and start the communication
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/.extSettings b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/.extSettings
new file mode 100644
index 000000000..c853a54c3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/.extSettings
@@ -0,0 +1,12 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Application/User/Core=../Core/Src/main.c;../Core/Src/stm32g4xx_it.c;../Core/Src/stm32g4xx_hal_msp.c;../Core/Src/stm32g4xx_hal_msp.c;
+Application/User/USB_Device/App=../USB_Device/App/usbd_desc.c;../USB_Device/App/usbd_dfu_flash.c;../USB_Device/App/usb_device.c;
+Application/User/USB_Device/Target=../USB_Device/Target/usbd_conf.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/STM32G474E-EVAL_LED_Toggle_@0x0800C000.dfu b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/STM32G474E-EVAL_LED_Toggle_@0x0800C000.dfu
new file mode 100644
index 000000000..94bd816e9
Binary files /dev/null and b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/STM32G474E-EVAL_LED_Toggle_@0x0800C000.dfu differ
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/readme.txt
new file mode 100644
index 000000000..96eb2f742
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/readme.txt
@@ -0,0 +1,45 @@
+/**
+  @page Binary Description of the binary template
+
+  @verbatim
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/Core/Binary/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the USB DFU application binary file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This directory contains a binary template (in DFU format) to be loaded into Flash memory using Device
+Firmware Upgrade application.
+
+This file was converted to the DFU format using the "DFU File Manager Tool" included in the "DfuSe" PC software install.
+For more details on how to convert a .bin file to DFU format please refer to the UM0412 user manual
+"Getting started with DfuSe USB device firmware upgrade STMicroelectronics extension" available from the
+STMicroelectronics microcontroller website www.st.com.
+
+This binary is a simple LED toggling.
+The system Timer (Systick) is used to generate the delay.
+The offset address of this binary is 0x0800C000 which matches the definition in DFU application
+"USBD_DFU_APP_DEFAULT_ADD".
+
+
+@par Hardware and Software environment
+
+  - This example runs on stm32g4xx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/main.h
new file mode 100644
index 000000000..00a87ac7c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/main.h
@@ -0,0 +1,75 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/Core/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include "stm32g474e_eval_conf.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_dfu.h"
+#include "usbd_dfu_flash.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+#define BUTTON_KEY                      BUTTON_USER
+#define BUTTON_KEY_PIN                  USER_BUTTON_PIN
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..afd401747
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..9cc21a503
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USB_LP_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/main.c
new file mode 100644
index 000000000..defa68d8c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/main.c
@@ -0,0 +1,240 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/Core/Src/main.c
+  * @author  MCD Application Team
+  * @brief   USB device DFU demo main file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  pFunction JumpToApplication;
+  uint32_t JumpAddress;
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+ /* Configure User push-button */
+  BSP_PB_Init(BUTTON_KEY, BUTTON_MODE_GPIO);
+
+  /* Check if the User push-button is pressed */
+  if (BSP_PB_GetState(BUTTON_KEY) != GPIO_PIN_RESET)
+  {
+    /* Test if user code is programmed starting from address 0x0800C000 */
+    if (((*(__IO uint32_t *) USBD_DFU_APP_DEFAULT_ADD) & 0x2FFC0000) ==
+        0x20000000)
+    {
+      /* Jump to user application */
+      JumpAddress = *(__IO uint32_t *) (USBD_DFU_APP_DEFAULT_ADD + 4);
+      JumpToApplication = (pFunction) JumpAddress;
+
+      /* Initialize user application's Stack Pointer */
+      __set_MSP(*(__IO uint32_t *) USBD_DFU_APP_DEFAULT_ADD);
+      JumpToApplication();
+    }
+  }
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USB_Device_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = 64;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief This function provides accurate delay (in milliseconds) based
+  * on SysTick counter flag.
+  * @note This function is declared as __weak to be overwritten in case of other
+  * implementations in user file.
+  * @param Delay: specifies the delay time length, in milliseconds.
+  * @retval None
+  */
+void HAL_Delay(__IO uint32_t Delay)
+{
+  while (Delay)
+  {
+    if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+    {
+      Delay--;
+    }
+  }
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..afd77d1fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,88 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  *          This file provides code for the MSP Initialization
+  *          and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..76291b444
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c
@@ -0,0 +1,222 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_FS;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles USB low priority interrupt remap.
+  */
+void USB_LP_IRQHandler(void)
+{
+  /* USER CODE BEGIN USB_LP_IRQn 0 */
+
+  /* USER CODE END USB_LP_IRQn 0 */
+  HAL_PCD_IRQHandler(&hpcd_USB_FS);
+  /* USER CODE BEGIN USB_LP_IRQn 1 */
+
+  /* USER CODE END USB_LP_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(BUTTON_KEY_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/DFU_Standalone.ioc b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/DFU_Standalone.ioc
new file mode 100644
index 000000000..affa84dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/DFU_Standalone.ioc
@@ -0,0 +1,162 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USB
+Mcu.IP4=USB_DEVICE
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA11
+Mcu.Pin1=PA12
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_USB_DEVICE_VS_USB_DEVICE_DFU_FS
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.USB_LP_IRQn=true\:6\:0\:true\:false\:true\:false\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA11.Mode=Device
+PA11.Signal=USB_DM
+PA12.Mode=Device
+PA12.Signal=USB_DP
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x1000
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=DFU_Standalone.ioc
+ProjectManager.ProjectName=DFU_Standalone
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x1000
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USB_Device_Init-USB_DEVICE-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+USB.DeviceSpeed=PCD_SPEED_FULL
+USB.IPParameters=DeviceSpeed,phy_itface,Sof_enable,low_power_enable,lpm_enable,battery_charging_enable
+USB.Sof_enable=DISABLE
+USB.battery_charging_enable=DISABLE
+USB.low_power_enable=DISABLE
+USB.lpm_enable=DISABLE
+USB.phy_itface=PCD_PHY_EMBEDDED
+USB_DEVICE.CLASS_NAME_FS=DFU
+USB_DEVICE.CONFIGURATION_STRING_DFU_FS=DFU Config
+USB_DEVICE.INTERFACE_STRING_DFU_FS=DFU Interface
+USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,USBD_MAX_NUM_INTERFACES,USBD_MAX_STR_DESC_SIZ,VID,USBD_MAX_NUM_CONFIGURATION,USBD_DFU_MAX_ITF_NUM,USBD_DFU_XFER_SIZE,USBD_DFU_MEDIA,PRODUCT_STRING_DFU_FS,PID_DFU_FS,USBD_DFU_APP_DEFAULT_ADD,USBD_LPM_ENABLED,USBD_SUPPORT_USER_STRING_DESC,USBD_SELF_POWERED,USBD_DEBUG_LEVEL,LANGID_STRING,MANUFACTURER_STRING,CONFIGURATION_STRING_DFU_FS,INTERFACE_STRING_DFU_FS
+USB_DEVICE.IPParametersWithoutCheck=USBD_DFU_XFER_SIZE,USBD_MAX_NUM_CONFIGURATION,USBD_DFU_APP_DEFAULT_ADD,USBD_DFU_MAX_ITF_NUM,USBD_MAX_STR_DESC_SIZ,USBD_MAX_NUM_INTERFACES
+USB_DEVICE.LANGID_STRING=1033
+USB_DEVICE.MANUFACTURER_STRING=STMicroelectronics
+USB_DEVICE.PID_DFU_FS=0xdf11
+USB_DEVICE.PRODUCT_STRING_DFU_FS=DFU in FS Mode
+USB_DEVICE.USBD_DEBUG_LEVEL=0
+USB_DEVICE.USBD_DFU_APP_DEFAULT_ADD=0x0800C000
+USB_DEVICE.USBD_DFU_MAX_ITF_NUM=1
+USB_DEVICE.USBD_DFU_MEDIA=@Internal Flash   /0x08000000/8*02Ka,248*02Kg
+USB_DEVICE.USBD_DFU_XFER_SIZE=1024
+USB_DEVICE.USBD_LPM_ENABLED=0
+USB_DEVICE.USBD_MAX_NUM_CONFIGURATION=1
+USB_DEVICE.USBD_MAX_NUM_INTERFACES=1
+USB_DEVICE.USBD_MAX_STR_DESC_SIZ=48
+USB_DEVICE.USBD_SELF_POWERED=1
+USB_DEVICE.USBD_SUPPORT_USER_STRING_DESC=1
+USB_DEVICE.VID=0x483
+USB_DEVICE.VirtualMode=Dfu
+USB_DEVICE.VirtualModeFS=Dfu_FS
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_USB_DEVICE_VS_USB_DEVICE_DFU_FS.Mode=DFU_FS
+VP_USB_DEVICE_VS_USB_DEVICE_DFU_FS.Signal=USB_DEVICE_VS_USB_DEVICE_DFU_FS
+board=STM32G474E_EVAL1
+ProjectManager.Example=DFU_Standalone
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewd b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewd
new file mode 100644
index 000000000..4929930d5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>DFU_Standalone</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewp b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewp
new file mode 100644
index 000000000..e4efe03a3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewp
@@ -0,0 +1,1202 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>DFU_Standalone</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>DFU_Standalone/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>DFU_Standalone/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>DFU_Standalone/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../USB_Device/App</state>
+          <state>$PROJ_DIR$/../USB_Device/Target</state>
+          <state>$PROJ_DIR$/../Core/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
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+          <name>OOCOutputFile</name>
+          <state>DFU_Standalone.hex</state>
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+          <name>OOCCommandLineProducer</name>
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+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
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+      <name>CUSTOM</name>
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+        <cmdline></cmdline>
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+      <name>BICOMP</name>
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+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
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+    </settings>
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+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
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+          <state>1</state>
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+          <name>XLinkMisraHandler</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkOutputFile</name>
+          <state>DFU_Standalone.out</state>
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+          <name>IlinkDebugInfoEnable</name>
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+          <state></state>
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+          <name>IlinkRawBinarySegment</name>
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+          <name>IlinkRawBinaryAlign</name>
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+          <state></state>
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+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
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+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
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+          <name>IlinkLogFile</name>
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+        <option>
+          <name>IlinkLogInitialization</name>
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+          <name>IlinkLogModule</name>
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+          <name>IlinkLogSection</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
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+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
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+          <name>IlinkSuppressDiags</name>
+          <state></state>
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+          <name>IlinkTreatAsRem</name>
+          <state></state>
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+          <name>IlinkTreatAsWarn</name>
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+          <name>IlinkTreatAsErr</name>
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+          <name>IlinkWarningsAreErrors</name>
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+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
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+          <name>IlinkExtraOptions</name>
+          <state></state>
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+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
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+          <name>IlinkAdditionalLibs</name>
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+          <name>IlinkOverrideProgramEntryLabel</name>
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+          <name>IlinkProgramEntryLabelSelect</name>
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+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
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+          <name>DoFill</name>
+          <state>0</state>
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+          <name>FillerByte</name>
+          <state>0xFF</state>
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+          <name>FillerStart</name>
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+          <state>0x0</state>
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+          <name>CrcSize</name>
+          <version>0</version>
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+          <name>CrcPoly</name>
+          <state>0x11021</state>
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+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
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+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
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+          <name>CrcInitialValue</name>
+          <state>0x0</state>
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+          <name>DoCrc</name>
+          <state>0</state>
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+          <name>IlinkBE8Slave</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
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+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
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+          <name>IlinkCmsis</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
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+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
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+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
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+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <group>
+        <name>Core</name>
+        <file>
+          <name>$PROJ_DIR$/../Core/Src/main.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../Core/Src/stm32g4xx_it.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../Core/Src/stm32g4xx_hal_msp.c</name>
+        </file>
+      </group>
+      <group>
+        <name>USB_Device</name>
+        <group>
+          <name>App</name>
+          <file>
+            <name>$PROJ_DIR$/../USB_Device/App/usbd_desc.c</name>
+          </file>
+          <file>
+            <name>$PROJ_DIR$/../USB_Device/App/usbd_dfu_flash.c</name>
+          </file>
+          <file>
+            <name>$PROJ_DIR$/../USB_Device/App/usb_device.c</name>
+          </file>
+        </group>
+        <group>
+          <name>Target</name>
+          <file>
+            <name>$PROJ_DIR$/../USB_Device/Target/usbd_conf.c</name>
+          </file>
+        </group>
+      </group>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Core/Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>USB_Device_Library</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Src/usbd_dfu.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/Project.eww
new file mode 100644
index 000000000..f7034771e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\DFU_Standalone.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..066fa1d35
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvoptx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvoptx
new file mode 100644
index 000000000..3ed104527
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvoptx
@@ -0,0 +1,789 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>DFU_Standalone</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>150000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U005200303137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User/Core</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Core/Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Core/Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Core/Src/stm32g4xx_hal_msp.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_msp.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User/USB_Device/App</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>5</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../USB_Device/App/usbd_desc.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_desc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>6</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../USB_Device/App/usbd_dfu_flash.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_dfu_flash.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>7</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../USB_Device/App/usb_device.c</PathWithFileName>
+      <FilenameWithoutPath>usb_device.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User/USB_Device/Target</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>8</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../USB_Device/Target/usbd_conf.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_conf.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Doc</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>9</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../readme.txt</PathWithFileName>
+      <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/BSP/Components</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>10</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</PathWithFileName>
+      <FilenameWithoutPath>mfxstm32l152_reg.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>11</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</PathWithFileName>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvprojx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvprojx
new file mode 100644
index 000000000..f46244aed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvprojx
@@ -0,0 +1,662 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
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+      <TargetName>DFU_Standalone</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+      <uAC6>0</uAC6>
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+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
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+          <SLE66AMisc></SLE66AMisc>
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+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>DFU_Standalone\</OutputDirectory>
+          <OutputName>DFU_Standalone</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
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+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
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+            <UserProg1Name></UserProg1Name>
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+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
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+              <IncludePath>../USB_Device/App;../USB_Device/Target;../Core/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Inc;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
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+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
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+              <FilePath>../readme.txt</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
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+              <FileName>usbd_ioreq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_dfu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Src/usbd_dfu.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="DFU_Standalone"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..d51d2e681
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x1000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x1000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..89720927b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.cproject
@@ -0,0 +1,181 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1193239124">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1193239124" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1193239124" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1193239124." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.819201508" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
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+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1740417997" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.837921223" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1851246299" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.276426127" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.169605913" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.2017468155" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.585653749" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1370351533" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1425136878" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.2130932170" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.152481571" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="DFU_Standalone.null.1717271456" name="DFU_Standalone"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1193239124;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1193239124.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1707627541;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1920775839">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.518214849;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.518214849.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.576886836;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1843971991">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.project
new file mode 100644
index 000000000..71139cfee
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.project
@@ -0,0 +1,246 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>DFU_Standalone</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>DFU_Standalone.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/DFU_Standalone.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_usb.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_core.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_ctlreq.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_dfu.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Src/usbd_dfu.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_ioreq.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usb_device.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usb_device.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usbd_desc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_desc.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usbd_dfu_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_dfu_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/Target/usbd_conf.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/Target/usbd_conf.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..0cccfacf0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      LinkerScript.ld
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     Linker script for STM32G474QETx Device from STM32G4 series
+ *                      512Kbytes FLASH
+ *                      128Kbytes RAM
+ *
+ *            Set heap size, stack size and stack location according
+ *            to application requirements.
+ *
+ *            Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x1000;	/* required amount of heap  */
+_Min_Stack_Size = 0x1000;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.c
new file mode 100644
index 000000000..c51b21b03
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.c
@@ -0,0 +1,131 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/USB_Device/App/usb_device.c
+  * @author  MCD Application Team
+  * @brief   This file implements the USB Device
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "usb_device.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_dfu.h"
+#include "usbd_dfu_flash.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+extern void Error_Handler(void);
+/* USB Device Core handle declaration. */
+USBD_HandleTypeDef hUsbDeviceFS;
+extern USBD_DescriptorsTypeDef DFU_Desc;
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*
+ * -- Insert your external function declaration here --
+ */
+/* USER CODE BEGIN 1 */
+void USBD_Clock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
+
+  /* Enable HSI48 */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
+  {
+    Error_Handler();
+  }
+  /*Configure the clock recovery system (CRS)**********************************/
+
+  /*Enable CRS Clock*/
+  __HAL_RCC_CRS_CLK_ENABLE();
+
+  /* Default Synchro Signal division factor (not divided) */
+  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+  /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+  /* HSI48 is synchronized with USB SOF at 1KHz rate */
+  RCC_CRSInitStruct.ReloadValue =  __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+  RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+  /* Set the TRIM[5:0] to the default value */
+  RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+  /* Start automatic synchronization */
+  HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
+}
+/* USER CODE END 1 */
+
+/**
+  * Init USB device Library, add supported class and start the library
+  * @retval None
+  */
+void MX_USB_Device_Init(void)
+{
+  /* USER CODE BEGIN USB_Device_Init_PreTreatment */
+  /* Enable USB Device clock */
+  USBD_Clock_Config();
+  /* USER CODE END USB_Device_Init_PreTreatment */
+
+  /* Init Device Library, add supported class and start the library. */
+  if (USBD_Init(&hUsbDeviceFS, &DFU_Desc, DEVICE_FS) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_DFU) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_DFU_RegisterMedia(&hUsbDeviceFS, &USBD_DFU_Flash_fops) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_Start(&hUsbDeviceFS) != USBD_OK) {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USB_Device_Init_PostTreatment */
+
+  /* USER CODE END USB_Device_Init_PostTreatment */
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.h
new file mode 100644
index 000000000..a312c5197
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.h
@@ -0,0 +1,103 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/DFU_Standalone/USB_Device/App/usb_device.h
+  * @author         MCD Application Team
+  * @brief          Header for usb_device.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_DEVICE__H__
+#define __USB_DEVICE__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+  * @{
+  */
+
+/** @defgroup USBD_DEVICE USBD_DEVICE
+  * @brief Device file for Usb otg low level driver.
+  * @{
+  */
+
+/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN VARIABLES */
+
+/* USER CODE END VARIABLES */
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype
+  * @brief Declaration of public functions for Usb device.
+  * @{
+  */
+
+/** USB Device initialization function. */
+void MX_USB_Device_Init(void);
+
+/*
+ * -- Insert functions declaration here --
+ */
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DEVICE__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c
new file mode 100644
index 000000000..4fb775c17
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c
@@ -0,0 +1,398 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c
+  * @author         MCD Application Team
+  * @brief          This file implements the USB device descriptors.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_conf.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBD_DESC
+  * @{
+  */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions
+  * @brief Private types.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines
+  * @brief Private defines.
+  * @{
+  */
+
+#define USBD_VID     0x483
+#define USBD_LANGID_STRING     1033
+#define USBD_MANUFACTURER_STRING     "STMicroelectronics"
+#define USBD_PID     0xdf11
+#define USBD_PRODUCT_STRING     "DFU in FS Mode"
+#define USBD_CONFIGURATION_STRING     "DFU Config"
+#define USBD_INTERFACE_STRING     "DFU Interface"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+  * @}
+  */
+
+/* USER CODE BEGIN 0 */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+static void Get_SerialNum(void);
+uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ];
+/* USER CODE END 0 */
+
+/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros
+  * @brief Private macros.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+static void Get_SerialNum(void);
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+uint8_t * USBD_DFU_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+
+USBD_DescriptorsTypeDef DFU_Desc =
+{
+  USBD_DFU_DeviceDescriptor,
+  USBD_DFU_LangIDStrDescriptor,
+  USBD_DFU_ManufacturerStrDescriptor,
+  USBD_DFU_ProductStrDescriptor,
+  USBD_DFU_SerialStrDescriptor,
+  USBD_DFU_ConfigStrDescriptor,
+  USBD_DFU_InterfaceStrDescriptor
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/** USB standard device descriptor. */
+__ALIGN_BEGIN uint8_t USBD_DFU_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
+{
+  0x12,                       /*bLength */
+  USB_DESC_TYPE_DEVICE,       /*bDescriptorType*/
+  0x00,                       /*bcdUSB */
+  0x02,
+  0x00,                       /*bDeviceClass*/
+  0x00,                       /*bDeviceSubClass*/
+  0x00,                       /*bDeviceProtocol*/
+  USB_MAX_EP0_SIZE,           /*bMaxPacketSize*/
+  LOBYTE(USBD_VID),           /*idVendor*/
+  HIBYTE(USBD_VID),           /*idVendor*/
+  LOBYTE(USBD_PID),           /*idProduct*/
+  HIBYTE(USBD_PID),           /*idProduct*/
+  0x00,                       /*bcdDevice rel. 2.00*/
+  0x02,
+  USBD_IDX_MFC_STR,           /*Index of manufacturer  string*/
+  USBD_IDX_PRODUCT_STR,       /*Index of product string*/
+  USBD_IDX_SERIAL_STR,        /*Index of serial number string*/
+  USBD_MAX_NUM_CONFIGURATION  /*bNumConfigurations*/
+};
+
+/* USB_DeviceDescriptor */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+
+/** USB lang identifier descriptor. */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
+{
+     USB_LEN_LANGID_STR_DESC,
+     USB_DESC_TYPE_STRING,
+     LOBYTE(USBD_LANGID_STRING),
+     HIBYTE(USBD_LANGID_STRING)
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/* Internal string descriptor. */
+__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = {
+  USB_SIZ_STRING_SERIAL,
+  USB_DESC_TYPE_STRING,
+};
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions
+  * @brief Private functions.
+  * @{
+  */
+
+/**
+  * @brief  Return the device descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_DFU_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = sizeof(USBD_DFU_DeviceDesc);
+  return USBD_DFU_DeviceDesc;
+}
+
+/**
+  * @brief  Return the LangID string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_DFU_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = sizeof(USBD_LangIDDesc);
+  return USBD_LangIDDesc;
+}
+
+/**
+  * @brief  Return the product string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_DFU_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == 0)
+  {
+    USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the manufacturer string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_DFU_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the serial number string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_DFU_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = USB_SIZ_STRING_SERIAL;
+
+  /* Update the serial number string descriptor with the data from the unique
+   * ID */
+  Get_SerialNum();
+
+  /* USER CODE BEGIN USBD_DFU_SerialStrDescriptor */
+
+  /* USER CODE END USBD_DFU_SerialStrDescriptor */
+
+  return (uint8_t *) USBD_StringSerial;
+}
+
+/**
+  * @brief  Return the configuration string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_DFU_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == USBD_SPEED_HIGH)
+  {
+    USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the interface string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_DFU_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == 0)
+  {
+    USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Create the serial number string descriptor
+  * @param  None
+  * @retval None
+  */
+static void Get_SerialNum(void)
+{
+  uint32_t deviceserial0;
+  uint32_t deviceserial1;
+  uint32_t deviceserial2;
+
+  deviceserial0 = *(uint32_t *) DEVICE_ID1;
+  deviceserial1 = *(uint32_t *) DEVICE_ID2;
+  deviceserial2 = *(uint32_t *) DEVICE_ID3;
+
+  deviceserial0 += deviceserial2;
+
+  if (deviceserial0 != 0)
+  {
+    IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
+    IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
+  }
+}
+
+/**
+  * @brief  Convert Hex 32Bits value into char
+  * @param  value: value to convert
+  * @param  pbuf: pointer to the buffer
+  * @param  len: buffer length
+  * @retval None
+  */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
+{
+  uint8_t idx = 0;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    if (((value >> 28)) < 0xA)
+    {
+      pbuf[2 * idx] = (value >> 28) + '0';
+    }
+    else
+    {
+      pbuf[2 * idx] = (value >> 28) + 'A' - 10;
+    }
+
+    value = value << 4;
+
+    pbuf[2 * idx + 1] = 0;
+  }
+}
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h
new file mode 100644
index 000000000..4d4648f3e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_desc.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DESC__C__
+#define __USBD_DESC__C__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @{
+  */
+
+/** @defgroup USBD_DESC USBD_DESC
+  * @brief Usb device descriptors module.
+  * @{
+  */
+
+/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants
+  * @brief Constants.
+  * @{
+  */
+#define         DEVICE_ID1          (UID_BASE)
+#define         DEVICE_ID2          (UID_BASE + 0x4)
+#define         DEVICE_ID3          (UID_BASE + 0x8)
+
+#define         USB_SIZ_STRING_SERIAL       0x1A
+
+/* USER CODE BEGIN EXPORTED_CONSTANTS */
+
+/* USER CODE END EXPORTED_CONSTANTS */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines
+  * @brief Defines.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions
+  * @brief Types.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+extern USBD_DescriptorsTypeDef     DFU_Desc;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype
+  * @brief Public functions declaration.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DESC__C__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c
new file mode 100644
index 000000000..b156c8cea
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c
@@ -0,0 +1,361 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c
+  * @author         MCD Application Team
+  * @brief          Memory management layer
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_dfu_flash.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @brief Usb device.
+  * @{
+  */
+
+/** @defgroup USBD_DFU
+  * @brief Usb DFU device module.
+  * @{
+  */
+
+/** @defgroup USBD_DFU_Private_TypesDefinitions
+  * @brief Private types.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DFU_Private_Defines
+  * @brief Private defines.
+  * @{
+  */
+
+#define FLASH_DESC_STR      "@Internal Flash   /0x08000000/8*02Ka,248*02Kg"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+#define FLASH_ERASE_TIME    (uint16_t)50
+#define FLASH_PROGRAM_TIME  (uint16_t)50
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DFU_Private_Macros
+  * @brief Private macros.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DFU_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_VARIABLES */
+
+/* USER CODE END PRIVATE_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DFU_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+extern USBD_HandleTypeDef hUsbDeviceFS;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DFU_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+static uint16_t FLASH_If_Init(void);
+static uint16_t FLASH_If_Erase(uint32_t Add);
+static uint16_t FLASH_If_Write(uint8_t *src, uint8_t *dest, uint32_t Len);
+static uint8_t *FLASH_If_Read(uint8_t *src, uint8_t *dest, uint32_t Len);
+static uint16_t FLASH_If_DeInit(void);
+static uint16_t FLASH_If_GetStatus(uint32_t Add, uint8_t Cmd, uint8_t *buffer);
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
+static uint32_t GetPage(uint32_t Address);
+static uint32_t GetBank(uint32_t Address);
+/* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */
+
+/**
+  * @}
+  */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN USBD_DFU_MediaTypeDef USBD_DFU_Flash_fops __ALIGN_END =
+{
+   (uint8_t*)FLASH_DESC_STR,
+    FLASH_If_Init,
+    FLASH_If_DeInit,
+    FLASH_If_Erase,
+    FLASH_If_Write,
+    FLASH_If_Read,
+    FLASH_If_GetStatus
+};
+
+/* Private functions ---------------------------------------------------------*/
+/**
+  * @brief  Memory initialization routine.
+  * @retval USBD_OK if operation is successful, MAL_FAIL else.
+  */
+uint16_t FLASH_If_Init(void)
+{
+  /* USER CODE BEGIN 0 */
+  /* Unlock the internal flash */
+  HAL_FLASH_Unlock();
+
+  return 0;
+  /* USER CODE END 0 */
+}
+
+/**
+  * @brief  De-Initializes Memory
+  * @retval USBD_OK if operation is successful, MAL_FAIL else
+  */
+uint16_t FLASH_If_DeInit(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* Lock the internal flash */
+  HAL_FLASH_Lock();
+
+  return 0;
+  /* USER CODE END 1 */
+}
+
+/**
+  * @brief  Erase sector.
+  * @param  Add: Address of sector to be erased.
+  * @retval 0 if operation is successful, MAL_FAIL else.
+  */
+uint16_t FLASH_If_Erase(uint32_t Add)
+{
+  /* USER CODE BEGIN 2 */
+  FLASH_EraseInitTypeDef eraseinitstruct;
+  uint32_t PageError = 0U;
+  HAL_StatusTypeDef status;
+
+
+  /* Unlock the Flash to enable the flash control register access */
+  HAL_FLASH_Unlock();
+
+  /* Clear OPTVERR bit set on virgin samples */
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+  /* Get the number of sector to erase from 1st sector */
+  eraseinitstruct.TypeErase = FLASH_TYPEERASE_PAGES;
+  eraseinitstruct.Banks = GetBank(Add);
+  eraseinitstruct.Page = GetPage(Add);
+  eraseinitstruct.NbPages = 1U;
+  status = HAL_FLASHEx_Erase(&eraseinitstruct, &PageError);
+
+  if (status != HAL_OK)
+  {
+    return 1U;
+  }
+  return 0U;
+  /* USER CODE END 2 */
+}
+
+/**
+  * @brief  Memory write routine.
+  * @param  src: Pointer to the source buffer. Address to be written to.
+  * @param  dest: Pointer to the destination buffer.
+  * @param  Len: Number of data to be written (in bytes).
+  * @retval USBD_OK if operation is successful, MAL_FAIL else.
+  */
+uint16_t FLASH_If_Write(uint8_t *src, uint8_t *dest, uint32_t Len)
+{
+  /* USER CODE BEGIN 3 */
+  uint32_t i = 0;
+
+  /* Clear OPTVERR bit set on virgin samples */
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+  for (i = 0; i < Len; i += 8)
+  {
+    /* Device voltage range supposed to be [2.7V to 3.6V], the operation will
+     * be done by byte */
+    if (HAL_FLASH_Program
+        (FLASH_TYPEPROGRAM_DOUBLEWORD, (uint32_t) (dest + i),
+         *(uint64_t *) (src + i)) == HAL_OK)
+    {
+      /* Check the written value */
+      if (*(uint64_t *) (src + i) != *(uint64_t *) (dest + i))
+      {
+        /* Flash content doesn't match SRAM content */
+        return 2;
+      }
+    }
+    else
+    {
+      /* Error occurred while writing data in Flash memory */
+      return 1;
+    }
+  }
+  return 0;
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief  Memory read routine.
+  * @param  src: Pointer to the source buffer. Address to be written to.
+  * @param  dest: Pointer to the destination buffer.
+  * @param  Len: Number of data to be read (in bytes).
+  * @retval Pointer to the physical address where data should be read.
+  */
+uint8_t *FLASH_If_Read(uint8_t *src, uint8_t *dest, uint32_t Len)
+{
+  /* Return a valid address to avoid HardFault */
+  /* USER CODE BEGIN 4 */
+  uint32_t i = 0;
+  uint8_t *psrc = src;
+
+  for (i = 0; i < Len; i++)
+  {
+    dest[i] = *psrc++;
+  }
+  /* Return a valid address to avoid HardFault */
+  return (uint8_t *) (dest);
+
+  /* USER CODE END 4 */
+}
+
+/**
+  * @brief  Get status routine
+  * @param  Add: Address to be read from
+  * @param  Cmd: Number of data to be read (in bytes)
+  * @param  buffer: used for returning the time necessary for a program or an erase operation
+  * @retval USBD_OK if operation is successful
+  */
+uint16_t FLASH_If_GetStatus(uint32_t Add, uint8_t Cmd, uint8_t *buffer)
+{
+  /* USER CODE BEGIN 5 */
+  switch (Cmd)
+  {
+  case DFU_MEDIA_PROGRAM:
+    buffer[1] = (uint8_t)FLASH_PROGRAM_TIME;
+    buffer[2] = (uint8_t)(FLASH_PROGRAM_TIME << 8);
+    buffer[3] = 0;
+    break;
+
+  case DFU_MEDIA_ERASE:
+  default:
+    buffer[1] = (uint8_t)FLASH_ERASE_TIME;
+    buffer[2] = (uint8_t)(FLASH_ERASE_TIME << 8);
+    buffer[3] = 0;
+    break;
+  }
+  return (USBD_OK);
+  /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */
+/**
+  * @brief  Gets the page of a given address
+  * @param  Address: Address of the FLASH Memory
+  * @retval The page of a given address
+  */
+static uint32_t GetPage(uint32_t Address)
+{
+  uint32_t page = 0U;
+
+  if (Address < (FLASH_BASE + FLASH_BANK_SIZE))
+  {
+    /* Bank 1 */
+    page = (Address - FLASH_BASE) / FLASH_PAGE_SIZE;
+  }
+  else
+  {
+    /* Bank 2 */
+    page = (Address - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
+  }
+
+  return page;
+}
+/**
+  * @brief  Gets the Bank of a given address
+  * @param  Address: Address of the FLASH Memory
+  * @retval The Flash bank of a given address
+  */
+static uint32_t GetBank(uint32_t Address)
+{
+  uint32_t bank = 0U;
+
+  if (Address < (FLASH_BASE + FLASH_BANK_SIZE))
+  {
+    /* Bank 1 */
+    bank = FLASH_BANK_1;
+  }
+  else
+  {
+    /* Bank 2 */
+    bank = FLASH_BANK_2;
+  }
+
+  return bank;
+}
+/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h
new file mode 100644
index 000000000..5d03e9404
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h
@@ -0,0 +1,127 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_dfu_flash.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DFU_FLASH_H__
+#define __USBD_DFU_FLASH_H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_dfu.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_DEVICE_LIBRARY
+  * @brief For Usb device.
+  * @{
+  */
+
+/** @defgroup USBD_MEDIA USBD_MEDIA
+  * @brief Header file for the usbd_dfu_flash.h file.
+  * @{
+  */
+
+/** @defgroup USBD_MEDIA_Exported_Defines USBD_MEDIA_Exported_Defines
+  * @brief Defines.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_MEDIA_Exported_Types USBD_MEDIA_Exported_Types
+  * @brief Types.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_MEDIA_Exported_Macros USBD_MEDIA_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_MEDIA_Exported_Variables USBD_MEDIA_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/** MEDIA Interface callback. */
+extern USBD_DFU_MediaTypeDef USBD_DFU_Flash_fops;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_MEDIA_Exported_FunctionsPrototype USBD_MEDIA_Exported_FunctionsPrototype
+  * @brief Public functions declaration.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DFU_FLASH_H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c
new file mode 100644
index 000000000..9f94bcf81
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c
@@ -0,0 +1,721 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c
+  * @author         MCD Application Team
+  * @brief          This file implements the board support package for the USB device library
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+#include "usbd_core.h"
+
+#include "usbd_dfu.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+PCD_HandleTypeDef hpcd_USB_FS;
+void Error_Handler(void);
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported function prototypes ----------------------------------------------*/
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+ extern void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+/* Private functions ---------------------------------------------------------*/
+static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status);
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+extern void SystemClock_Config(void);
+
+/*******************************************************************************
+                       LL Driver Callbacks (PCD -> USB Device Library)
+*******************************************************************************/
+/* MSP Init */
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  if(pcdHandle->Instance==USB)
+  {
+  /* USER CODE BEGIN USB_MspInit 0 */
+
+  /* USER CODE END USB_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_USB_CLK_ENABLE();
+
+    /* Peripheral interrupt init */
+    HAL_NVIC_SetPriority(USB_LP_IRQn, 6, 0);
+    HAL_NVIC_EnableIRQ(USB_LP_IRQn);
+  /* USER CODE BEGIN USB_MspInit 1 */
+
+  /* USER CODE END USB_MspInit 1 */
+  }
+}
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  if(pcdHandle->Instance==USB)
+  {
+  /* USER CODE BEGIN USB_MspDeInit 0 */
+
+  /* USER CODE END USB_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USB_CLK_DISABLE();
+
+    /* Peripheral interrupt Deinit*/
+    HAL_NVIC_DisableIRQ(USB_LP_IRQn);
+
+  /* USER CODE BEGIN USB_MspDeInit 1 */
+    __HAL_RCC_GPIOA_CLK_DISABLE();
+  /* USER CODE END USB_MspDeInit 1 */
+  }
+}
+
+/**
+  * @brief  Setup stage callback
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PreTreatment */
+
+  /* USER CODE END  HAL_PCD_SetupStageCallback_PreTreatment */
+  USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
+  /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PostTreatment */
+
+  /* USER CODE END  HAL_PCD_SetupStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  Data Out stage callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DataOutStageCallback_PreTreatment */
+  USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
+  /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_DataOutStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  Data In stage callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DataInStageCallback_PreTreatment */
+  USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
+  /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PostTreatment  */
+
+  /* USER CODE END HAL_PCD_DataInStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  SOF callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SOFCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_SOFCallback_PreTreatment */
+  USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_SOFCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_SOFCallback_PostTreatment */
+}
+
+/**
+  * @brief  Reset callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ResetCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ResetCallback_PreTreatment */
+  USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
+
+  if ( hpcd->Init.speed != PCD_SPEED_FULL)
+  {
+    Error_Handler();
+  }
+    /* Set Speed. */
+  USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
+
+  /* Reset Device. */
+  USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ResetCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ResetCallback_PostTreatment */
+}
+
+/**
+  * @brief  Suspend callback.
+  * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SuspendCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_SuspendCallback_PreTreatment */
+  /* Inform USB library that core enters in suspend Mode. */
+  USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
+  /* Enter in STOP mode. */
+  /* USER CODE BEGIN 2 */
+  /* USER CODE END 2 */
+  /* USER CODE BEGIN HAL_PCD_SuspendCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_SuspendCallback_PostTreatment */
+}
+
+/**
+  * @brief  Resume callback.
+  * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ResumeCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ResumeCallback_PreTreatment */
+
+  /* USER CODE BEGIN 3 */
+  /* USER CODE END 3 */
+
+  USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ResumeCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ResumeCallback_PostTreatment */
+}
+
+/**
+  * @brief  ISOOUTIncomplete callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+  USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+  /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+}
+
+/**
+  * @brief  ISOINIncomplete callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+  USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+  /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+}
+
+/**
+  * @brief  Connect callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ConnectCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ConnectCallback_PreTreatment */
+  USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ConnectCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ConnectCallback_PostTreatment */
+}
+
+/**
+  * @brief  Disconnect callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DisconnectCallback_PreTreatment */
+  USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_DisconnectCallback_PostTreatment */
+}
+
+  /* USER CODE BEGIN LowLevelInterface */
+
+  /* USER CODE END LowLevelInterface */
+
+/*******************************************************************************
+                       LL Driver Interface (USB Device Library --> PCD)
+*******************************************************************************/
+
+/**
+  * @brief  Initializes the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
+{
+  /* Init USB Ip. */
+  hpcd_USB_FS.pData = pdev;
+  /* Link the driver to the stack. */
+  pdev->pData = &hpcd_USB_FS;
+
+  hpcd_USB_FS.Instance = USB;
+  hpcd_USB_FS.Init.dev_endpoints = 8;
+  hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
+  hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+  hpcd_USB_FS.Init.Sof_enable = DISABLE;
+  hpcd_USB_FS.Init.low_power_enable = DISABLE;
+  hpcd_USB_FS.Init.lpm_enable = DISABLE;
+  hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
+
+  #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+  /* register Msp Callbacks (before the Init) */
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPINIT_CB_ID, PCD_MspInit);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPDEINIT_CB_ID, PCD_MspDeInit);
+  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+  if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+  /* Register USB PCD CallBacks */
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SOF_CB_ID, PCD_SOFCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SETUPSTAGE_CB_ID, PCD_SetupStageCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESET_CB_ID, PCD_ResetCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SUSPEND_CB_ID, PCD_SuspendCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESUME_CB_ID, PCD_ResumeCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_CONNECT_CB_ID, PCD_ConnectCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_DISCONNECT_CB_ID, PCD_DisconnectCallback);
+  /* USER CODE BEGIN RegisterCallBackFirstPart */
+
+  /* USER CODE END RegisterCallBackFirstPart */
+  HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_FS, PCD_DataOutStageCallback);
+  HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
+  HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
+  HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
+  /* USER CODE BEGIN RegisterCallBackSecondPart */
+
+  /* USER CODE END RegisterCallBackSecondPart */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+  /* USER CODE BEGIN EndPoint_Configuration */
+  HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x08);
+  HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x48);
+  /* USER CODE END EndPoint_Configuration */
+  return USBD_OK;
+}
+
+/**
+  * @brief  De-Initializes the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_DeInit(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Starts the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_Start(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Stops the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_Stop(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Opens an endpoint of the low level driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  ep_type: Endpoint type
+  * @param  ep_mps: Endpoint max packet size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Closes an endpoint of the low level driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Flushes an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Sets a Stall condition on an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Clears a Stall condition on an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Returns Stall condition.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval Stall (1: Yes, 0: No)
+  */
+uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
+
+  if((ep_addr & 0x80) == 0x80)
+  {
+    return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
+  }
+  else
+  {
+    return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
+  }
+}
+
+/**
+  * @brief  Assigns a USB address to the device.
+  * @param  pdev: Device handle
+  * @param  dev_addr: Device address
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Transmits data over an endpoint.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  pbuf: Pointer to data to be sent
+  * @param  size: Data size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Prepares an endpoint for reception.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  pbuf: Pointer to data to be received
+  * @param  size: Data size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Returns the last transferred packet size.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval Received Data Size
+  */
+uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
+}
+
+/**
+  * @brief  Delays routine for the USB Device Library.
+  * @param  Delay: Delay in ms
+  * @retval None
+  */
+void USBD_LL_Delay(uint32_t Delay)
+{
+  HAL_Delay(Delay);
+}
+
+/**
+  * @brief  Static single allocation.
+  * @param  size: Size of allocated memory
+  * @retval None
+  */
+void *USBD_static_malloc(uint32_t size)
+{
+  static uint32_t mem[(sizeof(USBD_DFU_HandleTypeDef)/4)+1];/* On 32-bit boundary */
+  return mem;
+}
+
+/**
+  * @brief  Dummy memory free
+  * @param  p: Pointer to allocated  memory address
+  * @retval None
+  */
+void USBD_static_free(void *p)
+{
+
+}
+
+/* USER CODE BEGIN 5 */
+
+/* USER CODE END 5 */
+
+/**
+  * @brief  Returns the USB status depending on the HAL status:
+  * @param  hal_status: HAL status
+  * @retval USB status
+  */
+USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
+{
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  switch (hal_status)
+  {
+    case HAL_OK :
+      usb_status = USBD_OK;
+    break;
+    case HAL_ERROR :
+      usb_status = USBD_FAIL;
+    break;
+    case HAL_BUSY :
+      usb_status = USBD_BUSY;
+    break;
+    case HAL_TIMEOUT :
+      usb_status = USBD_FAIL;
+    break;
+    default :
+      usb_status = USBD_FAIL;
+    break;
+  }
+  return usb_status;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h
new file mode 100644
index 000000000..995316773
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h
@@ -0,0 +1,183 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_conf.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+  * @brief Driver for Usb device.
+  * @{
+  */
+
+/** @defgroup USBD_CONF USBD_CONF
+  * @brief Configuration file for Usb otg low level driver.
+  * @{
+  */
+
+/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines
+  * @brief Defines for configuration of the Usb device.
+  * @{
+  */
+
+/*---------- -----------*/
+#define USBD_MAX_NUM_INTERFACES     1U
+/*---------- -----------*/
+#define USBD_MAX_NUM_CONFIGURATION     1U
+/*---------- -----------*/
+#define USBD_MAX_STR_DESC_SIZ     48U
+/*---------- -----------*/
+#define USBD_SUPPORT_USER_STRING_DESC     1U
+/*---------- -----------*/
+#define USBD_DEBUG_LEVEL     0U
+/*---------- -----------*/
+#define USBD_LPM_ENABLED     0U
+/*---------- -----------*/
+#define USBD_SELF_POWERED     1U
+/*---------- -----------*/
+#define USBD_DFU_MAX_ITF_NUM     1U
+/*---------- -----------*/
+#define USBD_DFU_XFER_SIZE     1024U
+/*---------- -----------*/
+#define USBD_DFU_APP_DEFAULT_ADD     0x0800C000U
+
+/****************************************/
+/* #define for FS and HS identification */
+#define DEVICE_FS 		0
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* Memory management macros */
+
+/** Alias for memory allocation. */
+#define USBD_malloc         (void *)USBD_static_malloc
+
+/** Alias for memory release. */
+#define USBD_free           USBD_static_free
+
+/** Alias for memory set. */
+#define USBD_memset         memset
+
+/** Alias for memory copy. */
+#define USBD_memcpy         memcpy
+
+/** Alias for delay. */
+#define USBD_Delay          HAL_Delay
+
+/* DEBUG macros */
+
+#if (USBD_DEBUG_LEVEL > 0)
+#define USBD_UsrLog(...)    printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_UsrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 1)
+
+#define USBD_ErrLog(...)    printf("ERROR: ") ;\
+                            printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_ErrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 2)
+#define USBD_DbgLog(...)    printf("DEBUG : ") ;\
+                            printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_DbgLog(...)
+#endif
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types
+  * @brief Types.
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype
+  * @brief Declaration of public functions for Usb device.
+  * @{
+  */
+
+/* Exported functions -------------------------------------------------------*/
+void *USBD_static_malloc(uint32_t size);
+void USBD_static_free(void *p);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CONF__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/readme.txt
new file mode 100644
index 000000000..567ec71c3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/readme.txt
@@ -0,0 +1,152 @@
+/**
+  @page DFU_Standalone USB Device Firmware Upgrade (DFU) application
+
+  @verbatim
+  ******************************************************************************
+  * @file    USB_Device/DFU_Standalone/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the USB DFU application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+Compliant implementation of the Device Firmware Upgrade (DFU)
+capability to program the embedded Flash memory through the USB peripheral.
+
+
+At the beginning of the main program the HAL_Init() function is called to reset all the peripherals,
+initialize the Flash interface and the systick. The user is provided with the SystemClock_Config()
+function to configure the system clock (SYSCLK). The Full Speed (FS) USB module uses
+internally a 48-MHz clock, which is generated from an integrated PLL.
+
+The DFU transactions are based on Endpoint 0 (control endpoint) transfer. All requests and status
+control are sent/received through this endpoint.
+
+The Internal flash memory is split as follows:
+ - DFU area located in [0x08000000 : USBD_DFU_APP_DEFAULT_ADD-1]: Only read access
+ - Application area located in [USBD_DFU_APP_DEFAULT_ADD : Device's end address]: Read, Write, and Erase
+   access
+
+In this application, two operating modes are available:
+ 1. DFU operating mode:
+    This mode is entered after an MCU reset in case:
+     - The DFU mode is forced by the user: the user presses the key sw2 button.
+     - No valid code found in the application area: a code is considered valid if the MSB of the initial
+       Main Stack Pointer (MSP) value located in the first address of the application area is equal to
+       0x2000
+
+ 2. Run-time application mode:
+    This is the normal run-time activities. A binary which toggles LED1 on the STM32G474E-EVAL1 Rev B board is
+    provided in Binary directory.
+
+@note After each device reset (unplug the STM32G474E-EVAL1 Rev B board from PC), Plug the STM32G474E-EVAL1 Rev B board with Key User push-button button
+pressed to enter the DFU mode.
+
+Traditionally, firmware is stored in Hex, S19 or Binary files, but these formats do not contain the
+necessary information to perform the upgrade operation, they contain only the actual data of the program
+to be downloaded. However, the DFU operation requires more information, such as the product identifier,
+vendor identifier, Firmware version and the Alternate setting number (Target ID) of the target to be
+used, this information makes the upgrade targeted and more secure. To add this information, DFU file
+format is used. For more details refer to the "DfuSe File Format Specification" document (UM0391).
+
+To generate a DFU image, download "DFUse Demonstration" tool and use DFU File Manager to convert a
+binary image into a DFU image. This tool is for download from www.st.com
+To download a *.dfu image, use "DfuSe Demo" available within "DFUse Demonstration" install directory.
+
+Please refer to UM0412, DFuSe USB device firmware upgrade STMicroelectronics extension for more details
+on the driver installation and PC host user interface.
+
+@note A binary which toggles LED1 on the STM32G474E-EVAL1 Rev B board is provided in Binary directory.
+
+@note The application needs to ensure that the SysTick time base is set to 1 millisecond
+      to have correct HAL configuration.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The build-in USB peripheral of the stm32g4xx does not provide a specific interrupt for USB cable plug/unplug
+      detection. The correct way to detect the USB cable plug/unplug is to detect the availability of the VBUS line
+      using a normal GPIO pin (external interrupt line).
+
+
+@par USB Library Configuration
+
+It is possible to fine tune needed USB Device features by modifying defines values in USBD configuration
+file �usbd_conf.h� available under the project includes directory, in a way to fit the application
+requirements, such as:
+ - USBD_DFU_APP_DEFAULT_ADD, specifying the address from where user's application will be downloaded.
+
+Device's end address is the end address of the flash memory and it is dependent on the device in use.
+
+@par Keywords
+
+Connectivity, USB_Device, USB, DFU, Firmware upgrade
+
+@par Directory contents
+
+  - USB_Device/DFU_Standalone/Core/Src/main.c                           Main program
+  - USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c         stm32g4xx system clock configuration file
+  - USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c             Interrupt handlers
+  - USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c        HAL MSP Module
+  - USB_Device/DFU_Standalone/USB_Device/App/usb_device.c               USB Device application code
+  - USB_Device/DFU_Standalone/USB_Device/App/usb_desc.c                 USB device descriptor
+  - USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c           Internal flash memory management
+  - USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c             General low level driver configuration
+  - USB_Device/DFU_Standalone/Core/Inc/main.h                           Main program header file
+  - USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h             Interrupt handlers header file
+  - USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h       HAL configuration file
+  - USB_Device/DFU_Standalone/USB_Device/App/usb_device.h               USB Device application header file
+  - USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h                USB device descriptor header file
+  - USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h           Internal flash memory management header file
+  - USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h             USB device driver Configuration file
+
+
+@par Hardware and Software environment
+
+  - This application runs on stm32g4xx devices.
+
+  - This application has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device
+    and development board.
+
+  - STM32G474E-EVAL1 Rev B board Set-up
+    - Install the DFU driver available in "DfuSe Demonstrator" installation directory
+      For Windows 8.1 and later : Update STM32 DFU device driver manually from Windows Device Manager.
+      The install of required device driver is available under:
+      "Program Files\STMicroelectronics\Software\DfuSe v3.0.5\Bin\Driver\Win8.1" directory.
+    -Connect the STM32G474E-EVAL1 Rev B board CN22 to the PC through "TYPE-C" to "Standard A" cable.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - To run the application, proceed as follows:
+   - Install "DfuSe Demonstrator"
+   - Install the DFU driver available in "DfuSe Demonstrator" installation directory
+   - For Windows 8.1 and later : Update STM32 DFU device driver manually from Windows Device Manager.
+     The install of required device driver is available under:
+     "Program Files\STMicroelectronics\Software\DfuSe v3.0.6\Bin\Driver\Win8.1" directory.
+   - Open "DfuSe Demo", choose the "stm32g474e_eval_LED_Toggle_@0x0800C000.dfu" provided in Core\Binary
+     directory, upgrade and verify to check that it is successfully downloaded.
+   - This application allows also to upload a dfu file (either the provided DFU file or by creating a new dfu file).
+     To check that the upload was successfully performed, choose the dfu uploaded file, upgrade and verify.
+   - To run the downloaded application, execute the command "leave the DFU mode" or simply reset the
+     board.
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/.extSettings b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/.extSettings
new file mode 100644
index 000000000..590f49d92
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/.extSettings
@@ -0,0 +1,12 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Application/User/Core=../Core/Src/main.c;../Core/Src/stm32g4xx_it.c;../Core/Src/stm32g4xx_hal_msp.c;../Core/Src/stm32g4xx_hal_msp.c;
+Application/User/USB_Device/App=../USB_Device/App/usbd_desc.c;../USB_Device/App/usb_device.c;
+Application/User/USB_Device/Target=../USB_Device/Target/usbd_conf.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/main.h
new file mode 100644
index 000000000..372311bd4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/HID_Standalone/Core/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+#define BUTTON_KEY1                      BUTTON_USER
+#define BUTTON_KEY1_PIN                  USER_BUTTON_PIN
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..afd401747
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..a3e8cb2ec
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USB_LP_IRQHandler(void);
+void USBWakeUp_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/main.c
new file mode 100644
index 000000000..7d23d8850
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/main.c
@@ -0,0 +1,226 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/HID_Standalone/Core/Src/main.c
+  * @author  MCD Application Team
+  * @brief   USB device HID demo main file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USB_Device_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure the application hardware resources */
+  BSP_PB_Init(BUTTON_KEY1, BUTTON_MODE_EXTI);
+  BSP_LED_Init(LED3);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = 64;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief This function provides accurate delay (in milliseconds) based
+  * on SysTick counter flag.
+  * @note This function is declared as __weak to be overwritten in case of other
+  * implementations in user file.
+  * @param Delay: specifies the delay time length, in milliseconds.
+  * @retval None
+  */
+void HAL_Delay(__IO uint32_t Delay)
+{
+  while (Delay)
+  {
+    if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+    {
+      Delay--;
+    }
+  }
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  BSP_LED_On(LED3);
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..348856185
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,88 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  *          This file provides code for the MSP Initialization
+  *          and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..d6fe3f37a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c
@@ -0,0 +1,242 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+extern void SystemClockConfig_Resume(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_FS;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles USB low priority interrupt remap.
+  */
+void USB_LP_IRQHandler(void)
+{
+  /* USER CODE BEGIN USB_LP_IRQn 0 */
+
+  /* USER CODE END USB_LP_IRQn 0 */
+  HAL_PCD_IRQHandler(&hpcd_USB_FS);
+  /* USER CODE BEGIN USB_LP_IRQn 1 */
+
+  /* USER CODE END USB_LP_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USB wake-up interrupt through EXTI line 18.
+  */
+void USBWakeUp_IRQHandler(void)
+{
+  /* USER CODE BEGIN USBWakeUp_IRQn 0 */
+  SystemClockConfig_Resume();
+  /* USER CODE END USBWakeUp_IRQn 0 */
+  HAL_PCD_IRQHandler(&hpcd_USB_FS);
+  /* USER CODE BEGIN USBWakeUp_IRQn 1 */
+
+  /* USER CODE END USBWakeUp_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles External lines interrupt request.
+  * @param  None
+  * @retval None
+  */
+
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(BUTTON_KEY1_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewd b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewd
new file mode 100644
index 000000000..bf43f11bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>HID_Standalone</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewp b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewp
new file mode 100644
index 000000000..6134c6440
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewp
@@ -0,0 +1,1199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>HID_Standalone</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>HID_Standalone/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>HID_Standalone/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>HID_Standalone/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
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+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
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+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
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+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
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+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
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+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
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+        <option>
+          <name>OGLastSavedByProductVersion</name>
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+          <name>GeneralEnableMisra</name>
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+          <name>GeneralMisraVerbose</name>
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+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
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+          <name>GenLowLevelInterface</name>
+          <state>1</state>
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+          <name>GEndianModeBE</name>
+          <state>1</state>
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+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
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+        <option>
+          <name>GenStdoutInterface</name>
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+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>GeneralMisraVer</name>
+          <state>0</state>
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+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
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+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
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+          <version>26</version>
+          <state>39</state>
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+          <name>OGUseCmsis</name>
+          <state>0</state>
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+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
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+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
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+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
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+          <name>GFPUDeviceSlave</name>
+          <state></state>
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+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
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+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>NEON</name>
+          <state>0</state>
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+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
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+        <option>
+          <name>OGCMSISPackSelectDevice</name>
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+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
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+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
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+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
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+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
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+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
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+      </data>
+    </settings>
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+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
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+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
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+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
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+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
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+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
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+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
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+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
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+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
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+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
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+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
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+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
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+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
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+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
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+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
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+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
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+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
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+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../USB_Device/App</state>
+          <state>$PROJ_DIR$/../USB_Device/Target</state>
+          <state>$PROJ_DIR$/../Core/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
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+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>0</state>
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+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
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+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
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+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
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+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
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+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
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+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
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+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
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+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
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+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
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+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
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+      </data>
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+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
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+        <option>
+          <name>AEndian</name>
+          <state>1</state>
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+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
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+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
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+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
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+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
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+        <option>
+          <name>ADebug</name>
+          <state>1</state>
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+          <name>AltRegisterNames</name>
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+          <name>ADefines</name>
+          <state></state>
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+          <name>AList</name>
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+          <name>AListHeader</name>
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+          <name>AListing</name>
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+          <name>MacExps</name>
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+          <name>MacExec</name>
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+          <name>OnlyAssed</name>
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+          <name>MultiLine</name>
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+          <name>PageLengthCheck</name>
+          <state>0</state>
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+          <name>PageLength</name>
+          <state>80</state>
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+          <state>8</state>
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+          <name>AXRefDefines</name>
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+          <name>AXRefInternal</name>
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+          <name>AXRefDual</name>
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+          <name>AProcessor</name>
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+        <option>
+          <name>AFpuProcessor</name>
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+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+          <name>ALimitErrorsCheck</name>
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+        <option>
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+          <state>100</state>
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+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
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+          <name>AExtraOptionsCheckV2</name>
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+        <option>
+          <name>AExtraOptionsV2</name>
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+        <wantNonLocal>1</wantNonLocal>
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+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
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+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>HID_Standalone.hex</state>
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+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
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+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
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+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
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+      <archiveVersion>1</archiveVersion>
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+        <prebuild></prebuild>
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+          <state>1</state>
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+          <name>XLinkMisraHandler</name>
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+        <option>
+          <name>IlinkInputFileSlave</name>
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+        <option>
+          <name>IlinkOutputFile</name>
+          <state>HID_Standalone.out</state>
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+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
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+          <name>IlinkKeepSymbols</name>
+          <state></state>
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+          <name>IlinkRawBinarySymbol</name>
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+          <name>IlinkLogFile</name>
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+          <name>IlinkLogSection</name>
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+          <name>IlinkIcfOverride</name>
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+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
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+          <name>IlinkIcfFileSlave</name>
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+          <state></state>
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+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <group>
+        <name>Core</name>
+        <file>
+          <name>$PROJ_DIR$/../Core/Src/main.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../Core/Src/stm32g4xx_it.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../Core/Src/stm32g4xx_hal_msp.c</name>
+        </file>
+      </group>
+      <group>
+        <name>USB_Device</name>
+        <group>
+          <name>App</name>
+          <file>
+            <name>$PROJ_DIR$/../USB_Device/App/usbd_desc.c</name>
+          </file>
+          <file>
+            <name>$PROJ_DIR$/../USB_Device/App/usb_device.c</name>
+          </file>
+        </group>
+        <group>
+          <name>Target</name>
+          <file>
+            <name>$PROJ_DIR$/../USB_Device/Target/usbd_conf.c</name>
+          </file>
+        </group>
+      </group>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Core/Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>USB_Device_Library</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/Project.eww
new file mode 100644
index 000000000..c10012689
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\HID_Standalone.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..066fa1d35
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/HID_Standalone.ioc b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/HID_Standalone.ioc
new file mode 100644
index 000000000..533d9eee0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/HID_Standalone.ioc
@@ -0,0 +1,159 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USB
+Mcu.IP4=USB_DEVICE
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA11
+Mcu.Pin1=PA12
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_USB_DEVICE_VS_USB_DEVICE_HID_FS
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.USBWakeUp_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.USB_LP_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA11.Mode=Device
+PA11.Signal=USB_DM
+PA12.Mode=Device
+PA12.Signal=USB_DP
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x1000
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=HID_Standalone.ioc
+ProjectManager.ProjectName=HID_Standalone
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x1000
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USB_Device_Init-USB_DEVICE-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+USB.DeviceSpeed=PCD_SPEED_FULL
+USB.IPParameters=DeviceSpeed,phy_itface,Sof_enable,low_power_enable,lpm_enable,battery_charging_enable
+USB.Sof_enable=DISABLE
+USB.battery_charging_enable=DISABLE
+USB.low_power_enable=ENABLE
+USB.lpm_enable=DISABLE
+USB.phy_itface=PCD_PHY_EMBEDDED
+USB_DEVICE.CLASS_NAME_FS=HID
+USB_DEVICE.CONFIGURATION_STRING_HID_FS=HID Config
+USB_DEVICE.HID_FS_BINTERVAL=0xA
+USB_DEVICE.INTERFACE_STRING_HID_FS=HID Interface
+USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,USBD_MAX_NUM_INTERFACES,USBD_MAX_STR_DESC_SIZ,VID,PID_HID_FS,USBD_LPM_ENABLED,HID_FS_BINTERVAL,USBD_MAX_NUM_CONFIGURATION,USBD_SELF_POWERED,USBD_DEBUG_LEVEL,LANGID_STRING,MANUFACTURER_STRING,PRODUCT_STRING_HID_FS,CONFIGURATION_STRING_HID_FS,INTERFACE_STRING_HID_FS
+USB_DEVICE.IPParametersWithoutCheck=USBD_MAX_STR_DESC_SIZ,USBD_MAX_NUM_INTERFACES
+USB_DEVICE.LANGID_STRING=1033
+USB_DEVICE.MANUFACTURER_STRING=STMicroelectronics
+USB_DEVICE.PID_HID_FS=0x5710
+USB_DEVICE.PRODUCT_STRING_HID_FS=STM32 Human interface
+USB_DEVICE.USBD_DEBUG_LEVEL=0
+USB_DEVICE.USBD_LPM_ENABLED=0
+USB_DEVICE.USBD_MAX_NUM_CONFIGURATION=1
+USB_DEVICE.USBD_MAX_NUM_INTERFACES=1
+USB_DEVICE.USBD_MAX_STR_DESC_SIZ=64
+USB_DEVICE.USBD_SELF_POWERED=1
+USB_DEVICE.VID=0x483
+USB_DEVICE.VirtualMode=Hid
+USB_DEVICE.VirtualModeFS=Hid_FS
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_USB_DEVICE_VS_USB_DEVICE_HID_FS.Mode=HID_FS
+VP_USB_DEVICE_VS_USB_DEVICE_HID_FS.Signal=USB_DEVICE_VS_USB_DEVICE_HID_FS
+board=STM32G474E_EVAL1
+ProjectManager.Example=HID_Standalone
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvoptx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvoptx
new file mode 100644
index 000000000..0e5ade2fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvoptx
@@ -0,0 +1,745 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>HID_Standalone</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$CMSIS\Flash\STM32G4xx_512.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User/USB_Device/Target</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../USB_Device/Target/usbd_conf.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_conf.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User/USB_Device/App</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../USB_Device/App/usbd_desc.c</PathWithFileName>
+      <FilenameWithoutPath>usbd_desc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../USB_Device/App/usb_device.c</PathWithFileName>
+      <FilenameWithoutPath>usb_device.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User/Core</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>5</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Core/Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>6</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Core/Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>7</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Core/Src/stm32g4xx_hal_msp.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_msp.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Doc</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>8</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../readme.txt</PathWithFileName>
+      <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>9</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g474e_eval_bus.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>10</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g474e_eval_io.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>11</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g474e_eval.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/BSP/Components</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>12</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
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diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvprojx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvprojx
new file mode 100644
index 000000000..fdb2e1792
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvprojx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>HID_Standalone</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>HID_Standalone\Exe\</OutputDirectory>
+          <OutputName>HID_Standalone</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
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+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../USB_Device/App;../USB_Device/Target;../Core/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Inc;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User/USB_Device/Target</GroupName>
+          <Files>
+            <File>
+              <FileName>usbd_conf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../USB_Device/Target/usbd_conf.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User/USB_Device/App</GroupName>
+          <Files>
+            <File>
+              <FileName>usbd_desc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../USB_Device/App/usbd_desc.c</FilePath>
+            </File>
+            <File>
+              <FileName>usb_device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../USB_Device/App/usb_device.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User/Core</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pcd_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_usb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Core/Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Middlewares/USB_Device_Library</GroupName>
+          <Files>
+            <File>
+              <FileName>usbd_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_ctlreq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_ioreq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</FilePath>
+            </File>
+            <File>
+              <FileName>usbd_hid.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="HID_Standalone"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..d51d2e681
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x1000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x1000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..2597d866b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.cproject
@@ -0,0 +1,181 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.925611215">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.925611215" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.925611215" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.925611215." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.704140418" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1991639428" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1137308243" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.344123728" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1185780822" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1123955056" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1580334703" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.299904908" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1745331600" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1130899704" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.683672625" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.683251727" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.504073088" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.834328366" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.289865105" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="HID_Standalone.null.1661932989" name="HID_Standalone"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.925611215;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.925611215.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.248582296;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.425894107">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.57330134;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.57330134.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.158636539;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.315429669">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.project
new file mode 100644
index 000000000..a796fb976
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.project
@@ -0,0 +1,241 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>HID_Standalone</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>HID_Standalone.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/HID_Standalone.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Core/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_usb.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_core.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_ctlreq.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_hid.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c</locationURI>
+		</link>
+		<link>
+			<name>Middlewares/USB_Device_Library/usbd_ioreq.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usb_device.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usb_device.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/App/usbd_desc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_desc.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/USB_Device/Target/usbd_conf.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/USB_Device/Target/usbd_conf.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..0cccfacf0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      LinkerScript.ld
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     Linker script for STM32G474QETx Device from STM32G4 series
+ *                      512Kbytes FLASH
+ *                      128Kbytes RAM
+ *
+ *            Set heap size, stack size and stack location according
+ *            to application requirements.
+ *
+ *            Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x1000;	/* required amount of heap  */
+_Min_Stack_Size = 0x1000;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.c
new file mode 100644
index 000000000..d225cfc1d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.c
@@ -0,0 +1,208 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    USB_Device/HID_Standalone/USB_Device/App/usb_device.c
+  * @author  MCD Application Team
+  * @brief   This file implements the USB Device
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "usb_device.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_hid.h"
+
+/* USER CODE BEGIN Includes */
+#include "main.h"
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+__IO uint32_t remotewakeupon = 0;
+uint8_t HID_Buffer[4];
+extern PCD_HandleTypeDef hpcd_USB_FS;
+#define CURSOR_STEP     5
+/* USER CODE END PV */
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+static void GetPointerData(uint8_t *pbuf);
+extern void SystemClockConfig_Resume(void);
+void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+extern void Error_Handler(void);
+/* USB Device Core handle declaration. */
+USBD_HandleTypeDef hUsbDeviceFS;
+extern USBD_DescriptorsTypeDef HID_Desc;
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN 0 */
+/**
+  * @brief USB Clock Configuration
+  * @retval None
+  */
+void USBD_Clock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
+
+  /* Enable HSI48 */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
+  {
+    Error_Handler();
+  }
+  /*Configure the clock recovery system (CRS)**********************************/
+
+  /*Enable CRS Clock*/
+  __HAL_RCC_CRS_CLK_ENABLE();
+
+  /* Default Synchro Signal division factor (not divided) */
+  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+  /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+  /* HSI48 is synchronized with USB SOF at 1KHz rate */
+  RCC_CRSInitStruct.ReloadValue =  __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+  RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+  /* Set the TRIM[5:0] to the default value */
+  RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+  /* Start automatic synchronization */
+  HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
+}
+/* USER CODE END 0 */
+
+/*
+ * -- Insert your external function declaration here --
+ */
+/* USER CODE BEGIN 1 */
+
+/**
+  * @brief  Gets Pointer Data.
+  * @param  pbuf: Pointer to report
+  * @retval None
+  */
+void GetPointerData(uint8_t * pbuf)
+{
+  static int8_t cnt = 0;
+  int8_t x = 0, y = 0;
+
+  if (cnt++ > 0)
+  {
+    x = CURSOR_STEP;
+  }
+  else
+  {
+    x = -CURSOR_STEP;
+  }
+  pbuf[0] = 0;
+  pbuf[1] = x;
+  pbuf[2] = y;
+  pbuf[3] = 0;
+}
+
+/**
+  * @brief  GPIO EXTI Callback function
+  *         Handle remote-wakeup through key button
+  * @param  GPIO_Pin
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  if (GPIO_Pin == BUTTON_KEY1_PIN)
+  {
+    if ((((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_remote_wakeup == 1) &&
+        (((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_state ==
+         USBD_STATE_SUSPENDED))
+    {
+      if ((&hpcd_USB_FS)->Init.low_power_enable)
+      {
+        HAL_ResumeTick();
+        SystemClockConfig_Resume();
+      }
+      /* Activate Remote wakeup */
+      HAL_PCD_ActivateRemoteWakeup((&hpcd_USB_FS));
+
+      /* Remote wakeup delay */
+      HAL_Delay(10);
+
+      /* Disable Remote wakeup */
+      HAL_PCD_DeActivateRemoteWakeup((&hpcd_USB_FS));
+
+      /* change state to configured */
+      ((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_state = USBD_STATE_CONFIGURED;
+
+      /* Change remote_wakeup feature to 0 */
+      ((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_remote_wakeup = 0;
+      remotewakeupon = 1;
+    }
+    else if (((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_state ==
+         USBD_STATE_CONFIGURED)
+    {
+      GetPointerData(HID_Buffer);
+      USBD_HID_SendReport(&hUsbDeviceFS, HID_Buffer, 4);
+    }
+    else
+    {
+      /* ... */
+    }
+  }
+}
+
+/* USER CODE END 1 */
+
+/**
+  * Init USB device Library, add supported class and start the library
+  * @retval None
+  */
+void MX_USB_Device_Init(void)
+{
+  /* USER CODE BEGIN USB_Device_Init_PreTreatment */
+  /* USB Clock Initialization */
+   USBD_Clock_Config();
+  /* USER CODE END USB_Device_Init_PreTreatment */
+
+  /* Init Device Library, add supported class and start the library. */
+  if (USBD_Init(&hUsbDeviceFS, &HID_Desc, DEVICE_FS) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_HID) != USBD_OK) {
+    Error_Handler();
+  }
+  if (USBD_Start(&hUsbDeviceFS) != USBD_OK) {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USB_Device_Init_PostTreatment */
+
+  /* USER CODE END USB_Device_Init_PostTreatment */
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.h
new file mode 100644
index 000000000..be9481a0c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.h
@@ -0,0 +1,103 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/HID_Standalone/USB_Device/App/usb_device.h
+  * @author         MCD Application Team
+  * @brief          Header for usb_device.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_DEVICE__H__
+#define __USB_DEVICE__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+  * @{
+  */
+
+/** @defgroup USBD_DEVICE USBD_DEVICE
+  * @brief Device file for Usb otg low level driver.
+  * @{
+  */
+
+/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN VARIABLES */
+
+/* USER CODE END VARIABLES */
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype
+  * @brief Declaration of public functions for Usb device.
+  * @{
+  */
+
+/** USB Device initialization function. */
+void MX_USB_Device_Init(void);
+
+/*
+ * -- Insert functions declaration here --
+ */
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DEVICE__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c
new file mode 100644
index 000000000..44822bd57
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c
@@ -0,0 +1,396 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c
+  * @author         MCD Application Team
+  * @brief          This file implements the USB device descriptors.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_conf.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBD_DESC
+  * @{
+  */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions
+  * @brief Private types.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines
+  * @brief Private defines.
+  * @{
+  */
+
+#define USBD_VID     0x483
+#define USBD_LANGID_STRING     1033
+#define USBD_MANUFACTURER_STRING     "STMicroelectronics"
+#define USBD_PID     0x5710
+#define USBD_PRODUCT_STRING     "STM32 Human interface"
+#define USBD_CONFIGURATION_STRING     "HID Config"
+#define USBD_INTERFACE_STRING     "HID Interface"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+  * @}
+  */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros
+  * @brief Private macros.
+  * @{
+  */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+static void Get_SerialNum(void);
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+  * @brief Private functions declaration.
+  * @{
+  */
+
+uint8_t * USBD_HID_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+
+USBD_DescriptorsTypeDef HID_Desc =
+{
+  USBD_HID_DeviceDescriptor,
+  USBD_HID_LangIDStrDescriptor,
+  USBD_HID_ManufacturerStrDescriptor,
+  USBD_HID_ProductStrDescriptor,
+  USBD_HID_SerialStrDescriptor,
+  USBD_HID_ConfigStrDescriptor,
+  USBD_HID_InterfaceStrDescriptor
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/** USB standard device descriptor. */
+__ALIGN_BEGIN uint8_t USBD_HID_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
+{
+  0x12,                       /*bLength */
+  USB_DESC_TYPE_DEVICE,       /*bDescriptorType*/
+  0x00,                       /*bcdUSB */
+  0x02,
+  0x00,                       /*bDeviceClass*/
+  0x00,                       /*bDeviceSubClass*/
+  0x00,                       /*bDeviceProtocol*/
+  USB_MAX_EP0_SIZE,           /*bMaxPacketSize*/
+  LOBYTE(USBD_VID),           /*idVendor*/
+  HIBYTE(USBD_VID),           /*idVendor*/
+  LOBYTE(USBD_PID),           /*idProduct*/
+  HIBYTE(USBD_PID),           /*idProduct*/
+  0x00,                       /*bcdDevice rel. 2.00*/
+  0x02,
+  USBD_IDX_MFC_STR,           /*Index of manufacturer  string*/
+  USBD_IDX_PRODUCT_STR,       /*Index of product string*/
+  USBD_IDX_SERIAL_STR,        /*Index of serial number string*/
+  USBD_MAX_NUM_CONFIGURATION  /*bNumConfigurations*/
+};
+
+/* USB_DeviceDescriptor */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+  * @brief Private variables.
+  * @{
+  */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+
+/** USB lang identifier descriptor. */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
+{
+     USB_LEN_LANGID_STR_DESC,
+     USB_DESC_TYPE_STRING,
+     LOBYTE(USBD_LANGID_STRING),
+     HIBYTE(USBD_LANGID_STRING)
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+  #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/* Internal string descriptor. */
+__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+  #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = {
+  USB_SIZ_STRING_SERIAL,
+  USB_DESC_TYPE_STRING,
+};
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions
+  * @brief Private functions.
+  * @{
+  */
+
+/**
+  * @brief  Return the device descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_HID_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = sizeof(USBD_HID_DeviceDesc);
+  return USBD_HID_DeviceDesc;
+}
+
+/**
+  * @brief  Return the LangID string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_HID_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = sizeof(USBD_LangIDDesc);
+  return USBD_LangIDDesc;
+}
+
+/**
+  * @brief  Return the product string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_HID_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == 0)
+  {
+    USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the manufacturer string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_HID_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the serial number string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_HID_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  UNUSED(speed);
+  *length = USB_SIZ_STRING_SERIAL;
+
+  /* Update the serial number string descriptor with the data from the unique
+   * ID */
+  Get_SerialNum();
+
+  /* USER CODE BEGIN USBD_HID_SerialStrDescriptor */
+
+  /* USER CODE END USBD_HID_SerialStrDescriptor */
+
+  return (uint8_t *) USBD_StringSerial;
+}
+
+/**
+  * @brief  Return the configuration string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_HID_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == USBD_SPEED_HIGH)
+  {
+    USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Return the interface string descriptor
+  * @param  speed : Current device speed
+  * @param  length : Pointer to data length variable
+  * @retval Pointer to descriptor buffer
+  */
+uint8_t * USBD_HID_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+  if(speed == 0)
+  {
+    USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+  }
+  else
+  {
+    USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+  }
+  return USBD_StrDesc;
+}
+
+/**
+  * @brief  Create the serial number string descriptor
+  * @param  None
+  * @retval None
+  */
+static void Get_SerialNum(void)
+{
+  uint32_t deviceserial0;
+  uint32_t deviceserial1;
+  uint32_t deviceserial2;
+
+  deviceserial0 = *(uint32_t *) DEVICE_ID1;
+  deviceserial1 = *(uint32_t *) DEVICE_ID2;
+  deviceserial2 = *(uint32_t *) DEVICE_ID3;
+
+  deviceserial0 += deviceserial2;
+
+  if (deviceserial0 != 0)
+  {
+    IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
+    IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
+  }
+}
+
+/**
+  * @brief  Convert Hex 32Bits value into char
+  * @param  value: value to convert
+  * @param  pbuf: pointer to the buffer
+  * @param  len: buffer length
+  * @retval None
+  */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
+{
+  uint8_t idx = 0;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    if (((value >> 28)) < 0xA)
+    {
+      pbuf[2 * idx] = (value >> 28) + '0';
+    }
+    else
+    {
+      pbuf[2 * idx] = (value >> 28) + 'A' - 10;
+    }
+
+    value = value << 4;
+
+    pbuf[2 * idx + 1] = 0;
+  }
+}
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h
new file mode 100644
index 000000000..e254962a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_desc.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DESC__C__
+#define __USBD_DESC__C__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+  * @{
+  */
+
+/** @defgroup USBD_DESC USBD_DESC
+  * @brief Usb device descriptors module.
+  * @{
+  */
+
+/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants
+  * @brief Constants.
+  * @{
+  */
+#define         DEVICE_ID1          (UID_BASE)
+#define         DEVICE_ID2          (UID_BASE + 0x4)
+#define         DEVICE_ID3          (UID_BASE + 0x8)
+
+#define         USB_SIZ_STRING_SERIAL       0x1A
+
+/* USER CODE BEGIN EXPORTED_CONSTANTS */
+
+/* USER CODE END EXPORTED_CONSTANTS */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines
+  * @brief Defines.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions
+  * @brief Types.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+extern USBD_DescriptorsTypeDef     HID_Desc;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype
+  * @brief Public functions declaration.
+  * @{
+  */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DESC__C__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c
new file mode 100644
index 000000000..15ae7eef5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c
@@ -0,0 +1,758 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c
+  * @author         MCD Application Team
+  * @brief          This file implements the board support package for the USB device library
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+#include "usbd_core.h"
+
+#include "usbd_hid.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+PCD_HandleTypeDef hpcd_USB_FS;
+void Error_Handler(void);
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported function prototypes ----------------------------------------------*/
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+extern void USBD_Clock_Config(void);
+void SystemClockConfig_Resume(void);
+/* USER CODE END PFP */
+
+/* Private functions ---------------------------------------------------------*/
+static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status);
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+extern void SystemClock_Config(void);
+
+/*******************************************************************************
+                       LL Driver Callbacks (PCD -> USB Device Library)
+*******************************************************************************/
+/* MSP Init */
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  if(pcdHandle->Instance==USB)
+  {
+  /* USER CODE BEGIN USB_MspInit 0 */
+
+  /* USER CODE END USB_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_USB_CLK_ENABLE();
+
+    /* Peripheral interrupt init */
+    HAL_NVIC_SetPriority(USB_LP_IRQn, 6, 0);
+    HAL_NVIC_EnableIRQ(USB_LP_IRQn);
+    if(pcdHandle->Init.low_power_enable == 1)
+    {
+      /* Enable EXTI Line 18 for USB wakeup */
+      __HAL_USB_WAKEUP_EXTI_ENABLE_IT();
+      HAL_NVIC_SetPriority(USBWakeUp_IRQn, 0, 0);
+      HAL_NVIC_EnableIRQ(USBWakeUp_IRQn);
+    }
+  /* USER CODE BEGIN USB_MspInit 1 */
+
+  /* USER CODE END USB_MspInit 1 */
+  }
+}
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  if(pcdHandle->Instance==USB)
+  {
+  /* USER CODE BEGIN USB_MspDeInit 0 */
+
+  /* USER CODE END USB_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USB_CLK_DISABLE();
+
+    /* Peripheral interrupt Deinit*/
+    HAL_NVIC_DisableIRQ(USB_LP_IRQn);
+
+    HAL_NVIC_DisableIRQ(USBWakeUp_IRQn);
+
+  /* USER CODE BEGIN USB_MspDeInit 1 */
+    __HAL_RCC_GPIOA_CLK_DISABLE();
+  /* USER CODE END USB_MspDeInit 1 */
+  }
+}
+
+/**
+  * @brief  Setup stage callback
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PreTreatment */
+
+  /* USER CODE END  HAL_PCD_SetupStageCallback_PreTreatment */
+  USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
+  /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PostTreatment */
+
+  /* USER CODE END  HAL_PCD_SetupStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  Data Out stage callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DataOutStageCallback_PreTreatment */
+  USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
+  /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_DataOutStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  Data In stage callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DataInStageCallback_PreTreatment */
+  USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
+  /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PostTreatment  */
+
+  /* USER CODE END HAL_PCD_DataInStageCallback_PostTreatment */
+}
+
+/**
+  * @brief  SOF callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SOFCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_SOFCallback_PreTreatment */
+  USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_SOFCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_SOFCallback_PostTreatment */
+}
+
+/**
+  * @brief  Reset callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ResetCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ResetCallback_PreTreatment */
+  USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
+
+  if ( hpcd->Init.speed != PCD_SPEED_FULL)
+  {
+    Error_Handler();
+  }
+    /* Set Speed. */
+  USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
+
+  /* Reset Device. */
+  USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ResetCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ResetCallback_PostTreatment */
+}
+
+/**
+  * @brief  Suspend callback.
+  * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_SuspendCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_SuspendCallback_PreTreatment */
+  /* Inform USB library that core enters in suspend Mode. */
+  USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
+  /* Enter in STOP mode. */
+  /* USER CODE BEGIN 2 */
+  if (hpcd->Init.low_power_enable)
+  {
+    HAL_SuspendTick();
+
+    /* Stop 1 mode with Main Regulator */
+    PWR->CR1 |= PWR_CR1_LPMS_STOP1;
+    /* Set SLEEPDEEP bit of Cortex System Control Register. */
+    SCB->SCR |= (uint32_t)(SCB_SCR_SLEEPDEEP_Msk);
+  }
+  /* USER CODE END 2 */
+  /* USER CODE BEGIN HAL_PCD_SuspendCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_SuspendCallback_PostTreatment */
+}
+
+/**
+  * @brief  Resume callback.
+  * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ResumeCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ResumeCallback_PreTreatment */
+
+  /* USER CODE BEGIN 3 */
+  if (hpcd->Init.low_power_enable)
+  {
+    HAL_ResumeTick();
+    /* Reset SLEEPDEEP bit of Cortex System Control Register. */
+    SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+  }
+  /* USER CODE END 3 */
+
+  USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ResumeCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ResumeCallback_PostTreatment */
+}
+
+/**
+  * @brief  ISOOUTIncomplete callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+  USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+  /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+}
+
+/**
+  * @brief  ISOINIncomplete callback.
+  * @param  hpcd: PCD handle
+  * @param  epnum: Endpoint number
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+  USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+  /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+}
+
+/**
+  * @brief  Connect callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_ConnectCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_ConnectCallback_PreTreatment */
+  USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_ConnectCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_ConnectCallback_PostTreatment */
+}
+
+/**
+  * @brief  Disconnect callback.
+  * @param  hpcd: PCD handle
+  * @retval None
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PreTreatment */
+
+  /* USER CODE END HAL_PCD_DisconnectCallback_PreTreatment */
+  USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
+  /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PostTreatment */
+
+  /* USER CODE END HAL_PCD_DisconnectCallback_PostTreatment */
+}
+
+  /* USER CODE BEGIN LowLevelInterface */
+
+  /* USER CODE END LowLevelInterface */
+
+/*******************************************************************************
+                       LL Driver Interface (USB Device Library --> PCD)
+*******************************************************************************/
+
+/**
+  * @brief  Initializes the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
+{
+  /* Init USB Ip. */
+  hpcd_USB_FS.pData = pdev;
+  /* Link the driver to the stack. */
+  pdev->pData = &hpcd_USB_FS;
+
+  hpcd_USB_FS.Instance = USB;
+  hpcd_USB_FS.Init.dev_endpoints = 8;
+  hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
+  hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+  hpcd_USB_FS.Init.Sof_enable = DISABLE;
+  hpcd_USB_FS.Init.low_power_enable = ENABLE;
+  hpcd_USB_FS.Init.lpm_enable = DISABLE;
+  hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
+
+  #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+  /* register Msp Callbacks (before the Init) */
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPINIT_CB_ID, PCD_MspInit);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPDEINIT_CB_ID, PCD_MspDeInit);
+  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+  if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+  /* Register USB PCD CallBacks */
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SOF_CB_ID, PCD_SOFCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SETUPSTAGE_CB_ID, PCD_SetupStageCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESET_CB_ID, PCD_ResetCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SUSPEND_CB_ID, PCD_SuspendCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESUME_CB_ID, PCD_ResumeCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_CONNECT_CB_ID, PCD_ConnectCallback);
+  HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_DISCONNECT_CB_ID, PCD_DisconnectCallback);
+  /* USER CODE BEGIN RegisterCallBackFirstPart */
+
+  /* USER CODE END RegisterCallBackFirstPart */
+  HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_FS, PCD_DataOutStageCallback);
+  HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
+  HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
+  HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
+  /* USER CODE BEGIN RegisterCallBackSecondPart */
+
+  /* USER CODE END RegisterCallBackSecondPart */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+  /* USER CODE BEGIN EndPoint_Configuration */
+  HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData, 0x00, PCD_SNG_BUF, 0x0C);
+  HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData, 0x80, PCD_SNG_BUF, 0x4C);
+  /* USER CODE END EndPoint_Configuration */
+  /* USER CODE BEGIN EndPoint_Configuration_HID */
+  HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData, HID_EPIN_ADDR, PCD_SNG_BUF, 0x8C);
+  /* USER CODE END EndPoint_Configuration_HID */
+  return USBD_OK;
+}
+
+/**
+  * @brief  De-Initializes the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_DeInit(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Starts the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_Start(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Stops the low level portion of the device driver.
+  * @param  pdev: Device handle
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_Stop(pdev->pData);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Opens an endpoint of the low level driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  ep_type: Endpoint type
+  * @param  ep_mps: Endpoint max packet size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Closes an endpoint of the low level driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Flushes an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Sets a Stall condition on an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Clears a Stall condition on an endpoint of the Low Level Driver.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Returns Stall condition.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval Stall (1: Yes, 0: No)
+  */
+uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
+
+  if((ep_addr & 0x80) == 0x80)
+  {
+    return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
+  }
+  else
+  {
+    return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
+  }
+}
+
+/**
+  * @brief  Assigns a USB address to the device.
+  * @param  pdev: Device handle
+  * @param  dev_addr: Device address
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Transmits data over an endpoint.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  pbuf: Pointer to data to be sent
+  * @param  size: Data size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Prepares an endpoint for reception.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @param  pbuf: Pointer to data to be received
+  * @param  size: Data size
+  * @retval USBD status
+  */
+USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+  HAL_StatusTypeDef hal_status = HAL_OK;
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
+
+  usb_status =  USBD_Get_USB_Status(hal_status);
+
+  return usb_status;
+}
+
+/**
+  * @brief  Returns the last transferred packet size.
+  * @param  pdev: Device handle
+  * @param  ep_addr: Endpoint number
+  * @retval Received Data Size
+  */
+uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+  return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
+}
+
+/**
+  * @brief  Delays routine for the USB Device Library.
+  * @param  Delay: Delay in ms
+  * @retval None
+  */
+void USBD_LL_Delay(uint32_t Delay)
+{
+  HAL_Delay(Delay);
+}
+
+/**
+  * @brief  Static single allocation.
+  * @param  size: Size of allocated memory
+  * @retval None
+  */
+void *USBD_static_malloc(uint32_t size)
+{
+  static uint32_t mem[(sizeof(USBD_HID_HandleTypeDef)/4)+1];/* On 32-bit boundary */
+  return mem;
+}
+
+/**
+  * @brief  Dummy memory free
+  * @param  p: Pointer to allocated  memory address
+  * @retval None
+  */
+void USBD_static_free(void *p)
+{
+
+}
+
+/* USER CODE BEGIN 5 */
+/**
+  * @brief  Configures system clock after wake-up from USB resume callBack:
+  *         enable HSI, PLL and select PLL as system clock source.
+  * @retval None
+  */
+ void SystemClockConfig_Resume(void)
+{
+  SystemClock_Config();
+  USBD_Clock_Config();
+}
+/* USER CODE END 5 */
+
+/**
+  * @brief  Returns the USB status depending on the HAL status:
+  * @param  hal_status: HAL status
+  * @retval USB status
+  */
+USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
+{
+  USBD_StatusTypeDef usb_status = USBD_OK;
+
+  switch (hal_status)
+  {
+    case HAL_OK :
+      usb_status = USBD_OK;
+    break;
+    case HAL_ERROR :
+      usb_status = USBD_FAIL;
+    break;
+    case HAL_BUSY :
+      usb_status = USBD_BUSY;
+    break;
+    case HAL_TIMEOUT :
+      usb_status = USBD_FAIL;
+    break;
+    default :
+      usb_status = USBD_FAIL;
+    break;
+  }
+  return usb_status;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h
new file mode 100644
index 000000000..57e14209f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h
@@ -0,0 +1,177 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h
+  * @author         MCD Application Team
+  * @brief          Header for usbd_conf.c file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+  * @brief Driver for Usb device.
+  * @{
+  */
+
+/** @defgroup USBD_CONF USBD_CONF
+  * @brief Configuration file for Usb otg low level driver.
+  * @{
+  */
+
+/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables
+  * @brief Public variables.
+  * @{
+  */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines
+  * @brief Defines for configuration of the Usb device.
+  * @{
+  */
+
+/*---------- -----------*/
+#define USBD_MAX_NUM_INTERFACES     1U
+/*---------- -----------*/
+#define USBD_MAX_NUM_CONFIGURATION     1U
+/*---------- -----------*/
+#define USBD_MAX_STR_DESC_SIZ     64U
+/*---------- -----------*/
+#define USBD_DEBUG_LEVEL     0U
+/*---------- -----------*/
+#define USBD_LPM_ENABLED     0U
+/*---------- -----------*/
+#define USBD_SELF_POWERED     1U
+/*---------- -----------*/
+#define HID_FS_BINTERVAL     0xAU
+
+/****************************************/
+/* #define for FS and HS identification */
+#define DEVICE_FS 		0
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros
+  * @brief Aliases.
+  * @{
+  */
+
+/* Memory management macros */
+
+/** Alias for memory allocation. */
+#define USBD_malloc         (void *)USBD_static_malloc
+
+/** Alias for memory release. */
+#define USBD_free           USBD_static_free
+
+/** Alias for memory set. */
+#define USBD_memset         memset
+
+/** Alias for memory copy. */
+#define USBD_memcpy         memcpy
+
+/** Alias for delay. */
+#define USBD_Delay          HAL_Delay
+
+/* DEBUG macros */
+
+#if (USBD_DEBUG_LEVEL > 0)
+#define USBD_UsrLog(...)    printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_UsrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 1)
+
+#define USBD_ErrLog(...)    printf("ERROR: ") ;\
+                            printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_ErrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 2)
+#define USBD_DbgLog(...)    printf("DEBUG : ") ;\
+                            printf(__VA_ARGS__);\
+                            printf("\n");
+#else
+#define USBD_DbgLog(...)
+#endif
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types
+  * @brief Types.
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype
+  * @brief Declaration of public functions for Usb device.
+  * @{
+  */
+
+/* Exported functions -------------------------------------------------------*/
+void *USBD_static_malloc(uint32_t size);
+void USBD_static_free(void *p);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CONF__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/readme.txt
new file mode 100644
index 000000000..85dd4d595
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/readme.txt
@@ -0,0 +1,101 @@
+/**
+  @page HID_Standalone USB Device Human Interface (HID) application
+
+  @verbatim
+  ******************************************************************************
+  * @file    USB_Device/HID_Standalone/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the USB HID application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Application Description
+
+Use of the USB device application based on the Human Interface (HID).
+  This is a typical application on how to use the stm32g4xx USB Device peripheral, where the STM32 MCU is
+enumerated as a HID device using the native PC Host HID driver to which the STM32G474E-EVAL1 Rev B
+board is connected, in order to emulate the Mouse directions using User push-button mounted on the
+STM32G474E-EVAL1 Rev B board.
+
+At the beginning of the main program the HAL_Init() function is called to reset all the peripherals,
+initialize the Flash interface and the systick. The user is provided with the SystemClock_Config()
+function to configure the system clock (SYSCLK). The Full Speed (FS) USB module uses
+internally a 48-MHz clock which is coming from a specific output of two PLLs (PLL or PLL SAI) or from MSI
+
+This example supports remote wakeup (which is the ability of a USB device to bring a suspended bus back
+to the active condition), and the User push-button is used as the remote wakeup source.
+
+By default, in Windows powered PC the Power Management feature of USB mouse devices is turned off.
+This setting is different from classic PS/2 computer functionality. Therefore, to enable the Wake from
+standby option, user must manually turn on the Power Management feature for the USB mouse.
+
+To manually enable the wake from standby option for the USB mouse, proceed as follows:
+ - Start "Device Manager",
+ - Select "Mice and other pointing devices",
+ - Select the "HID-compliant mouse" device (make sure that PID & VID are equal to 0x5710 & 0x0483 respectively)
+ - Right click and select "Properties",
+ - Select "Power Management" tab,
+ - Finally click to select "Allow this device to wake the computer" check box.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+For more details about the STM32Cube USB Device library, please refer to UM1734
+"STM32Cube USB Device library".
+
+@par Keywords
+
+Connectivity, USB_Device, USB, HID, Full Speed, Mouse, Remote Wakeup
+
+@par Directory contents
+
+  - USB_Device/HID_Standalone/Core/Src/main.c                  Main program
+  - USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c     MSP Initialization and de-Initialization codes
+  - USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c      STM32G4xx system clock configuration file
+  - USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c          Interrupt handlers
+  - USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c    General low level driver configuration
+  - USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c       USB device HID descriptor
+  - USB_Device/HID_Standalone/USB_Device/App/usbd_device.c     USB Device
+  - USB_Device/HID_Standalone/Core/Inc/main.h                  Main program header file
+  - USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h    USB device driver Configuration file
+  - USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h       USB device HID descriptor header file
+  - USB_Device/HID_Standalone/USB_Device/App/usbd_device.h     USB Device header
+
+
+@par Hardware and Software environment
+
+  - This application runs on STM32G4xx devices.
+
+  - This application has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B board
+    and can be easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Rev B board Set-up
+    -Connect the STM32G474E-EVAL1 Rev B board CN22 to the PC through "TYPE-C" to "Standard A" cable.
+    - Press the User push-button  to move the cursor.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the application
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/ADC_ContinuousConversion_TriggerSW.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/ADC_ContinuousConversion_TriggerSW.ioc
new file mode 100644
index 000000000..198dbd3ee
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/ADC_ContinuousConversion_TriggerSW.ioc
@@ -0,0 +1,149 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=null|null|null|null
+ADC1.ContinuousConvMode=ENABLE
+ADC1.DMAContinuousRequests=DISABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_SOFTWARE_START
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_NONE
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,ScanConvMode,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,LowPowerAutoWait,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,master,CommonPathInternal
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_640CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_ContinuousConversion_TriggerSW.ioc
+ProjectManager.ProjectName=ADC_ContinuousConversion_TriggerSW
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=ADC_ContinuousConversion_TriggerSW
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewd
new file mode 100644
index 000000000..a4313e5ad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>ADC_ContinuousConversion_TriggerSW</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewp
new file mode 100644
index 000000000..30d312309
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewp
@@ -0,0 +1,1158 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>ADC_ContinuousConversion_TriggerSW</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>ADC_ContinuousConversion_TriggerSW/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>ADC_ContinuousConversion_TriggerSW/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>ADC_ContinuousConversion_TriggerSW/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
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+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/Project.eww
new file mode 100644
index 000000000..febbfd9cf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\ADC_ContinuousConversion_TriggerSW.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h
new file mode 100644
index 000000000..9810a85cc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h
@@ -0,0 +1,100 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Definitions of environment analog values */
+  /* Value of analog reference voltage (Vref+), connected to analog voltage   */
+  /* supply Vdda (unit: mV).                                                  */
+  #define VDDA_APPLI                       ((uint32_t)3300)
+  
+/* Definitions of data related to this example */
+  /* Full-scale digital value with a resolution of 12 bits (voltage range     */
+  /* determined by analog voltage references Vref+ and Vref-,                 */
+  /* refer to reference manual).                                              */
+  #define DIGITAL_SCALE_12BITS             ((uint32_t) 0xFFF)
+
+  /* Init variable out of ADC expected conversion data range */
+  #define VAR_CONVERTED_DATA_INIT_VALUE    (DIGITAL_SCALE_12BITS + 1)
+
+/* Private macro -------------------------------------------------------------*/
+
+/**
+  * @brief  Macro to calculate the voltage (unit: mVolt)
+  *         corresponding to a ADC conversion data (unit: digital value).
+  * @note   ADC measurement data must correspond to a resolution of 12bits
+  *         (full scale digital value 4095). If not the case, the data must be
+  *         preliminarily rescaled to an equivalent resolution of 12 bits.
+  * @note   Analog reference voltage (Vref+) must be known from
+  *         user board environment.
+  * @param  __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
+  * @param  __ADC_DATA__ ADC conversion data (resolution 12 bits)
+  *                       (unit: digital value).
+  * @retval ADC conversion data equivalent voltage value (unit: mVolt)
+  */
+#define __ADC_CALC_DATA_VOLTAGE(__VREFANALOG_VOLTAGE__, __ADC_DATA__)       \
+  ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) / DIGITAL_SCALE_12BITS)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..8255a59a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..231e6bacc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvoptx
new file mode 100644
index 000000000..e45888dbc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvoptx
@@ -0,0 +1,677 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>ADC_ContinuousConversion_TriggerSW</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <WatchWindow1>
+        <Ww>
+          <count>0</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>uhADCxConvertedData,0x0A</ItemText>
+        </Ww>
+        <Ww>
+          <count>1</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>uhADCxConvertedData_Voltage_mVolt,0x0A</ItemText>
+        </Ww>
+      </WatchWindow1>
+      <MemoryWindow1>
+        <Mm>
+          <WinNumber>1</WinNumber>
+          <SubType>0</SubType>
+          <ItemText>uhADCxConvertedData</ItemText>
+          <AccSizeX>0</AccSizeX>
+        </Mm>
+      </MemoryWindow1>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
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+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
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+    </File>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_hal_msp.c</PathWithFileName>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvprojx
new file mode 100644
index 000000000..9a9b98938
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvprojx
@@ -0,0 +1,602 @@
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+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
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+          <DeviceId></DeviceId>
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+          <MemoryEnv></MemoryEnv>
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+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>ADC_ContinuousConversion_TriggerSW\Exe\</OutputDirectory>
+          <OutputName>ADC_ContinuousConversion_TriggerSW</OutputName>
+          <CreateExecutable>1</CreateExecutable>
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+            <UserProg1Name></UserProg1Name>
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+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="ADC_ContinuousConversion_TriggerSW"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..6015c7765
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.914547895">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.914547895" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.914547895" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.914547895." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.810656307" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1944222351" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1160691601" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.988773778" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.692864916" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.796204327" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1414192039" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.260398574" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.2133794509" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.382615112" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.878749220" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/ADC_ContinuousConversion_TriggerSW}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.649515935" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1853987757" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.891188879" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
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+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.project
new file mode 100644
index 000000000..a2c479e77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>ADC_ContinuousConversion_TriggerSW</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>ADC_ContinuousConversion_TriggerSW.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/ADC_ContinuousConversion_TriggerSW.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c
new file mode 100644
index 000000000..f8ce35103
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c
@@ -0,0 +1,341 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a short description of how to use the ADC
+  *          peripheral to perform conversions in continuous mode.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variables for ADC conversion data */
+uint16_t   uhADCxConvertedData = VAR_CONVERTED_DATA_INIT_VALUE; /* ADC group regular conversion data */
+
+/* Variables for ADC conversion data computation to physical values */
+uint16_t   uhADCxConvertedData_Voltage_mVolt = 0;  /* Value of voltage calculated from ADC conversion data (unit: mV) */
+
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_ADC1_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_ADC1_Init();
+  /* USER CODE BEGIN 2 */
+  
+  /* Initialize LED on board */
+  BSP_LED_Init(LED1);
+  
+  
+  /* Run the ADC calibration in single-ended mode */
+  if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+  {
+    /* Calibration Error */
+    Error_Handler();
+  }
+
+
+  /* Start ADC conversion */
+  if (HAL_ADC_Start(&hadc1) != HAL_OK)
+  {
+    /* ADC conversion start error */
+    Error_Handler();
+  }
+  
+  /* Wait for the first ADC conversion to be completed (timeout unit: ms) */
+  if (HAL_ADC_PollForConversion(&hadc1, 2) != HAL_OK)
+  {
+    /* ADC conversion start error */
+    Error_Handler();
+  }
+  
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* Note: At this step, you can use potentiometer on board connected       */
+    /*       to ADC channel input to perform a ADC conversion                 */
+    /*       on a determined voltage level.                                   */
+
+    /* Get ADC1 converted data                                        */
+    /* Note: At this step, ADC is performing ADC conversions continuously,    */
+    /*       indefinitely (ADC continuous mode enabled in this example).      */
+    /*       Main program reads frequently ADC conversion data                */
+    /*       (without waiting for end of each conversion: software reads data */
+    /*       when main program execution pointer is available and can let     */
+    /*       some ADC conversions data unread and overwritten by newer data)  */
+    /*       and stores it into the same variable.                            */
+    uhADCxConvertedData = HAL_ADC_GetValue(&hadc1);
+    
+    /* Compute the voltage */
+    uhADCxConvertedData_Voltage_mVolt = __ADC_CALC_DATA_VOLTAGE(VDDA_APPLI, uhADCxConvertedData);
+    
+    /* Toggle LED1 at each conversion */
+    BSP_LED_Toggle(LED1);
+
+    /* Note: ADC conversions data are stored into variable                    */
+    /*       "uhADCxConvertedData".                                           */
+    /*       (for debug: see variable content into watch window).             */
+    
+    /* Note: ADC conversion data are computed to physical values              */
+    /*       into variable "uhADCxConvertedData_Voltage_mVolt"                */
+    /*       using helper macro "__ADC_CALC_DATA_VOLTAGE()".                  */
+    /*       (for debug: see variable content into watch window).             */
+
+
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_MultiModeTypeDef multimode = {0};
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+
+  /** Common config
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.GainCompensation = 0;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  hadc1.Init.LowPowerAutoWait = DISABLE;
+  hadc1.Init.ContinuousConvMode = ENABLE;
+  hadc1.Init.NbrOfConversion = 1;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+  hadc1.Init.DMAContinuousRequests = DISABLE;
+  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc1.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure the ADC multi-mode
+  */
+  multimode.Mode = ADC_MODE_INDEPENDENT;
+  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/*   USER IRQ HANDLER TREATMENT                                               */
+/******************************************************************************/
+
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  Error_Handler();
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..1a08f6d4c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,158 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+    PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC12_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN ADC1_MspInit 1 */
+
+  /* USER CODE END ADC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+  /* USER CODE END ADC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADC12_CLK_DISABLE();
+
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+  /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+  /* USER CODE END ADC1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..b170598b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c
@@ -0,0 +1,119 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt
new file mode 100644
index 000000000..0396c2dde
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt
@@ -0,0 +1,91 @@
+/**
+  @page ADC_ContinuousConversion_TriggerSW ADC example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the ADC_ContinuousConversion_TriggerSW example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+This example provides a short description of how to use the ADC peripheral to
+perform conversions in continuous mode.
+
+Example configuration:
+ADC is configured to convert a single channel, in continuous conversion mode,
+from SW trigger.
+
+Example execution:
+The ADC launch conversions in continuous mode on the selected channel.
+Then waits for the first conversion completion before reading the conversion results.
+With the continuous conversion mode and the data overwrite functionality enabled,
+ADC is continuously converting data and updating the ADC data register with new values.
+
+For debug: variables to monitor with debugger watch window:
+ - "uhADCxConvertedData": ADC group regular conversion data
+ - "uhADCxConvertedData_Voltage_mVolt": ADC conversion data computation to physical values
+ 
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+      to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+  1 GPIO for LED
+  1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+
+Board settings:
+ - ADC is configured to convert ADC_CHANNEL_6 (pin 46 on connector CN5).
+ - The voltage input on ADC channel is provided by the on-board potentiometer (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+To observe voltage level applied on ADC channel through GPIO, connect a voltmeter on
+pin PC0 (pin 46 on connector CN5).
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is toggling after each data read
+ - Error: In case of other errors, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, continuous mode, Continuous conversion, trigger software
+
+@par Directory contents 
+
+  - ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h                  Header for main.c module  
+  - ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c          Interrupt handlers
+  - ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c                  Main program
+  - ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/ADC_GainCompensation.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/ADC_GainCompensation.ioc
new file mode 100644
index 000000000..3bede74c5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/ADC_GainCompensation.ioc
@@ -0,0 +1,190 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=null|null|null|null
+ADC1.ContinuousConvMode=DISABLE
+ADC1.DMAContinuousRequests=ENABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T1_TRGO
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISING
+ADC1.GainCompensation=VDDA_APPLI * GAIN_COMPENSATION_X1_FACTOR / DIGITAL_SCALE_12BITS
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,GainCompensation,ScanConvMode,EOCSelection,LowPowerAutoWait,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,Overrun,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,master,CommonPathInternal
+ADC1.IPParametersWithoutCheck=GainCompensation
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_640CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.0.EventEnable=DISABLE
+Dma.ADC1.0.Instance=DMA1_Channel1
+Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.0.Mode=DMA_CIRCULAR
+Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.ADC1.0.Priority=DMA_PRIORITY_MEDIUM
+Dma.ADC1.0.RequestNumber=1
+Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.ADC1.0.SignalID=NONE
+Dma.ADC1.0.SyncEnable=DISABLE
+Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.ADC1.0.SyncRequestNumber=1
+Dma.ADC1.0.SyncSignalID=NONE
+Dma.Request0=ADC1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM1
+Mcu.IPNb=6
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=PB11
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_TIM1_VS_ClockSourceINT
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PB11.Mode=IN14-Single-Ended
+PB11.Signal=ADC1_IN14
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_GainCompensation.ioc
+ProjectManager.ProjectName=ADC_GainCompensation
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.Dithering=Disable
+TIM1.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2
+TIM1.PeriodNoDither=499
+TIM1.Prescaler=149
+TIM1.RepetitionCounter=0
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ClockSourceINT.Mode=Internal
+VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=ADC_GainCompensation
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewd
new file mode 100644
index 000000000..00f22a0aa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>ADC_GainCompensation</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewp
new file mode 100644
index 000000000..bc4c69fdb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewp
@@ -0,0 +1,1158 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>ADC_GainCompensation</name>
+    <toolchain>
+      <name>ARM</name>
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+      <name>General</name>
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+        <wantNonLocal>1</wantNonLocal>
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+          <state>ADC_GainCompensation/Exe</state>
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+          <name>ObjPath</name>
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+          <name>ListPath</name>
+          <state>ADC_GainCompensation/List</state>
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+          <name>GRuntimeLibSelectSlave</name>
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+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
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+          <state>1</state>
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+          <state>1</state>
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+        <option>
+          <name>GenStdoutInterface</name>
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+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
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+          <state>6</state>
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+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
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+          <name>OGCMSISPackSelectDevice</name>
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+          <name>OgLibHeap</name>
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+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
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+          <name>OGScanfVariant</name>
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+          <state>1</state>
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+          <name>OGScanfMultibyteSupport</name>
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+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
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+      <name>ICCARM</name>
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+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
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+          <state>0</state>
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+          <name>CCListCFile</name>
+          <state>0</state>
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+          <name>CCListAssFile</name>
+          <state>0</state>
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+          <name>CCListAssSource</name>
+          <state>0</state>
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+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
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+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
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+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
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+        <option>
+          <name>CCDiagError</name>
+          <state></state>
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+        <option>
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+          <state>1</state>
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+          <name>IExtraOptions</name>
+          <state></state>
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+          <name>CCLangConformance</name>
+          <state>0</state>
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+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
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+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
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+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
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+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
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+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
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+        <option>
+          <name>PreInclude</name>
+          <state></state>
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+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
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+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
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+          <name>CCStdIncCheck</name>
+          <state>0</state>
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+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
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+          <name>IProcessorMode2</name>
+          <state>1</state>
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+          <state>3</state>
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+          <name>CCOptStrategy</name>
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+          <name>CCOptLevelSlave</name>
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+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
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+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
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+        <option>
+          <name>IccLang</name>
+          <state>0</state>
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+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
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+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
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+          <name>IccStaticDestr</name>
+          <state>0</state>
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+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
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+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
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+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
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+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
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+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
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+          <name>CCGuardCalls</name>
+          <state>1</state>
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+        <option>
+          <name>CCEncSource</name>
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+          <name>CCEncOutput</name>
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+          <name>CCEncOutputBom</name>
+          <state>1</state>
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+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
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+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
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+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
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+          <name>AEndian</name>
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+          <name>ACaseSensitivity</name>
+          <state>1</state>
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+          <name>AWarnEnable</name>
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+          <name>AWarnWhat</name>
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+          <name>AWarnOne</name>
+          <state></state>
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+          <name>AWarnRange1</name>
+          <state></state>
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+          <name>AWarnRange2</name>
+          <state></state>
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+          <name>ADebug</name>
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+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/Project.eww
new file mode 100644
index 000000000..28843cb63
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\ADC_GainCompensation.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/main.h
new file mode 100644
index 000000000..0d68336c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/main.h
@@ -0,0 +1,84 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_GainCompensation/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* User can use this section to tailor ADCx instance under use and associated
+   resources */
+
+/* Definitions of data related to this example */
+  /* Full-scale digital value with a resolution of 12 bits (voltage range     */
+  /* determined by analog voltage references Vref+ and Vref-,                 */
+  /* refer to reference manual).                                              */
+  #define DIGITAL_SCALE_12BITS             (0xFFFUL)
+
+  /* Init variable out of ADC expected conversion data range */
+  #define VAR_CONVERTED_DATA_INIT_VALUE    (DIGITAL_SCALE_12BITS + 1)
+  
+  /* Gain compensation x1 factor */
+  #define GAIN_COMPENSATION_X1_FACTOR      (0x1000UL)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..c181b51ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..8f42c2fdb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvoptx
new file mode 100644
index 000000000..03bc7cdd3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvoptx
@@ -0,0 +1,664 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>ADC_GainCompensation</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvprojx
new file mode 100644
index 000000000..265307b70
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvprojx
@@ -0,0 +1,602 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
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+      <TargetName>ADC_GainCompensation</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+      <uAC6>0</uAC6>
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+        <TargetCommonOption>
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+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <DeviceId></DeviceId>
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+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+            <ExitCodeStop>0</ExitCodeStop>
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+          <OutputDirectory>ADC_GainCompensation\Exe\</OutputDirectory>
+          <OutputName>ADC_GainCompensation</OutputName>
+          <CreateExecutable>1</CreateExecutable>
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+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="ADC_GainCompensation"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..c45a2d331
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.828509070">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.828509070" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.828509070" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.828509070." name="/" resourcePath="">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1231232201" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
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+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.714127587" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/ADC_GainCompensation}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1169912441" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.449761809" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.45925762" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.330844271" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.324028213" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1542611448" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1120818829" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1459498784" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1462719208" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1405421385" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1165280807" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.944484552" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1977648427" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1737523961" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.650179266" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.821963692" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1480150399" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.809103388" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1782988409" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.582747826" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1340867464" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1864783083" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="ADC_GainCompensation.null.1407762299" name="ADC_GainCompensation"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.357124483;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.357124483.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.449761809;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.468807987">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.828509070;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.828509070.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.265696402;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1429447580">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.project
new file mode 100644
index 000000000..dfa0571fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>ADC_GainCompensation</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>ADC_GainCompensation.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/ADC_GainCompensation.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/main.c
new file mode 100644
index 000000000..196f2ce59
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/main.c
@@ -0,0 +1,393 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_GainCompensation/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a short description of how to use the ADC
+  *          peripheral with sequencer, to convert several channels.
+  *          Channels converted are 1 channel on external pin and 2 internal 
+  *          channels (VrefInt and temperature sensor).
+  *          Moreover, voltage and temperature are then computed.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* Definitions of environment analog values */
+  /* Value of analog reference voltage (Vref+), connected to analog voltage   */
+  /* supply Vdda (unit: mV).                                                  */
+  #define VDDA_APPLI                       (3300U)
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variables for ADC conversion data computation to physical values */
+__IO uint16_t uhADCxConvertedData_Voltage_mVolt = 0U;        /* Value of voltage on GPIO pin (on which is mapped ADC channel) calculated from ADC conversion data (unit: mV) */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_ADC1_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+  uhADCxConvertedData_Voltage_mVolt = VAR_CONVERTED_DATA_INIT_VALUE;
+  
+  /* Initialize LED on board */
+  BSP_LED_Init(LED1);
+
+  /* Run the ADC calibration in single-ended mode */
+  if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+  {
+    /* Calibration Error */
+    Error_Handler();
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  
+  /*## Start ADC conversions ###############################################*/
+  /* Start ADC group regular conversion with DMA */
+  if (HAL_ADC_Start_DMA(&hadc1,
+                        (uint32_t *)&uhADCxConvertedData_Voltage_mVolt,
+                        1
+                       ) != HAL_OK)
+  {
+    /* ADC conversion start error */
+    Error_Handler();
+  }  
+  
+  /* Start Timer trigger */
+  if (HAL_TIM_Base_Start(&htim1) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+
+  BSP_LED_On(LED1);
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_MultiModeTypeDef multimode = {0};
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+
+  /** Common config
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.GainCompensation = VDDA_APPLI * GAIN_COMPENSATION_X1_FACTOR / DIGITAL_SCALE_12BITS;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  hadc1.Init.LowPowerAutoWait = DISABLE;
+  hadc1.Init.ContinuousConvMode = DISABLE;
+  hadc1.Init.NbrOfConversion = 1;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_TRGO;
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+  hadc1.Init.DMAContinuousRequests = ENABLE;
+  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc1.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure the ADC multi-mode
+  */
+  multimode.Mode = ADC_MODE_INDEPENDENT;
+  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 149;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 499;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1) 
+  {
+    /* Toggle LED1 */
+    BSP_LED_Off(LED1);
+    HAL_Delay(800);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+    BSP_LED_Off(LED1);
+    HAL_Delay(180);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  Error_Handler();
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..50a5c8710
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,233 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_adc1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+    PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC12_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    PB11     ------> ADC1_IN14
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    /* ADC1 DMA Init */
+    /* ADC1 Init */
+    hdma_adc1.Instance = DMA1_Channel1;
+    hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
+    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_adc1.Init.Mode = DMA_CIRCULAR;
+    hdma_adc1.Init.Priority = DMA_PRIORITY_MEDIUM;
+    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
+
+  /* USER CODE BEGIN ADC1_MspInit 1 */
+
+  /* USER CODE END ADC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+  /* USER CODE END ADC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADC12_CLK_DISABLE();
+
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    PB11     ------> ADC1_IN14
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11);
+
+    /* ADC1 DMA DeInit */
+    HAL_DMA_DeInit(hadc->DMA_Handle);
+  /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+  /* USER CODE END ADC1_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..8315a7b3f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c
@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_adc1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_adc1);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/readme.txt
new file mode 100644
index 000000000..c24e4b8db
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/readme.txt
@@ -0,0 +1,90 @@
+/**
+  @page ADC_GainCompensation ADC example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_GainCompensation/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the ADC_GainCompensation example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+Use ADC Gain compensation feature to get directly voltage in mVolt from conversion
+without need of data post computing.
+
+Example configuration:
+The channel is converted upon a timer trigger and result of conversions are stored
+into a variable by DMA, operating in circular mode.
+
+Example execution:
+From the start, the ADC converts the selected channel continuously, DMA transfers
+conversion data to a variable:
+    uhADCxConvertedData_Voltage_mVolt
+
+For debug: variable to monitor with debugger watch window:
+ - "uhADCxConvertedData_Voltage_mVolt": ADC converted data in mVolt
+
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+      to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+  1 GPIO for LED
+  1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+  TIMER
+  DMA
+
+Board settings:
+ - The voltage input on the ADC channel is provided by the on-board potentiometer
+ (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, Single conversion, Gain compensation, Timer trigger
+
+@par Directory contents 
+
+  - ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - ADC/ADC_GainCompensation/Inc/main.h                        Header for main.c module  
+  - ADC/ADC_GainCompensation/Src/stm32g4xx_it.c          Interrupt handlers
+  - ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - ADC/ADC_GainCompensation/Src/main.c                        Main program
+  - ADC/ADC_GainCompensation/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/ADC_GroupsRegularInjected.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/ADC_GroupsRegularInjected.ioc
new file mode 100644
index 000000000..17294cc16
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/ADC_GroupsRegularInjected.ioc
@@ -0,0 +1,196 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=ADC_CHANNEL_VREFINT|null|null|null
+ADC1.ContinuousConvMode=DISABLE
+ADC1.DMAContinuousRequests=ENABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=ENABLE
+ADC1.EnableInjectedOversampling=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T2_TRGO
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISING
+ADC1.ExternalTrigInjecConv=ADC_INJECTED_SOFTWARE_START
+ADC1.ExternalTrigInjecConvEdge=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,ScanConvMode,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,LowPowerAutoWait,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableInjectedOversampling,InjNumberOfConversion,ExternalTrigInjecConv,ExternalTrigInjecConvEdge,InjectedConvMode,injectedQueueMode,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,InjectedRank-1\#ChannelInjectedConversion,InjectedChannel-1\#ChannelInjectedConversion,InjectedSamplingTime-1\#ChannelInjectedConversion,InjectedOffsetNumber-1\#ChannelInjectedConversion,master,CommonPathInternal
+ADC1.InjNumberOfConversion=1
+ADC1.InjectedChannel-1\#ChannelInjectedConversion=ADC_CHANNEL_VREFINT
+ADC1.InjectedConvMode=None
+ADC1.InjectedOffsetNumber-1\#ChannelInjectedConversion=ADC_OFFSET_NONE
+ADC1.InjectedRank-1\#ChannelInjectedConversion=1
+ADC1.InjectedSamplingTime-1\#ChannelInjectedConversion=ADC_SAMPLETIME_47CYCLES_5
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_6CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.injectedQueueMode=DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.0.EventEnable=DISABLE
+Dma.ADC1.0.Instance=DMA1_Channel1
+Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.0.Mode=DMA_CIRCULAR
+Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.ADC1.0.Priority=DMA_PRIORITY_HIGH
+Dma.ADC1.0.RequestNumber=1
+Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.ADC1.0.SignalID=NONE
+Dma.ADC1.0.SyncEnable=DISABLE
+Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.ADC1.0.SyncRequestNumber=1
+Dma.ADC1.0.SyncSignalID=NONE
+Dma.Request0=ADC1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM2
+Mcu.IPNb=6
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=VP_ADC1_Vref_Input
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_TIM2_VS_ClockSourceINT
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.ADC1_2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_GroupsRegularInjected.ioc
+ProjectManager.ProjectName=ADC_GroupsRegularInjected
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+TIM2.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM2.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM2.CounterMode=TIM_COUNTERMODE_UP
+TIM2.IPParameters=Prescaler,CounterMode,Period,ClockDivision,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger
+TIM2.Period=49999
+TIM2.Prescaler=2
+TIM2.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM2.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_ADC1_Vref_Input.Mode=IN-Vrefint
+VP_ADC1_Vref_Input.Signal=ADC1_Vref_Input
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM2_VS_ClockSourceINT.Mode=Internal
+VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=ADC_GroupsRegularInjected
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewd
new file mode 100644
index 000000000..8ae767c29
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>ADC_GroupsRegularInjected</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewp
new file mode 100644
index 000000000..4756e516d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewp
@@ -0,0 +1,1158 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>ADC_GroupsRegularInjected</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>ADC_GroupsRegularInjected/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>ADC_GroupsRegularInjected/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>ADC_GroupsRegularInjected/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
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+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/Project.eww
new file mode 100644
index 000000000..8f1dfc4d6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\ADC_GroupsRegularInjected.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/main.h
new file mode 100644
index 000000000..abd845994
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/main.h
@@ -0,0 +1,81 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* Definitions of data related to this example */
+  /* Full-scale digital value with a resolution of 12 bits (voltage range     */
+  /* determined by analog voltage references Vref+ and Vref-,                 */
+  /* refer to reference manual).                                              */
+  #define DIGITAL_SCALE_12BITS             ((uint32_t) 0xFFF)
+  
+  /* Init variable out of ADC expected conversion data range */
+  #define VAR_CONVERTED_DATA_INIT_VALUE    (DIGITAL_SCALE_12BITS + 1)
+
+  /* Definition of ADCx conversions data table size */
+  #define ADC_CONVERTED_DATA_BUFFER_SIZE   ((uint32_t)  64)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..c181b51ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..56731dc68
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+void ADC1_2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvoptx
new file mode 100644
index 000000000..1bba9e924
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvoptx
@@ -0,0 +1,669 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>ADC_GroupsRegularInjected</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <WatchWindow1>
+        <Ww>
+          <count>0</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>aADCxConvertedData,0x0A</ItemText>
+        </Ww>
+        <Ww>
+          <count>1</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>uhADCxConvertedData_Injected,0x0A</ItemText>
+        </Ww>
+      </WatchWindow1>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvprojx
new file mode 100644
index 000000000..082446533
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvprojx
@@ -0,0 +1,602 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>ADC_GroupsRegularInjected</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
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+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="ADC_GroupsRegularInjected"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..883c5b4ae
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.588542165">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.588542165" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.588542165" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.588542165." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.205403396" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1029309929" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.2073895649" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1974456568" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1345716662" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1780610204" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.289073197" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.593831418" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.2083791548" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.735348689" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="ADC_GroupsRegularInjected.null.1893927440" name="ADC_GroupsRegularInjected"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2023836493;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2023836493.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.839080201;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.852844668">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.588542165;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.588542165.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1616781807;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.585889198">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.project
new file mode 100644
index 000000000..d34ddb7b7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>ADC_GroupsRegularInjected</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>ADC_GroupsRegularInjected.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/ADC_GroupsRegularInjected.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/main.c
new file mode 100644
index 000000000..b179fa7de
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/main.c
@@ -0,0 +1,476 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim2;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variable containing ADC conversions results */
+__IO uint16_t   aADCxConvertedData[ADC_CONVERTED_DATA_BUFFER_SIZE]; /* ADC conversion results table of regular group, channel on rank1 */
+__IO uint16_t   uhADCxConvertedData_Injected;                        /* ADC conversion result of injected group, channel on rank1 */
+
+__IO uint16_t   uhADCxConvertedData_Regular_Avg;       /* The average of the ADC conversion results table of regular group, channel on rank1 */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_TIM2_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  uint32_t tmp_index_adc_converted_data = 0;
+  uint32_t tmp_inj, tmp_avg;
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_ADC1_Init();
+  MX_TIM2_Init();
+  /* USER CODE BEGIN 2 */
+  for (tmp_index_adc_converted_data = 0; tmp_index_adc_converted_data < ADC_CONVERTED_DATA_BUFFER_SIZE; tmp_index_adc_converted_data++)
+  {
+    aADCxConvertedData[tmp_index_adc_converted_data] = VAR_CONVERTED_DATA_INIT_VALUE;
+  }
+  
+  /* Initialize LED on board */
+  BSP_LED_Init(LED1);
+  
+  
+  /* Run the ADC calibration in single-ended mode */
+  if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+  {
+    /* Calibration Error */
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  /*## Enable Timer ########################################################*/
+  if (HAL_TIM_Base_Start(&htim2) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  
+  /*## Start ADC conversions ###############################################*/
+  /* Start ADC group regular conversion with DMA */
+  if (HAL_ADC_Start_DMA(&hadc1,
+                        (uint32_t *)aADCxConvertedData,
+                        ADC_CONVERTED_DATA_BUFFER_SIZE
+                       ) != HAL_OK)
+  {
+    /* ADC conversion start error */
+    Error_Handler();
+  }  
+  
+  while (1)
+  {
+    /* Note: At this step, you can use potentiometer on board connected       */
+    /*       to ADC channel input to perform a ADC conversion                 */
+    /*       on a determined voltage level.                                   */
+
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Start ADC conversion on injected group */
+    if (HAL_ADCEx_InjectedStart_IT(&hadc1) != HAL_OK)
+    {
+      /* Start Conversation Error */
+      Error_Handler();
+    }
+    /* Wait for acquisition time of ADC samples on regular and injected       */
+    /* groups:                                                                */
+    /* wait time to let complete buffer of regular group to be filled (in ms) */
+    HAL_Delay(2*ADC_CONVERTED_DATA_BUFFER_SIZE);
+    
+    /* Turn-on/off LED1 in function of ADC conversion result                */
+    /* - Turn-off if voltage measured by injected group is below voltage      */
+    /*   measured by regular group (average of results table)                 */
+    /* - Turn-off if voltage measured by injected group is above voltage      */
+    /*   measured by regular group (average of results table)                 */
+    
+    /* Variables of conversions results are updated into ADC conversions      */
+    /* interrupt callback.                                                    */
+    tmp_inj = uhADCxConvertedData_Injected;
+    tmp_avg = uhADCxConvertedData_Regular_Avg;
+    if (tmp_inj < tmp_avg)
+    {
+      BSP_LED_Off(LED1);
+    }
+    else
+    {
+      BSP_LED_On(LED1);
+    }
+    
+    /* Note: ADC regular conversions data are stored into array               */
+    /*       "aADCxConvertedData"                                             */
+    /*       (for debug: see variable content into watch window).             */
+    
+    /* Note: ADC injected conversion data is stored into variable             */
+    /*       "uhADCxConvertedData_Injected"                                   */
+    /*       (for debug: see variable content into watch window).             */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_MultiModeTypeDef multimode = {0};
+  ADC_ChannelConfTypeDef sConfig = {0};
+  ADC_InjectionConfTypeDef sConfigInjected = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+
+  /** Common config
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.GainCompensation = 0;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  hadc1.Init.LowPowerAutoWait = DISABLE;
+  hadc1.Init.ContinuousConvMode = DISABLE;
+  hadc1.Init.NbrOfConversion = 1;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T2_TRGO;
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+  hadc1.Init.DMAContinuousRequests = ENABLE;
+  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc1.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure the ADC multi-mode
+  */
+  multimode.Mode = ADC_MODE_INDEPENDENT;
+  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_6CYCLES_5;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Injected Channel
+  */
+  sConfigInjected.InjectedChannel = ADC_CHANNEL_VREFINT;
+  sConfigInjected.InjectedRank = ADC_INJECTED_RANK_1;
+  sConfigInjected.InjectedSamplingTime = ADC_SAMPLETIME_47CYCLES_5;
+  sConfigInjected.InjectedSingleDiff = ADC_SINGLE_ENDED;
+  sConfigInjected.InjectedOffsetNumber = ADC_OFFSET_NONE;
+  sConfigInjected.InjectedOffset = 0;
+  sConfigInjected.InjectedNbrOfConversion = 1;
+  sConfigInjected.InjectedDiscontinuousConvMode = DISABLE;
+  sConfigInjected.AutoInjectedConv = DISABLE;
+  sConfigInjected.QueueInjectedContext = DISABLE;
+  sConfigInjected.ExternalTrigInjecConv = ADC_INJECTED_SOFTWARE_START;
+  sConfigInjected.ExternalTrigInjecConvEdge = ADC_EXTERNALTRIGINJECCONV_EDGE_NONE;
+  sConfigInjected.InjecOversamplingMode = DISABLE;
+  if (HAL_ADCEx_InjectedConfigChannel(&hadc1, &sConfigInjected) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM2_Init(void)
+{
+
+  /* USER CODE BEGIN TIM2_Init 0 */
+
+  /* USER CODE END TIM2_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM2_Init 1 */
+
+  /* USER CODE END TIM2_Init 1 */
+  htim2.Instance = TIM2;
+  htim2.Init.Prescaler = 2;
+  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim2.Init.Period = 49999;
+  htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM2_Init 2 */
+
+  /* USER CODE END TIM2_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/*   USER IRQ HANDLER TREATMENT                                               */
+/******************************************************************************/
+
+
+/**
+  * @brief  Conversion complete callback in non blocking mode
+  * @param  hadc : ADC handle
+  * @note   This example shows a simple way to report end of conversion
+  *         and get conversion result. You can add your own implementation.
+  * @retval None
+  */
+void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
+{
+  uint32_t tmp_index = 0;
+  uint32_t tmp_average = 0; /* Variable 32 bits for intermediate processing */
+  
+  /* Process average of the buffer */
+  for (tmp_index = 0; tmp_index < ADC_CONVERTED_DATA_BUFFER_SIZE; tmp_index++)
+  {
+    tmp_average += aADCxConvertedData[tmp_index];
+  }
+  tmp_average /= (ADC_CONVERTED_DATA_BUFFER_SIZE);
+  uhADCxConvertedData_Regular_Avg = (uint16_t)tmp_average;  
+}
+
+/**
+  * @brief  Injected conversion complete callback in non blocking mode 
+  * @param  hadc: ADC handle
+  * @retval None
+  */
+void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
+{
+  uhADCxConvertedData_Injected = HAL_ADCEx_InjectedGetValue(hadc, ADC_INJECTED_RANK_1);
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  Error_Handler();
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..be6ff9378
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,229 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : stm32g4xx_hal_msp.c
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_adc1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+    PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC12_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    /* ADC1 DMA Init */
+    /* ADC1 Init */
+    hdma_adc1.Instance = DMA1_Channel1;
+    hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
+    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_adc1.Init.Mode = DMA_CIRCULAR;
+    hdma_adc1.Init.Priority = DMA_PRIORITY_HIGH;
+    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
+
+    /* ADC1 interrupt Init */
+    HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
+  /* USER CODE BEGIN ADC1_MspInit 1 */
+
+  /* USER CODE END ADC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+  /* USER CODE END ADC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADC12_CLK_DISABLE();
+
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+    /* ADC1 DMA DeInit */
+    HAL_DMA_DeInit(hadc->DMA_Handle);
+
+    /* ADC1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(ADC1_2_IRQn);
+  /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+  /* USER CODE END ADC1_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspInit 0 */
+
+  /* USER CODE END TIM2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM2_CLK_ENABLE();
+  /* USER CODE BEGIN TIM2_MspInit 1 */
+
+  /* USER CODE END TIM2_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+  /* USER CODE END TIM2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM2_CLK_DISABLE();
+  /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+  /* USER CODE END TIM2_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..fe6101e4a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c
@@ -0,0 +1,145 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_adc1;
+extern ADC_HandleTypeDef hadc1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_adc1);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles ADC1 and ADC2 global interrupt.
+  */
+void ADC1_2_IRQHandler(void)
+{
+  /* USER CODE BEGIN ADC1_2_IRQn 0 */
+
+  /* USER CODE END ADC1_2_IRQn 0 */
+  HAL_ADC_IRQHandler(&hadc1);
+  /* USER CODE BEGIN ADC1_2_IRQn 1 */
+
+  /* USER CODE END ADC1_2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/readme.txt
new file mode 100644
index 000000000..0489d13ef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/readme.txt
@@ -0,0 +1,106 @@
+/**
+  @page ADC_GroupsRegularInjected ADC example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_GroupsRegularInjected/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the ADC_GroupsRegularInjected example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+Use ADC to perform conversions using the two ADC groups: regular group
+for ADC conversion on main stream and injected group for ADC conversions
+limited on specific events (conversions injected within main conversions
+stream).
+
+Example configuration:
+ADC is configured to convert a regular channel, in single conversion mode,
+from HW trigger: timer peripheral. And an injected channel, also in single
+conversion mode, but from SW trigger.
+DMA is configured to transfer reular channel conversion data in an array,
+in circular mode.
+A timer is configured in time base and to generate TRGO events for regular
+channel conversions.
+
+Example execution:
+From the start, the ADC converts the selected regular channel at each trig from timer.
+DMA transfers conversion data to the array, DMA transfer complete interruption occurs.
+Results array is updated indefinitely (DMA in circular mode).
+During this regular channel conversions, the injected channel conversion is launched by
+software.
+LED1 is turned on or off depending on whether injected channel conversion data is greater
+or not than regular channel conversions average.
+
+For debug: variables to monitor with debugger watch window:
+ - "aADCxConvertedData": ADC group regular conversion data (array of data)
+ - "uhADCxConvertedData_Injected": ADC injected group conversion data
+
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+      to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+  1 GPIO for LED
+  1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+  DMA
+  Timer
+
+Board settings:
+ - ADC is configured to convert ADC_CHANNEL_6 (pin 46 on connector CN5).
+ - The voltage input on ADC channel is provided by the on-board potentiometer (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+To observe voltage level applied on ADC channel through GPIO, connect a voltmeter on
+pin PC0 (pin 46 on connector CN5).
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on/off in function of ADC conversion
+   result.
+    - "On" if injected channel conversion data is greater than regular channel conversions average 
+    - "Off" if injected channel conversion data is lower than regular channel conversions
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, regular group, single conversion mode, HW trigger, 
+
+@par Directory contents 
+
+  - ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - ADC/ADC_GroupsRegularInjected/Inc/main.h                  Header for main.c module  
+  - ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c          Interrupt handlers
+  - ADC/ADC_GroupsRegularInjected/Src/main.c                  Main program
+  - ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/ADC_OffsetCompensation.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/ADC_OffsetCompensation.ioc
new file mode 100644
index 000000000..bb4e08a96
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/ADC_OffsetCompensation.ioc
@@ -0,0 +1,186 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=null|null|null|null
+ADC1.ContinuousConvMode=DISABLE
+ADC1.DMAContinuousRequests=ENABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T1_TRGO
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISING
+ADC1.GainCompensation=0
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,GainCompensation,ScanConvMode,EOCSelection,LowPowerAutoWait,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,Overrun,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,master,CommonPathInternal
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_640CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.0.EventEnable=DISABLE
+Dma.ADC1.0.Instance=DMA1_Channel1
+Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.0.Mode=DMA_CIRCULAR
+Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.ADC1.0.Priority=DMA_PRIORITY_MEDIUM
+Dma.ADC1.0.RequestNumber=1
+Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.ADC1.0.SignalID=NONE
+Dma.ADC1.0.SyncEnable=DISABLE
+Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.ADC1.0.SyncRequestNumber=1
+Dma.ADC1.0.SyncSignalID=NONE
+Dma.Request0=ADC1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM1
+Mcu.IPNb=6
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.Pin3=VP_TIM1_VS_ClockSourceINT
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_OffsetCompensation.ioc
+ProjectManager.ProjectName=ADC_OffsetCompensation
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.Dithering=Disable
+TIM1.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2
+TIM1.PeriodNoDither=499
+TIM1.Prescaler=149
+TIM1.RepetitionCounter=0
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ClockSourceINT.Mode=Internal
+VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=ADC_OffsetCompensation
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewd
new file mode 100644
index 000000000..6a99a3f46
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>ADC_OffsetCompensation</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewp
new file mode 100644
index 000000000..8d8b9c39d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewp
@@ -0,0 +1,1158 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>ADC_OffsetCompensation</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>ADC_OffsetCompensation/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>ADC_OffsetCompensation/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>ADC_OffsetCompensation/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
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+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/Project.eww
new file mode 100644
index 000000000..e1c3d2816
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\ADC_OffsetCompensation.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/main.h
new file mode 100644
index 000000000..0728cb243
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/main.h
@@ -0,0 +1,81 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_OffsetCompensation/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* User can use this section to tailor ADCx instance under use and associated
+   resources */
+
+/* Definitions of data related to this example */
+  /* Full-scale digital value with a resolution of 12 bits (voltage range     */
+  /* determined by analog voltage references Vref+ and Vref-,                 */
+  /* refer to reference manual).                                              */
+  #define DIGITAL_SCALE_12BITS             (0xFFFUL)
+
+  /* Init variable out of ADC expected conversion data range */
+  #define VAR_CONVERTED_DATA_INIT_VALUE    (DIGITAL_SCALE_12BITS + 1)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..c181b51ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..f4a33be7e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvoptx
new file mode 100644
index 000000000..239267243
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvoptx
@@ -0,0 +1,637 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>ADC_OffsetCompensation</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <GroupName>Application/User</GroupName>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvprojx
new file mode 100644
index 000000000..26db35494
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvprojx
@@ -0,0 +1,602 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>ADC_OffsetCompensation</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
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+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
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+          <InfinionOptionDll></InfinionOptionDll>
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+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
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+          <DBRegisterFilePath></DBRegisterFilePath>
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+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>ADC_OffsetCompensation\Exe\</OutputDirectory>
+          <OutputName>ADC_OffsetCompensation</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
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+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
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+            <UserProg1Name></UserProg1Name>
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+          </BeforeCompile>
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+            <UserProg1Name></UserProg1Name>
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+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
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+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
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+          <IncludeLibraryModules></IncludeLibraryModules>
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+        <DllOption>
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+        </DebugOption>
+        <Utilities>
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+            <RunIndependent>0</RunIndependent>
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+          <Flash3></Flash3>
+          <Flash4></Flash4>
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+          <pFcarmGrp></pFcarmGrp>
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+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
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+            <hadXRAM>0</hadXRAM>
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+            <RvdsVP>2</RvdsVP>
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+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
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+            <NoZi2>0</NoZi2>
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+            <Ra3Chk>0</Ra3Chk>
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+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
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+              <IROM>
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+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
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+              <XRAM>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
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+              </OCR_RVCT1>
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+              <OCR_RVCT3>
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+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
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+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="ADC_OffsetCompensation"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..752817ea6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1984544584">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1984544584" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1984544584" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1984544584." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.539177615" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1976763772" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.2096622917" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.2000675897" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1096594827" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2043632106" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1161981082" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1834704334" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.2009845962" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.908283376" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1956417939" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/ADC_OffsetCompensation}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.2040749806" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1367736482" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.594467348" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.755815315" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1113206753" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1589012778" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.733182659" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.627891809" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1619549971" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
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+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="ADC_OffsetCompensation.null.57706816" name="ADC_OffsetCompensation"/>
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+	<storageModule moduleId="scannerConfiguration">
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diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.project
new file mode 100644
index 000000000..235ec9efb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>ADC_OffsetCompensation</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>ADC_OffsetCompensation.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/ADC_OffsetCompensation.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/main.c
new file mode 100644
index 000000000..0e9e4670e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/main.c
@@ -0,0 +1,476 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_OffsetCompensation/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example uses ADC Offset compensation feature to translate
+  *          directly conversion result from the ADC range to an application 
+  *          specific range without need of post computing..
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+typedef struct
+{
+  uint32_t number;
+  uint32_t offset;
+  uint32_t sign;
+  FunctionalState satur;
+  char * label;
+} t_offsetcfg;
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* Definitions of environment analog values */
+  /* Value of analog reference voltage (Vref+), connected to analog voltage   */
+  /* supply Vdda (unit: mV).                                                  */
+  #define VDDA_APPLI                       (3300U)
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variable for ADC conversion data computation to physical values */
+__IO int16_t hADCxConvertedData_newRange = 0;        /* Converted data */
+
+/* Variables to handle offset change upon button press */
+uint16_t modeIndex = 0;
+const t_offsetcfg modeString[5] = {
+  {ADC_OFFSET_NONE,     0, ADC_OFFSET_SIGN_NEGATIVE, DISABLE, "Cfg #0: Offset disabled"},
+  {ADC_OFFSET_1,    0x800, ADC_OFFSET_SIGN_NEGATIVE, DISABLE, "Cfg #1: Offset enabled, sign is negative & saturation disabled"},
+  {ADC_OFFSET_1,    0x800, ADC_OFFSET_SIGN_POSITIVE, DISABLE, "Cfg #2: Offset enabled, sign is positive & saturation disabled"},
+  {ADC_OFFSET_1,    0x800, ADC_OFFSET_SIGN_NEGATIVE, ENABLE,  "Cfg #3: Offset enabled, sign is negative & saturation enabled"},
+  {ADC_OFFSET_1,    0x800, ADC_OFFSET_SIGN_POSITIVE, ENABLE,  "Cfg #4: Offset enabled, sign is positive & saturation enabled"},
+};
+char *currMode;
+
+/* Variable to manage push button on board: interface between ExtLine interruption and main program */
+__IO   uint8_t ubUserButtonClickEvent = RESET;  /* Event detection: Set after User Button interrupt */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  ADC_ChannelConfTypeDef sConfig = {0};
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_ADC1_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+  hADCxConvertedData_newRange = VAR_CONVERTED_DATA_INIT_VALUE;
+  
+  /* Initialize LED on board */
+  BSP_LED_Init(LED1);
+  
+  /* Configure User push-button in Interrupt mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  /* Run the ADC calibration in single-ended mode */
+  if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+  {
+    /* Calibration Error */
+    Error_Handler();
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  
+  /*## Start ADC conversions ###############################################*/
+  /* Start ADC group regular conversion with DMA */
+  if (HAL_ADC_Start_DMA(&hadc1,
+                        (uint32_t *)&hADCxConvertedData_newRange,
+                        1
+                       ) != HAL_OK)
+  {
+    /* ADC conversion start error */
+    Error_Handler();
+  }  
+  
+  /* Start Timer trigger */
+  if (HAL_TIM_Base_Start(&htim1) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  
+  currMode = modeString[modeIndex].label;
+
+  BSP_LED_On(LED1);
+  while (1)
+  {
+    /* Wait for event on push button to perform following actions */
+    while ((ubUserButtonClickEvent) == RESET)
+    {
+    }
+    /* Reset variable for next loop iteration (with debounce) */
+    HAL_Delay(200);
+    ubUserButtonClickEvent = RESET;
+    
+    /* Stop ADC group regular conversion with DMA */
+    if (HAL_ADC_Stop_DMA(&hadc1) != HAL_OK)
+    {
+      /* ADC conversion start error */
+      Error_Handler();
+    }
+    
+    modeIndex++;
+    if (modeIndex >= sizeof(modeString)/sizeof(modeString[0])) modeIndex = 0;
+    
+    /* Reconfigure offset */
+    sConfig.Channel = ADC_CHANNEL_6;
+    sConfig.Rank = ADC_REGULAR_RANK_1;
+    sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+    sConfig.SingleDiff = ADC_SINGLE_ENDED;
+    sConfig.OffsetNumber = modeString[modeIndex].number;
+    sConfig.Offset = modeString[modeIndex].offset;
+    sConfig.OffsetSign = modeString[modeIndex].sign;
+    sConfig.OffsetSaturation = modeString[modeIndex].satur;
+    if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+    {
+      Error_Handler();
+    }
+    
+    /* Restart ADC group regular conversion with DMA */
+    if (HAL_ADC_Start_DMA(&hadc1,
+                          (uint32_t *)&hADCxConvertedData_newRange,
+                          1
+                         ) != HAL_OK)
+    {
+      /* ADC conversion start error */
+      Error_Handler();
+    }
+  
+    /* Update current mode */
+    currMode = modeString[modeIndex].label;
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_MultiModeTypeDef multimode = {0};
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+
+  /** Common config
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.GainCompensation = 0;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  hadc1.Init.LowPowerAutoWait = DISABLE;
+  hadc1.Init.ContinuousConvMode = DISABLE;
+  hadc1.Init.NbrOfConversion = 1;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_TRGO;
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+  hadc1.Init.DMAContinuousRequests = ENABLE;
+  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc1.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure the ADC multi-mode
+  */
+  multimode.Mode = ADC_MODE_INDEPENDENT;
+  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 149;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 499;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/*   USER IRQ HANDLER TREATMENT                                               */
+/******************************************************************************/
+
+/**
+  * @brief EXTI line detection callbacks
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ if (GPIO_Pin == USER_BUTTON_PIN)
+ {
+   /* Set variable to report push button event to main program */
+   ubUserButtonClickEvent = SET;
+ }
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1) 
+  {
+    /* Toggle LED1 */
+    BSP_LED_Off(LED1);
+    HAL_Delay(800);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+    BSP_LED_Off(LED1);
+    HAL_Delay(180);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  Error_Handler();
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..2faf7a2cd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,223 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_adc1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+    PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC12_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    /* ADC1 DMA Init */
+    /* ADC1 Init */
+    hdma_adc1.Instance = DMA1_Channel1;
+    hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
+    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_adc1.Init.Mode = DMA_CIRCULAR;
+    hdma_adc1.Init.Priority = DMA_PRIORITY_MEDIUM;
+    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
+
+  /* USER CODE BEGIN ADC1_MspInit 1 */
+
+  /* USER CODE END ADC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+  /* USER CODE END ADC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADC12_CLK_DISABLE();
+
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN6
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+    /* ADC1 DMA DeInit */
+    HAL_DMA_DeInit(hadc->DMA_Handle);
+  /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+  /* USER CODE END ADC1_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a91546741
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c
@@ -0,0 +1,228 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_adc1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_adc1);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles key press external line interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/readme.txt
new file mode 100644
index 000000000..4072d5eaf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/readme.txt
@@ -0,0 +1,107 @@
+/**
+  @page ADC_OffsetCompensation ADC example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Examples/ADC/ADC_OffsetCompensation/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the ADC_OffsetCompensation example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+Use ADC Offset compensation feature to translate directly conversion result from
+the ADC range to an application specific range without need of post computing.
+
+Example configuration:
+The channel is converted upon a timer trigger and results of conversions are stored
+into a variable by DMA, operating in circular mode.
+
+Example execution:
+From the start, the ADC converts the selected channel continuously, DMA transfers
+conversion data to a variable: hADCxConvertedData_newRange
+
+At startup, offset is disabled, ADC operates normally.
+Upon each press on User push-button, the offset configuration changes to next one in list:
+Configuration #1: Offset enabled, sign is negative & saturation disabled
+                  Translation operated:    0V .. 3,3V  => -2048 .. 2047
+Configuration #2: Offset enabled, sign is positive & saturation disabled
+                  Translation operated:    0V .. 3,3V  =>  2048 .. 6143
+Configuration #3: Offset enabled, sign is negative & saturation enabled
+                  Translation operated:    0V .. ~1,65V  =>  0
+                                       ~1,65V ..   3,3V  =>  0 .. 2047
+Configuration #4: Offset enabled, sign is positive & saturation enabled
+                  Translation operated:    0V .. ~1,65V  =>  2048 .. 4095
+                                       ~1,65V ..   3,3V  =>  4095
+
+Note: when configuration #4 is selected, a press on User push-button returns to initial
+offset configuration. Subsequent presses will allow to go through above configuration again.
+                  
+For debug: variable to monitor with debugger watch window:
+ - "hADCxConvertedData_newRange": ADC converted data
+ - "currMode": ADC offset current configuration
+
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+      to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+  1 GPIO for LED
+  1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+  1 GPIO for push button
+  TIMER
+  DMA
+
+Board settings:
+ - The voltage input on the ADC channel is provided by the on-board potentiometer
+ (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, Single conversion, Offset compensation, Timer trigger, DMA
+
+@par Directory contents 
+
+  - ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - ADC/ADC_OffsetCompensation/Inc/main.h                        Header for main.c module  
+  - ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c          Interrupt handlers
+  - ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - ADC/ADC_OffsetCompensation/Src/main.c                        Main program
+  - ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewd b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewd
new file mode 100644
index 000000000..188698476
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>STM32G474E_EVAL1</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>29</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CEndian</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCVariant</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>MemOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MemFile</name>
+                    <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32G4xx.ddf</state>
+                </option>
+                <option>
+                    <name>RunToEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RunToName</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CFpuProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDDFArgumentProducer</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadSuppressDownload</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDownloadVerifyAll</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCProductVersion</name>
+                    <state>5.30.0.51236</state>
+                </option>
+                <option>
+                    <name>OCDynDriverList</name>
+                    <state>STLINK_ID</state>
+                </option>
+                <option>
+                    <name>OCLastSavedByProductVersion</name>
+                    <state>8.20.2.14834</state>
+                </option>
+                <option>
+                    <name>UseFlashLoader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CLowLevel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCBE8Slave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MacFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CDevice</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>FlashLoadersV3</name>
+                    <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32G4x4.board</state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OverrideDefFlashBoard</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesOffset1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesUse1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDeviceConfigMacroFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDebuggerExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAllMTBOptions</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreMaster</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticorePort</name>
+                    <state>53461</state>
+                </option>
+                <option>
+                    <name>OCMulticoreWorkspace</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveProject</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveConfiguration</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadExtraImage</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAttachSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MassEraseBeforeFlashing</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ARMSIM_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCSimDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCSimEnablePSP</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspOverrideConfig</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspConfigFile</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CADI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCadiMemory</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>Fast Model</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCADILogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCADILogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CMSISDAP_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CMSISDAPResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>CMSISDAPDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CMSISDAPProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>GDBSERVER_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$TOOLKIT_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJTagBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>main</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IJET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>IjetPowerFromProbe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPowerRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetProtocolRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPin</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetCpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPrescalerList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPreferETB</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetTraceSettingsList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetTraceSizeList</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>FlashBoardPathSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>JLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>16</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>JLinkSpeed</name>
+                    <state>32</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkLogFile</name>
+                    <state>$TOOLKIT_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJLinkHWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>JLinkInitialSpeed</name>
+                    <state>32</state>
+                </option>
+                <option>
+                    <name>CCDoJlinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkCommRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>CCJLinkSpeedRadioV2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCUSBDevice</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCRDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkUpdateBreakpoints</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkResetList</name>
+                    <version>6</version>
+                    <state>7</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCTcpIpAlt</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTcpIpSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSourceDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkDeviceName</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>LMIFTDI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>2</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>LmiftdiSpeed</name>
+                    <state>500</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>PEMICRO_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJPEMicroShowSettings</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>STLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCSTLinkCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDAPNumber</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkResetList</name>
+                    <version>3</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state>216.0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNoSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDebugAccessPortRadio</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>Browse to your third-party driver</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$TOOLKIT_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>TIFET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVccTypeDefault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CCMSPFetVCCDefault</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetSettlingtime</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioJtagSpeedType</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetConnection</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetUsbComPort</name>
+                    <state>Automatic</state>
+                </option>
+                <option>
+                    <name>CCMSPFetAllowAccessToBSL</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioEraseFlash</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>XDS100_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>6</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCXds100CatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TIPackageOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TIPackage</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>BoardFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCXds100BreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100DoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockEdit</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCXds100HWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100JtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ProbeList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPort</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+                <loadFlag>1</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewp b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewp
new file mode 100644
index 000000000..1e3a982c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewp
@@ -0,0 +1,1305 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>STM32G474E_EVAL1</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>3</archiveVersion>
+            <data>
+                <version>30</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>ExePath</name>
+                    <state>STM32G474E_EVAL1\Exe</state>
+                </option>
+                <option>
+                    <name>ObjPath</name>
+                    <state>STM32G474E_EVAL1\Obj</state>
+                </option>
+                <option>
+                    <name>ListPath</name>
+                    <state>STM32G474E_EVAL1\List</state>
+                </option>
+                <option>
+                    <name>GEndianMode</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>Input description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>Output description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGCoreOrChip</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelect</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>RTDescription</name>
+                    <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+                </option>
+                <option>
+                    <name>OGProductVersion</name>
+                    <state>4.41A</state>
+                </option>
+                <option>
+                    <name>OGLastSavedByProductVersion</name>
+                    <state>8.20.2.14834</state>
+                </option>
+                <option>
+                    <name>GeneralEnableMisra</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVerbose</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGChipSelectEditMenu</name>
+                    <state>STM32G474RE	ST STM32G474RE</state>
+                </option>
+                <option>
+                    <name>GenLowLevelInterface</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GEndianModeBE</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GenStdoutInterface</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules98</name>
+                    <version>0</version>
+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules04</name>
+                    <version>0</version>
+                    <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+                </option>
+                <option>
+                    <name>RTConfigPath2</name>
+                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+                </option>
+                <option>
+                    <name>GBECoreSlave</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>OGUseCmsis</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGUseCmsisDspLib</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CoreVariant</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>GFPUDeviceSlave</name>
+                    <state>STM32G474RE	ST STM32G474RE</state>
+                </option>
+                <option>
+                    <name>FPU2</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>NrRegs</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>NEON</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GFPUCoreSlave2</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>OGCMSISPackSelectDevice</name>
+                </option>
+                <option>
+                    <name>OgLibHeap</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGLibAdditionalLocale</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGPrintfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGPrintfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DSPExtension</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ICCARM</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>34</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCOptimizationNoSizeConstraints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDefines</name>
+                    <state>USE_HAL_DRIVER</state>
+                    <state>STM32G474xx</state>
+                    <state>USE_STM32G474E_EVAL1</state>
+                    <state>USE_IOEXPANDER</state>
+                </option>
+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocComments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
+                </option>
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+                    <state>$PROJ_DIR$\stm32g474xx_flash.icf</state>
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+                    </file>
+                    <file>
+                        <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152\mfxstm32l152_reg.c</name>
+                    </file>
+                </group>
+                <group>
+                    <name>MT25ql512abb</name>
+                    <file>
+                        <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\mt25ql512abb\mt25ql512abb.c</name>
+                    </file>
+                </group>
+                <group>
+                    <name>STTS751</name>
+                    <file>
+                        <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\stts751\stts751.c</name>
+                    </file>
+                    <file>
+                        <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\stts751\stts751_reg.c</name>
+                    </file>
+                </group>
+                <group>
+                    <name>WM8994</name>
+                    <file>
+                        <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\wm8994\wm8994.c</name>
+                    </file>
+                    <file>
+                        <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\wm8994\wm8994_reg.c</name>
+                    </file>
+                </group>
+            </group>
+            <group>
+                <name>STM32G474E_EVAL1</name>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_audio.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_bus.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_env_sensor.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_idd.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_io.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_lcd.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_qspi.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_sd.c</name>
+                </file>
+                <file>
+                    <name>$PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_sram.c</name>
+                </file>
+            </group>
+        </group>
+        <group>
+            <name>CMSIS</name>
+            <file>
+                <name>$PROJ_DIR$\..\Src\system_stm32g4xx.c</name>
+            </file>
+        </group>
+        <group>
+            <name>STM32G4xx_HAL_Driver</name>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_adc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_adc_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_comp.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_i2c.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_i2c_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_opamp.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_opamp_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_qspi.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rtc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rtc_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sai.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sai_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smartcard.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smartcard_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smbus.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sram.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_fmc.c</name>
+            </file>
+        </group>
+        <group>
+            <name>Utilities</name>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\..\Utilities\LCD\stm32_lcd.c</name>
+            </file>
+        </group>
+    </group>
+    <group>
+        <name>Example</name>
+        <group>
+            <name>EWARM</name>
+            <file>
+                <name>$PROJ_DIR$\startup_stm32g474xx.s</name>
+            </file>
+        </group>
+        <group>
+            <name>User</name>
+            <file>
+                <name>$PROJ_DIR$\..\Src\audio_play.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\audio_rec.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\bus.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\button.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\com.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\idd.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\io.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\joystick.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\lcd.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\led.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\main.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\potentiometer.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\qspi.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\sd.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\sram.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\stm32g4xx_it.c</name>
+            </file>
+        </group>
+    </group>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.eww
new file mode 100644
index 000000000..e0fd14b2a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.eww
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\Project.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..be6f73913
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
\ No newline at end of file
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/Image_160_120_RGB888.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/Image_160_120_RGB888.h
new file mode 100644
index 000000000..9da1a415d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/Image_160_120_RGB888.h
@@ -0,0 +1,14413 @@
+// *****************************************************************************
+// File generated by STM32 Imager 1.0
+// Image name : Image
+// Coding : 24bpp mode
+// Source file : C:\worksapce\Graphics\tools\image_160_120.bmp
+// *****************************************************************************
+
+#define Image_height 120
+#define Image_width 160
+#define Image_bpp 5
+
+const uint32_t Image_RGB888[14400] =
+{
+0x2F00532F,
+0x502A0254,
+0x502801,
+0x29015029,
+0x4F27014E,
+0x4E2701,
+0x28025029,
+0x4D2A004E,
+0x2502900,
+0x2A014E2A,
+0x4E29024D,
+0x14F2900,
+0x27025029,
+0x4E2A024E,
+0x14F2A02,
+0x2C00502D,
+0x512B0151,
+0x1532D00,
+0x3100542F,
+0x53310152,
+0x1583500,
+0x37025736,
+0x5A35025A,
+0x55D3503,
+0x35025C35,
+0x5E32025B,
+0x35F3301,
+0x31005E32,
+0x5F310060,
+0x2613300,
+0x32016032,
+0x6032005F,
+0x5C3003,
+0x2F015B2F,
+0x5E2F015D,
+0x1603100,
+0x30006133,
+0x72320367,
+0xB863306,
+0x2B1D992E,
+0xAE2C2DA3,
+0x48B82D40,
+0x2C55C02B,
+0xCB305CC6,
+0x60D12F5E,
+0x2E60D02D,
+0xD53262D2,
+0x68DA3467,
+0x376CDC37,
+0xE03E6ADB,
+0x6FDF4070,
+0x4571DF43,
+0xDF456FE0,
+0x6BE3466B,
+0x476CE646,
+0xE94B6DE8,
+0x68EA506B,
+0x4C66EC4E,
+0xE04864E8,
+0x56D83F61,
+0x3C59CE3D,
+0xBE375CC6,
+0x66B63660,
+0x356EB333,
+0xC33977BA,
+0x84C63980,
+0x408ACA3E,
+0xCE4C8BCB,
+0x7ECD4F87,
+0x556ACA54,
+0xB95B5AC3,
+0x38B26042,
+0x5A2EA75E,
+0x90552E9E,
+0x2B88522D,
+0x53298450,
+0x85532D86,
+0x2D86532D,
+0x522C8752,
+0x88513089,
+0x30895230,
+0x56318A52,
+0x8D56348D,
+0x338C5434,
+0x55358E56,
+0x9056358F,
+0x38935637,
+0x583C9457,
+0x95583C94,
+0x3F975A3C,
+0x5A3D9858,
+0x9B58419C,
+0x439D5B40,
+0x59439E5B,
+0x9F5B459E,
+0x479F5D4A,
+0x5A499E5E,
+0x9D5B489E,
+0x4B9F5948,
+0x554C9E57,
+0x9D544D9D,
+0x4B9D524D,
+0x534A9B4F,
+0x99514C9C,
+0x489A4E49,
+0x4F479A4C,
+0x97514497,
+0x43945244,
+0x4F439551,
+0x924E4093,
+0x4093503F,
+0x5140934F,
+0x934F3F94,
+0x3F94503E,
+0x52419754,
+0x99563D96,
+0x469B5841,
+0x564A9F57,
+0xA7594DA3,
+0x53A95B4F,
+0x30005131,
+0x4F2B0051,
+0x1502900,
+0x27025029,
+0x4E28014E,
+0x14E2801,
+0x29014E28,
+0x4F29014F,
+0x2502902,
+0x29014F29,
+0x4F2A014D,
+0x4E2602,
+0x29024F28,
+0x4E2A0250,
+0x2512C01,
+0x2B01502A,
+0x502B0150,
+0x2542E00,
+0x2F01542D,
+0x53320153,
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+0xDC00F8D0,
+0xFED905FA,
+0x5FBBD02,
+0xBA03FCC4,
+0xDFAB18ED,
+0x8E0C712,
+0xC902CFD3,
+0xADBE05BA,
+0x3A6BA01,
+0xAF06A1BF,
+0x8AB4198F,
+0x55508846,
+0x9A4372A5,
+0x4C9C2F6D,
+0x484FA63B,
+0x974C8B8A,
+0xD1B45FAF,
+0x14B7E00,
+0x75004579,
+0x256B0034,
+0x286A02,
+0x69003168,
+0x3C6C003A,
+0x3E6E01,
+0x6B013E6E,
+0x3566023B,
+0x2D6401,
+0x5D01295E,
+0x2D5B012B,
+0x3305801,
+0x4C013150,
+0x1F490228,
+0x41D4603,
+0x470A1845,
+0x44A0910,
+0xD034C0D,
+0x510E0050,
+0x501601,
+0x1C004F1A,
+0x5A1E0055,
+0x15E1F00,
+0x25015C22,
+0x62270060,
+0x642700,
+0x2800622A,
+0x68260164,
+0x1682B00,
+0x27006929,
+0x6B28006B,
+0x6A2601,
+0x2A016B28,
+0x6D2C006D,
+0x6D2C00,
+0x31006C2E,
+0x722F016F,
+0x733100,
+0x35007333,
+0x6A330071,
+0x1623502,
+0x3E005A39,
+0x4E410152,
+0x1494B00,
+0x5202474F,
+0x48570247,
+0x4F5804,
+0x5B035159,
+0x505D0151,
+0x4525E02,
+0x6305525E,
+0x4D630A50,
+0x134C6811,
+0x431F4A69,
+0x381F7946,
+0x922C1490,
+0x12922815,
+0x23129224,
+0x85291A85,
+0x1D9B341E,
+0x3F1CAF40,
+0xA3371AAB,
+0x15A23417,
+0x3118A62F,
+0xAD341BA8,
+0x1FB4381B,
+0x3D1DBC3D,
+0xBF401FBE,
+0x18BB3318,
+0x3B1AC138,
+0xCB401DC7,
+0x21CF451E,
+0x471ED145,
+0xD3461ED1,
+0x1DD9481E,
+0x3F1DD53E,
+0xDE4A27D5,
+0x38E4552F,
+0x743AE961,
+0xEB891FEC,
+0x15E98D19,
+0xA314DE92,
+0xEFA813E3,
+0x17F7A914,
+0x6D18FB87,
+0xF16219F0,
+0x21F36F18,
+0xA229F276,
+0xEFB91CF5,
+0x1CF3BB21,
+0xDE15ECB8,
+0xF1D405F7,
+0x1F8DB03,
+0xCB0AF8D9,
+0xFDCC0FF3,
+0x7F7CA0E,
+0xE000F6D6,
+0xFBDC00FA,
+0x1F8DA02,
+0xD203F5D1,
+0xFBCB02FD,
+0x2FDCC02,
+0xDC02F9D7,
+0xF3C103FB,
+0x2FBB901,
+0xD500FABF,
+0xEFC70BFF,
+0xEE0BD13,
+0xBE06D4BB,
+0xAEB602C9,
+0x96AF05,
+0xB2119FC2,
+0x887D3094,
+0x4CB67B56,
+0x9041A575,
+0x62A22688,
+0x3A54AC30,
+0x991F559C,
+0xA3A54758,
+0x24A8302,
+0x79004482,
+0x2B710032,
+0x12E6E02,
+0x69013C6A,
+0x496B0046,
+0x1486E00,
+0x6C004770,
+0x3A670140,
+0x1316400,
+0x5C003064,
+0x355C0031,
+0x3A5A01,
+0x4F013652,
+0x274D0031,
+0x3204A02,
+0x48062249,
+0xA4B0815,
+0x1004500B,
+0x58100154,
+0x591901,
+0x1D00591B,
+0x6020025C,
+0x1622301,
+0x26005F26,
+0x62270062,
+0x1652900,
+0x2B016428,
+0x662B0063,
+0x652C01,
+0x28006529,
+0x66260469,
+0x682702,
+0x2C016629,
+0x692A0169,
+0x16B2A01,
+0x2E006B2E,
+0x6F2F016C,
+0x713300,
+0x32017432,
+0x6C320072,
+0x653801,
+0x3F025C38,
+0x4E400052,
+0x1494700,
+0x4D02474C,
+0x4A520145,
+0x4D5300,
+0x54015057,
+0x4E5A004F,
+0x14F5B00,
+0x5E004E5A,
+0x4E5E014F,
+0xC4D6408,
+0x480B4B67,
+0x44276A49,
+0x94351B93,
+0x14922A15,
+0x2810942A,
+0x8B231093,
+0x208E2715,
+0x4321A738,
+0xAD4223AE,
+0x1DA93B21,
+0x341CAA37,
+0xAD351BA9,
+0x1DAE3319,
+0x3C21B73B,
+0xC03F25BA,
+0x1ABC3C1B,
+0x471FC242,
+0xCE4822CB,
+0x2AD04629,
+0x4624D146,
+0xD44525D0,
+0x25D74925,
+0x522FD746,
+0xE35936DE,
+0x38E66235,
+0x873BEC75,
+0xED8E27F0,
+0x1CED8C17,
+0x811DEA85,
+0xE36C1CE6,
+0x1EE6591C,
+0x881EF072,
+0xF98D22F5,
+0x1FF8901D,
+0xAB21F594,
+0xF3BE23F4,
+0x18F1CE20,
+0xD410F2CC,
+0xF5D20CF1,
+0x7EFCA0D,
+0xD00FF7D6,
+0xF5C611F8,
+0x2FBD60E,
+0xE100F7E1,
+0xF8DC01F7,
+0x4F5D200,
+0xC802F9CE,
+0xFACC00F7,
+0x1F9CA00,
+0xD701F7D4,
+0xF6C802F7,
+0x1F6BC00,
+0xCD03F8C0,
+0xFCE300F7,
+0x8F7DF06,
+0xB306E2C8,
+0xCBB804D5,
+0x9C4C601,
+0xA71BA1BC,
+0xA1874580,
+0x42CA714E,
+0x5D42C45D,
+0x96813DB8,
+0x246A6D23,
+0x8E2A558E,
+0x448B1C4B};
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/ft6x06_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/ft6x06_conf.h
new file mode 100644
index 000000000..7bf7180f9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/ft6x06_conf.h
@@ -0,0 +1,40 @@
+/**
+ ******************************************************************************
+ * @file    ft6x06_conf.h
+ * @author  MCD Application Team
+ * @brief   This file contains specific configuration for the
+ *          ft6x06.c that can be modified by user.
+ ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef FT6X06_CONF_H
+#define FT6X06_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* Macros --------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+#define FT6X06_AUTO_CALIBRATION_ENABLED      1U
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* FT6X06_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/main.h
new file mode 100644
index 000000000..3223b8679
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/main.h
@@ -0,0 +1,122 @@
+/**
+  ******************************************************************************
+  * @file    DCMI/DCMI_CaptureMode/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef MAIN_H
+#define MAIN_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "string.h"
+#include "stdlib.h"
+#include "stdio.h"
+#include "stm32g4xx_hal.h"
+#include "stm32g474e_eval_errno.h"
+#include "stm32g474e_eval_conf.h"
+#include "stm32g474e_eval.h"
+#include "stm32g474e_eval_bus.h"
+#include "stm32g474e_eval_idd.h"
+#include "stm32g474e_eval_lcd.h"
+#include "stm32g474e_eval_audio.h"
+#include "stm32g474e_eval_sd.h"
+#include "stm32g474e_eval_qspi.h"
+#include "stm32g474e_eval_sram.h"
+#include "stm32g474e_eval_env_sensor.h"
+
+#include "LCD/stm32_lcd.h"
+
+/* Exported variables --------------------------------------------------------*/
+extern SRAM_HandleTypeDef           hSramHandle;
+extern const unsigned char          stlogo[];
+extern uint32_t                     SdmmcTest;
+extern volatile uint8_t             mfx_exti_received;
+extern uint32_t                     ButtonState;
+extern __IO uint32_t UserButtonPressed;
+
+/* Exported types ------------------------------------------------------------*/
+typedef struct
+{
+  int32_t  (*DemoFunc)(void);
+  uint8_t  DemoName[50];
+} BSP_DemoTypedef;
+
+typedef enum {
+  AUDIO_ERROR_NONE = 0,
+  AUDIO_ERROR_NOTREADY,
+  AUDIO_ERROR_IO,
+  AUDIO_ERROR_EOF,
+}AUDIO_ErrorTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* The Audio file is flashed with ST-Link Utility @ flash address =  AUDIO_SRC_FILE_ADDRESS */
+#define AUDIO_SRC_FILE_ADDRESS            0x08023000  /* Audio file address in flash */
+
+/* LCD Frame Buffer address */
+#define LCD_FRAME_BUFFER                  0xC0000000 /* LCD Frame buffer of size 800x480 in ARGB8888 */
+#define AUDIO_REC_START_ADDR              0x08024000
+
+#define SD_DMA_MODE                       0U
+#define SD_IT_MODE                        1U
+#define SD_POLLING_MODE                   2U
+#define SD_BLOCK_LEN                      512U
+
+/* Exported macro ------------------------------------------------------------*/
+#define COUNT_OF_EXAMPLE(x)               (sizeof(x)/sizeof(BSP_DemoTypedef))
+
+/* Exported functions ------------------------------------------------------- */
+void LCD_demo (void);
+void Joystick_demo(void);
+int32_t AudioPlay_demo (void);
+int32_t AudioPlay_demo2 (void);
+void REC_INSTANCE1_HDMI_demo(void);
+void REC_INSTANCE1_SingleBuff_demo(void);
+void REC_INSTANCE1_MultiBuff_demo(void);
+void REC_INSTANCE1_Mute_demo(void);
+void REC_INSTANCE1_SetDevice_demo(void);
+
+//void AudioChangeDevice_demo (void);
+int32_t AudioRec_demo (void);
+int32_t AudioRecAnalog_demo (void);
+
+int32_t  Led_demo(void);
+int32_t  Button_demo(void);
+int32_t  Pot_demo(void);
+int32_t  Bus_demo(void);
+#if (USE_BSP_IO_CLASS == 1)
+int32_t  Joy_demo(void);
+int32_t  Io_demo(void);
+int32_t  Idd_demo(void);
+int32_t  Lcd_demo(void);
+#endif
+int32_t  Com_demo(void);
+int32_t  SRAM_demo(void);
+int32_t  QSPI_demo(void);
+int32_t  SD_demo(void);
+
+void     Error_Handler(void);
+uint32_t CheckResult(void);
+void     StartTest(void);
+uint8_t  CheckForUserInput(void);
+uint8_t  AUDIO_Process(void);
+
+void ButtonPendingCallback(void);
+
+void Error_Handler(void);
+
+#endif /* MAIN_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/mt25ql512abb_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/mt25ql512abb_conf.h
new file mode 100644
index 000000000..6b7085c79
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/mt25ql512abb_conf.h
@@ -0,0 +1,72 @@
+/**
+  ******************************************************************************
+  * @file    mt25ql512abb_conf_template.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the description of the MT25QL512ABB QSPI memory.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef MT25QL512ABB_CONF_H
+#define MT25QL512ABB_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/** @addtogroup BSP
+  * @{
+  */
+#define CONF_QSPI_ODS             MT25QL512ABB_EVCR_ODS_30   /* MT25QL512ABB Output Driver Strength         */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MT25QL512ABB_CONF_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stlogo.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stlogo.h
new file mode 100644
index 000000000..4617f7d08
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stlogo.h
@@ -0,0 +1,577 @@
+__ALIGN_END const unsigned char stlogo[9174]=
+{
+0x42,0x4d,0xd6,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x36,0x00,0x00,0x00,0x28,0x00,
+0x00,0x00,0x50,0x00,0x00,0x00,0x39,0x00,0x00,0x00,0x01,0x00,0x10,0x00,0x03,0x00,
+0x00,0x00,0xa0,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
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+0x36,0x95,0x57,0x9d,0x36,0x95,0x57,0x9d,0x36,0x95,0x56,0x95,0x36,0x95,0x36,0x95,
+0x36,0x95,0x36,0x95,0x36,0x95,0x36,0x95,0x16,0x95,0x36,0x95,0x16,0x8d,0x36,0x95,
+0x16,0x95,0x36,0x95,0x16,0x95,0x36,0x95,0x16,0x95,0x36,0x95,0x36,0x95,0x36,0x95,
+0x36,0x95,0x36,0x95,0x36,0x95,0x57,0x9d,0x36,0x95,0x57,0x9d,0x56,0x95,0x57,0x9d,
+0x56,0x95,0x57,0x9d,0x56,0x95,0x57,0x9d,0x57,0x9d,0x77,0x9d,0x57,0x9d,0x77,0x9d,
+0x77,0x9d,0x57,0x95,0xbe,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb1,0x53,0x11,0x2b,
+0x93,0x3b,0x92,0x33,0xb3,0x3b,0xb3,0x33,0xd4,0x3b,0xf5,0x33,0x16,0x3c,0xd4,0x2b,
+0x94,0x2b,0x93,0x23,0xb4,0x2b,0xb4,0x2b,0xb5,0x2b,0xb4,0x2b,0xd5,0x33,0xd5,0x33,
+0xf5,0x3b,0xf5,0x33,0x15,0x3c,0x15,0x3c,0x35,0x44,0x35,0x44,0x56,0x4c,0x55,0x4c,
+0x76,0x4c,0x75,0x4c,0x96,0x54,0x76,0x54,0x96,0x54,0x76,0x54,0x76,0x54,0x56,0x4c,
+0x76,0x4c,0x55,0x44,0x56,0x4c,0x35,0x44,0x36,0x44,0x15,0x3c,0x15,0x3c,0xf5,0x33,
+0xf5,0x3b,0xf5,0x33,0xf5,0x33,0xd5,0x2b,0xd5,0x2b,0xb4,0x2b,0xb4,0x2b,0x93,0x2b,
+0x94,0x2b,0x32,0x1b,0xf6,0x84,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x30,0x33,
+0x52,0x2b,0x93,0x3b,0xb3,0x33,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xf5,0x3b,0x16,0x3c,
+0x16,0x3c,0x57,0x3c,0x57,0x3c,0x78,0x44,0x77,0x3c,0x98,0x44,0x98,0x44,0xb8,0x4c,
+0xb8,0x4c,0xd9,0x54,0xd8,0x54,0xf9,0x5c,0xf8,0x5c,0x19,0x65,0x19,0x65,0x39,0x65,
+0x39,0x65,0x59,0x6d,0x59,0x6d,0x7a,0x75,0x59,0x6d,0x59,0x75,0x39,0x6d,0x39,0x6d,
+0x19,0x65,0x19,0x65,0xf8,0x5c,0xf9,0x5c,0xd8,0x54,0xd9,0x54,0xb8,0x54,0xb8,0x4c,
+0x98,0x4c,0x98,0x4c,0x77,0x44,0x78,0x44,0x57,0x3c,0x57,0x44,0x36,0x3c,0x36,0x3c,
+0x15,0x3c,0xf6,0x3b,0x72,0x33,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x74,0x64,0x11,0x23,0x93,0x33,0xb3,0x33,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xf5,0x33,
+0x16,0x3c,0x16,0x34,0x37,0x3c,0x57,0x3c,0x77,0x3c,0x57,0x3c,0x98,0x44,0x97,0x44,
+0x98,0x4c,0x98,0x4c,0xd8,0x54,0xd8,0x54,0xf8,0x5c,0xf8,0x5c,0x19,0x65,0x18,0x5d,
+0x39,0x65,0x39,0x6d,0x59,0x6d,0x59,0x6d,0x59,0x6d,0x39,0x6d,0x39,0x6d,0x18,0x65,
+0x19,0x65,0xf8,0x5c,0xf9,0x5c,0xd8,0x54,0xd8,0x54,0xb8,0x54,0xb8,0x4c,0x97,0x44,
+0x98,0x4c,0x77,0x44,0x78,0x44,0x57,0x3c,0x57,0x3c,0x16,0x3c,0x36,0x3c,0x15,0x34,
+0xf5,0x3b,0xd4,0x33,0xb4,0x33,0x7b,0xb6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xdc,0xce,0xb6,0x64,0x93,0x33,0x93,0x2b,0xb4,0x33,0xb4,0x33,0xd5,0x33,
+0xd4,0x33,0xf5,0x33,0xf5,0x33,0x16,0x34,0x16,0x34,0x36,0x3c,0x16,0x3c,0x36,0x3c,
+0x36,0x3c,0x56,0x44,0x56,0x44,0x77,0x4c,0x76,0x4c,0x97,0x4c,0x96,0x4c,0x97,0x54,
+0x97,0x54,0xb7,0x54,0xb7,0x54,0xd8,0x5c,0xb7,0x54,0xd7,0x5c,0xb7,0x54,0xb8,0x54,
+0x97,0x54,0x97,0x54,0x97,0x4c,0x97,0x4c,0x77,0x4c,0x97,0x4c,0x77,0x44,0x77,0x44,
+0x56,0x44,0x77,0x44,0x56,0x3c,0x57,0x3c,0x36,0x3c,0x36,0x3c,0x16,0x3c,0x36,0x3c,
+0x15,0x3c,0x15,0x3c,0xd4,0x33,0x18,0x6d,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0xef,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xe7,0x3d,0xdf,0x5d,0xdf,0x3d,0xdf,0x3e,0xe7,0x3d,0xdf,0x3d,0xdf,0x3d,0xdf,
+0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xe7,0x5d,0xdf,0x5e,0xe7,0x5e,0xdf,0x5e,0xe7,0x5d,0xdf,0x5e,0xe7,0x5e,0xdf,
+0x7e,0xe7,0x5e,0xdf,0x7e,0xe7,0x5e,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,
+0x7f,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff
+};
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..0663f19ea
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 1U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 1U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..558f8962d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,346 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_COMP_MODULE_ENABLED
+/* #define HAL_CORDIC_MODULE_ENABLED */
+#define HAL_CORTEX_MODULE_ENABLED
+/* #define HAL_CRC_MODULE_ENABLED */
+/* #define HAL_CRYP_MODULE_ENABLED */
+/* #define HAL_DAC_MODULE_ENABLED */
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+/* #define HAL_FDCAN_MODULE_ENABLED */
+#define HAL_FLASH_MODULE_ENABLED
+/* #define HAL_FMAC_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+/* #define HAL_HRTIM_MODULE_ENABLED */
+/* #define HAL_IRDA_MODULE_ENABLED */
+/* #define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/* #define HAL_LPTIM_MODULE_ENABLED */
+/* #define HAL_NAND_MODULE_ENABLED */
+/* #define HAL_NOR_MODULE_ENABLED */
+#define HAL_OPAMP_MODULE_ENABLED
+/* #define HAL_PCD_MODULE_ENABLED */
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_QSPI_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+/* #define HAL_RNG_MODULE_ENABLED */
+/* #define HAL_RTC_MODULE_ENABLED */
+#define HAL_SAI_MODULE_ENABLED
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+/* #define HAL_TIM_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED */
+/* #define HAL_USBPD_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED */
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                          The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)  /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  *        - External clock generated through external PLL component on EVAL1 303 (based on MCO or crystal)
+  *        - External clock not generated on EVAL1 373
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    (8000000UL) /*!< Value of the External clock source in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT               1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+  #include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+  #include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b78c12d77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_it.h
@@ -0,0 +1,60 @@
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_IT_H
+#define STM32G4xx_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void SRAM_DMAx_IRQHandler(void);
+void EXTI0_IRQHandler(void);
+void EXTI1_IRQHandler(void);
+void EXTI2_IRQHandler(void);
+void EXTI3_IRQHandler(void);
+void EXTI4_IRQHandler(void);
+void EXTI9_5_IRQHandler(void);
+void EXTI15_10_IRQHandler(void);
+void AUDIO_SAI1_DMAx_IRQHandler(void);
+void DMA2_Channel1_IRQHandler(void);
+void DMA2_Channel2_IRQHandler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_IT_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvoptx b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvoptx
new file mode 100644
index 000000000..8961d7759
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvoptx
@@ -0,0 +1,1196 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>STM32G474E_EVAL1</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001D00263137510133333639 -O2254 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO19 -TC170000000 -TP21 -TDS800E -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvprojx b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvprojx
new file mode 100644
index 000000000..61285983f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvprojx
@@ -0,0 +1,832 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>STM32G474E_EVAL1</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474RETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.0</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x0-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
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+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_qspi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sai.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sai_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_smartcard.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_smartcard_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_smbus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sram.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_fmc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/Utilities</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32_lcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../Utilities/LCD/stm32_lcd.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Example/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Example/User</GroupName>
+          <Files>
+            <File>
+              <FileName>audio_play.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/audio_play.c</FilePath>
+            </File>
+            <File>
+              <FileName>audio_rec.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/audio_rec.c</FilePath>
+            </File>
+            <File>
+              <FileName>bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>button.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/button.c</FilePath>
+            </File>
+            <File>
+              <FileName>com.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/com.c</FilePath>
+            </File>
+            <File>
+              <FileName>idd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/idd.c</FilePath>
+            </File>
+            <File>
+              <FileName>io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/io.c</FilePath>
+            </File>
+            <File>
+              <FileName>joystick.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/joystick.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/lcd.c</FilePath>
+            </File>
+            <File>
+              <FileName>led.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/led.c</FilePath>
+            </File>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>potentiometer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/potentiometer.c</FilePath>
+            </File>
+            <File>
+              <FileName>qspi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/qspi.c</FilePath>
+            </File>
+            <File>
+              <FileName>sd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/sd.c</FilePath>
+            </File>
+            <File>
+              <FileName>sram.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/sram.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>Retarget.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\Retarget.c</FilePath>
+            </File>
+            <File>
+              <FileName>Serial.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>.\Serial.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="STM32G474E_EVAL1"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Retarget.c b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Retarget.c
new file mode 100644
index 000000000..821904400
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Retarget.c
@@ -0,0 +1,50 @@
+/*----------------------------------------------------------------------------
+ * Name:    Retarget.c
+ * Purpose: 'Retarget' layer for target-dependent low level functions
+ * Note(s):
+ *----------------------------------------------------------------------------
+ * This file is part of the uVision/ARM development tools.
+ * This software may only be used under the terms of a valid, current,
+ * end user licence from KEIL for a compatible version of KEIL software
+ * development tools. Nothing else gives you the right to use this software.
+ *
+ * This software is supplied "AS IS" without warranties of any kind.
+ *
+ * Copyright (c) 2011 Keil - An ARM Company. All rights reserved.
+ *----------------------------------------------------------------------------*/
+
+#include <stdio.h>
+#include <rt_misc.h>
+#include "Serial.h"
+
+
+
+struct __FILE { int handle; /* Add whatever you need here */ };
+FILE __stdout;
+FILE __stdin;
+
+
+int fputc(int c, FILE *f) {
+  return (SER_PutChar(c));
+}
+
+
+int fgetc(FILE *f) {
+  return (SER_GetChar());
+}
+
+
+int ferror(FILE *f) {
+  /* Your implementation of ferror */
+  return EOF;
+}
+
+
+void _ttywrch(int c) {
+  SER_PutChar(c);
+}
+
+
+void _sys_exit(int return_code) {
+label:  goto label;  /* endless loop */
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.c b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.c
new file mode 100644
index 000000000..ca5949fc6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.c
@@ -0,0 +1,43 @@
+/*----------------------------------------------------------------------------
+ * Name:    Serial.c
+ * Purpose: Low Level Serial Routines
+ * Note(s): possible defines select the used communication interface:
+ *            __DBG_ITM   - ITM SWO interface
+ *----------------------------------------------------------------------------
+ * This file is part of the uVision/ARM development tools.
+ * This software may only be used under the terms of a valid, current,
+ * end user licence from KEIL for a compatible version of KEIL software
+ * development tools. Nothing else gives you the right to use this software.
+ *
+ * This software is supplied "AS IS" without warranties of any kind.
+ *
+ * Copyright (c) 2008-2011 Keil - An ARM Company. All rights reserved.
+ *----------------------------------------------------------------------------*/
+
+#include <stm32g4xx.h>                  /* STM32G4xx Definitions              */
+#include "Serial.h"
+
+#ifdef __DBG_ITM
+volatile int ITM_RxBuffer = ITM_RXBUFFER_EMPTY;  /*  CMSIS Debug Input        */
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Write character to Serial Port
+ *----------------------------------------------------------------------------*/
+int SER_PutChar (int c) {
+
+  ITM_SendChar(c);
+  return (c);
+}
+
+
+/*----------------------------------------------------------------------------
+  Read character from Serial Port   (blocking read)
+ *----------------------------------------------------------------------------*/
+int SER_GetChar (void) {
+
+  while (ITM_CheckChar() != 1) __NOP();
+  return (ITM_ReceiveChar());
+
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.h b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.h
new file mode 100644
index 000000000..81e691df2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.h
@@ -0,0 +1,24 @@
+/*----------------------------------------------------------------------------
+ * Name:    Serial.h
+ * Purpose: Low level serial definitions
+ * Note(s):
+ *----------------------------------------------------------------------------
+ * This file is part of the uVision/ARM development tools.
+ * This software may only be used under the terms of a valid, current,
+ * end user licence from KEIL for a compatible version of KEIL software
+ * development tools. Nothing else gives you the right to use this software.
+ *
+ * This software is supplied "AS IS" without warranties of any kind.
+ *
+ * Copyright (c) 2010 Keil - An ARM Company. All rights reserved.
+ *----------------------------------------------------------------------------*/
+
+#ifndef __SERIAL_H
+#define __SERIAL_H
+#include <stdio.h>
+
+extern void SER_Init      (void);
+extern int  SER_GetChar   (void);
+extern int SER_PutChar 		(int c);
+
+#endif
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..0c1ea6860
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x8000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x4000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..43a5c6fbe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.cproject
@@ -0,0 +1,194 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.387205136" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.2011861144" name="Internal Toolchain Type" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1154553141" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1962225067" name="MCU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="false" value="STM32G474RETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1183638176" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1005987582" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.287376697" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.412223211" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1888333601" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.993736520" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474RETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../Drivers/BSP/Components | ../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../Drivers/BSP/Components/Common | ../../../../../../Utilities/Fonts | ../../../../../../Drivers/CMSIS/Include | ../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../Inc | ../../../../../../Utilities | ../../../../../../Drivers/BSP/STM32G474E-EVAL ||  ||  || USE_HAL_DRIVER | STM32G474xx | USE_IOEXPANDER | USE_STM32G474E_EVAL1 ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474RETX_FLASH.ld} || true || NonSecure ||  ||  || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat.351426018" name="Use float with printf from newlib-nano (-u _printf_float)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.114618943" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/BSP}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.969636532" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1826719434" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1232059146" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.958632230" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1577458238" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.o0" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.847786721" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="USE_IOEXPANDER"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+									<listOptionValue builtIn="false" value="USE_STM32G474E_EVAL1"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.493447005" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/BSP/Components"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/BSP/Components/Common"/>
+									<listOptionValue builtIn="false" value="../../../../../../Utilities/Fonts"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/CMSIS/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../Utilities"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.620806493" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.446865976" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.651520313" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" useByScannerDiscovery="false" value="${workspace_loc:/${ProjName}/STM32G474RETX_FLASH.ld}" valueType="string"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.otherflags.38279442" name="Other flags" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.otherflags" useByScannerDiscovery="false" valueType="stringList">
+									<listOptionValue builtIn="false" value="-specs=rdimon.specs -lc -lrdimon"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1103156156" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1021916988" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1628041412" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474RETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.596865733" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1198816267" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1642150351" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.600790988" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1213068020" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1445813083" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1147277879" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1200182732" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706.717281868">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706.717281868" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706.717281868" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706.717281868." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.847175411" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1204706407" name="Internal Toolchain Type" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.117180211" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.840867994" name="MCU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="false" value="STM32G474RETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.163952567" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.925973408" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.315476086" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.571702673" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1599734029" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.472142391" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474RETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../Drivers/BSP/Components | ../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../Drivers/BSP/Components/Common | ../../../../../../Utilities/Fonts | ../../../../../../Drivers/CMSIS/Include | ../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../Inc | ../../../../../../Utilities | ../../../../../../Drivers/BSP/STM32G474E-EVAL ||  ||  || USE_HAL_DRIVER | STM32G474xx | USE_IOEXPANDER | USE_STM32G474E_EVAL1 ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474RETX_FLASH.ld} || true || NonSecure ||  ||  || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat.1902483261" name="Use float with printf from newlib-nano (-u _printf_float)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoscanffloat.1752387170" name="Use float with scanf from newlib-nano (-u _scanf_float)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoscanffloat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1028795034" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/BSP}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1893883978" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1898783786" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1515020253" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.914013408" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.708025098" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1046524408" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.2079289563" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1231302794" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="USE_IOEXPANDER"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+									<listOptionValue builtIn="false" value="USE_STM32G474E_EVAL1"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1488089752" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/BSP/Components"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/BSP/Components/Common"/>
+									<listOptionValue builtIn="false" value="../../../../../../Utilities/Fonts"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/CMSIS/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../Utilities"/>
+									<listOptionValue builtIn="false" value="../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.475932969" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.649947703" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2146287534" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1133212548" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1427953192" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.581798255" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" useByScannerDiscovery="false" value="${workspace_loc:/${ProjName}/STM32G474RETX_FLASH.ld}" valueType="string"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.otherflags.1683837083" name="Other flags" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.otherflags" useByScannerDiscovery="false" valueType="stringList">
+									<listOptionValue builtIn="false" value="-specs=rdimon.specs -lc -lrdimon"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1117240085" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1541831851" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.2100191573" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474RETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1358094447" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.738860255" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1718549766" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1121474819" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.183316344" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1282613735" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.754864665" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.933017880" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="BSP.null.155629769" name="BSP"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2004727706.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1232059146;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.620806493">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.312541540;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.312541540.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1196304464;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.140190726">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
\ No newline at end of file
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.project
new file mode 100644
index 000000000..c7d110354
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.project
@@ -0,0 +1,390 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>BSP</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeExampleProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_comp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_qspi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sai.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sai_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_smartcard.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_smartcard_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_smbus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sram.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_fmc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/Utilities/stm32_lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Utilities/LCD/stm32_lcd.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/audio_play.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/audio_play.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/audio_rec.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/audio_rec.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/bus.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/button.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/button.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/com.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/com.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/idd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/idd.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/io.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/joystick.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/joystick.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/lcd.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/led.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/led.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/potentiometer.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/potentiometer.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/qspi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/qspi.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/sd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/sd.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/sram.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/sram.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_audio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_audio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_env_sensor.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_env_sensor.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_idd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_idd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_qspi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_qspi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_sd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_sram.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sram.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/MFXSTM32L152/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/MFXSTM32L152/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/MT25ql512abb/mt25ql512abb.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/mt25ql512abb/mt25ql512abb.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/STTS751/stts751.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/stts751/stts751.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/STTS751/stts751_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/stts751/stts751_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/WM8994/wm8994.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/wm8994/wm8994.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/WM8994/wm8994_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/wm8994/wm8994_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/hx8347d/hx8347d.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/hx8347d/hx8347d_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d_reg.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
new file mode 100644
index 000000000..9342ef9f0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -0,0 +1,204 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from STM32G4 series
+**                      510Kbytes ROM
+**                      32Kbytes CCMSRAM
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x4000;	/* required amount of heap  */
+_Min_Stack_Size = 0x8000;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  CCMSRAM    (xrw)    : ORIGIN = 0x10000000,   LENGTH = 32K
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  ROM    (rx)    : ORIGIN = 0x08000000,   LENGTH = 510K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "ROM" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >ROM
+
+  /* The program code and other data into "ROM" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >ROM
+
+  /* Constant data into "ROM" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >ROM
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >ROM
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >ROM
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> ROM
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_play.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_play.c
new file mode 100644
index 000000000..2c5796109
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_play.c
@@ -0,0 +1,652 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/audio_play.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the audio feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include <stdio.h>
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/* Private define ------------------------------------------------------------*/
+
+/*Since SysTick is set to 1ms (unless to set it quicker) */
+/* to run up to 48khz, a buffer around 1000 (or more) is requested*/
+/* to run up to 96khz, a buffer around 2000 (or more) is requested*/
+#define AUDIO_DEFAULT_VOLUME    60
+
+/* Audio file size and start address are defined here since the audio file is
+   stored in Flash memory as a constant table of 16-bit data */
+#define AUDIO_BUFFER_SIZE             4096
+#define AUDIO_FILE_SIZE               (180*1024)
+#define AUDIO_START_OFFSET_ADDRESS    0            /* Offset relative to audio file header size */
+
+/* Private typedef -----------------------------------------------------------*/
+typedef enum {
+  AUDIO_STATE_IDLE = 0,
+  AUDIO_STATE_INIT,
+  AUDIO_STATE_PLAYING,
+}AUDIO_PLAYBACK_StateTypeDef;
+
+typedef enum {
+  BUFFER_OFFSET_NONE = 0,
+  BUFFER_OFFSET_HALF,
+  BUFFER_OFFSET_FULL,
+}BUFFER_StateTypeDef;
+
+typedef struct {
+  uint8_t buff[AUDIO_BUFFER_SIZE];
+  uint32_t fptr;
+  BUFFER_StateTypeDef state;
+  uint32_t AudioFileSize;
+  uint32_t *SrcAddress;
+}AUDIO_BufferTypeDef;
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static AUDIO_BufferTypeDef  buffer_ctl;
+static AUDIO_PLAYBACK_StateTypeDef  audio_state;
+__IO uint32_t uwVolume = 20;
+uint8_t ReadVol = 0;
+__IO uint32_t uwPauseEnabledStatus = 0;
+uint32_t updown = 1;
+
+uint32_t AudioFreq[8] = {96000, 48000, 44100, 32000, 22050, 16000, 11025, 8000};
+
+BSP_AUDIO_Init_t AudioPlayInit;
+static uint32_t JoyState = JOY_NONE;
+uint32_t OutputDevice = 0;
+
+/* Private function prototypes -----------------------------------------------*/
+static void Audio_SetHint(uint32_t Index);
+static uint32_t GetData(void *pdata, uint32_t offset, uint8_t *pbuf, uint32_t NbrOfData);
+AUDIO_ErrorTypeDef AUDIO_Start(uint32_t *psrc_address, uint32_t file_size);
+AUDIO_ErrorTypeDef AUDIO_Stop(void);
+static void AudioDeviceUpdate(void);
+static void AudioChResUpdate(void);
+
+/* Private functions ---------------------------------------------------------*/
+
+
+/**
+  * @brief  Audio Play demo
+  * @param  None
+  * @retval None
+  */
+int32_t AudioPlay_demo (void)
+{
+  uint32_t *AudioFreq_ptr;
+  uint32_t y_size;
+
+  uint32_t AudioSize;
+
+  BSP_LCD_GetYSize(0, &y_size);
+
+  AudioFreq_ptr = &AudioFreq[0]; /*96K*/
+
+  uint8_t FreqStr[256] = {0};
+  Point Points2[] = {{10, 140}, {50, 160}, {10, 180}};
+
+  uwPauseEnabledStatus = 1; /* 0 when audio is running, 1 when Pause is on */
+  uwVolume = 40;
+  printf("\r\n Test of Audio Play \n");
+  printf("\r\n Use Joy key Press to Pause/Resume \n");
+  printf("\r\n Use Joy key up/down to change Volume \n");
+  printf("\r\n Use Joy keys left/right to set output device \n");
+  printf("\r\n Press User Button to go to next demo \n");
+
+
+  Audio_SetHint(0);
+  UTIL_LCD_SetFont(&Font20);
+
+  BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_ALL);
+
+  AudioPlayInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+  AudioPlayInit.ChannelsNbr = 2;                      /* 16bit value offset=22 of wave file */
+  AudioPlayInit.SampleRate = AUDIO_FREQUENCY_8K;      /* 32bit value offset=24 of wave file */
+  AudioPlayInit.BitsPerSample = AUDIO_RESOLUTION_16B; /* 16bit value offset=34 of wave file */
+  AudioPlayInit.Volume = uwVolume;
+
+  if(BSP_AUDIO_OUT_Init(0, &AudioPlayInit) == 0)
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAt(20, y_size - 95, (uint8_t *)"  AUDIO CODEC   OK  ", CENTER_MODE);
+  }
+  else
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+    UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)"  AUDIO CODEC  FAIL ", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+  }
+
+  /*
+  Start playing the file from a circular buffer, once the DMA is enabled, it is
+  always in running state. Application has to fill the buffer with the audio data
+  using Transfer complete and/or half transfer complete interrupts callbacks
+  (BSP_AUDIO_OUT_TransferComplete_CallBack() or BSP_AUDIO_OUT_HalfTransfer_CallBack()...
+  */
+  AudioSize = (uint32_t )(*((uint32_t *)(AUDIO_SRC_FILE_ADDRESS+40)));
+
+  /* check if audio is present */
+  if ((uint32_t )(*((uint32_t *)(AUDIO_SRC_FILE_ADDRESS))) != 0x46464952)
+  {
+   UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+   UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+   UTIL_LCD_DisplayStringAt(0, LINE(8), (uint8_t *)" ERROR  file not found", CENTER_MODE);
+   return -1;
+  }
+
+  AUDIO_Start((uint32_t *)AUDIO_SRC_FILE_ADDRESS, (uint32_t)AudioSize);
+  /* Display the state on the screen */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)"       PLAYING...     ", CENTER_MODE);
+
+  sprintf((char*)FreqStr, "       VOL:    %3ld     ", uwVolume);
+  UTIL_LCD_DisplayStringAt(0,  180, (uint8_t *)FreqStr, CENTER_MODE);
+
+  sprintf((char*)FreqStr, "      FREQ: %6ld     ", *AudioFreq_ptr);
+  UTIL_LCD_DisplayStringAt(0, 200, (uint8_t *)FreqStr, CENTER_MODE);
+
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, y_size - 20, (uint8_t *)"Hear nothing? Have you copied ", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, y_size - 10, (uint8_t *)"the audio file with STM-LINK UTILITY?", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font20);
+
+  /* Audio is playing */
+  BSP_LCD_FillRect(0, 10, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+  BSP_LCD_FillRect(0, 35, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+
+  /* IMPORTANT:
+  AUDIO_Process() is called by the SysTick Handler, as it should be called
+  within a periodic process */
+
+  /* Infinite loop */
+  while (1)
+  {
+    if (UserButtonPressed == 1)
+    {
+      return 0;
+    }
+   /* IMPORTANT: AUDIO_Process() should be called within a periodic process */
+   AUDIO_Process();
+   AudioDeviceUpdate();
+
+   /* Get the Joystick State */
+   switch (BSP_JOY_GetState(JOY1))
+   {
+   case JOY_UP:
+     /* Increase volume by 5% */
+     if (uwVolume < 95)
+       uwVolume += 5;
+     else
+       uwVolume = 100;
+     UTIL_LCD_SetFont(&Font20);
+     sprintf((char*)FreqStr, "       VOL:    %3ld     ", uwVolume);
+     BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+     UTIL_LCD_DisplayStringAt(0, 180, (uint8_t *)FreqStr, CENTER_MODE);
+     break;
+   case JOY_DOWN:
+     /* Decrease volume by 5% */
+     if (uwVolume > 5)
+       uwVolume -= 5;
+     else
+       uwVolume = 0;
+     UTIL_LCD_SetFont(&Font20);
+     sprintf((char*)FreqStr, "       VOL:    %3ld     ", uwVolume);
+     BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+     UTIL_LCD_DisplayStringAt(0, 180, (uint8_t *)FreqStr, CENTER_MODE);
+     break;
+   case JOY_LEFT:
+     /*Decrease Frequency */
+     if (*AudioFreq_ptr != 8000)
+     {
+       AudioFreq_ptr++;
+       sprintf((char*)FreqStr, "      FREQ: %6ld     ", *AudioFreq_ptr);
+       BSP_AUDIO_OUT_Pause(0);
+       BSP_AUDIO_OUT_SetSampleRate(0, *AudioFreq_ptr);
+       BSP_AUDIO_OUT_Resume(0);
+       BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+     }
+     UTIL_LCD_SetFont(&Font20);
+     UTIL_LCD_DisplayStringAt(0, 200, (uint8_t *)FreqStr, CENTER_MODE);
+     break;
+   case JOY_RIGHT:
+     /* Increase Frequency */
+     if (*AudioFreq_ptr != 96000)
+     {
+       AudioFreq_ptr--;
+       sprintf((char*)FreqStr, "      FREQ: %6ld     ", *AudioFreq_ptr);
+       BSP_AUDIO_OUT_Pause(0);
+       BSP_AUDIO_OUT_SetSampleRate(0, *AudioFreq_ptr);
+       BSP_AUDIO_OUT_Resume(0);
+       BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+       UTIL_LCD_SetFont(&Font20);
+       UTIL_LCD_DisplayStringAt(0, 200, (uint8_t *)FreqStr, CENTER_MODE);
+     }
+     break;
+   case JOY_SEL:
+     /* Set Pause / Resume */
+     if (uwPauseEnabledStatus == 1)
+     { /* Pause is enabled, call Resume */
+       BSP_AUDIO_OUT_Resume(0);
+       uwPauseEnabledStatus = 0;
+       UTIL_LCD_SetFont(&Font20);
+       UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)"       PLAYING...     ", CENTER_MODE);
+       UTIL_LCD_FillPolygon(Points2, 3, UTIL_LCD_COLOR_WHITE);
+       BSP_LCD_FillRect(0, 10, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+       BSP_LCD_FillRect(0, 35, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+     }
+     else
+     { /* Pause the playback */
+       BSP_AUDIO_OUT_Pause(0);
+       uwPauseEnabledStatus = 1;
+       UTIL_LCD_SetFont(&Font20);
+       UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)"       PAUSE  ...     ", CENTER_MODE);
+       BSP_LCD_FillRect(0, 10, 140, 40 , 40, LCD_COLOR_RGB565_WHITE);
+       UTIL_LCD_FillPolygon(Points2, 3, UTIL_LCD_COLOR_GREEN);
+     }
+     HAL_Delay(200);
+     break;
+
+   default:
+     break;
+   }
+  }
+}
+
+int32_t AudioPlay_demo2 (void)
+{
+  uint32_t *AudioFreq_ptr;
+  uint32_t y_size;
+
+  BSP_LCD_GetYSize(0, &y_size);
+  AudioFreq_ptr = &AudioFreq[0]; /*96K*/
+
+  uint8_t FreqStr[256] = {0};
+
+  uwVolume = 40;
+
+  Audio_SetHint(1);
+  UTIL_LCD_SetFont(&Font20);
+
+
+  BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_ALL);
+
+  AudioPlayInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+  AudioPlayInit.ChannelsNbr = 2;
+  AudioPlayInit.SampleRate = AUDIO_FREQUENCY_96K;
+  AudioPlayInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+  AudioPlayInit.Volume = uwVolume;
+
+  if(BSP_AUDIO_OUT_Init(0, &AudioPlayInit) == 0)
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)"  AUDIO CODEC   OK  ", CENTER_MODE);
+  }
+  else
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+    UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)"  AUDIO CODEC  FAIL ", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+  }
+
+  /*
+  Start playing the file from a circular buffer, once the DMA is enabled, it is
+  always in running state. Application has to fill the buffer with the audio data
+  using Transfer complete and/or half transfer complete interrupts callbacks
+  (BSP_AUDIO_OUT_TransferComplete_CallBack() or BSP_AUDIO_OUT_HalfTransfer_CallBack()...
+  */
+  AUDIO_Start((uint32_t *)AUDIO_SRC_FILE_ADDRESS, (uint32_t)AUDIO_FILE_SIZE);
+
+  /* Display the state on the screen */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DisplayStringAt(0, LINE(8), (uint8_t *)"       PLAYING...     ", CENTER_MODE);
+
+  sprintf((char*)FreqStr, "       VOL:    %3ld     ", uwVolume);
+  UTIL_LCD_DisplayStringAt(0,  LINE(9), (uint8_t *)FreqStr, CENTER_MODE);
+
+  sprintf((char*)FreqStr, "      FREQ: %6ld     ", *AudioFreq_ptr);
+  UTIL_LCD_DisplayStringAt(0, LINE(10), (uint8_t *)FreqStr, CENTER_MODE);
+
+  UTIL_LCD_SetFont(&Font16);
+  UTIL_LCD_DisplayStringAt(0, y_size - 40, (uint8_t *)"Hear nothing ? Have you copied the audio file with STM-LINK UTILITY ?", CENTER_MODE);
+
+  UTIL_LCD_SetFont(&Font20);
+  UTIL_LCD_DisplayStringAt(0, LINE(11), (uint8_t *)"AUDIO OUT STEREO MODE   ", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, LINE(12), (uint8_t *)"AUDIO_RESOLUTION_16b   ", CENTER_MODE);
+
+  /* IMPORTANT:
+  AUDIO_Process() is called by the SysTick Handler, as it should be called
+  within a periodic process */
+
+  /* Infinite loop */
+  while (1)
+  {
+   /* IMPORTANT: AUDIO_Process() should be called within a periodic process */
+    AUDIO_Process();
+    AudioChResUpdate();
+  }
+}
+
+/**
+  * @brief  Display Audio demo hint
+  * @param  None
+  * @retval None
+  */
+static void Audio_SetHint(uint32_t Index)
+{
+  uint32_t x_size, y_size;
+  uint32_t texte[30];
+
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  /* Clear the LCD */
+  BSP_LCD_Clear(0, LCD_COLOR_RGB565_WHITE);
+
+  /* Set Audio Demo description */
+  BSP_LCD_FillRect(0, 0, 0, x_size, 120, LCD_COLOR_RGB565_BLUE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetFont(&Font12);
+  if(Index == 0)
+  {
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SET MUTE / SET VOLUME / SET SAMPLE RATE", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"Press User button for next menu          ", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"    ", CENTER_MODE);
+  sprintf((char *)texte, "copy audio file at @ 0x%x", AUDIO_SRC_FILE_ADDRESS);
+  UTIL_LCD_DisplayStringAt( 50, 145, (uint8_t *)texte, LEFT_MODE);
+  UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"Use Joy keys left/right to set output device ", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 75, (uint8_t *)"Use Joy key Press to Pause/Resume", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 90, (uint8_t *)"Use Joy key up/down to change Volume", CENTER_MODE);
+  }
+  else
+  {
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SET CHANNEL NUMBER/ SET BIT PER SAMPLE", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"Press User button for next menu          ", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"Use Joy keys UP/DOWN to set Channels Number    ", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"Use Joy keys LEFT/RIGHT to set resolution    ", CENTER_MODE);
+  }
+}
+
+
+/**
+  * @brief  Starts Audio streaming.
+  * @param  None
+  * @retval Audio error
+  */
+AUDIO_ErrorTypeDef AUDIO_Start(uint32_t *psrc_address, uint32_t file_size)
+{
+  uint32_t bytesread;
+
+  buffer_ctl.state = BUFFER_OFFSET_NONE;
+  buffer_ctl.AudioFileSize = file_size;
+  buffer_ctl.SrcAddress = psrc_address;
+
+  /* actual wave file starts at offset=44*/
+  bytesread = GetData( (void *)psrc_address,
+                       0,
+                       &buffer_ctl.buff[0],
+                       AUDIO_BUFFER_SIZE);
+  if(bytesread > 0)
+  {
+    BSP_AUDIO_OUT_Play(0, (uint8_t *)&buffer_ctl.buff[0], AUDIO_BUFFER_SIZE);
+    audio_state = AUDIO_STATE_PLAYING;
+    buffer_ctl.fptr = bytesread;
+    return AUDIO_ERROR_NONE;
+  }
+  return AUDIO_ERROR_IO;
+}
+
+/**
+  * @brief  Manages Audio process.
+  * @param  None
+  * @retval Audio error
+  */
+uint8_t AUDIO_Process(void)
+{
+  uint32_t bytesread;
+  AUDIO_ErrorTypeDef error_state = AUDIO_ERROR_NONE;
+
+  switch(audio_state)
+  {
+  case AUDIO_STATE_PLAYING:
+
+    if(buffer_ctl.fptr >= buffer_ctl.AudioFileSize)
+    {
+      /* Play audio sample again ... */
+      buffer_ctl.fptr = 0;
+      error_state = AUDIO_ERROR_EOF;
+    }
+
+    /* 1st half buffer played; so fill it and continue playing from bottom*/
+    if(buffer_ctl.state == BUFFER_OFFSET_HALF)
+    {
+      bytesread = GetData((void *)buffer_ctl.SrcAddress,
+                          buffer_ctl.fptr,
+                          &buffer_ctl.buff[0],
+                          AUDIO_BUFFER_SIZE /2);
+
+      if( bytesread >0)
+      {
+        buffer_ctl.state = BUFFER_OFFSET_NONE;
+        buffer_ctl.fptr += bytesread;
+      }
+    }
+
+    /* 2nd half buffer played; so fill it and continue playing from top */
+    if(buffer_ctl.state == BUFFER_OFFSET_FULL)
+    {
+      bytesread = GetData((void *)buffer_ctl.SrcAddress,
+                          buffer_ctl.fptr,
+                          &buffer_ctl.buff[AUDIO_BUFFER_SIZE /2],
+                          AUDIO_BUFFER_SIZE /2);
+      if( bytesread > 0)
+      {
+        buffer_ctl.state = BUFFER_OFFSET_NONE;
+        buffer_ctl.fptr += bytesread;
+      }
+    }
+    break;
+
+  default:
+    error_state = AUDIO_ERROR_NOTREADY;
+    break;
+  }
+  return (uint8_t) error_state;
+}
+
+/**
+  * @brief  Gets Data from storage unit.
+  * @param  None
+  * @retval None
+  */
+static uint32_t GetData(void *pdata, uint32_t offset, uint8_t *pbuf, uint32_t NbrOfData)
+{
+  uint8_t *lptr = pdata;
+  uint32_t ReadDataNbr;
+
+  ReadDataNbr = 0;
+  while(((offset + ReadDataNbr) < buffer_ctl.AudioFileSize) && (ReadDataNbr < NbrOfData))
+  {
+    pbuf[ReadDataNbr]= lptr [offset + ReadDataNbr];
+    ReadDataNbr++;
+  }
+  return ReadDataNbr;
+}
+
+/*------------------------------------------------------------------------------
+       Callbacks implementation:
+           the callbacks API are defined __weak in the stm32769i_discovery_audio.c file
+           and their implementation should be done the user code if they are needed.
+           Below some examples of callback implementations.
+  ----------------------------------------------------------------------------*/
+/**
+  * @brief  Manages the full Transfer complete event.
+  * @param  Instance
+  * @retval None
+  */
+void BSP_AUDIO_OUT_TransferComplete_CallBack(uint32_t Instance)
+{
+  if(audio_state == AUDIO_STATE_PLAYING)
+  {
+    /* allows AUDIO_Process() to refill 2nd part of the buffer  */
+    buffer_ctl.state = BUFFER_OFFSET_FULL;
+  }
+}
+
+/**
+  * @brief  Manages the DMA Half Transfer complete event.
+  * @param  Instance
+  * @retval None
+  */
+void BSP_AUDIO_OUT_HalfTransfer_CallBack(uint32_t Instance)
+{
+  if(audio_state == AUDIO_STATE_PLAYING)
+  {
+    /* allows AUDIO_Process() to refill 1st part of the buffer  */
+    buffer_ctl.state = BUFFER_OFFSET_HALF;
+  }
+}
+
+/**
+  * @brief  Manages the DMA FIFO error event.
+  * @param  Instance
+  * @retval None
+  */
+void BSP_AUDIO_OUT_Error_CallBack(uint32_t Instance)
+{
+  /* Display message on the LCD screen */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_RED);
+  UTIL_LCD_DisplayStringAt(0, LINE(14), (uint8_t *)"       DMA  ERROR     ", CENTER_MODE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+
+  /* Stop the program with an infinite loop */
+  while (BSP_PB_GetState(BUTTON_USER) != RESET)
+  {
+    return;
+  }
+
+  /* could also generate a system reset to recover from the error */
+  /* .... */
+}
+
+static void AudioChResUpdate(void)
+{
+  JoyState = BSP_JOY_GetState(JOY1);
+
+  switch(JoyState)
+  {
+  case JOY_UP:
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetChannelsNbr(0, 1);
+    BSP_AUDIO_OUT_Resume(0);
+
+    UTIL_LCD_DisplayStringAt(0, LINE(11), (uint8_t *)"AUDIO OUT MONO MODE    ", CENTER_MODE);
+    break;
+  case JOY_DOWN:
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetChannelsNbr(0, 2);
+    BSP_AUDIO_OUT_Resume(0);
+    UTIL_LCD_DisplayStringAt(0, LINE(11), (uint8_t *)"AUDIO OUT STEREO MODE   ", CENTER_MODE);
+    break;
+  case JOY_LEFT:
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetBitsPerSample(0, AUDIO_RESOLUTION_16B);
+    BSP_AUDIO_OUT_Resume(0);
+    UTIL_LCD_DisplayStringAt(0, LINE(12), (uint8_t *)"AUDIO_RESOLUTION_16b   ", CENTER_MODE);
+    break;
+  case JOY_RIGHT:
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetBitsPerSample(0, AUDIO_RESOLUTION_32B);
+    BSP_AUDIO_OUT_Resume(0);
+    UTIL_LCD_DisplayStringAt(0, LINE(12), (uint8_t *)"AUDIO_RESOLUTION_32b   ", CENTER_MODE);
+    break;
+  default:
+    break;
+  }
+}
+
+static void AudioDeviceUpdate(void)
+{
+  JoyState = BSP_JOY_GetState(JOY1);
+
+  switch(JoyState)
+  {
+  case JOY_UP:
+    BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+    BSP_AUDIO_OUT_Resume(0);
+    UTIL_LCD_SetFont(&Font16);
+    UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)"  AUDIO_OUT_DEVICE_HEADPHONE   ", LEFT_MODE);
+    break;
+  case JOY_DOWN:
+    BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+    BSP_AUDIO_OUT_Resume(0);
+    UTIL_LCD_SetFont(&Font16);
+    UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)"  AUDIO_OUT_DEVICE_SPEAKER   ", LEFT_MODE);
+    break;
+  case JOY_LEFT:
+    BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+    BSP_AUDIO_OUT_Resume(0);
+    UTIL_LCD_SetFont(&Font16);
+    UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)"  AUDIO_OUT_DEVICE_SPK_HP   ", LEFT_MODE);
+    break;
+  case JOY_RIGHT:
+    BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+    BSP_AUDIO_OUT_Pause(0);
+    BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+    BSP_AUDIO_OUT_Resume(0);
+    UTIL_LCD_SetFont(&Font16);
+    UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)"  AUDIO_OUT_DEVICE_AUTO      ", LEFT_MODE);
+    break;
+  default:
+    break;
+  }
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_rec.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_rec.c
new file mode 100644
index 000000000..3881c044c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_rec.c
@@ -0,0 +1,390 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/audio_rec.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the audio feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include <stdio.h>
+#include "string.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+
+typedef enum
+{
+  BUFFER_OFFSET_NONE = 0,
+  BUFFER_OFFSET_HALF = 1,
+  BUFFER_OFFSET_FULL = 2,
+}BUFFER_StateTypeDef;
+
+extern AUDIO_ErrorTypeDef AUDIO_Start(uint32_t audio_start_address, uint32_t audio_file_size);
+
+#define AUDIO_BLOCK_SIZE   ((uint32_t)0xFFFE)
+#define AUDIO_NB_BLOCKS    ((uint32_t)4)
+
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static uint16_t  internal_buffer[AUDIO_BLOCK_SIZE];
+
+/* Global variables ---------------------------------------------------------*/
+uint32_t  audio_rec_buffer_state;
+BSP_AUDIO_Init_t AnalogInInit;
+ BSP_AUDIO_Init_t  AudioInInit;
+ BSP_AUDIO_Init_t AudioOutInit;
+uint32_t AudioBufferOffset;
+uint32_t InputVolume = 0, InputDevice, BitPerSample, ChannelNbr;
+
+/* Private function prototypes -----------------------------------------------*/
+static void AudioRec_SetHint(void);
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Audio Play demo
+  * @param  None
+  * @retval None
+  */
+int32_t AudioRec_demo (void)
+{
+  uint32_t  block_number;
+  uint32_t y_size;
+
+  BSP_LCD_GetYSize(0, &y_size);
+
+  AudioRec_SetHint();
+
+  AudioOutInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+  AudioOutInit.ChannelsNbr = 2;
+  AudioOutInit.SampleRate = AUDIO_FREQUENCY_16K;
+  AudioOutInit.BitsPerSample = AUDIO_RESOLUTION_32B;
+  AudioOutInit.Volume = 100;
+
+  AudioInInit.Device = AUDIO_IN_DEVICE_ANALOG_MIC;
+  AudioInInit.ChannelsNbr = 2;
+  AudioInInit.SampleRate = AUDIO_FREQUENCY_16K;
+  AudioInInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+  AudioInInit.Volume = 30;
+
+  /* Initialize Audio Recorder */
+  if (BSP_AUDIO_IN_Init(0, &AudioInInit) == BSP_ERROR_NONE)
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)"  AUDIO RECORD INIT OK  ", CENTER_MODE);
+  }
+  else
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+    UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)"  AUDIO RECORD INIT FAIL", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+  }
+
+  AudioBufferOffset = BUFFER_OFFSET_NONE;
+
+  /* Display the state on the screen */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)"       RECORDING...     ", CENTER_MODE);
+
+  BSP_AUDIO_IN_GetVolume(0, &InputVolume);
+  BSP_AUDIO_IN_GetDevice(0, &InputDevice);
+  BSP_AUDIO_IN_GetChannelsNbr(0, &ChannelNbr);
+  BSP_AUDIO_IN_GetBitsPerSample(0, &BitPerSample);
+
+  BSP_AUDIO_IN_SetVolume(0, 80);
+  BSP_AUDIO_IN_SetDevice(0, AUDIO_IN_DEVICE_ANALOG_MIC);
+  BSP_AUDIO_IN_SetChannelsNbr(0, 1);
+  BSP_AUDIO_IN_SetBitsPerSample(0, AUDIO_RESOLUTION_32B);
+
+  BSP_AUDIO_IN_GetVolume(0, &InputVolume);
+  BSP_AUDIO_IN_GetDevice(0, &InputDevice);
+  BSP_AUDIO_IN_GetChannelsNbr(0, &ChannelNbr);
+  BSP_AUDIO_IN_GetBitsPerSample(0, &BitPerSample);
+
+  /* Start Recording: Size in number of bytes */
+  BSP_AUDIO_IN_Record(0, (uint8_t*)&internal_buffer, 2*AUDIO_BLOCK_SIZE);
+
+  for (block_number = 0; block_number < AUDIO_NB_BLOCKS; block_number++)
+  {
+    /* Wait end of half block recording */
+    while(AudioBufferOffset != BUFFER_OFFSET_HALF)
+    {
+      if (CheckForUserInput() > 0)
+      {
+        ButtonState = 0;
+        /* Stop Recorder before close Test */
+        BSP_AUDIO_IN_Stop(0);
+        return 0;
+      }
+    }
+    AudioBufferOffset = BUFFER_OFFSET_NONE;
+    /* Copy recorded 1st half block in SDRAM */
+    memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2)),
+           internal_buffer,
+           AUDIO_BLOCK_SIZE);
+
+    /* Wait end of one block recording */
+    while(AudioBufferOffset != BUFFER_OFFSET_FULL)
+    {
+      if (CheckForUserInput() > 0)
+      {
+        ButtonState = 0;
+        /* Stop Recorder before close Test */
+        BSP_AUDIO_IN_Stop(0);
+        return 0;
+      }
+    }
+    AudioBufferOffset = BUFFER_OFFSET_NONE;
+    /* Copy recorded 2nd half block in SDRAM */
+    memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2) + (AUDIO_BLOCK_SIZE)),
+           (uint16_t *)(&internal_buffer[AUDIO_BLOCK_SIZE/2]),
+           AUDIO_BLOCK_SIZE);
+  }
+
+  /* Stop recorder */
+  BSP_AUDIO_IN_Stop(0);
+  BSP_AUDIO_IN_DeInit(0);
+
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DisplayStringAt(0, y_size - 65, (uint8_t *)"RECORDING DONE, START PLAYBACK...", CENTER_MODE);
+
+  /* -----------Start Playback -------------- */
+  /* Initialize audio IN at REC_FREQ*/
+  BSP_AUDIO_OUT_Init(0, &AudioOutInit);
+
+  /* Play the recorded buffer*/
+  AUDIO_Start(AUDIO_REC_START_ADDR, AUDIO_BLOCK_SIZE * AUDIO_NB_BLOCKS * 2);
+  UTIL_LCD_DisplayStringAt(0, y_size - 40, (uint8_t *)"PLAYBACK DONE", CENTER_MODE);
+
+  while (1)
+  {
+    AUDIO_Process();
+
+    if (CheckForUserInput() > 0)
+    {
+      ButtonState = 0;
+      /* Stop Player before close Test */
+      BSP_AUDIO_OUT_Stop(0);
+      BSP_AUDIO_OUT_DeInit(0);
+      return 0;
+    }
+  }
+}
+
+/**
+  * @brief  Audio Play demo
+  * @param  None
+  * @retval None
+  */
+int32_t AudioRecAnalog_demo (void)
+{
+  uint32_t  block_number;
+  uint32_t y_size;
+
+  BSP_LCD_GetYSize(0, &y_size);
+
+  AudioRec_SetHint();
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"AUDIO RECORD ANALOG", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+
+  AudioOutInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+  AudioOutInit.ChannelsNbr = 2;
+  AudioOutInit.SampleRate = AUDIO_FREQUENCY_48K;
+  AudioOutInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+  AudioOutInit.Volume = 95;
+
+  AnalogInInit.Device = AUDIO_IN_DEVICE_ANALOG_MIC;
+  AnalogInInit.ChannelsNbr = 1;
+  AnalogInInit.SampleRate = AUDIO_FREQUENCY_48K;
+  AnalogInInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+  AnalogInInit.Volume = 100;
+
+  /* Initialize Audio Recorder */
+  if (BSP_AUDIO_IN_Init(0, &AnalogInInit) == BSP_ERROR_NONE)
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)"  AUDIO RECORD INIT OK  ", CENTER_MODE);
+  }
+  else
+  {
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+    UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)"  AUDIO RECORD INIT FAIL", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+  }
+
+  AudioBufferOffset = BUFFER_OFFSET_NONE;
+
+  /* Display the state on the screen */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)"       RECORDING...     ", CENTER_MODE);
+
+
+  /* Start Recording */
+  BSP_AUDIO_IN_Record(0, (uint8_t*)internal_buffer, 2*AUDIO_BLOCK_SIZE);
+
+  for (block_number = 0; block_number < AUDIO_NB_BLOCKS; block_number++)
+  {
+    /* Wait end of half block recording */
+    while(AudioBufferOffset != BUFFER_OFFSET_HALF)
+    {
+      if (CheckForUserInput() > 0)
+      {
+        ButtonState = 0;
+        /* Stop Recorder before close Test */
+        BSP_AUDIO_IN_Stop(0);
+        return 0;
+      }
+    }
+    AudioBufferOffset = BUFFER_OFFSET_NONE;
+    /* Copy recorded 1st half block in SDRAM */
+    memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2)),
+           internal_buffer,
+           AUDIO_BLOCK_SIZE);
+
+    /* Wait end of one block recording */
+    while(AudioBufferOffset != BUFFER_OFFSET_FULL)
+    {
+      if (CheckForUserInput() > 0)
+      {
+        ButtonState = 0;
+        /* Stop Recorder before close Test */
+        BSP_AUDIO_IN_Stop(0);
+        return 0;
+      }
+    }
+    AudioBufferOffset = BUFFER_OFFSET_NONE;
+    /* Copy recorded 2nd half block in SDRAM */
+    memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2) + (AUDIO_BLOCK_SIZE)),
+           (uint16_t *)(&internal_buffer[AUDIO_BLOCK_SIZE/2]),
+           AUDIO_BLOCK_SIZE);
+  }
+
+  /* Stop recorder */
+  BSP_AUDIO_IN_Stop(0);
+  BSP_AUDIO_IN_DeInit(0);
+
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DisplayStringAt(0, y_size - 65, (uint8_t *)"RECORDING DONE, START PLAYBACK...", CENTER_MODE);
+
+  /* -----------Start Playback -------------- */
+  /* Initialize audio IN at REC_FREQ*/
+  BSP_AUDIO_OUT_Init(0, &AudioOutInit);
+
+  /* Play the recorded buffer*/
+  AUDIO_Start(AUDIO_REC_START_ADDR, AUDIO_BLOCK_SIZE * AUDIO_NB_BLOCKS * 2);
+  UTIL_LCD_DisplayStringAt(0, y_size - 40, (uint8_t *)"PLAYBACK DONE", CENTER_MODE);
+
+  while (1)
+  {
+    AUDIO_Process();
+
+    if (CheckForUserInput() > 0)
+    {
+      ButtonState = 0;
+      /* Stop Player before close Test */
+      BSP_AUDIO_OUT_Stop(0);
+      BSP_AUDIO_OUT_DeInit(0);
+      return 0;
+    }
+  }
+}
+
+/**
+  * @brief  Display Audio Record demo hint
+  * @param  None
+  * @retval None
+  */
+static void AudioRec_SetHint(void)
+{
+  uint32_t x_size, y_size;
+
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  /* Clear the LCD */
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+  /* Set Audio Demo description */
+  BSP_LCD_FillRect(0, 0, 0, x_size, 90, LCD_COLOR_RGB565_BLUE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"AUDIO RECORD EXAMPLE", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"Press User button for next menu", CENTER_MODE);
+
+  /* Set the LCD Text Color */
+  UTIL_LCD_DrawRect(10, 100, x_size - 20, y_size - 110, UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DrawRect(11, 101, x_size - 22, y_size - 112, UTIL_LCD_COLOR_BLUE);
+
+}
+
+/*------------------------------------------------------------------------------
+       Callbacks implementation:
+           the callbacks API are defined __weak in the stm32746g_discovery_audio.c file
+           and their implementation should be done the user code if they are needed.
+           Below some examples of callback implementations.
+  ----------------------------------------------------------------------------*/
+
+/**
+  * @brief  Audio IN Error callback function.
+  * @param  None
+  * @retval None
+  */
+void BSP_AUDIO_IN_Error_CallBack(uint32_t Instance)
+{
+  /* This function is called when an Interrupt due to transfer error on or peripheral
+     error occurs. */
+  /* Display message on the LCD screen */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_RED);
+  UTIL_LCD_DisplayStringAt(0, LINE(14), (uint8_t *)"       DMA  ERROR     ", CENTER_MODE);
+
+  /* Stop the program with an infinite loop */
+  while (BSP_PB_GetState(BUTTON_USER) != RESET)
+  {
+    return;
+  }
+  /* could also generate a system reset to recover from the error */
+  /* .... */
+}
+
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/bus.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/bus.c
new file mode 100644
index 000000000..0ff8aeef3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/bus.c
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/bus.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the bus feature in the
+  *          STM32G474 EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Bus demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Bus_demo(void)
+{
+  int32_t  result  = 0;
+  uint32_t i;
+  uint8_t  data[2] = {0xFFU, 0xFFU};
+  uint8_t  value;
+
+  printf("TEST OF BUS\n");
+
+  /* Initialize I2C3 bus */
+  if (BSP_I2C3_Init() != BSP_ERROR_NONE) result--;
+
+  /******************************/
+  /* Check if devices are ready */
+  /******************************/
+  /* IO expander */
+  if (BSP_I2C3_IsReady(IO_I2C_ADDRESS, 1) != BSP_ERROR_NONE) result--;
+  /* PNA : To complete with other devices */
+
+  /***************************/
+  /* Check read/write access */
+  /***************************/
+  /* IO Expander (only 8bits registers) */
+  if (BSP_I2C3_ReadReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_SYS_CTRL, &value, 1) != BSP_ERROR_NONE) result--;
+  /* Enable GPIO expander function */
+  value = value | 0x1U;
+  if (BSP_I2C3_WriteReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_SYS_CTRL, &value, 1) != BSP_ERROR_NONE) result--;
+
+  /* Write/read registers GPIO_PUPDx */
+  if (BSP_I2C3_WriteReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_GPIO_PUPD1, data, 2) != BSP_ERROR_NONE) result--;
+  HAL_Delay(100);
+  if (BSP_I2C3_ReadReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_GPIO_PUPD1, data, 2) != BSP_ERROR_NONE) result--;
+  for (i = 0; i < 2; i++)
+  {
+    if (data[i] != 0xFFU) result--;
+    data[i] = 0U;
+  }
+  /* Restore default value of  registers GPIO_PUPDx */
+  if (BSP_I2C3_WriteReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_GPIO_PUPD1, data, 2) != BSP_ERROR_NONE) result--;
+  HAL_Delay(100);
+
+  /* PNA : To complete with other devices */
+
+  /* De-initialize I2C3 bus */
+  if (BSP_I2C3_DeInit() != BSP_ERROR_NONE) result--;
+
+  if (result == 0)  printf("      Passed\n");
+      else     printf("      Failed\n");
+
+  return result;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/button.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/button.c
new file mode 100644
index 000000000..9fd9e2608
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/button.c
@@ -0,0 +1,111 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/button.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the button feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Button demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Button_demo(void)
+{
+  int32_t  result = 0;
+
+  printf("TEST OF BUTTONS\n");
+
+  /* ----------------- */
+  /* Test in GPIO mode */
+  /* ----------------- */
+  /* Initialize buttons */
+  if (BSP_PB_Init(BUTTON_USER, BUTTON_MODE_GPIO) != BSP_ERROR_NONE) result--;
+
+  /* Check buttons state */
+  if (BSP_PB_GetState(BUTTON_USER) != 0) result--;
+
+  /* Ask user to press buttons and check results */
+  printf("Please press user button\n");
+  while (BSP_PB_GetState(BUTTON_USER) != 1);
+  printf("User button pressed\n");
+
+  /* De-initialize buttons */
+  if (BSP_PB_DeInit(BUTTON_USER) != BSP_ERROR_NONE) result--;
+
+  HAL_Delay(1000);
+
+  /* ----------------- */
+  /* Test in EXTI mode */
+  /* ----------------- */
+  /* Initialize buttons */
+  UserButtonPressed = 0;
+  if (BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI) != BSP_ERROR_NONE) result--;
+
+  /* Check buttons state */
+  if (BSP_PB_GetState(BUTTON_USER) != 0) result--;
+
+  /* Ask user to press buttons and check results */
+  printf("Please press User button\n");
+  while (UserButtonPressed == 0);
+  printf("User button pressed\n");
+
+  HAL_Delay(1000);
+  UserButtonPressed = 0;
+
+  /* Re-ask user to press buttons and check results */
+  printf("Please press one more time User button\n");
+  while (UserButtonPressed == 0);
+  printf("User button pressed\n");
+
+  HAL_Delay(1000);
+  UserButtonPressed = 0;
+
+  /* De-initialize buttons */
+  if (BSP_PB_DeInit(BUTTON_USER) != BSP_ERROR_NONE) result--;
+
+  /*restore button now, else next keypress is not detected anymore */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  return result;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/com.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/com.c
new file mode 100644
index 000000000..04a3c0363
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/com.c
@@ -0,0 +1,84 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/com.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the com feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Com demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Com_demo(void)
+{
+  int32_t         result = 0;
+#if (USE_BSP_COM_FEATURE > 0 )
+  COM_InitTypeDef COM_Init;
+
+  /* Initialize COM init structure */
+  COM_Init.BaudRate   = 38400;
+  COM_Init.WordLength = UART_WORDLENGTH_8B;
+  COM_Init.StopBits   = COM_STOPBITS_1;
+  COM_Init.Parity     = COM_PARITY_NONE;
+  COM_Init.HwFlowCtl  = COM_HWCONTROL_NONE;
+
+  /****************/
+  /* Test of COM1 */
+  /****************/
+  /* Initialize COM */
+  if (BSP_COM_Init(COM1, &COM_Init) != BSP_ERROR_NONE) result--;
+
+#if (USE_COM_LOG == 1)
+  /* Set COM used for log */
+  if (BSP_COM_SelectLogPort(COM1) != BSP_ERROR_NONE) result--;
+#endif
+
+  /* Print data on COM */
+  printf("TEST OF COM1\n");
+
+  /* De-initialize COM */
+  if (BSP_COM_DeInit(COM1) != BSP_ERROR_NONE) result--;
+#endif /* USE_BSP_COM_FEATURE */
+  return result;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/idd.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/idd.c
new file mode 100644
index 000000000..ff7fc709f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/idd.c
@@ -0,0 +1,304 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/idd.c
+  * @author  MCD Application Team
+  * @brief   This example describe how to configure the IDD current measurement 
+  *          in the STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+#if (USE_BSP_IO_CLASS == 1)
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+#define IDD_VALUE_STRING_SIZE 4
+#define IDD_UNIT_STRING_SIZE 2
+
+typedef struct
+{
+  char value[IDD_VALUE_STRING_SIZE + 1];  /* 3 significant digit only */
+  char unit[IDD_UNIT_STRING_SIZE + 1];    /* 2 letters */
+  uint32_t value_na;                      /* value in nano amps */
+  uint8_t error_code;                     /* 0 means no error else see mfx documentation
+                                             In case of error please retry */
+} Iddvalue_t;
+
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+__IO uint32_t IddOnGoing = 0;
+
+/* Private functions ---------------------------------------------------------*/
+static void Idd_Convert(uint32_t Value, Iddvalue_t * idd);
+
+/**
+  * @brief  Main program
+  * @param  None
+  * @retval None
+  */
+int32_t Idd_demo(void)
+{
+  uint32_t IddValue;
+  int32_t status;
+  Iddvalue_t idd;
+  uint32_t sav_systick;
+
+  printf("--- Test IDD in WFI mode ---, Check JP13 is on 1-2 IDD.\n");
+  printf("Expected value ~ 5 mA, please wait 3 seconds...\n");
+
+  /*## IDD Initialization ############################*/
+  if(BSP_IDD_Init(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  if(BSP_IDD_EnableIT(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  if(BSP_IDD_StartMeasurement(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  /* Enable Power Control clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* Suspend HAL tick irq */
+  HAL_SuspendTick();
+
+  IddOnGoing = 1;
+
+  __WFI();
+
+  /* Resume HAL tick irq */
+  HAL_ResumeTick();
+
+  while(IddOnGoing == 1);
+
+  if(BSP_IDD_ClearIT(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  if(BSP_IDD_GetValue(0, &IddValue) < 0)
+  {
+    Error_Handler();
+  }
+
+  /* Fill value in Nano amps */
+  idd.value_na = 10 * IddValue;
+
+  /* Convert Idd value in order to display it on LCD glass */
+  Idd_Convert(IddValue, &idd);
+
+  printf("Measured value = %s %s\n", idd.value, idd.unit);
+
+  if(BSP_IDD_DisableIT(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  if(BSP_IDD_DeInit(0) < 0)
+  {
+    Error_Handler();
+  }
+
+
+  /*## IDD Config ############################*/
+  printf("--- Test IDD config in RUN Mode ---\n");
+
+  if(BSP_IDD_Init(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  if(BSP_IDD_EnableIT(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  for (uint32_t j= 0; j<3; j++)
+  {
+    for (uint32_t i= 0; i<8; i++)
+    {
+      BSP_IDD_Config_t IddConfig;
+
+      switch (j)
+      {
+        case 0:
+            IddConfig.PreDelay = 10 * i * i * i;
+            IddConfig.AcquisitionDuration = 10 * i * i * i;
+          break;
+        case 1:
+            IddConfig.PreDelay = 10 * i * i * i;
+            IddConfig.AcquisitionDuration = 0;
+          break;
+        case 2:
+            IddConfig.PreDelay = 0;
+            IddConfig.AcquisitionDuration = 20 * i * i * i;
+          break;
+        default:
+            Error_Handler();
+            break;
+      }
+
+      printf("PreDelay = %04ld ms; AcquisitionDuration = %04ld ms ", IddConfig.PreDelay, IddConfig.AcquisitionDuration);
+
+      status = BSP_IDD_Config(0, &IddConfig);
+
+      if(status < 0)
+      {
+        if (status == BSP_ERROR_WRONG_PARAM)
+        {
+          printf("BSP_IDD_Config Bad parameter\n");
+        }
+        else
+        {
+          Error_Handler();
+        }
+      }
+
+      HAL_Delay(200);
+
+      sav_systick = HAL_GetTick();
+
+      if(BSP_IDD_StartMeasurement(0) < 0)
+      {
+        Error_Handler();
+      }
+
+      if(status == BSP_ERROR_NONE)
+      {
+        IddOnGoing = 1;
+
+        while(IddOnGoing == 1);
+
+        if(BSP_IDD_ClearIT(0) < 0)
+        {
+          Error_Handler();
+        }
+
+        if(BSP_IDD_GetValue(0, &IddValue) < 0)
+        {
+          Error_Handler();
+        }
+
+        /* Fill value in Nano amps */
+        idd.value_na = 10 * IddValue;
+
+        /* Convert Idd value in order to display it on LCD glass */
+        Idd_Convert(IddValue, &idd);
+
+        printf("Measured value = %s %s ", idd.value, idd.unit);
+        printf("Expected time = %04ld ms; Elapsed Time = %04ld ms\n", \
+          IddConfig.PreDelay + IddConfig.AcquisitionDuration, \
+          HAL_GetTick() - sav_systick \
+          );
+      }
+    }
+  }
+
+  if(BSP_IDD_DisableIT(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  if(BSP_IDD_DeInit(0) < 0)
+  {
+    Error_Handler();
+  }
+
+  printf("--- End of Test IDD ---\n\n");
+
+
+  return 0;
+}
+
+/**
+  * @brief  Convert value to display correct amper unit.
+  * @param  None
+  * @retval None
+  */
+static void Idd_Convert(uint32_t Value, Iddvalue_t * idd)
+{
+  float TempIddDisplay = 0;
+  idd->value[0]=0;
+  idd->unit[0]=0;
+
+  TempIddDisplay = (float) Value * 10;
+
+  if (TempIddDisplay < 1000){  /* Value in nano amps */
+    sprintf(idd->value, "%.0f", TempIddDisplay);
+    sprintf(idd->unit, "nA");
+  }else{  /* Value in micro amps */
+    TempIddDisplay = TempIddDisplay / 1000;
+    if (TempIddDisplay < 10){
+      sprintf(idd->value, "%.2f", TempIddDisplay);
+      sprintf(idd->unit, "uA");
+    }else if (TempIddDisplay < 100){
+      sprintf(idd->value, "%.1f", TempIddDisplay);
+      sprintf(idd->unit, "uA");
+    }else if (TempIddDisplay < 1000){
+      sprintf(idd->value, "%.0f", TempIddDisplay);
+      sprintf(idd->unit, "uA");
+    }else{ /* Value in milli Amp */
+      TempIddDisplay = TempIddDisplay/1000;
+      if (TempIddDisplay < 10){
+        sprintf(idd->value, "%.2f", TempIddDisplay);
+        sprintf(idd->unit, "mA");
+      }else if (TempIddDisplay < 100){
+        sprintf(idd->value, "%.1f", TempIddDisplay);
+        sprintf(idd->unit, "mA");
+      }else if (TempIddDisplay < 1000){
+        sprintf(idd->value, "%.0f", TempIddDisplay);
+        sprintf(idd->unit, "mA");
+      }
+    }
+  }
+}
+
+
+/**
+  * @brief  EXTI line detection callbacks.
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void BSP_IDD_Callback()
+{
+  IddOnGoing = 0;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* #if (USE_BSP_IO_CLASS == 1) */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/io.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/io.c
new file mode 100644
index 000000000..3b4fea36b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/io.c
@@ -0,0 +1,129 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/io.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the IO feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+#if (USE_BSP_IO_CLASS == 1)
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  IO demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Io_demo(void)
+{
+  int32_t       result  = 0;
+  BSP_IO_Init_t Init;
+
+  printf("TEST OF IO\n");
+
+  /*****************/
+  /* Initialize IO */
+  /*****************/
+  Init.Pin  = IO_PIN_7;
+  Init.Mode = IO_MODE_OUTPUT_PP;
+  Init.Pull = IO_PULLUP;
+  /* Test with wrong parameters */
+  if (BSP_IO_Init(1, &Init) != BSP_ERROR_WRONG_PARAM) result--;
+  if (BSP_IO_Init(0, NULL) != BSP_ERROR_WRONG_PARAM) result--;
+
+  /* Test with correct parameters */
+  if (BSP_IO_Init(0, &Init) != BSP_ERROR_NONE) result--; /* LED6 */
+  Init.Pin  = IO_PIN_0;
+  Init.Mode = IO_MODE_IT_LOW_LEVEL;
+  Init.Pull = IO_PULLUP;
+  if (BSP_IO_Init(0, &Init) != BSP_ERROR_NONE) result--; /* JOY_SEL */
+
+  /**************************/
+  /* Write, read, toggle IO */
+  /**************************/
+  /* Test with wrong parameters */
+  if (BSP_IO_WritePin(1, IO_PIN_7, IO_PIN_RESET) != BSP_ERROR_WRONG_PARAM) result--;
+  if (BSP_IO_ReadPin(1, IO_PIN_7) != BSP_ERROR_WRONG_PARAM) result--;
+  if (BSP_IO_TogglePin(1, IO_PIN_7) != BSP_ERROR_WRONG_PARAM) result--;
+
+  /* Test with correct parameters */
+  if (BSP_IO_WritePin(0, IO_PIN_7, IO_PIN_RESET) != BSP_ERROR_NONE) result--;
+  printf("Check that LED4 is ON\n");
+  if (CheckResult() != 0U) result--;
+  if (BSP_IO_ReadPin(0, IO_PIN_7) != IO_PIN_RESET) result--;
+
+  if (BSP_IO_TogglePin(0, IO_PIN_7) != BSP_ERROR_NONE) result--;
+  printf("Check that LED4 is OFF\n");
+  if (CheckResult() != 0U) result--;
+  if (BSP_IO_ReadPin(0, IO_PIN_7) != IO_PIN_SET) result--;
+
+  /********************/
+  /* Get and clear IT */
+  /********************/
+  /* Test with wrong parameters */
+  if (BSP_IO_GetIT(1, IO_PIN_0) != BSP_ERROR_WRONG_PARAM) result--;
+  if (BSP_IO_ClearIT(1, IO_PIN_0) != BSP_ERROR_WRONG_PARAM) result--;
+
+  /* Test with correct parameters */
+  if (BSP_IO_GetIT(0, IO_PIN_0) != IO_PIN_IT_RESET) result--;
+  printf("Please press JOY_SEL\n");
+  while (BSP_IO_GetIT(0, IO_PIN_0) != IO_PIN_IT_SET);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+  if (BSP_IO_ClearIT(0, IO_PIN_0) != BSP_ERROR_NONE) result--;
+  if (BSP_IO_GetIT(0, IO_PIN_0) != IO_PIN_IT_RESET) result--;
+
+  /********************/
+  /* De-Initialize IO */
+  /* Test with wrong parameters */
+  if (BSP_IO_DeInit(1) != BSP_ERROR_WRONG_PARAM) result--;
+
+  /* Test with correct parameters */
+  if (BSP_IO_DeInit(0) != BSP_ERROR_NONE) result--;
+
+  if (result==0)   printf("      Passed\n");
+        else    printf("      Failed\n");
+
+  return result;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* #if (USE_BSP_IO_CLASS == 1) */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/joystick.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/joystick.c
new file mode 100644
index 000000000..f8a30585c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/joystick.c
@@ -0,0 +1,150 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/joystick.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the joystick feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+
+#if (USE_BSP_IO_CLASS == 1)
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+__IO JOYPin_TypeDef JoyPinPressed = JOY_NONE;
+uint32_t JoyStickDemo = 0;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+
+/**
+  * @brief  JOY demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Joy_demo(void)
+{
+  int32_t result  = 0;
+
+  printf("TEST OF JOYSTICK\n");
+  printf("                  mode GPIO\n");
+
+  /*********************/
+  /* Test in GPIO mode */
+  /*********************/
+  /* Initialize joystick */
+  if (BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+  /* Test of BSP_JOY_GetState function */
+  printf("Please press JOY_SEL\n");
+  while (BSP_JOY_GetState(JOY1) != JOY_SEL);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+
+  printf("Please press JOY_UP\n");
+  while (BSP_JOY_GetState(JOY1) != JOY_UP);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+
+  printf("Please press JOY_DOWN\n");
+  while (BSP_JOY_GetState(JOY1) != JOY_DOWN);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+
+  printf("Please press JOY_RIGHT\n");
+  while (BSP_JOY_GetState(JOY1) != JOY_RIGHT);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+
+  printf("Please press JOY_LEFT\n");
+  while (BSP_JOY_GetState(JOY1) != JOY_LEFT);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+
+  /* De-Initialize joystick */
+  if (BSP_JOY_DeInit(JOY1, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+  /*********************/
+  /* Test in EXTI mode */
+  /*********************/
+  printf("                  mode EXTI (IRQ)\n");
+  /* Initialize joystick */
+  if (BSP_JOY_Init(JOY1, JOY_MODE_EXTI, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+  printf("Please press JOY_SEL\n");
+  while (JoyPinPressed != JOY_SEL);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+  JoyPinPressed = JOY_NONE;
+
+  printf("Please press JOY_UP\n");
+  while (JoyPinPressed != JOY_UP);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+  JoyPinPressed = JOY_NONE;
+
+  printf("Please press JOY_DOWN\n");
+  while (JoyPinPressed != JOY_DOWN);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+  JoyPinPressed = JOY_NONE;
+
+  printf("Please press JOY_RIGHT\n");
+  while (JoyPinPressed != JOY_RIGHT);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+  JoyPinPressed = JOY_NONE;
+
+  printf("Please press JOY_LEFT\n");
+  while (JoyPinPressed != JOY_LEFT);
+  printf("OK\n");
+  HAL_Delay(1000); /* Debounce time */
+  JoyPinPressed = JOY_NONE;
+
+  /* De-Initialize joystick */
+  if (BSP_JOY_DeInit(JOY1, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+  if (result == 0)   printf("      Passed\n");
+        else         printf("      Failed\n");
+
+  return result;
+}
+
+void BSP_JOY_Callback(JOY_TypeDef JOY, JOYPin_TypeDef JoyPin)
+{
+  JoyPinPressed = JoyPin;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#endif /* #if (USE_BSP_IO_CLASS == 1) */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/lcd.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/lcd.c
new file mode 100644
index 000000000..15f3f79c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/lcd.c
@@ -0,0 +1,553 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/lcd.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use LCD drawing features in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include <stdio.h>
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define LCD_FEATURES_NUM                6
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static uint8_t LCD_Feature = 0;
+/* Private function prototypes -----------------------------------------------*/
+static void LCD_SetHint(void);
+static void LCD_Show_Feature(uint8_t feature);
+static void ReadPixelTest(void);
+static void BrightnessTest(void);
+/* Private functions ---------------------------------------------------------*/
+
+
+/**
+  * @brief  LCD demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Lcd_demo(void)
+{
+  int32_t   result = 0;
+  uint32_t  Brightness;
+  uint32_t  Xsize, Ysize;
+  uint32_t  k;
+  uint32_t  Orientation[4] = {LCD_ORIENTATION_PORTRAIT, LCD_ORIENTATION_LANDSCAPE, LCD_ORIENTATION_PORTRAIT_ROT180, LCD_ORIENTATION_LANDSCAPE_ROT180};
+  char*     Text[4] = {"portrait", "landscape", "portrait with 180 degree rotation", "landscape with 180 degree rotation"};
+
+  Point     triangle1[3] = {{145, 5}, {145, 45}, {185, 45}};
+  Point     triangle2[3] = {{190, 45}, {230, 45}, {230, 5}};
+  uint32_t  Pixel;
+
+  for (k = 0; k < 4; k++)
+  {
+    /********************/
+    /* TEST WITHOUT GUI */
+    /********************/
+    printf("\r\nTest with orientation %s\n", Text[k]);
+
+    /* Initialize LCD */
+    if (BSP_LCD_Init(0, Orientation[k]) != BSP_ERROR_NONE) result--;
+
+    /* Set the brightness */
+    if (BSP_LCD_SetBrightness(0, 50) != BSP_ERROR_COMPONENT_FAILURE) result--;
+
+    /* Get the brightness */
+    if (BSP_LCD_GetBrightness(0, &Brightness) != BSP_ERROR_COMPONENT_FAILURE) result--;
+
+    /* Get the display Xsize */
+    if (BSP_LCD_GetXSize(0, &Xsize) != BSP_ERROR_NONE) result--;
+    if ((Orientation[k] == LCD_ORIENTATION_PORTRAIT) || (Orientation[k] == LCD_ORIENTATION_PORTRAIT_ROT180))
+    {
+      if (Xsize != 240U) result--;
+    }
+    else
+    {
+      if (Xsize != 320U) result--;
+    }
+
+    /* Get the display Ysize */
+    if (BSP_LCD_GetYSize(0, &Ysize) != BSP_ERROR_NONE) result--;
+    if ((Orientation[k] == LCD_ORIENTATION_PORTRAIT) || (Orientation[k] == LCD_ORIENTATION_PORTRAIT_ROT180))
+    {
+      if (Ysize != 320U) result--;
+    }
+    else
+    {
+      if (Ysize != 240U) result--;
+    }
+
+    /* Clean display */
+    uint32_t i, j;
+
+    for (i = 0; i < Xsize; i++)
+    {
+      for (j = 0; j < Ysize; j++)
+      {
+        if (BSP_LCD_WritePixel(0, i, j, LCD_COLOR_RGB565_WHITE) != BSP_ERROR_NONE) result--;
+      }
+    }
+
+    /* Set the display on */
+    if (BSP_LCD_DisplayOn(0) != BSP_ERROR_NONE) result--;
+
+    /* Display a brown rectangle pixel by pixel */
+    for (i = 0; i < 60; i++)
+    {
+      for (j = 0; j < 120; j++)
+      {
+        if (BSP_LCD_WritePixel(0, i, j, LCD_COLOR_RGB565_DARKGREEN) != BSP_ERROR_NONE) result--;
+      }
+    }
+
+    /* Get pixel */
+    if (BSP_LCD_ReadPixel(0, 20, 21, &Pixel) != BSP_ERROR_NONE) result--;
+    if (Pixel != LCD_COLOR_RGB565_DARKGREEN) result--;
+
+    /* Display a red rectangle */
+    if (BSP_LCD_FillRect(0, 80, 20, 80, 60, LCD_COLOR_RGB565_RED) != BSP_ERROR_NONE) result--;
+
+    /* Display a green horizontal line */
+    if (BSP_LCD_DrawHLine(0, 80, 120, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+    /* Display a green vertical line */
+    if (BSP_LCD_DrawVLine(0, 80, 120, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+    /* Display a green horizontal line */
+    if (BSP_LCD_DrawHLine(0, 80, 210, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+    /* Display a green vertical line */
+    if (BSP_LCD_DrawVLine(0, 170, 120, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+    /* Display a bitmap */
+    if (BSP_LCD_DrawBitmap(0, 85, 135, (uint8_t *)stlogo) != BSP_ERROR_NONE) result--;
+
+    HAL_Delay(1000);
+
+    /* Set the display off */
+    if (BSP_LCD_DisplayOff(0) != BSP_ERROR_NONE) result--;
+
+    HAL_Delay(1000);
+
+    /* Set the display on */
+    if (BSP_LCD_DisplayOn(0) != BSP_ERROR_NONE) result--;
+
+    /* Check result */
+    if (CheckResult() != 0U) result--;
+
+    /* De-initialize LCD */
+    if (BSP_LCD_DeInit(0) != BSP_ERROR_NONE) result--;
+
+    HAL_Delay(1000);
+
+    /*****************/
+    /* TEST WITH GUI */
+    /*****************/
+    printf("\r\nTest with orientation %s and GUI\n", Text[k]);
+
+    /* Initialize LCD */
+    if (BSP_LCD_Init(0, Orientation[k]) != BSP_ERROR_NONE) result--;
+
+    /* Set GUI functions */
+     UTIL_LCD_SetFuncDriver(&LCD_Driver); /* SetFunc before setting device */
+     UTIL_LCD_SetDevice(0);/* SetDevice after funcDriver is set */
+
+    /* Clear screen */
+    BSP_LCD_Clear(0, LCD_COLOR_RGB565_WHITE);
+
+    /* Set the display on */
+    if (BSP_LCD_DisplayOn(0) != BSP_ERROR_NONE) result--;
+
+    /* Draw a black pixel */
+    UTIL_LCD_SetPixel(25, 25, UTIL_LCD_COLOR_BLACK);
+
+    /* Draw a yellow circle */
+    UTIL_LCD_DrawCircle(25, 25, 20, UTIL_LCD_COLOR_YELLOW);
+
+    /* Fill a magenta circle */
+    UTIL_LCD_FillCircle(70, 25, 20, UTIL_LCD_COLOR_MAGENTA);
+
+    /* Draw a blue vertical line */
+    UTIL_LCD_DrawVLine(95, 5, 40, UTIL_LCD_COLOR_BLUE);
+
+    /* Draw a red horizontal line */
+    UTIL_LCD_DrawHLine(100, 25, 40, UTIL_LCD_COLOR_RED);
+
+    /* Draw a green triangle */
+    UTIL_LCD_DrawPolygon(triangle1, 3, UTIL_LCD_COLOR_GREEN);
+
+    /* Fill a cyan triangle */
+    UTIL_LCD_FillPolygon(triangle2, 3, UTIL_LCD_COLOR_CYAN);
+
+    /* Draw a gray rectangle */
+    UTIL_LCD_DrawRect(5, 50, 40, 20, UTIL_LCD_COLOR_GRAY);
+
+    /* Fill a brown rectangle */
+    UTIL_LCD_FillRect(50, 50, 40, 20, UTIL_LCD_COLOR_BROWN);
+
+    /* Draw a orange ellipse */
+    UTIL_LCD_DrawEllipse(115, 60, 20, 10, UTIL_LCD_COLOR_ORANGE);
+
+    /* Fill a dark blue ellipse */
+    UTIL_LCD_FillEllipse(170, 60, 20, 10, UTIL_LCD_COLOR_DARKBLUE);
+
+    /* Display text */
+    UTIL_LCD_SetFont(&Font24);
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLACK);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAtLine(3, (uint8_t*)"Test of LCD");
+    UTIL_LCD_SetFont(&Font12);
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_ORANGE);
+    UTIL_LCD_DisplayStringAt(0, 112, (uint8_t*)"Test of LCD", CENTER_MODE);
+
+    /* Draw bitmap */
+    UTIL_LCD_DrawBitmap(5, 130, (uint8_t *)stlogo);
+
+    /* Check result */
+    if (CheckResult() != 0U) result--;
+
+    /* De-initialize LCD */
+    if (BSP_LCD_DeInit(0) != BSP_ERROR_NONE) result--;
+  }
+
+  BSP_LCD_Init(0, Orientation[1]);
+  return result;
+}
+
+/**
+  * @brief  LCD demo
+  * @param  None
+  * @retval None
+  */
+void LCD_demo (void)
+{
+  LCD_SetHint();
+  LCD_Feature = 0;
+  LCD_Show_Feature (LCD_Feature);
+
+  while (1)
+  {
+
+    if(CheckForUserInput() > 0)
+    {
+      if(++LCD_Feature < LCD_FEATURES_NUM)
+      {
+       LCD_Show_Feature (LCD_Feature);
+      }
+      else
+      {
+        return;
+      }
+    }
+    HAL_Delay(100);
+  }
+}
+
+/**
+  * @brief  Display LCD demo hint
+  * @param  None
+  * @retval None
+  */
+static void LCD_SetHint(void)
+{
+  uint32_t x_size, y_size;
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  /* Clear the LCD */
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+  /* Set LCD Demo description */
+
+  BSP_LCD_FillRect(0, 0, 0, x_size, 80, UTIL_LCD_COLOR_BLUE );
+
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"LCD", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"This example shows the different", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"LCD Features, use Tamper push-button to display", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"next page", CENTER_MODE);
+
+   /* Set the LCD Text Color */
+  UTIL_LCD_DrawRect(10, 90, x_size - 20, y_size- 100, UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DrawRect(11, 91, x_size - 22, y_size- 102, UTIL_LCD_COLOR_BLUE);
+ }
+
+/**
+  * @brief  Show LCD Features
+  * @param  feature : feature index
+  * @retval None
+  */
+static void LCD_Show_Feature(uint8_t feature)
+{
+  Point Points[]= {{220, 220}, {280, 180}, {320, 180}, {370, 220}, {370, 260}, {320, 310}, {280, 310}, {220, 260}};
+  Point Points2[3];
+  uint32_t x_size, y_size;
+
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  Points2[0].X = x_size - 80;
+  Points2[0].Y = 150;
+  Points2[1].X = x_size - 20;
+  Points2[1].Y = 150;
+  Points2[2].X = x_size - 20;
+  Points2[2].Y = 200;
+
+  BSP_LCD_FillRect(0, 12, 92, x_size - 24, y_size- 104, LCD_COLOR_RGB565_WHITE );
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+
+  switch (feature)
+  {
+  case 0:
+    /* Text Feature */
+    UTIL_LCD_DisplayStringAt(14, 100, (uint8_t *)"Left aligned Text", LEFT_MODE);
+    UTIL_LCD_DisplayStringAt(0, 115, (uint8_t *)"Center aligned Text", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(14, 130, (uint8_t*)"Right aligned Text", RIGHT_MODE);
+    UTIL_LCD_SetFont(&Font24);
+    UTIL_LCD_DisplayStringAt(14, 180, (uint8_t *)"Font24", LEFT_MODE);
+    UTIL_LCD_SetFont(&Font20);
+    UTIL_LCD_DisplayStringAt(x_size/2 -20, 180, (uint8_t *)"Font20", LEFT_MODE);
+    UTIL_LCD_SetFont(&Font16);
+    UTIL_LCD_DisplayStringAt(x_size - 80, 184, (uint8_t *)"Font16", LEFT_MODE);
+    HAL_Delay(2000);
+    break;
+
+  case 1:
+
+    /* Draw misc. Shapes */
+    UTIL_LCD_DrawRect ( 20, 100, 60 , 40, UTIL_LCD_COLOR_BLACK);
+    BSP_LCD_FillRect(0, 100, 100, 60 , 40, LCD_COLOR_RGB565_BLACK);
+
+//    UTIL_LCD_DrawCircle( x_size - 120, 120, 20);
+//    UTIL_LCD_FillCircle( x_size - 40, 120, 20, UTIL_LCD_COLOR_GRAY);
+
+    UTIL_LCD_FillPolygon(Points, 8, UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DrawEllipse(130, 170, 30, 20, UTIL_LCD_COLOR_RED);
+    UTIL_LCD_FillEllipse(200, 170, 30, 20, UTIL_LCD_COLOR_RED);
+
+    BSP_LCD_DrawHLine(0, 20, y_size - 30, x_size / 5, LCD_COLOR_RGB565_BLACK);
+    UTIL_LCD_DrawLine ( 100, y_size - 20, 230, y_size- 50, UTIL_LCD_COLOR_BLACK);
+    UTIL_LCD_DrawLine ( 100, y_size- 50, 230, y_size- 20, UTIL_LCD_COLOR_BLACK);
+
+    UTIL_LCD_DrawPolygon(Points2, 3, UTIL_LCD_COLOR_YELLOW);
+    HAL_Delay(2000);
+    break;
+
+  case 2:
+    /* Draw Bitmap */
+    BSP_LCD_DrawBitmap(0, 20, 100, (uint8_t *)stlogo);
+    HAL_Delay(500);
+
+    BSP_LCD_DrawBitmap(0, x_size/2 - 40, 100, (uint8_t *)stlogo);
+    HAL_Delay(500);
+
+    BSP_LCD_DrawBitmap(0, x_size-100, 100, (uint8_t *)stlogo);
+    HAL_Delay(500);
+
+    BSP_LCD_DrawBitmap(0, 20, y_size- 80, (uint8_t *)stlogo);
+    HAL_Delay(500);
+
+    BSP_LCD_DrawBitmap(0, x_size/2 - 40, y_size- 80, (uint8_t *)stlogo);
+    HAL_Delay(500);
+
+    BSP_LCD_DrawBitmap(0, x_size-100, y_size- 80, (uint8_t *)stlogo);
+    HAL_Delay(500);
+    break;
+
+    case 3:
+    /* Set LCD Brightness */
+     BrightnessTest();
+    break;
+
+    case 4:
+    /* LCD Read Pixel */
+     ReadPixelTest();
+    break;
+  case 5:
+
+    //LCD_SetFuncDriver(&LCD_Driver);
+    UTIL_LCD_SetFont(&Font20);
+    /* Clear the LCD */
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+    UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+    BSP_LCD_GetXSize(0, &x_size);
+
+    BSP_LCD_FillRect(0,0, 0, x_size, 80, UTIL_LCD_COLOR_WHITE);
+
+    /* Set the LCD Text Color */
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: LANDSCAPE", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB565", CENTER_MODE);
+    HAL_Delay(2000);
+    //LCD_SetFuncDriver(&LCD_Driver);
+    UTIL_LCD_SetFont(&Font20);
+    /* Clear the LCD */
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+    UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+    BSP_LCD_GetXSize(0, &x_size);
+
+#if 0
+    BSP_LCD_FillRect(0, 0, 0, x_size, 80, LCD_COLOR_RGB565_WHITE);
+    /* Set the LCD Text Color */
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: PORTRAIT", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB565", CENTER_MODE);
+    HAL_Delay(2000);
+
+    BSP_LCD_DeInit(0);
+    BSP_LCD_Init(0, LCD_ORIENTATION_PORTRAIT);
+    //LCD_SetFuncDriver(&LCD_Driver);
+    UTIL_LCD_SetFont(&LCD_DEFAULT_FONT);
+    /* Clear the LCD */
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+    UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+    BSP_LCD_GetXSize(0, &x_size);
+
+    BSP_LCD_FillRect(0, 0, 0, x_size, 80, LCD_COLOR_RGD565_WHITE);
+    /* Set the LCD Text Color */
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: PORTRAIT", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB888", CENTER_MODE);
+    HAL_Delay(2000);
+#endif
+    BSP_LCD_DeInit(0);
+    BSP_LCD_Init(0, LCD_ORIENTATION_LANDSCAPE);
+    //LCD_SetFuncDriver(&LCD_Driver);
+    UTIL_LCD_SetFont(&Font20);
+    /* Clear the LCD */
+    UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+    UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+    BSP_LCD_GetXSize(0, &x_size);
+
+    BSP_LCD_FillRect(0, 0, 0, x_size, 80, LCD_COLOR_RGB565_WHITE);
+    /* Set the LCD Text Color */
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: LANDSCAPE", CENTER_MODE);
+    UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB888", CENTER_MODE);
+    HAL_Delay(2000);
+
+    break;
+  }
+}
+
+/**
+  * @brief  LCD Read Pixel test
+  * @param  None
+  * @retval None
+  */
+static void ReadPixelTest(void)
+{
+  uint16_t i, j, k;
+  uint32_t x_size, y_size, read_pixel;
+  uint32_t colors[23] = {UTIL_LCD_COLOR_BLUE, UTIL_LCD_COLOR_GREEN, UTIL_LCD_COLOR_RED, UTIL_LCD_COLOR_CYAN, UTIL_LCD_COLOR_MAGENTA, UTIL_LCD_COLOR_YELLOW,
+  UTIL_LCD_COLOR_LIGHTBLUE, UTIL_LCD_COLOR_LIGHTGREEN, UTIL_LCD_COLOR_LIGHTRED, UTIL_LCD_COLOR_LIGHTMAGENTA,
+  UTIL_LCD_COLOR_LIGHTYELLOW, UTIL_LCD_COLOR_DARKBLUE, UTIL_LCD_COLOR_DARKGREEN, UTIL_LCD_COLOR_DARKRED, UTIL_LCD_COLOR_DARKCYAN,
+  UTIL_LCD_COLOR_DARKMAGENTA, UTIL_LCD_COLOR_DARKYELLOW, UTIL_LCD_COLOR_LIGHTGRAY, UTIL_LCD_COLOR_GRAY, UTIL_LCD_COLOR_DARKGRAY,
+  UTIL_LCD_COLOR_BLACK, UTIL_LCD_COLOR_BROWN, UTIL_LCD_COLOR_ORANGE };
+
+
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+#if (LCD_HX8347D == 1)
+  for(k = 0; k < 23; k++)
+  {
+    UTIL_LCD_Clear(colors[k]);
+
+    BSP_LCD_ReadPixel(0, i++, j++, &read_pixel);
+    if(read_pixel != colors[k])
+    {
+          BSP_LED_On(LED_RED);
+    }
+  }
+#else
+  for(k = 0; k < 23; k++)
+  {
+    UTIL_LCD_Clear(colors[k]);
+    for(j = 0; j < y_size; j++)
+    {
+      for(i = 0; i < x_size; i++)
+      {
+        BSP_LCD_ReadPixel(0, i,j, &read_pixel);
+        if(read_pixel != colors[k])
+        {
+          BSP_LED_On(LED_RED);
+        }
+      }
+    }
+  }
+#endif /* (LCD_HX8347D == 1)*/
+}
+
+/**
+  * @brief  Show LCD Brightness Feature
+  * @param  None
+  * @retval None
+  */
+static void BrightnessTest(void)
+{
+  uint8_t counter = 100;
+  uint8_t text[30];
+  uint32_t y_size;
+
+  BSP_LCD_GetXSize(0, &y_size);
+
+#if (LCD_HX8347D == 1)
+    /* brightness control is not supported by controller */
+    BSP_LCD_SetBrightness(0, counter);
+    sprintf((char*)text," Brightness = %d ",counter);
+    UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)text, CENTER_MODE);
+    HAL_Delay(50);
+#else
+  while(counter > 0)
+  {
+    BSP_LCD_SetBrightness(0, counter);
+    sprintf((char*)text," Brightness = %d ",counter);
+    UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)text, CENTER_MODE);
+    counter = counter - 10/*counter--*/;
+    HAL_Delay(50);
+  }
+  while(counter <= 100)
+  {
+    BSP_LCD_SetBrightness(0, counter);
+    sprintf((char*)text," Brightness = %d ",counter);
+    UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)text, CENTER_MODE);
+    counter = counter + 10/*counter++*/;
+    HAL_Delay(50);
+  }
+#endif /* LCD_HX8347D*/
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/led.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/led.c
new file mode 100644
index 000000000..30e30a2e9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/led.c
@@ -0,0 +1,157 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/led.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the led feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Led demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Led_demo(void)
+{
+  int32_t  result = 0;
+
+  printf("TEST OF LEDs\n");
+
+  /* Initialize the LEDs */
+  if (BSP_LED_Init(LED1) != BSP_ERROR_NONE) result--;
+  if (BSP_LED_Init(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+  if (BSP_LED_Init(LED2) != BSP_ERROR_NONE) result--;
+  if (BSP_LED_Init(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+  /* Switch on the LEDs */
+  printf("Switch on LED1\n");
+  if (BSP_LED_On(LED1) != BSP_ERROR_NONE) result--;
+  printf("Switch on LED3\n");
+  if (BSP_LED_On(LED3) != BSP_ERROR_NONE) result--;
+
+#if (USE_BSP_IO_CLASS == 1)
+  printf("Switch on LED2\n");
+  if (BSP_LED_On(LED2) != BSP_ERROR_NONE) result--;
+  printf("Switch on LED4\n");
+  if (BSP_LED_On(LED4) != BSP_ERROR_NONE) result--;
+#endif
+  /* Check LEDs states */
+  if (BSP_LED_GetState(LED1) != 1) result--;
+  if (BSP_LED_GetState(LED3) != 1) result--;
+#if (USE_BSP_IO_CLASS == 1)
+  if (BSP_LED_GetState(LED2) != 1) result--;
+  if (BSP_LED_GetState(LED4) != 1) result--;
+#endif
+
+  /* Check result */
+  if (CheckResult() != 0U) result--;
+
+  /* Toggle the LEDs */
+  printf("Switch off LED1\n");
+  if (BSP_LED_Toggle(LED1) != BSP_ERROR_NONE) result--;
+  printf("Switch off LED3\n");
+  if (BSP_LED_Toggle(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+  printf("Switch off LED2\n");
+  if (BSP_LED_Toggle(LED2) != BSP_ERROR_NONE) result--;
+  printf("Switch off LED4\n");
+  if (BSP_LED_Toggle(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+  /* Check LEDs states */
+  if (BSP_LED_GetState(LED1) != 0) result--;
+  if (BSP_LED_GetState(LED3) != 0) result--;
+#if (USE_BSP_IO_CLASS == 1)
+  if (BSP_LED_GetState(LED2) != 0) result--;
+  if (BSP_LED_GetState(LED4) != 0) result--;
+#endif
+
+  /* Check result */
+  if (CheckResult() != 0U) result--;
+
+  /* Toggle the LEDs */
+  printf("Switch on LED1\n");
+  if (BSP_LED_Toggle(LED1) != BSP_ERROR_NONE) result--;
+  printf("Switch on LED3\n");
+  if (BSP_LED_Toggle(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+  printf("Switch on LED2\n");
+  if (BSP_LED_Toggle(LED2) != BSP_ERROR_NONE) result--;
+  printf("Switch on LED4\n");
+  if (BSP_LED_Toggle(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+  /* Check result */
+  if (CheckResult() != 0U) result--;
+
+  /* Switch off the LEDs */
+  printf("Switch off LED1\n");
+  if (BSP_LED_Off(LED1) != BSP_ERROR_NONE) result--;
+  printf("Switch off LED3\n");
+  if (BSP_LED_Off(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+  printf("Switch off LED2\n");
+  if (BSP_LED_Off(LED2) != BSP_ERROR_NONE) result--;
+  printf("Switch off LED4\n");
+  if (BSP_LED_Off(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+  /* Check result */
+  if (CheckResult() != 0U) result--;
+
+  /* De-Initialize the LEDs */
+  if (BSP_LED_DeInit(LED1) != BSP_ERROR_NONE) result--;
+  if (BSP_LED_DeInit(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+  if (BSP_LED_DeInit(LED2) != BSP_ERROR_NONE) result--;
+  if (BSP_LED_DeInit(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+#if (USE_BSP_IO_CLASS == 1)
+  /* Add a call of BSP_IO_DeInit for a clean exit of this test */
+  if (BSP_IO_DeInit(0) != BSP_ERROR_NONE) result--;
+#endif
+
+  return result;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/log.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/log.c
new file mode 100644
index 000000000..a79785a27
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/log.c
@@ -0,0 +1,109 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/log.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the LCD Log firmware functions
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "lcd_log.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  LCD Log demo
+  * @param  None
+  * @retval None
+  */
+void Log_demo(void)
+{
+  JOYState_TypeDef JoyState = JOY_NONE;
+  uint8_t i = 0;
+
+  /* Wait For User inputs */
+  while(CheckForUserInput() == 0);
+
+  BSP_JOY_Init(JOY_MODE_GPIO);
+
+  /* Initialize LCD Log module */
+  LCD_LOG_Init();
+
+  /* Show Header and Footer texts */
+  LCD_LOG_SetHeader((uint8_t *)"Log Example");
+  LCD_LOG_SetFooter((uint8_t *)"Use Joystick to scroll up/down");
+
+  /* Output User logs */
+  for (i = 0; i < 35; i++)
+  {
+    LCD_UsrLog ("This is Line %d \n", i);
+  }
+
+  HAL_Delay(2000);
+
+   /* Clear Old logs */
+  LCD_LOG_ClearTextZone();
+
+   /* Output new user logs */
+  for (i = 0; i < 70; i++)
+  {
+    LCD_UsrLog ("This is Line %d \n", i);
+  }
+
+  /* Check for joystick user input for scroll (back and forward) */
+  while (1)
+  {
+    JoyState = BSP_JOY_GetState();
+    switch(JoyState)
+    {
+    case JOY_UP:
+      LCD_LOG_ScrollBack();
+      break;
+    case JOY_DOWN:
+      LCD_LOG_ScrollForward();
+      break;
+
+    default:
+      break;
+    }
+    if(CheckForUserInput() > 0)
+    {
+      return;
+    }
+    HAL_Delay (10);
+  }
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/main.c
new file mode 100644
index 000000000..f912863b0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/main.c
@@ -0,0 +1,402 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example describes how to test the BSP of the STM32G474E-EVAL1 board.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include <stdio.h>
+#include "stlogo.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP_Mode
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/***********************************************/
+/* Please uncomment lines to execute more demo */
+/***********************************************/
+BSP_DemoTypedef  BSP_examples[]=
+{
+  {Led_demo,    "LED"},
+  {Button_demo, "BUTTON"},
+#if (USE_BSP_IO_CLASS == 1)
+  {Io_demo,     "IO"},
+//  {Joy_demo,    "JOYSTICK"},
+  {Lcd_demo,    "LCD"},
+//  {Idd_demo,    "IDD"},
+#endif
+//  {Pot_demo,    "POTENTIOMETER"}, /* Please test POT without other tests to avoid perturbation from MFX on PA0 */
+
+#if defined(__GNUC__)  || defined(__ICCARM__)   
+  {AudioPlay_demo, "AUDIO PLAY"},
+#endif 
+
+//  {AudioRecAnalog_demo, "ANALOG REC"},
+//  {SD_demo,     "SD polling"},
+//  {Com_demo,    "COM"}, /* Please test COM without other tests and with USE_COM_LOG = 1 */
+//  {SRAM_demo,   "SRAM"},
+  {Bus_demo,    "BUS"},
+//  {QSPI_demo,   "QSPI"},
+};
+
+__IO uint32_t UserButtonPressed = 0;
+
+/* Private define ------------------------------------------------------------*/
+#define KEYS_NUMBER              6 /* Button + joystick */
+#define DEBOUNCE                 100 /* 100ms */
+#if defined(__GNUC__)
+extern void initialise_monitor_handles(void);
+#endif
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+uint8_t DemoIndex = 0;
+__IO uint8_t NbLoop = 1;
+uint32_t ButtonState = 0;
+/*
+BSP_SD_CardInfo SD_CardInfo = {0};
+uint8_t SDcard_present = SD_NOT_PRESENT;
+
+uint8_t DataBloc[SD_BLOCK_LEN];
+uint8_t DataBloc4[4*SD_BLOCK_LEN];
+*/
+
+/* Private function prototypes -----------------------------------------------*/
+static void SystemClock_Config(void);
+static void Display_DemoDescription(void);
+static void Flush_scanf(void);
+/* Private functions ---------------------------------------------------------*/
+/**
+  * @brief  Main program
+  * @param  None
+  * @retval None
+  */
+int main(void)
+{
+#if defined(__GNUC__)
+  initialise_monitor_handles();
+#endif
+  HAL_Init();
+
+  /* Configure the system clock to 170 MHz */
+  SystemClock_Config();
+
+  BSP_LED_Init(LED_RED);
+  BSP_LED_Init(LED1);
+
+  /* Configure JOY Button */
+  if (BSP_JOY_Init(JOY1, JOY_MODE_EXTI, JOY_ALL) != BSP_ERROR_NONE)     BSP_LED_On(LED_RED);
+
+  /* LCD initialization */
+  if (BSP_LCD_Init(0, LCD_ORIENTATION_LANDSCAPE) == BSP_ERROR_NONE)
+  {
+    Display_DemoDescription();
+  }
+  else
+  {
+    BSP_LED_On(LED_RED);
+  }
+  /* Configure USER Button */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  /* Run Application */
+  while(1)
+  {
+    if(UserButtonPressed == 1)
+    {
+      UserButtonPressed = 0;
+      BSP_LED_On(LED1);
+      BSP_examples[DemoIndex++].DemoFunc();
+
+      if(DemoIndex >= COUNT_OF_EXAMPLE(BSP_examples))
+      {
+        NbLoop++;
+        DemoIndex = 0;
+      }
+      Display_DemoDescription();
+    }
+    HAL_Delay(400);
+  }
+}
+
+/**
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follow :
+  *            System Clock source            = PLL (HSE)
+  *            SYSCLK(Hz)                     = 170000000
+  *            HCLK(Hz)                       = 170000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 1
+  *            APB2 Prescaler                 = 1
+  *            HSI Frequency(Hz)              = 16000000
+  *            PLL_M                          = 4
+  *            PLL_N                          = 85
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 2
+  *            PLL_R                          = 2
+  *            Flash Latency(WS)              = 8
+  * @param  None
+  * @retval None
+  */
+static void SystemClock_Config(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+  /* Enable voltage range 1 boost mode for frequency above 150 Mhz */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+  __HAL_RCC_PWR_CLK_DISABLE();
+
+  /* Activate PLL with HSI as source */
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM            = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN            = 85;
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ            = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR            = RCC_PLLR_DIV2;
+  if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    /* Initialization Error */
+    while(1);
+  }
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+     clocks dividers */
+  RCC_ClkInitStruct.ClockType           = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \
+                                           RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource        = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider       = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider      = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider      = RCC_HCLK_DIV1;
+  if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK)
+  {
+    /* Initialization Error */
+    while(1);
+  }
+
+  /**Configure the main internal regulator output voltage
+    */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+    /**Configure the Systick
+    */
+  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+  /* SysTick_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+/**
+  * @brief  Display main demo messages
+  * @param  None
+  * @retval None
+  */
+static void Display_DemoDescription(void)
+{
+  char desc[58];
+  uint32_t x_size;
+  uint32_t y_size;
+
+  UTIL_LCD_SetFuncDriver(&LCD_Driver); /* SetFunc before setting device */
+  UTIL_LCD_SetDevice(0);            /* SetDevice after funcDriver is set */
+
+  BSP_LCD_Clear(0, LCD_COLOR_RGB565_CYAN);
+  BSP_LCD_DisplayOn(0);
+
+  UTIL_LCD_SetFont(&Font20);
+  /* Set the LCD Text Color */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_LIGHTBLUE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_DARKBLUE);
+
+  /* Display LCD messages */
+  UTIL_LCD_DisplayStringAt( 0, 10, (uint8_t *)"STM32G474E BSP", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt( 0, 35, (uint8_t *)"Drivers examples", CENTER_MODE);
+
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  /* Draw Bitmap */
+  BSP_LCD_DrawBitmap(0, (x_size - 80)/2, 65, (uint8_t *)stlogo);
+
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt( 0, y_size - 20, (uint8_t *)"Copyright (c) STMicroelectronics 2019", CENTER_MODE);
+
+  UTIL_LCD_SetFont(&Font16);
+  BSP_LCD_FillRect(0, 0, y_size/2 + 15, x_size, 60, LCD_COLOR_RGB565_BLUE);
+  UTIL_LCD_SetTextColor( UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor( UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DisplayStringAt( 0, y_size / 2 + 30, (uint8_t *)"Press User button to start :", CENTER_MODE);
+  sprintf(desc,"%s example", BSP_examples[DemoIndex].DemoName);
+  UTIL_LCD_DisplayStringAt( 0, y_size/2 + 45, (uint8_t *)desc, CENTER_MODE);
+}
+
+/**
+  * @brief  Check for user input
+  * @param  None
+* @retval Input state (1 : active / 0 : Inactive)
+  */
+uint8_t CheckForUserInput(void)
+{
+  if(BSP_PB_GetState(BUTTON_USER) == GPIO_PIN_RESET)
+  {
+    while (BSP_PB_GetState(BUTTON_USER) == GPIO_PIN_RESET);
+    return 1 ;
+  }
+  return 0;
+
+}
+
+/**
+  * @brief  Ask user for result.
+  * @param  None
+  * @retval None
+  */
+uint32_t CheckResult(void)
+{
+  uint32_t result = 0;
+  BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_RIGHT);
+  BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_LEFT);
+
+  printf("If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail) \n");
+
+   while ((BSP_JOY_GetState(JOY1) == JOY_RIGHT) || (BSP_JOY_GetState(JOY1) != JOY_RIGHT));
+  if (BSP_JOY_GetState(JOY1) == JOY_LEFT)
+  {
+    printf("Test is FAIL!!!\n");
+    HAL_Delay(1000);
+    result = 1;
+  }
+  else
+  {
+    printf("Test is PASS\n");
+    HAL_Delay(1000);
+    result = 0;
+  }
+  BSP_JOY_DeInit(JOY1, JOY_RIGHT);
+  BSP_JOY_DeInit(JOY1, JOY_LEFT);
+  return result;
+
+}
+
+/**
+  * @brief  Ask user to start the test.
+  * @param  None
+  * @retval None
+  */
+void StartTest(void)
+{
+  uint8_t tmp = 0;
+  do {
+    printf("Press s to start the test\n");
+    scanf("%c", &tmp);
+    Flush_scanf();
+  } while (tmp != 's');
+}
+
+/**
+  * @brief  Flush scanf buffer until "\n".
+  * @param  None
+  * @retval None
+  */
+static void Flush_scanf(void)
+{
+  while ( getchar() != '\n' );
+}
+
+/**
+  * @brief  Button Callback
+  * @param  Button Specifies the pin connected EXTI line
+  * @retval None
+  */
+void BSP_PB_Callback(Button_TypeDef Button)
+{
+  if(Button == BUTTON_USER)
+  {
+    //if(check_switches(0))
+    {
+      UserButtonPressed = 1;
+    }
+  }
+}
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+    BSP_PB_Callback(BUTTON_USER);
+}
+
+void ButtonPendingCallback(void)
+{
+  BSP_PB_Callback(BUTTON_USER);
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @param  file: The file name as string.
+  * @param  line: The line in file as a number.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+     /* Toggle LED4 with a period of one second */
+    BSP_LED_Toggle(LED4);
+    HAL_Delay(1000);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+}
+#endif /* USE_FULL_ASSERT */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/potentiometer.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/potentiometer.c
new file mode 100644
index 000000000..326a6cf77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/potentiometer.c
@@ -0,0 +1,94 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/potentiometer.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the potentiometer feature in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Potentiometer demo
+  * @param  None
+  * @retval 0 if ok, else value < 0.
+  */
+int32_t Pot_demo(void)
+{
+  int32_t  result = 0;
+  int32_t  PotValue;
+  uint32_t i;
+
+  printf("TEST OF POTENTIOMETER\n");
+
+  printf("Please put JP5 in position 1-2 (POT))\n");
+
+  StartTest();
+
+  /* Initialize potentiometer */
+  if (BSP_POT_Init(POT1) != BSP_ERROR_NONE) result--;
+
+  printf("Please turn potentiometer button (10 measures will be performed)\n");
+
+  for (i = 0; i < 10; i++)
+  {
+    /* Get potentiometer value */
+    PotValue = BSP_POT_GetLevel(POT1);
+
+    /* Display value or error */
+    if (PotValue < 0)
+    {
+      printf("Error returned by BSP_POT_GetLevel\n");
+      result--;
+    }
+    else
+    {
+      printf("Potentiometer value is %ld percent\n", PotValue);
+    }
+
+    /* Wait 1 second for next measure */
+    HAL_Delay(1000);
+  }
+
+  /* De-initialize potentiometer */
+  if (BSP_POT_DeInit(POT1) != BSP_ERROR_NONE) result--;
+
+  return result;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/qspi.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/qspi.c
new file mode 100644
index 000000000..ade8651dc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/qspi.c
@@ -0,0 +1,590 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/qspi.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the QSPI in the 
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include <string.h>
+
+/** @addtogroup STM32G4xx_HAL_Examples
+* @{
+*/
+
+/** @addtogroup BSP
+* @{
+*/
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define BUFFER_SIZE       256U // = MT25QL512ABB_PAGE_SIZE
+#define BLOCK_SIZE        MT25QL512ABB_SECTOR_64K
+#define NB_BLOCK          1U
+
+#define QPI_MMP_ADDRESS   ((uint32_t *) 0x90000000)
+#define TEST_VALUE_START  0x43 // Test pattern start value. Following data ++...
+
+#define INTERFACE_MODE_NUMBER  7
+#define TRANSFER_RATE_NUMBER   2
+#define DUALFLASH_MODE_NUMBER  2
+#define FLASH_ID_NUMBER        2
+
+/* Private macro -------------------------------------------------------------*/
+#define Xpos_START 20
+#define Ypos_START 80
+#define FONT       Font12
+#define CHAR_LINE  Font12.Height
+#define CHAR_WIDE  Font12.Width
+#define NEXT_LINE  {Xpos = Xpos_START; Ypos += CHAR_LINE;}
+
+/* Private variables ---------------------------------------------------------*/
+uint8_t qspi_aTxBuffer[BUFFER_SIZE];
+uint8_t qspi_aRxBuffer[BUFFER_SIZE];
+uint8_t qspi_aErasedBuffer[BUFFER_SIZE];
+uint32_t qspi_MMPBuffer[BUFFER_SIZE];
+
+static BSP_QSPI_Info_t pQSPI_Info;       // Flash information
+
+static uint16_t Xpos = Xpos_START, Ypos = Ypos_START;
+
+BSP_QSPI_Init_t Flash;
+
+BSP_QSPI_Interface_t InterfaceMode[INTERFACE_MODE_NUMBER] = {
+  BSP_QSPI_SPI_MODE,
+  BSP_QSPI_SPI_1I2O_MODE,
+  BSP_QSPI_SPI_2IO_MODE,
+  BSP_QSPI_SPI_1I4O_MODE,
+  BSP_QSPI_SPI_4IO_MODE,
+  BSP_QSPI_DPI_MODE,
+  BSP_QSPI_QPI_MODE
+};
+
+char* InterfaceModeText[INTERFACE_MODE_NUMBER] =
+{
+  "SPI_MODE",
+  "SPI_1I2O_MODE",
+  "SPI_2IO_MODE",
+  "SPI_1I4O_MODE",
+  "SPI_4IO_MODE",
+  "DPI_MODE",
+  "QPI_MODE"
+};
+
+BSP_QSPI_Transfer_t TransferRate[TRANSFER_RATE_NUMBER] = {
+  BSP_QSPI_STR_TRANSFER,
+  BSP_QSPI_DTR_TRANSFER
+};
+
+char* TransferRateText[TRANSFER_RATE_NUMBER] =
+{
+  "STR",
+  "DTR"
+};
+
+BSP_QSPI_DualFlash_t DualFlashMode[DUALFLASH_MODE_NUMBER] = {
+  BSP_QSPI_DUALFLASH_DISABLE,
+  BSP_QSPI_DUALFLASH_ENABLE
+};
+
+char* DualFlashModeText[DUALFLASH_MODE_NUMBER] =
+{
+  "SingleFlash",
+  "DualFlash"
+};
+
+uint32_t FlashId[FLASH_ID_NUMBER] = {
+  BSP_QSPI_FLASH_ID_1,
+  BSP_QSPI_FLASH_ID_2
+};
+
+/* Private function prototypes -----------------------------------------------*/
+static void QSPI_SetHint(void);
+static void QSPI_Indirect_Mode(void);
+static void QSPI_MemoryMapped_Mode(void);
+static void QSPI_FlashId(void);
+static void Fill_Buffer(uint8_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset);
+static uint8_t RMABuffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint32_t BufferLength, uint32_t *ErrorAd);
+
+
+/* Private functions ---------------------------------------------------------*/
+/**
+* @brief  QSPI tests
+* @param  None
+* @retval None
+*/
+int32_t QSPI_demo(void)
+{
+  QSPI_SetHint();
+  UTIL_LCD_SetFont(&FONT);
+  Xpos = Xpos_START;
+  Ypos = Ypos_START;
+
+  /* Read & check the QSPI info */
+  /* Initialize the structure */
+  pQSPI_Info.FlashSize          = (uint32_t)0x00;
+  pQSPI_Info.EraseSectorSize    = (uint32_t)0x00;
+  pQSPI_Info.EraseSectorsNumber = (uint32_t)0x00;
+  pQSPI_Info.ProgPageSize       = (uint32_t)0x00;
+  pQSPI_Info.ProgPagesNumber    = (uint32_t)0x00;
+  BSP_QSPI_GetInfo(0, &pQSPI_Info);
+
+  QSPI_Indirect_Mode();
+  QSPI_MemoryMapped_Mode();
+  QSPI_FlashId();
+
+  while(1)
+  {
+    if(CheckForUserInput() > 0)
+    {
+      ButtonState = 0;
+      return 0;
+    }
+  }
+}
+
+static void QSPI_Indirect_Mode(void)
+{
+  uint32_t Offset;
+  uint32_t i, j, k, l;
+  uint8_t flash_id[6];
+  uint32_t error_code = 0;
+
+  /* Fill the buffer for write operation **************************************/
+  Fill_Buffer(qspi_aTxBuffer, BUFFER_SIZE, TEST_VALUE_START);
+  memset(qspi_aRxBuffer, 0, BUFFER_SIZE);
+
+  /* Loop over dualflash modes ************************************************/
+  for(l = 0; l < DUALFLASH_MODE_NUMBER; l++)
+  {
+    /* Loop over transfer rates ***********************************************/
+    for(k = 0; k < TRANSFER_RATE_NUMBER; k++)
+    {
+      /* Loop over interface modes ********************************************/
+      for(j = 0; j < INTERFACE_MODE_NUMBER; j++)
+      {
+        /* QSPI device configuration */
+        Flash.InterfaceMode = InterfaceMode[j];
+        Flash.TransferRate  = TransferRate[k];
+        Flash.DualFlashMode = DualFlashMode[l];
+
+        BSP_QSPI_DeInit(0);
+
+        if(BSP_QSPI_Init(0, &Flash) != BSP_ERROR_NONE)
+        {
+          UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Init: FAILED.", LEFT_MODE);
+        }
+        else if(BSP_QSPI_GetStatus(0) != BSP_ERROR_NONE)
+        {
+          UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Get Status: FAILED.", LEFT_MODE);
+        }
+        else if(BSP_QSPI_ReadID(0, flash_id) != BSP_ERROR_NONE)
+        {
+          UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read ID: FAILED.", LEFT_MODE);
+        }
+        else
+        {
+          if(Flash.DualFlashMode == MT25QL512ABB_DUALFLASH_DISABLE)
+          {
+            if((flash_id[0] != 0x20) || (flash_id[1] != 0xBA) || (flash_id[2] != 0x20))
+            {
+              UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read ID: FAILED.", LEFT_MODE);
+            }
+          }
+          else
+          {
+            if((flash_id[0] != 0x20) || (flash_id[1] != 0x20) || (flash_id[2] != 0xBA) ||
+               (flash_id[3] != 0xBA) || (flash_id[4] != 0x20) || (flash_id[5] != 0x20))
+            {
+              UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read ID: FAILED.", LEFT_MODE);
+            }
+          }
+        }
+
+        for(i = 0; i < NB_BLOCK; i++)
+        {
+          if(BSP_QSPI_EraseBlock(0, i*BLOCK_SIZE, MT25QL512ABB_ERASE_64K) != BSP_ERROR_NONE)
+          {
+            UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Erase: FAILED.", LEFT_MODE);
+          }
+          while(BSP_QSPI_GetStatus(0) == BSP_ERROR_BUSY);
+        }
+
+        if(BSP_QSPI_ConfigFlash(0, InterfaceMode[(j+1)%INTERFACE_MODE_NUMBER], TransferRate[(k+1)%TRANSFER_RATE_NUMBER]) != BSP_ERROR_NONE) Error_Handler();
+
+        for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+        {
+          if(BSP_QSPI_Write(0, qspi_aTxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+          {
+            UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Write: FAILED.", LEFT_MODE);
+          }
+
+          if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+          {
+            UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+          }
+
+          if(RMABuffercmp(qspi_aRxBuffer, qspi_aTxBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+          {
+            error_code++;
+          }
+        }
+      }
+
+      UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+      UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Indirect", LEFT_MODE);
+      UTIL_LCD_DisplayStringAt(Xpos+(10*CHAR_WIDE), Ypos, (uint8_t*)TransferRateText[k], LEFT_MODE);
+      UTIL_LCD_DisplayStringAt(Xpos+(14*CHAR_WIDE), Ypos, (uint8_t*)DualFlashModeText[l], LEFT_MODE);
+      UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+      if(error_code == 0)
+      {
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+        UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+      }
+      else
+      {
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+        UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+        error_code = 0;
+      }
+      NEXT_LINE
+    }
+  }
+
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+}
+
+static void QSPI_MemoryMapped_Mode(void)
+{
+  uint32_t Offset;
+  uint32_t i, j, k, l;
+  uint32_t *QSPI_MMP_pointer;
+  uint32_t error_code = 0;
+
+   /* Fill the buffer for write operation *************************************/
+  Fill_Buffer(qspi_aTxBuffer, BUFFER_SIZE, TEST_VALUE_START);
+  memset(qspi_aRxBuffer, 0, BUFFER_SIZE);
+
+  /* Loop over dualflash modes ************************************************/
+  for(l = 0; l < DUALFLASH_MODE_NUMBER; l++)
+  {
+    /* Loop over transfer rates ***********************************************/
+    for(k = 0; k < TRANSFER_RATE_NUMBER; k++)
+    {
+      /* Loop over interface modes ********************************************/
+      for(j = 0; j < INTERFACE_MODE_NUMBER; j++)
+      {
+        /* QSPI device configuration */
+        Flash.InterfaceMode = InterfaceMode[j];
+        Flash.TransferRate  = TransferRate[k];
+        Flash.DualFlashMode = DualFlashMode[l];
+
+        BSP_QSPI_DeInit(0);
+
+        if(BSP_QSPI_Init(0, &Flash) != BSP_ERROR_NONE)
+        {
+          UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Init: FAILED.", LEFT_MODE);
+        }
+        else if(BSP_QSPI_GetStatus(0) != BSP_ERROR_NONE)
+        {
+          UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Get Status: FAILED.", LEFT_MODE);
+        }
+
+        for(i = 0; i < NB_BLOCK; i++)
+        {
+          if(BSP_QSPI_EraseBlock(0, i*BLOCK_SIZE, MT25QL512ABB_ERASE_64K) != BSP_ERROR_NONE)
+          {
+            UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Erase:  FAILED.", LEFT_MODE);
+          }
+          while(BSP_QSPI_GetStatus(0) == BSP_ERROR_BUSY);
+        }
+
+        for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+        {
+          if(BSP_QSPI_Write(0, qspi_aTxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+          {
+            UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Write: FAILED.", LEFT_MODE);
+          }
+        }
+
+        if(BSP_QSPI_EnableMemoryMappedMode(0) != BSP_ERROR_NONE)
+        {
+          UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"MemoryMap enable: FAILED.", LEFT_MODE);
+        }
+
+        QSPI_MMP_pointer = (uint32_t*)(QPI_MMP_ADDRESS);
+        for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+        {
+          for(int k = 0; k < BUFFER_SIZE/4; k++)
+          {
+            qspi_MMPBuffer[k] = *(QSPI_MMP_pointer++);
+            qspi_aRxBuffer[4*k] = qspi_MMPBuffer[k] & 0xFF;
+            qspi_aRxBuffer[4*k + 1] = (qspi_MMPBuffer[k] >> 8) & 0xFF;
+            qspi_aRxBuffer[4*k + 2] = (qspi_MMPBuffer[k] >>16) & 0xFF;
+            qspi_aRxBuffer[4*k + 3] = (qspi_MMPBuffer[k] >>24) & 0xFF;
+          }
+
+          if(RMABuffercmp(qspi_aRxBuffer, qspi_aTxBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+          {
+            error_code++;
+          }
+        }
+        if(BSP_QSPI_DisableMemoryMappedMode(0) != BSP_ERROR_NONE)
+        {
+          UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"MemoryMap disable: FAILED.", LEFT_MODE);
+        }
+      }
+
+      UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+      UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"MemoryMap", LEFT_MODE);
+      UTIL_LCD_DisplayStringAt(Xpos+(10*CHAR_WIDE), Ypos, (uint8_t*)TransferRateText[k], LEFT_MODE);
+      UTIL_LCD_DisplayStringAt(Xpos+(14*CHAR_WIDE), Ypos, (uint8_t*)DualFlashModeText[l], LEFT_MODE);
+      UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+      if(error_code == 0)
+      {
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+        UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+      }
+      else
+      {
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+        UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+        error_code = 0;
+      }
+      NEXT_LINE
+    }
+  }
+
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+}
+
+static void QSPI_FlashId(void)
+{
+  uint32_t Offset;
+  uint32_t i, j;
+  uint32_t error_code = 0;
+
+  /* Fill the buffer for write operation **************************************/
+  Fill_Buffer(qspi_aTxBuffer, BUFFER_SIZE, TEST_VALUE_START);
+  memset(qspi_aErasedBuffer, 0xFF, BUFFER_SIZE);
+
+  /* QSPI device configuration */
+  Flash.InterfaceMode = BSP_QSPI_SPI_MODE;
+  Flash.TransferRate  = BSP_QSPI_STR_TRANSFER;
+  Flash.DualFlashMode = BSP_QSPI_DUALFLASH_DISABLE;
+
+  BSP_QSPI_DeInit(0);
+
+  /* By default FLASH_ID_1 is selected */
+  if(BSP_QSPI_Init(0, &Flash) != BSP_ERROR_NONE)
+  {
+    UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Init: FAILED.", LEFT_MODE);
+  }
+
+  /* Loop over Flash Id *******************************************************/
+  for(j = 0; j < FLASH_ID_NUMBER; j++)
+  {
+    if(BSP_QSPI_SelectFlashID(0, FlashId[j]) != BSP_ERROR_NONE)
+    {
+      UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"SelectFlashID: FAILED.", LEFT_MODE);
+    }
+    else if(BSP_QSPI_GetStatus(0) != BSP_ERROR_NONE)
+    {
+      UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Get Status: FAILED.", LEFT_MODE);
+    }
+
+    for(i = 0; i < NB_BLOCK; i++)
+    {
+      /* Erase blocks *********************************************************/
+      if(BSP_QSPI_EraseBlock(0, i*BLOCK_SIZE, MT25QL512ABB_ERASE_64K) != BSP_ERROR_NONE)
+      {
+        UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Erase: FAILED.", LEFT_MODE);
+      }
+      while(BSP_QSPI_GetStatus(0) == BSP_ERROR_BUSY);
+    }
+
+    for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+    {
+      /* Read blocks **********************************************************/
+      if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+      {
+        UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+      }
+
+      /* Check blocks empty ***************************************************/
+      if(RMABuffercmp(qspi_aRxBuffer, qspi_aErasedBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+      {
+        error_code++;
+      }
+    }
+  }
+
+  /* Select Flash Id 1 ********************************************************/
+  if(BSP_QSPI_SelectFlashID(0, BSP_QSPI_FLASH_ID_1) != BSP_ERROR_NONE) Error_Handler();
+
+  for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+  {
+    /* Write blocks ***********************************************************/
+    if(BSP_QSPI_Write(0, qspi_aTxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+    {
+      UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Write: FAILED.", LEFT_MODE);
+    }
+
+    /* Read blocks ************************************************************/
+    if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+    {
+      UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+    }
+
+    /* Check blocks written ***************************************************/
+    if(RMABuffercmp(qspi_aRxBuffer, qspi_aTxBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+    {
+      error_code++;
+    }
+  }
+
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+  UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Flash ID 1", LEFT_MODE);
+  UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+  if(error_code == 0)
+  {
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+    UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+    error_code = 0;
+  }
+  NEXT_LINE
+
+  /* Select Flash Id 2 ********************************************************/
+  if(BSP_QSPI_SelectFlashID(0, BSP_QSPI_FLASH_ID_2) != BSP_ERROR_NONE) Error_Handler();
+
+  for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+  {
+    /* Read blocks ************************************************************/
+    if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+    {
+      UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+    }
+
+    /* Check blocks empty *****************************************************/
+    if(RMABuffercmp(qspi_aRxBuffer, qspi_aErasedBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+    {
+      error_code++;
+    }
+  }
+
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+  UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Flash ID 2", LEFT_MODE);
+  UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+  if(error_code == 0)
+  {
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+    UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+    error_code = 0;
+  }
+  NEXT_LINE
+}
+
+/**
+* @brief  Display QSPI Demo Hint
+* @param  None
+* @retval None
+*/
+static void QSPI_SetHint(void)
+{
+  uint32_t x_size, y_size;
+
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  /* Clear the LCD */
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+  /* Set LCD Demo description */
+  UTIL_LCD_FillRect(0, 0, x_size, 60, UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t*)"QSPI", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t*)"This example tests the modes", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 45, (uint8_t*)"of read/write access on QSPI memory", CENTER_MODE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+}
+
+/**
+* @brief  Fills buffer with user predefined data.
+* @param  pBuffer: pointer on the buffer to fill
+* @param  uwBufferLenght: size of the buffer to fill
+* @param  uwOffset: first value to fill on the buffer
+* @retval None
+*/
+static void Fill_Buffer(uint8_t *pBuffer, uint32_t uwBufferLenght, uint32_t uwOffset)
+{
+  uint32_t tmpIndex = 0;
+
+  /* Put in global buffer different values */
+  for (tmpIndex = 0; tmpIndex < uwBufferLenght; tmpIndex++ )
+  {
+    pBuffer[tmpIndex] = tmpIndex + uwOffset;
+  }
+}
+
+/**
+* @brief  Compares two buffers.
+* @param  pBuffer1, pBuffer2: buffers to be compared.
+* @param  BufferLength: buffer's length
+*         ErrorAd: Difference address
+* @retval 0: pBuffer identical to pBuffer1
+*         1: pBuffer differs from pBuffer1
+*/
+static uint8_t RMABuffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint32_t BufferLength, uint32_t *ErrorAd)
+{
+  (*ErrorAd) = 0;
+
+  while (BufferLength--)
+  {
+    if (*pBuffer1 != *pBuffer2)
+    {
+      return 1;
+    }
+
+    (*ErrorAd)++;
+    pBuffer1++;
+    pBuffer2++;
+  }
+
+  return 0;
+}
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sd.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sd.c
new file mode 100644
index 000000000..ec1a061ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sd.c
@@ -0,0 +1,334 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/sd.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the SD Driver in the
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define SD_CARD_PRESENCE_POLLING_MODE        0
+#define SD_CARD_PRESENCE_INTERRUPT_MODE      1
+
+#define SD_CARD_PRESENCE_VALIDATION_MODE      SD_CARD_PRESENCE_INTERRUPT_MODE
+
+#define BLOCK_START_ADDR         0     /* Block start address      */
+#define NUM_OF_BLOCKS            5    /* Total number of blocks   */
+#define BLOCKSIZE                SD_BLOCKSIZE
+#define BUFFER_WORDS_SIZE        ((BLOCKSIZE * NUM_OF_BLOCKS) >> 2) /* Total data size in bytes */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+uint32_t aTxBuffer[BUFFER_WORDS_SIZE];
+uint32_t aRxBuffer[BUFFER_WORDS_SIZE];
+__IO uint32_t SDWriteStatus = 0, SDReadStatus = 0, SDDetectStatus = 0, SDDetectIT = 0;
+
+extern __IO uint32_t UserButtonPressed;
+
+/* Private function prototypes -----------------------------------------------*/
+static void SD_SetHint(void);
+static void Fill_Buffer(uint32_t *pBuffer, uint32_t uwBufferLenght, uint32_t uwOffset);
+static uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint16_t BufferLength);
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  SD Demo
+  * @param  None
+  * @retval None
+  */
+int32_t SD_demo (void)
+{
+  int32_t result = 0;
+  int32_t SD_state = BSP_ERROR_NONE;
+  static uint8_t prev_status = 2;  /* Undefined state */
+
+  SD_SetHint();
+
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  SD_state = BSP_SD_Init(0);
+
+#if (SD_CARD_PRESENCE_VALIDATION_MODE == SD_CARD_PRESENCE_INTERRUPT_MODE)
+  BSP_SD_DetectITConfig(0);
+#endif
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_LIGHTBLUE);
+
+  if (SD_state != BSP_ERROR_NONE)
+  {
+    SD_state = BSP_SD_IsDetected(0);
+    if(SD_state == SD_NOT_PRESENT)
+    {
+      printf ("\r\nSD shall be inserted before running test");
+      UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+      UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"Insert SD card", LEFT_MODE);
+    }
+    else
+    {
+      printf ("\r\nSD Initialization : FAIL.");
+      UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+      UTIL_LCD_DisplayStringAt(20, 120, (uint8_t *)"SD card init failed", LEFT_MODE);
+    }
+    printf ("\r\nSD Test Aborted.");
+    result --;
+  }
+  else
+  {
+    printf ("\r\nSD Initialization : OK.");
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+    UTIL_LCD_DisplayStringAt(20, 120, (uint8_t *)"SD card init OK    ", LEFT_MODE);
+    prev_status = SD_PRESENT;
+
+      /* Fill the buffer to write */
+      Fill_Buffer(aTxBuffer, BUFFER_WORDS_SIZE, 0x22FF);
+      SD_state = BSP_SD_WriteBlocks(0, aTxBuffer, BLOCK_START_ADDR, NUM_OF_BLOCKS);
+      HAL_Delay(500);
+
+      /* Wait until SD cards are ready to use for new operation */
+      while((BSP_SD_GetCardState(0) != SD_TRANSFER_OK))
+      {
+      }
+
+      if (SD_state != BSP_ERROR_NONE)
+      {
+        printf ("\r\nSD WRITE : FAILED.");
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+        UTIL_LCD_DisplayStringAt(20, 140, (uint8_t *)"SD card write failed", LEFT_MODE);
+        result --;
+      }
+      else
+      {
+        printf ("\r\nSD WRITE : OK.");
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+        UTIL_LCD_DisplayStringAt(20, 140, (uint8_t *)"SD card write OK    ", LEFT_MODE);
+
+        SD_state = BSP_SD_ReadBlocks(0, aRxBuffer, BLOCK_START_ADDR, NUM_OF_BLOCKS);
+        HAL_Delay(500);
+
+        /* Wait until SD card is ready to use for new operation */
+        while(BSP_SD_GetCardState(0) != SD_TRANSFER_OK)
+        {
+        }
+
+        if (SD_state != BSP_ERROR_NONE)
+        {
+          printf ("\r\nSD READ : FAILED.");
+          UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+          UTIL_LCD_DisplayStringAt(20, 160, (uint8_t *)"SD card read failed", LEFT_MODE);
+          result --;
+        }
+        else
+        {
+          printf ("\r\nSD READ : OK.");
+          UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+          UTIL_LCD_DisplayStringAt(20, 160, (uint8_t *)"SD card read OK     ", LEFT_MODE);
+          if (Buffercmp(aTxBuffer, aRxBuffer, BUFFER_WORDS_SIZE) > 0)
+          {
+            printf ("\r\nSD COMPARE : FAILED.");
+            result --;
+          }
+          else
+          {
+            printf ("\r\nSD COMPARE : OK.");
+          }
+          SD_state = BSP_SD_Erase(0, BLOCK_START_ADDR, (BLOCK_START_ADDR + (BLOCKSIZE * NUM_OF_BLOCKS)));
+          HAL_Delay(500);
+
+          if (SD_state != BSP_ERROR_NONE)
+          {
+            printf ("\r\nSD ERASE : FAILED.");
+            UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+            UTIL_LCD_DisplayStringAt(20, 180, (uint8_t *)"SD card erase failed", LEFT_MODE);
+            result --;
+          }
+          else
+          {
+            printf ("\r\nSD ERASE : OK.");
+            UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+            UTIL_LCD_DisplayStringAt(20, 180, (uint8_t *)"SD card erase OK    ", LEFT_MODE);
+          }
+        }
+      }
+  }
+
+  printf ("\r\nSD Test done.");
+  printf ("\r\nSD can be removed.\n");
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+  UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"SD card test Done     ", LEFT_MODE);
+
+  while (1)
+  {
+#if (SD_CARD_PRESENCE_VALIDATION_MODE == SD_CARD_PRESENCE_INTERRUPT_MODE)
+    if(SDDetectIT != 0)
+    {
+#endif
+      /* Check if the SD card is plugged in the slot */
+      if (SDDetectStatus != SD_PRESENT)
+      {
+        if(prev_status != SD_NOT_PRESENT)
+        {
+          BSP_SD_Init(0);
+          printf ("\r\nSD Not Connected");
+          UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+          UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"SD card not connected", LEFT_MODE);
+          prev_status = SD_NOT_PRESENT;
+        }
+      }
+      else if (prev_status != SD_PRESENT)
+      {
+        printf ("\r\nSD Connected");
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+        UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"SD card connected   ", LEFT_MODE);
+        prev_status = SD_PRESENT;
+      }
+#if (SD_CARD_PRESENCE_VALIDATION_MODE == SD_CARD_PRESENCE_INTERRUPT_MODE)
+      SDDetectIT = 0;
+    }
+#endif
+
+  if (UserButtonPressed != 0)
+  {
+    /* Add delay to avoid rebound and reset it status */
+    HAL_Delay(500);
+    UserButtonPressed = 0;
+
+    return result;
+  }
+ }
+}
+
+/**
+  * @brief  Display SD Demo Hint
+  * @param  None
+  * @retval None
+  */
+static void SD_SetHint(void)
+{
+  uint32_t x_size, y_size;
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  printf("TEST OF SD card\n");
+
+  /* Clear the LCD */
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+  /* Set LCD Demo description */
+  BSP_LCD_FillRect(0, 0, 0, x_size, 80, UTIL_LCD_COLOR_BLUE );
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SD", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"This example shows how to write", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"and read data on the microSD and also", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"how to detect the presence of the card", CENTER_MODE);
+
+   /* Set the LCD Text Color */
+  UTIL_LCD_DrawRect(10, 90, x_size - 20, y_size- 100, UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DrawRect(11, 91, x_size - 22, y_size- 102, UTIL_LCD_COLOR_BLUE);
+}
+
+/**
+  * @brief  Fills buffer with user predefined data.
+  * @param  pBuffer: pointer on the buffer to fill
+  * @param  uwBufferLenght: size of the buffer to fill
+  * @param  uwOffset: first value to fill on the buffer
+  * @retval None
+  */
+static void Fill_Buffer(uint32_t *pBuffer, uint32_t uwBufferLenght, uint32_t uwOffset)
+{
+  uint32_t tmpIndex = 0;
+
+  /* Put in global buffer different values */
+  for (tmpIndex = 0; tmpIndex < uwBufferLenght; tmpIndex++ )
+  {
+    pBuffer[tmpIndex] = tmpIndex + uwOffset;
+  }
+}
+
+/**
+  * @brief  Compares two buffers.
+  * @param  pBuffer1, pBuffer2: buffers to be compared.
+  * @param  BufferLength: buffer's length
+  * @retval 1: pBuffer identical to pBuffer1
+  *         0: pBuffer differs from pBuffer1
+  */
+static uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint16_t BufferLength)
+{
+  while (BufferLength--)
+  {
+    if (*pBuffer1 != *pBuffer2)
+    {
+      return 1;
+    }
+
+    pBuffer1++;
+    pBuffer2++;
+  }
+
+  return 0;
+}
+
+/**
+  * @brief Tx Transfer completed callback
+  * @param  Instance     SD Instance
+  * @retval None
+  */
+void BSP_SD_WriteCpltCallback(uint32_t Instance)
+{
+  SDWriteStatus = 1;
+}
+
+/**
+  * @brief Rx Transfer completed callback
+  * @param  Instance     SD Instance
+  * @retval None
+  */
+void BSP_SD_ReadCpltCallback(uint32_t Instance)
+{
+  SDReadStatus = 1;
+}
+
+/**
+  * @brief  BSP SD Callback.
+  * @param  Instance SD Instance
+  * @param  Status   Pin status
+  * @retval None.
+  */
+void BSP_SD_DetectCallback(uint32_t Instance, uint32_t Status)
+{
+  SDDetectIT = 1;
+  SDDetectStatus = Status;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sram.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sram.c
new file mode 100644
index 000000000..1b2356130
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sram.c
@@ -0,0 +1,305 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/sram.c
+  * @author  MCD Application Team
+  * @brief   This example code shows how to use the SRAM Driver in the 
+  *          STM32G474E EVAL1 driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define BUFFER_SIZE         ((uint32_t)0x1000)
+#define WRITE_READ_ADDR     ((uint32_t)0x0800)
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+uint16_t sram_aTxBuffer[BUFFER_SIZE];
+uint16_t sram_aRxBuffer[BUFFER_SIZE];
+uint8_t ubSramWrite = 0, ubSramRead = 0, ubSramInit = 0;
+
+/* Private function prototypes -----------------------------------------------*/
+static void SRAM_SetHint(void);
+static void SRAM_polling(void);
+static void SRAM_DMA(void);
+static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset);
+static uint8_t Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength);
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+* @brief  SRAM tests
+* @param  None
+* @retval None
+*/
+int32_t SRAM_demo(void)
+{
+  SRAM_polling();
+  SRAM_DMA();
+  return 0;
+}
+
+/**
+  * @brief  SRAM polling access
+  * @param  None
+  * @retval None
+  */
+void SRAM_polling(void)
+{
+  SRAM_SetHint();
+
+  /*##-1- Configure the SRAM device ##########################################*/
+  /* SRAM device configuration */
+  if(BSP_SRAM_Init(0) != BSP_ERROR_NONE)
+  {
+    ubSramInit++;
+  }
+
+  /*##-2- SRAM memory read/write access ######################################*/
+  /* Fill the buffer to write */
+  Fill_Buffer(sram_aTxBuffer, BUFFER_SIZE, 0xC20F);
+
+  /* Write data to the SRAM memory */
+  if(HAL_SRAM_Write_16b(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), sram_aTxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+  {
+    ubSramWrite++;
+  }
+
+  /* Read back data from the SRAM memory */
+  if(HAL_SRAM_Read_16b(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), sram_aRxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+  {
+    ubSramRead++;
+  }
+
+  BSP_SRAM_DeInit(0);
+
+  /*##-3- Checking data integrity ############################################*/
+  if(ubSramInit != 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization : FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization : OK.", LEFT_MODE);
+  }
+  if(ubSramWrite != 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE : FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE : OK.", LEFT_MODE);
+  }
+  if(ubSramRead != 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ : FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ : OK.", LEFT_MODE);
+  }
+
+  if(Buffercmp(sram_aRxBuffer, sram_aTxBuffer, BUFFER_SIZE) > 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM COMPARE : FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM Test : OK.", LEFT_MODE);
+  }
+
+  while (1)
+  {
+    if(CheckForUserInput() > 0)
+    {
+      ButtonState = 0;
+      return;
+    }
+  }
+}
+
+/**
+  * @brief  SRAM DMA
+  * @param  None
+  * @retval None
+  */
+void SRAM_DMA(void)
+{
+  SRAM_SetHint();
+
+  /*##-1- Configure the SRAM device ##########################################*/
+  /* SRAM device configuration */
+  if(BSP_SRAM_Init(0) != BSP_ERROR_NONE)
+  {
+    ubSramInit++;
+  }
+
+  /*##-2- SRAM memory read/write access ######################################*/
+  /* Fill the buffer to write */
+  Fill_Buffer(sram_aTxBuffer, BUFFER_SIZE, 0xC20F);
+
+  /* Write data to the SRAM memory */
+  if(HAL_SRAM_Write_DMA(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), (uint32_t *)sram_aTxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+  {
+    ubSramWrite++;
+  }
+
+  /* Wait SRAM controller is READY */
+  while (HAL_SRAM_GetState(&hsram) != HAL_SRAM_STATE_READY) {}
+
+  /* Read back data from the SRAM memory */
+  if(HAL_SRAM_Read_DMA(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), (uint32_t *)sram_aRxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+  {
+    ubSramRead++;
+  }
+
+  BSP_SRAM_DeInit(0);
+
+  /*##-3- Checking data integrity ############################################*/
+  if(ubSramInit != 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization (DMA): FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization (DMA): OK.", LEFT_MODE);
+  }
+  if(ubSramWrite != 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE (DMA): FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE (DMA): OK.", LEFT_MODE);
+  }
+  if(ubSramRead != 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ (DMA): FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ (DMA): OK.", LEFT_MODE);
+  }
+
+  if(Buffercmp(sram_aRxBuffer, sram_aTxBuffer, BUFFER_SIZE) > 0)
+  {
+    UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM COMPARE (DMA): FAILED.", LEFT_MODE);
+  }
+  else
+  {
+    UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM Test (DMA): OK.", LEFT_MODE);
+  }
+
+  while (1)
+  {
+    if(CheckForUserInput() > 0)
+    {
+      ButtonState = 0;
+      return;
+    }
+  }
+}
+
+/**
+  * @brief  Display SRAM Demo Hint
+  * @param  None
+  * @retval None
+  */
+static void SRAM_SetHint(void)
+{
+  uint32_t x_size, y_size;
+
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+
+  /* Clear the LCD */
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+  /* Set LCD Demo description */
+  UTIL_LCD_FillRect(0, 0, x_size, 80, UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SRAM", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"This example tests", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"read/write access on SRAM", CENTER_MODE);
+
+   /* Set the LCD Text Color */
+  UTIL_LCD_DrawRect(10, 90, x_size - 20, y_size- 100, UTIL_LCD_COLOR_BLUE);
+  UTIL_LCD_DrawRect(11, 91, x_size - 22, y_size- 102, UTIL_LCD_COLOR_BLUE);
+
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+}
+
+/**
+  * @brief  Fills buffer with user predefined data.
+  * @param  pBuffer: pointer on the buffer to fill
+  * @param  uwBufferLength: size of the buffer to fill
+  * @param  uwOffset: first value to fill on the buffer
+  * @retval None
+  */
+static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset)
+{
+  uint32_t tmpindex = 0;
+
+  /* Put in global buffer different values */
+  for (tmpindex = 0; tmpindex < uwBufferLength; tmpindex++ )
+  {
+    pBuffer[tmpindex] = tmpindex + uwOffset;
+  }
+}
+
+/**
+  * @brief  Compares two buffers.
+  * @param  pBuffer1, pBuffer2: buffers to be compared.
+  * @param  BufferLength: buffer's length
+  * @retval 1: pBuffer identical to pBuffer1
+  *         0: pBuffer differs from pBuffer1
+  */
+static uint8_t Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength)
+{
+  while (BufferLength--)
+  {
+    if (*pBuffer1 != *pBuffer2)
+    {
+      return 1;
+    }
+
+    pBuffer1++;
+    pBuffer2++;
+  }
+
+  return 0;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a1a6ddda1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/stm32g4xx_it.c
@@ -0,0 +1,190 @@
+/**
+  ******************************************************************************
+  * @file    BSP/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+
+/* USER CODE BEGIN 0 */
+extern SAI_HandleTypeDef                haudio_out_sai;
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+#if (USE_BSP_IO_CLASS == 1)
+extern __IO uint32_t IddOnGoing;
+#endif
+/******************************************************************************/
+/*            Cortex-M4 Processor Interruption and Exception Handlers         */
+/******************************************************************************/
+
+/**
+* @brief This function handles System service call via SWI instruction.
+*/
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+* @brief This function handles Pendable request for system service.
+*/
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+* @brief This function handles System tick timer.
+*/
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  HAL_SYSTICK_IRQHandler();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles DMA1 Channel 1 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SRAM_DMAx_IRQHandler(void)
+{
+  HAL_DMA_IRQHandler(hsram.hdma);
+}
+
+/* this IRQ is for MFX */
+void EXTI0_IRQHandler(void)
+{
+#if (USE_BSP_IO_CLASS == 1)
+  if (IddOnGoing ==1)
+  {
+    BSP_IDD_IRQHandler();
+  }
+  else
+  {
+    BSP_JOY_IRQHandler();
+  }
+#endif
+}
+
+void EXTI1_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
+}
+
+void EXTI2_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
+}
+
+void EXTI3_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
+}
+
+void EXTI4_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+}
+
+void EXTI9_5_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
+}
+
+/**
+  * @brief  This function handles EXT 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  BSP_PB_IRQHandler(BUTTON_USER);
+}
+
+/**
+  * @brief  This function handles SAI DMA interrupt request.
+  * @param  None
+  * @retval None
+  */
+void AUDIO_SAI1_DMAx_IRQHandler(void)
+{
+  HAL_DMA_IRQHandler(haudio_out_sai.hdmatx);
+}
+
+/**
+  * @brief  This function handles SAI Tx DMA interrupt request.
+  * @param  None
+  * @retval None
+  */
+void DMA2_Channel1_IRQHandler(void)
+{
+    BSP_AUDIO_OUT_DMA_IRQHandler(0);
+}
+
+/**
+  * @brief  This function handles SAI Rx DMA interrupt request.
+  * @param  None
+  * @retval None
+  */
+void DMA2_Channel2_IRQHandler(void)
+{
+    BSP_AUDIO_IN_DMA_IRQHandler(0, AUDIO_IN_DEVICE_ANALOG_MIC);
+}
+
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+/* USER CODE END 1 */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..c0e51359e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/system_stm32g4xx.c
@@ -0,0 +1,280 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (8 MHz then 16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        HSI Division factor                    | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 8
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+#if defined( USE_FPGA_BOARD)
+#define HSE_VALUE    ((uint32_t)48000000) /*!< Value of the External oscillator in Hz */
+#else
+#define HSE_VALUE    ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */
+#endif /* USE_FPGA_BOARD */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+  const uint8_t APBPrescTable[8] =  {0, 0, 0, 0, 1, 2, 3, 4};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllr = 2, pllsource = 0, pllm = 2;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1 ;
+
+      switch (pllsource)
+      {
+        case 0x02:  /* HSI used as PLL clock source */
+          pllvco = (HSI_VALUE / pllm);
+          break;
+
+        case 0x03:  /* HSE used as PLL clock source */
+          pllvco = (HSE_VALUE / pllm);
+          break;
+
+        default:    /* MSI used as PLL clock source */
+          break;
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1) * 2;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/audio8kStereo16bps.bin b/Projects/STM32G474E-EVAL1/Examples/BSP/audio8kStereo16bps.bin
new file mode 100644
index 000000000..ab4529d88
Binary files /dev/null and b/Projects/STM32G474E-EVAL1/Examples/BSP/audio8kStereo16bps.bin differ
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/readme.txt b/Projects/STM32G474E-EVAL1/Examples/BSP/readme.txt
new file mode 100644
index 000000000..6679cbc58
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/readme.txt
@@ -0,0 +1,124 @@
+/**
+  @page BSP Mode example
+
+  @verbatim
+  ******************** (C) COPYRIGHT 2019 STMicroelectronics *******************
+  * @file    BSP/BSP_Test/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the STM32G4xx BSP example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This example provides a short description of how to use the BSP to interface with
+the EVAL1 board
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+
+Terminal IO is required to view messages of examples.
+Once the message "Press User button to start :
+                       LED example" is displayed on the screen, press user button to start running the first demo
+
+1_ Led_demo: Every time the message "If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail)" is displayed on the Terminal I/O,
+             press joy_right if the four leds are toggling correctly, else, press joy_left.
+
+Once the message "Press User button to start :
+                       BUTTON example" is displayed on the screen, press user button.
+
+2_ Button_demo: Press user button twice following the messages displayed in the Terminal I/O.
+Once the message "Press User button to start :
+                       IO example" is displayed on the screen, press user button.
+
+3_ Io_demo: Every time the message "If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail)" is displayed on the Terminal I/O,
+            press joy_right if the led4 (blue) is toggling correctly, else, press joy_left.
+            press joy_sel button once the message "Please press JOY_SEL" is displayed on the Terminal I/O.
+
+4_ Lcd_demo: Every time the message "If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail)' is displayed on the Terminal I/O,
+             press joy_right if the screen orientation is correct, else, press joy_left.
+Once the message "Press User button to start :
+                       AUDIO PLAY example" is displayed on the screen, press user button.
+
+5_ AudioPlay_demo: press joy_sel key to play and pause the audio
+                   press joy up/down keys to increase/decrease volume
+                   press joy right/left keys to increase/decrease frequency
+                   press user button again to quit AUDIO PLAY demo
+
+6_ Bus_demo: The message "TEST OF BUS Passed" is displayed on the Terminal I/O.
+
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note When running the audio, the sample file (audio8kStereo16bps.bin) must be loaded in the flash memory
+      at address 0x08023000 as specified in the main.h
+      The recorded file is stored in the flash memory at the address 0x08024000 as specified in the main.h
+
+@par Keywords
+
+Display, LCD, SD card, SRAM, QUADSPI, LED, Push Button, Joystick, audio
+
+
+@par Directory contents
+
+  - Example/BSP/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - Example/BSP/Inc/stm32g474e_eval_conf.h  EVAL1 board configuration file
+  - Example/BSP/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - Example/BSP/Inc/main.h                  Header for main.c module
+  - Example/BSP/Src/stm32g4xx_it.c          Interrupt handlers
+  - Example/BSP/Src/main.c                  Main program
+  - Example/BSP/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xxx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Set-up :
+       - JP10 must be closed
+
+- When resorting to EWARM IAR IDE:
+Command Code is displayed on debugger as follows: View --> Terminal I/O
+
+- When resorting to MDK-ARM KEIL IDE:
+Command Code is displayed on debugger as follows: View --> Serial Viewer --> Debug (printf) Viewer
+The Audio play demo is not supported on MDK-ARM IDE.
+
+- When resorting to STM32CubeIDE:
+Command Code is displayed on debugger as follows: Window--> Show View--> Console.
+In Debug configuration :
+- Window\Debugger, select the Debug probe : ST-LINK(OpenOCD)
+- Window\Startup,add the command "monitor arm semihosting enable"
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files: Project->Rebuild all
+ - Load project image: Project->Download and Debug
+ - Run program: Debug->Go(F5)
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/.extSettings
new file mode 100644
index 000000000..93f649300
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\CMSIS\DSP\Include;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=ARM_MATH_CM4
+HALModule=I2C;EXTI;SPI
+LinkAdditionalLibs=../../../../../../Drivers/CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/CORDIC_SinCos_DMA_Perf.ioc b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/CORDIC_SinCos_DMA_Perf.ioc
new file mode 100644
index 000000000..7793dbf32
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/CORDIC_SinCos_DMA_Perf.ioc
@@ -0,0 +1,162 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.CORDIC_READ.1.Direction=DMA_PERIPH_TO_MEMORY
+Dma.CORDIC_READ.1.EventEnable=DISABLE
+Dma.CORDIC_READ.1.Instance=DMA1_Channel2
+Dma.CORDIC_READ.1.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_READ.1.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_READ.1.Mode=DMA_NORMAL
+Dma.CORDIC_READ.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_READ.1.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_READ.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_READ.1.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_READ.1.RequestNumber=1
+Dma.CORDIC_READ.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_READ.1.SignalID=NONE
+Dma.CORDIC_READ.1.SyncEnable=DISABLE
+Dma.CORDIC_READ.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_READ.1.SyncRequestNumber=1
+Dma.CORDIC_READ.1.SyncSignalID=NONE
+Dma.CORDIC_WRITE.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.CORDIC_WRITE.0.EventEnable=DISABLE
+Dma.CORDIC_WRITE.0.Instance=DMA1_Channel1
+Dma.CORDIC_WRITE.0.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_WRITE.0.Mode=DMA_NORMAL
+Dma.CORDIC_WRITE.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_WRITE.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_WRITE.0.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_WRITE.0.RequestNumber=1
+Dma.CORDIC_WRITE.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_WRITE.0.SignalID=NONE
+Dma.CORDIC_WRITE.0.SyncEnable=DISABLE
+Dma.CORDIC_WRITE.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_WRITE.0.SyncRequestNumber=1
+Dma.CORDIC_WRITE.0.SyncSignalID=NONE
+Dma.Request0=CORDIC_WRITE
+Dma.Request1=CORDIC_READ
+Dma.RequestsNb=2
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CORDIC
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CORDIC_VS_CORDIC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CORDIC_SinCos_DMA_Perf.ioc
+ProjectManager.ProjectName=CORDIC_SinCos_DMA_Perf
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_DMA_Init-DMA-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORDIC_Init-CORDIC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CORDIC_VS_CORDIC.Mode=CORDIC_Activate
+VP_CORDIC_VS_CORDIC.Signal=CORDIC_VS_CORDIC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CORDIC_SinCos_DMA_Perf
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewd b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewd
new file mode 100644
index 000000000..6cd370d85
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>CORDIC_SinCos_DMA_Perf</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewp b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewp
new file mode 100644
index 000000000..9fe4fe34a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewp
@@ -0,0 +1,1152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>CORDIC_SinCos_DMA_Perf</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>CORDIC_SinCos_DMA_Perf/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>CORDIC_SinCos_DMA_Perf/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>CORDIC_SinCos_DMA_Perf/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
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+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/Project.eww
new file mode 100644
index 000000000..fd1d4f680
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\CORDIC_SinCos_DMA_Perf.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h
new file mode 100644
index 000000000..9de054276
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h
@@ -0,0 +1,82 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Pass/Fail Status */
+#define PASS              0
+#define FAIL              1
+
+/* Number of calculation loops (depends on clock config) */
+#define LOOP_NB           (uint32_t)((170000000 / 150) / ARRAY_SIZE)
+
+/* Size of data array */
+#define ARRAY_SIZE        64U
+
+/* Reference values in Q1.31 format */
+#define DELTA             (int32_t)0x00001000       /* Max residual error for sines, with 6 cycle precision:
+                                                       2^-19 max residual error, ie 31-19=12 LSB, ie <0x1000 */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..426b7a1f2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+#define HAL_CORDIC_MODULE_ENABLED
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..1bd22b1a3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvoptx
new file mode 100644
index 000000000..af4d70427
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvoptx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>CORDIC_SinCos_DMA_Perf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$CMSIS\Flash\STM32G4xx_512.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvprojx
new file mode 100644
index 000000000..9a592185e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvprojx
@@ -0,0 +1,607 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>CORDIC_SinCos_DMA_Perf</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.0</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>CORDIC_SinCos_DMA_Perf\</OutputDirectory>
+          <OutputName>CORDIC_SinCos_DMA_Perf</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_CM4,USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/CMSIS/DSP/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cordic.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS/DSP/Lib</GroupName>
+          <Files>
+            <File>
+              <FileName>arm_cortexM4l_math.lib</FileName>
+              <FileType>4</FileType>
+              <FilePath>..\..\..\..\..\..\Drivers\CMSIS\DSP\Lib\ARM\arm_cortexM4l_math.lib</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="CORDIC_SinCos_DMA_Perf"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..a50a76da4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.cproject
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.675836653">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.675836653" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1698161191" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/DSP/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1595281243" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.528701022" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2016888475" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.5236865" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.459772622" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.71843997" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" useByScannerDiscovery="false" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.directories.612051871" name="Library search path (-L)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.directories" useByScannerDiscovery="false" valueType="libPaths">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/DSP/Lib/GCC"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.libraries.2070451444" name="Libraries (-l)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.libraries" useByScannerDiscovery="false" valueType="libs">
+									<listOptionValue builtIn="false" value=":libarm_cortexM4lf_math.a"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1414446028" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1695587638" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.941284205" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.581753555" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1194256305" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.426042073" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1183933343" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1585860832" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.810220749" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.27364708" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1492903277" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="CORDIC_SinCos_DMA_Perf.null.1030349994" name="CORDIC_SinCos_DMA_Perf"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.675836653;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.675836653.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1659978810;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1310387862">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2014305530;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2014305530.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1485387239;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1595281243">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/STM32CubeIDE"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/STM32CubeIDE"/>
+		</configuration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.project
new file mode 100644
index 000000000..de8cf5853
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CORDIC_SinCos_DMA_Perf</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>CORDIC_SinCos_DMA_Perf.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/CORDIC_SinCos_DMA_Perf.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cordic.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c
new file mode 100644
index 000000000..5a2fe2508
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c
@@ -0,0 +1,483 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the STM32G4xx CORDIC HAL API
+  *          to compute Sine and Cosine on arrays of data (Q1.31 format) in DMA mode.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include <arm_math.h>
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CORDIC_HandleTypeDef hcordic;
+DMA_HandleTypeDef hdma_cordic_write;
+DMA_HandleTypeDef hdma_cordic_read;
+
+/* USER CODE BEGIN PV */
+/* CORDIC configuration structure */
+CORDIC_ConfigTypeDef sCordicConfig;
+
+/* Array of angles for CORDIC Q1.31 format, regularly incremented from 0 to 2*pi */
+static int32_t aAnglesCordic[ARRAY_SIZE] =
+{
+  0x00000000, 0x04000000, 0x08000000, 0x0C000000,
+  0x10000000, 0x14000000, 0x18000000, 0x1C000000,
+  0x20000000, 0x24000000, 0x28000000, 0x2C000000,
+  0x30000000, 0x34000000, 0x38000000, 0x3C000000,
+  0x40000000, 0x44000000, 0x48000000, 0x4C000000,
+  0x50000000, 0x54000000, 0x58000000, 0x5C000000,
+  0x60000000, 0x64000000, 0x68000000, 0x6C000000,
+  0x70000000, 0x74000000, 0x78000000, 0x7C000000,
+  0x80000000, 0x84000000, 0x88000000, 0x8C000000,
+  0x90000000, 0x94000000, 0x98000000, 0x9C000000,
+  0xA0000000, 0xA4000000, 0xA8000000, 0xAC000000,
+  0xB0000000, 0xB4000000, 0xB8000000, 0xBC000000,
+  0xC0000000, 0xC4000000, 0xC8000000, 0xCC000000,
+  0xD0000000, 0xD4000000, 0xD8000000, 0xDC000000,
+  0xE0000000, 0xE4000000, 0xE8000000, 0xEC000000,
+  0xF0000000, 0xF4000000, 0xF8000000, 0xFC000000
+};
+
+/* Array of angles for arm math library Q1.31 format, regularly incremented from 0 to 2*pi */
+static int32_t aAnglesLib[ARRAY_SIZE] =
+{
+  0x00000000, 0x02000000, 0x04000000, 0x06000000,
+  0x08000000, 0x0A000000, 0x0C000000, 0x0E000000,
+  0x10000000, 0x12000000, 0x14000000, 0x16000000,
+  0x18000000, 0x1A000000, 0x1C000000, 0x1E000000,
+  0x20000000, 0x22000000, 0x24000000, 0x26000000,
+  0x28000000, 0x2A000000, 0x2C000000, 0x2E000000,
+  0x30000000, 0x32000000, 0x34000000, 0x36000000,
+  0x38000000, 0x3A000000, 0x3C000000, 0x3E000000,
+  0x40000000, 0x42000000, 0x44000000, 0x46000000,
+  0x48000000, 0x4A000000, 0x4C000000, 0x4E000000,
+  0x50000000, 0x52000000, 0x54000000, 0x56000000,
+  0x58000000, 0x5A000000, 0x5C000000, 0x5E000000,
+  0x60000000, 0x62000000, 0x64000000, 0x66000000,
+  0x68000000, 0x6A000000, 0x6C000000, 0x6E000000,
+  0x70000000, 0x72000000, 0x74000000, 0x76000000,
+  0x78000000, 0x7A000000, 0x7C000000, 0x7E000000
+};
+
+/* Array of reference sines in Q1.31 format */
+static int32_t aRefSin[ARRAY_SIZE] =
+{
+  0x00000000, 0x0C8BD35E, 0x18F8B83C, 0x25280C5D,
+  0x30FBC54D, 0x3C56BA70, 0x471CECE6, 0x5133CC94,
+  0x5A827999, 0x62F201AC, 0x6A6D98A4, 0x70E2CBC6,
+  0x7641AF3C, 0x7A7D055B, 0x7D8A5F3F, 0x7F62368F,
+  0x80000000, 0x7F62368F, 0x7D8A5F3F, 0x7A7D055B,
+  0x7641AF3C, 0x70E2CBC6, 0x6A6D98A4, 0x62F201AC,
+  0x5A827999, 0x5133CC94, 0x471CECE6, 0x3C56BA70,
+  0x30FBC54D, 0x25280C5D, 0x18F8B83C, 0x0C8BD35E,
+  0x00000000, 0xF3742CA2, 0xE70747C4, 0xDAD7F3A3,
+  0xCF043AB3, 0xC3A94590, 0xB8E3131A, 0xAECC336C,
+  0xA57D8667, 0x9D0DFE54, 0x9592675C, 0x8F1D343A,
+  0x89BE50C4, 0x8582FAA5, 0x8275A0C1, 0x809DC971,
+  0x80000000, 0x809DC971, 0x8275A0C1, 0x8582FAA5,
+  0x89BE50C4, 0x8F1D343A, 0x9592675C, 0x9D0DFE54,
+  0xA57D8667, 0xAECC336C, 0xB8E3131A, 0xC3A94590,
+  0xCF043AB3, 0xDAD7F3A3, 0xE70747C4, 0xF3742CA2
+};
+
+/* Array of reference cosines in Q1.31 format */
+static int32_t aRefCos[ARRAY_SIZE] =
+{
+  0x80000000, 0x7F62368F, 0x7D8A5F3F, 0x7A7D055B,
+  0x7641AF3C, 0x70E2CBC6, 0x6A6D98A4, 0x62F201AC,
+  0x5A827999, 0x5133CC94, 0x471CECE6, 0x3C56BA70,
+  0x30FBC54D, 0x25280C5D, 0x18F8B83C, 0x0C8BD35E,
+  0x00000000, 0xF3742CA2, 0xE70747C4, 0xDAD7F3A3,
+  0xCF043AB3, 0xC3A94590, 0xB8E3131A, 0xAECC336C,
+  0xA57D8667, 0x9D0DFE54, 0x9592675C, 0x8F1D343A,
+  0x89BE50C4, 0x8582FAA5, 0x8275A0C1, 0x809DC971,
+  0x80000000, 0x809DC971, 0x8275A0C1, 0x8582FAA5,
+  0x89BE50C4, 0x8F1D343A, 0x9592675C, 0x9D0DFE54,
+  0xA57D8667, 0xAECC336C, 0xB8E3131A, 0xC3A94590,
+  0xCF043AB3, 0xDAD7F3A3, 0xE70747C4, 0xF3742CA2,
+  0x00000000, 0x0C8BD35E, 0x18F8B83C, 0x25280C5D,
+  0x30FBC54D, 0x3C56BA70, 0x471CECE6, 0x5133CC94,
+  0x5A827999, 0x62F201AC, 0x6A6D98A4, 0x70E2CBC6,
+  0x7641AF3C, 0x7A7D055B, 0x7D8A5F3F, 0x7F62368F
+};
+
+/* Array of calculation results in Q1.31 format.
+   Will contain alternatively Sine and Cosine of input angles */
+static int32_t aResults[2 * ARRAY_SIZE];
+
+/* User button event */
+__IO uint32_t UserButtonEvent = RESET;  /* Event is SET when User Button interrupt occurs */
+
+/* Step */
+uint32_t Step = 0;                      /* 0: use CORDIC processor
+                                           1: use arm math library  */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_DMA_Init(void);
+static void MX_CORDIC_Init(void);
+/* USER CODE BEGIN PFP */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED1 */
+  BSP_LED_Init(LED1);
+
+  /* Configure User Button */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_DMA_Init();
+  MX_CORDIC_Init();
+  /* USER CODE BEGIN 2 */
+  /*##-2- Configure the CORDIC peripheral ####################################*/
+  sCordicConfig.Function         = CORDIC_FUNCTION_SINE;     /* sine function */
+  sCordicConfig.Precision        = CORDIC_PRECISION_6CYCLES; /* max precision for q1.31 sine */
+  sCordicConfig.Scale            = CORDIC_SCALE_0;           /* no scale */
+  sCordicConfig.NbWrite          = CORDIC_NBWRITE_1;         /* One input data: angle. Second input data (modulus) is 1 after cordic reset */
+  sCordicConfig.NbRead           = CORDIC_NBREAD_2;          /* Two output data: sine then cosine */
+  sCordicConfig.InSize           = CORDIC_INSIZE_32BITS;     /* q1.31 format for input data */
+  sCordicConfig.OutSize          = CORDIC_OUTSIZE_32BITS;    /* q1.31 format for output data */
+
+  if (HAL_CORDIC_Configure(&hcordic, &sCordicConfig) != HAL_OK)
+  {
+    /* Configuration Error */
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* Loop until user push button */
+    while(UserButtonEvent == RESET)
+    {
+      switch (Step)
+      {
+        /*################### Calculation using CORDIC #######################*/
+        case 0:
+          for (uint32_t i = 0; i < LOOP_NB; i++)
+          {
+
+            /* Start calculation of sines in DMA mode */
+            if (HAL_CORDIC_Calculate_DMA(&hcordic, aAnglesCordic, aResults,
+                                         ARRAY_SIZE, CORDIC_DMA_DIR_IN_OUT) != HAL_OK)
+            {
+              /* Processing Error */
+              Error_Handler();
+            }
+
+            /*  Before starting a new process, you need to check the current state of the peripheral;
+            if it is busy you need to wait for the end of current transfer before starting a new one.
+            For simplicity reasons, this example is just waiting till the end of the
+            process, but application may perform other tasks while transfer operation
+            is ongoing. */
+            while (HAL_CORDIC_GetState(&hcordic) != HAL_CORDIC_STATE_READY)
+            {
+            }
+          }
+
+          break;
+
+        /*################### Calculation using arm math library #############*/
+        case 1:
+          for (uint32_t i = 0; i < LOOP_NB; i++)
+          {
+            for (uint32_t j = 0; j < ARRAY_SIZE; j++)
+            {
+              /* Calculate sine */
+              aResults[2*j] = arm_sin_q31(aAnglesLib[j]);
+
+              /* Calculate cosine */
+              aResults[(2*j) + 1] = arm_cos_q31(aAnglesLib[j]);
+            }
+          }
+
+          break;
+
+        /* Should not occur */
+        default :
+          Error_Handler();
+      }
+
+      /* Toggle LED1 */
+      BSP_LED_Toggle(LED1);
+    }
+
+   /* Compare calculated results to the reference values */
+   for (uint32_t i = 0; i < ARRAY_SIZE; i++)
+   {
+     if ((Check_Residual_Error(aResults[2*i], aRefSin[i], DELTA) == FAIL) ||
+         (Check_Residual_Error(aResults[(2*i) + 1], aRefCos[i], DELTA) == FAIL))
+     {
+       Error_Handler();
+     }
+   }
+
+    /* Toggle Step number */
+    Step = (Step + 1) % 2;
+
+    /* Reset UserButtonEvent */
+    UserButtonEvent = RESET;
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CORDIC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CORDIC_Init(void)
+{
+
+  /* USER CODE BEGIN CORDIC_Init 0 */
+
+  /* USER CODE END CORDIC_Init 0 */
+
+  /* USER CODE BEGIN CORDIC_Init 1 */
+
+  /* USER CODE END CORDIC_Init 1 */
+  hcordic.Instance = CORDIC;
+  if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CORDIC_Init 2 */
+
+  /* USER CODE END CORDIC_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+  /* DMA1_Channel2_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief EXTI line detection callbacks
+  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  if (GPIO_Pin == USER_BUTTON_PIN)
+  {
+    /* Set variable to report push button event to main program */
+    UserButtonEvent = SET;
+  }
+}
+
+/**
+  * @brief  Check delta between two values is below threshold
+  * @param  VarA First input variable
+  * @param  VarB Second input variable
+  * @param  MaxError Maximum delta allowed between VarA and VarB
+  * @retval Status
+  *           PASS: Delta is below threshold
+  *           FAIL: Delta is above threshold
+  */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError)
+{
+  uint32_t status = PASS;
+
+  if ((VarA - VarB) >= 0)
+  {
+    if ((VarA - VarB) > MaxError)
+    {
+      status = FAIL;
+    }
+  }
+  else
+  {
+    if ((VarB - VarA) > MaxError)
+    {
+      status = FAIL;
+    }
+  }
+
+  return status;
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* LED1 is switched-off */
+  BSP_LED_Off(LED1);
+
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..417056c1f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,176 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_cordic_write;
+
+extern DMA_HandleTypeDef hdma_cordic_read;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CORDIC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspInit(CORDIC_HandleTypeDef* hcordic)
+{
+  if(hcordic->Instance==CORDIC)
+  {
+  /* USER CODE BEGIN CORDIC_MspInit 0 */
+
+  /* USER CODE END CORDIC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CORDIC_CLK_ENABLE();
+
+    /* CORDIC DMA Init */
+    /* CORDIC_WRITE Init */
+    hdma_cordic_write.Instance = DMA1_Channel1;
+    hdma_cordic_write.Init.Request = DMA_REQUEST_CORDIC_WRITE;
+    hdma_cordic_write.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_cordic_write.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_cordic_write.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_cordic_write.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_cordic_write.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_cordic_write.Init.Mode = DMA_NORMAL;
+    hdma_cordic_write.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_cordic_write) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hcordic,hdmaIn,hdma_cordic_write);
+
+    /* CORDIC_READ Init */
+    hdma_cordic_read.Instance = DMA1_Channel2;
+    hdma_cordic_read.Init.Request = DMA_REQUEST_CORDIC_READ;
+    hdma_cordic_read.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_cordic_read.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_cordic_read.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_cordic_read.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_cordic_read.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_cordic_read.Init.Mode = DMA_NORMAL;
+    hdma_cordic_read.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_cordic_read) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hcordic,hdmaOut,hdma_cordic_read);
+
+  /* USER CODE BEGIN CORDIC_MspInit 1 */
+
+  /* USER CODE END CORDIC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief CORDIC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspDeInit(CORDIC_HandleTypeDef* hcordic)
+{
+  if(hcordic->Instance==CORDIC)
+  {
+  /* USER CODE BEGIN CORDIC_MspDeInit 0 */
+  /* Reset CORDIC peripheral */
+  __HAL_RCC_CORDIC_FORCE_RESET();
+  __HAL_RCC_CORDIC_RELEASE_RESET();
+
+  /* USER CODE END CORDIC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CORDIC_CLK_DISABLE();
+
+    /* CORDIC DMA DeInit */
+    HAL_DMA_DeInit(hcordic->hdmaIn);
+    HAL_DMA_DeInit(hcordic->hdmaOut);
+  /* USER CODE BEGIN CORDIC_MspDeInit 1 */
+
+  /* USER CODE END CORDIC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..1573168b8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c
@@ -0,0 +1,243 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_cordic_write;
+extern DMA_HandleTypeDef hdma_cordic_read;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_cordic_write);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 channel2 global interrupt.
+  */
+void DMA1_Channel2_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_cordic_read);
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt
new file mode 100644
index 000000000..9f1a4e881
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt
@@ -0,0 +1,97 @@
+/**
+  @page CORDIC_SinCos_DMA_Perf CORDIC Sine and Cosine calculation on array in DMA mode example
+
+  @verbatim
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt
+  * @author  MCD Application Team
+  * @brief   Sine and Cosine calculation on array in DMA mode example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to use the CORDIC peripheral to calculate sines and cosines array in DMA mode.
+
+This example is based on the STM32G4xx CORDIC HAL API.
+
+In this example, the CORDIC peripheral is configured in sine function, q1.31
+format for both input and output data, and with 6 cycles of precision.
+The input data provided to CORDIC peripheral are angles in radians
+divided by PI, in q1.31 format. The output data are sines and cosines in q1.31
+format. For 6 cycles of precision, the maximal expected residual error of the
+calculated sines is 2^-19.
+
+DMA is used to transfer input data from memory to the CORDIC peripheral and
+output data from CORDIC peripheral to memory, so that CPU is offloaded.
+
+At start of execution, the calculation of sines and cosines are performed
+in loop using CORDIC peripheral. When User push-button is pushed, the same
+calculation is performed in loop using arm math software library. Each time
+the User push-button is pushed again the calculation toggles between CORDIC
+peripheral and arm math software library usage.
+
+LED1 blinks at speed of calculation loops.
+This shows the performance gain of CORDIC peripheral usage (fast blink)
+compared to arm math software library usage (slow blink) in this use case.
+
+The calculated sines are stored in aResults[] array.
+This array contains alternatively the calculated sine and the calculated cosine
+of each input angle provided.
+The residual error of calculation results is verified, by comparing to
+reference values in aRefSin[] and aRefCos[] obtained from double precision
+floating point calculation.
+In case of exceeding residual error, the LED1 is turned off and stops blinking.
+
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+CORDIC, Sine, Cosine, DMA mode.
+
+@par Directory contents
+
+  - CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - CORDIC/CORDIC_Sinus_DMA/Inc/main.h                  Header for main.c module
+  - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_it.c          Interrupt handlers
+  - CORDIC/CORDIC_Sinus_DMA/Src/main.c                  Main program
+  - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - CORDIC/CORDIC_Sinus_DMA/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device
+    and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/CORDIC_Sin_DMA.ioc b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/CORDIC_Sin_DMA.ioc
new file mode 100644
index 000000000..304679844
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/CORDIC_Sin_DMA.ioc
@@ -0,0 +1,162 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.CORDIC_READ.1.Direction=DMA_PERIPH_TO_MEMORY
+Dma.CORDIC_READ.1.EventEnable=DISABLE
+Dma.CORDIC_READ.1.Instance=DMA1_Channel2
+Dma.CORDIC_READ.1.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_READ.1.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_READ.1.Mode=DMA_NORMAL
+Dma.CORDIC_READ.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_READ.1.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_READ.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_READ.1.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_READ.1.RequestNumber=1
+Dma.CORDIC_READ.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_READ.1.SignalID=NONE
+Dma.CORDIC_READ.1.SyncEnable=DISABLE
+Dma.CORDIC_READ.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_READ.1.SyncRequestNumber=1
+Dma.CORDIC_READ.1.SyncSignalID=NONE
+Dma.CORDIC_WRITE.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.CORDIC_WRITE.0.EventEnable=DISABLE
+Dma.CORDIC_WRITE.0.Instance=DMA1_Channel1
+Dma.CORDIC_WRITE.0.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_WRITE.0.Mode=DMA_NORMAL
+Dma.CORDIC_WRITE.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_WRITE.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_WRITE.0.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_WRITE.0.RequestNumber=1
+Dma.CORDIC_WRITE.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_WRITE.0.SignalID=NONE
+Dma.CORDIC_WRITE.0.SyncEnable=DISABLE
+Dma.CORDIC_WRITE.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_WRITE.0.SyncRequestNumber=1
+Dma.CORDIC_WRITE.0.SyncSignalID=NONE
+Dma.Request0=CORDIC_WRITE
+Dma.Request1=CORDIC_READ
+Dma.RequestsNb=2
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CORDIC
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CORDIC_VS_CORDIC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CORDIC_Sin_DMA.ioc
+ProjectManager.ProjectName=CORDIC_Sin_DMA
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_DMA_Init-DMA-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORDIC_Init-CORDIC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CORDIC_VS_CORDIC.Mode=CORDIC_Activate
+VP_CORDIC_VS_CORDIC.Signal=CORDIC_VS_CORDIC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CORDIC_Sin_DMA
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewd b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewd
new file mode 100644
index 000000000..c5398a61c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>CORDIC_Sin_DMA</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewp b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewp
new file mode 100644
index 000000000..6cda4043d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewp
@@ -0,0 +1,1150 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>CORDIC_Sin_DMA</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>CORDIC_Sin_DMA/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>CORDIC_Sin_DMA/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>CORDIC_Sin_DMA/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
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+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/Project.eww
new file mode 100644
index 000000000..db8d616ba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\CORDIC_Sin_DMA.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/main.h
new file mode 100644
index 000000000..7ba454709
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/main.h
@@ -0,0 +1,79 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_Sin_DMA/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Pass/Fail Status */
+#define PASS              0
+#define FAIL              1
+
+/* Size of data array */
+#define ARRAY_SIZE        64U
+
+/* Reference values in Q1.31 format */
+#define DELTA             (int32_t)0x00001000       /* Max residual error for sines, with 6 cycle precision:
+                                                       2^-19 max residual error, ie 31-19=12 LSB, ie <0x1000 */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..426b7a1f2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+#define HAL_CORDIC_MODULE_ENABLED
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..bd660fc6a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvoptx
new file mode 100644
index 000000000..c4deed390
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>CORDIC_Sin_DMA</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
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+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvprojx
new file mode 100644
index 000000000..0c03c5289
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>CORDIC_Sin_DMA</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
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+          <DBRegisterFilePath></DBRegisterFilePath>
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+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>CORDIC_Sin_DMA\Exe\</OutputDirectory>
+          <OutputName>CORDIC_Sin_DMA</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
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+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
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+            <nStopA1X>0</nStopA1X>
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+          </AfterMake>
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+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
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+          <ModuleSelection>0</ModuleSelection>
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+          <IncludeLibraryModules></IncludeLibraryModules>
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+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
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+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+          </OPTHX>
+        </DebugOption>
+        <Utilities>
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+            <UseTargetDll>1</UseTargetDll>
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+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
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+            <RvctDeviceName></RvctDeviceName>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="CORDIC_Sin_DMA"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..6aebcbd38
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277750065">
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.603157878" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.165786041" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1138625815" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.643066266" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.2077978616" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.437825252" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2003629354" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.894594910" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1732927659" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.649550621" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1194140702" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.476749492" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.731388474" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.766275861" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="CORDIC_Sin_DMA.null.1034404717" name="CORDIC_Sin_DMA"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.286590643;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.286590643.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1613599834;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.338579181">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277750065;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277750065.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2034419501;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.630545358">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.project
new file mode 100644
index 000000000..833e864be
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CORDIC_Sin_DMA</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>CORDIC_Sin_DMA.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/CORDIC_Sin_DMA.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cordic.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/main.c
new file mode 100644
index 000000000..2d31dd97c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/main.c
@@ -0,0 +1,375 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_Sin_DMA/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the STM32G4xx CORDIC HAL API
+  *          to compute Sine on arrays of data (Q1.31 format) in DMA mode.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CORDIC_HandleTypeDef hcordic;
+DMA_HandleTypeDef hdma_cordic_write;
+DMA_HandleTypeDef hdma_cordic_read;
+
+/* USER CODE BEGIN PV */
+/* CORDIC configuration structure */
+CORDIC_ConfigTypeDef sCordicConfig;
+
+/* Array of angles in Q1.31 format, regularly incremented from 0 to 2*pi */
+static int32_t aAngles[ARRAY_SIZE] =
+{
+  0x00000000, 0x04000000, 0x08000000, 0x0C000000,
+  0x10000000, 0x14000000, 0x18000000, 0x1C000000,
+  0x20000000, 0x24000000, 0x28000000, 0x2C000000,
+  0x30000000, 0x34000000, 0x38000000, 0x3C000000,
+  0x40000000, 0x44000000, 0x48000000, 0x4C000000,
+  0x50000000, 0x54000000, 0x58000000, 0x5C000000,
+  0x60000000, 0x64000000, 0x68000000, 0x6C000000,
+  0x70000000, 0x74000000, 0x78000000, 0x7C000000,
+  0x80000000, 0x84000000, 0x88000000, 0x8C000000,
+  0x90000000, 0x94000000, 0x98000000, 0x9C000000,
+  0xA0000000, 0xA4000000, 0xA8000000, 0xAC000000,
+  0xB0000000, 0xB4000000, 0xB8000000, 0xBC000000,
+  0xC0000000, 0xC4000000, 0xC8000000, 0xCC000000,
+  0xD0000000, 0xD4000000, 0xD8000000, 0xDC000000,
+  0xE0000000, 0xE4000000, 0xE8000000, 0xEC000000,
+  0xF0000000, 0xF4000000, 0xF8000000, 0xFC000000
+};
+
+/* Array of reference sines in Q1.31 format */
+static int32_t aRefSin[ARRAY_SIZE] =
+{
+  0x00000000, 0x0C8BD35E, 0x18F8B83C, 0x25280C5D,
+  0x30FBC54D, 0x3C56BA70, 0x471CECE6, 0x5133CC94,
+  0x5A827999, 0x62F201AC, 0x6A6D98A4, 0x70E2CBC6,
+  0x7641AF3C, 0x7A7D055B, 0x7D8A5F3F, 0x7F62368F,
+  0x80000000, 0x7F62368F, 0x7D8A5F3F, 0x7A7D055B,
+  0x7641AF3C, 0x70E2CBC6, 0x6A6D98A4, 0x62F201AC,
+  0x5A827999, 0x5133CC94, 0x471CECE6, 0x3C56BA70,
+  0x30FBC54D, 0x25280C5D, 0x18F8B83C, 0x0C8BD35E,
+  0x00000000, 0xF3742CA2, 0xE70747C4, 0xDAD7F3A3,
+  0xCF043AB3, 0xC3A94590, 0xB8E3131A, 0xAECC336C,
+  0xA57D8667, 0x9D0DFE54, 0x9592675C, 0x8F1D343A,
+  0x89BE50C4, 0x8582FAA5, 0x8275A0C1, 0x809DC971,
+  0x80000000, 0x809DC971, 0x8275A0C1, 0x8582FAA5,
+  0x89BE50C4, 0x8F1D343A, 0x9592675C, 0x9D0DFE54,
+  0xA57D8667, 0xAECC336C, 0xB8E3131A, 0xC3A94590,
+  0xCF043AB3, 0xDAD7F3A3, 0xE70747C4, 0xF3742CA2
+};
+
+/* Array of calculated sines in Q1.31 format */
+static int32_t aCalculatedSin[ARRAY_SIZE];
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_DMA_Init(void);
+static void MX_CORDIC_Init(void);
+/* USER CODE BEGIN PFP */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_DMA_Init();
+  MX_CORDIC_Init();
+  /* USER CODE BEGIN 2 */
+  /*## Configure the CORDIC peripheral ####################################*/
+  sCordicConfig.Function         = CORDIC_FUNCTION_SINE;     /* sine function */
+  sCordicConfig.Precision        = CORDIC_PRECISION_6CYCLES; /* max precision for q1.31 sine */
+  sCordicConfig.Scale            = CORDIC_SCALE_0;           /* no scale */
+  sCordicConfig.NbWrite          = CORDIC_NBWRITE_1;         /* One input data: angle. Second input data (modulus) is 1 after cordic reset */
+  sCordicConfig.NbRead           = CORDIC_NBREAD_1;          /* One output data: sine */
+  sCordicConfig.InSize           = CORDIC_INSIZE_32BITS;     /* q1.31 format for input data */
+  sCordicConfig.OutSize          = CORDIC_OUTSIZE_32BITS;    /* q1.31 format for output data */
+
+  if (HAL_CORDIC_Configure(&hcordic, &sCordicConfig) != HAL_OK)
+  {
+    /* Configuration Error */
+    Error_Handler();
+  }
+
+  /*## Start calculation of sines in DMA mode #############################*/
+  if (HAL_CORDIC_Calculate_DMA(&hcordic, aAngles, aCalculatedSin,
+                               ARRAY_SIZE, CORDIC_DMA_DIR_IN_OUT) != HAL_OK)
+  {
+    /* Processing Error */
+    Error_Handler();
+  }
+
+  /*  Before starting a new process, you need to check the current state of the peripheral;
+      if it’s busy you need to wait for the end of current transfer before starting a new one.
+      For simplicity reasons, this example is just waiting till the end of the
+      process, but application may perform other tasks while transfer operation
+      is ongoing. */
+  while (HAL_CORDIC_GetState(&hcordic) != HAL_CORDIC_STATE_READY)
+  {
+  }
+
+  /*## Compare CORDIC results to the reference values #####################*/
+  for (uint32_t i = 0; i < ARRAY_SIZE; i++)
+  {
+    if (Check_Residual_Error(aCalculatedSin[i], aRefSin[i], DELTA) == FAIL)
+    {
+      Error_Handler();
+    }
+  }
+
+  /* Correct CORDIC output values: Turn LED1 on */
+  BSP_LED_On(LED1);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CORDIC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CORDIC_Init(void)
+{
+
+  /* USER CODE BEGIN CORDIC_Init 0 */
+
+  /* USER CODE END CORDIC_Init 0 */
+
+  /* USER CODE BEGIN CORDIC_Init 1 */
+
+  /* USER CODE END CORDIC_Init 1 */
+  hcordic.Instance = CORDIC;
+  if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CORDIC_Init 2 */
+
+  /* USER CODE END CORDIC_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+  /* DMA1_Channel2_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Check delta between two values is below threshold
+  * @param  VarA First input variable
+  * @param  VarB Second input variable
+  * @param  MaxError Maximum delta allowed between VarA and VarB
+  * @retval Status
+  *           PASS: Delta is below threshold
+  *           FAIL: Delta is above threshold
+  */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError)
+{
+  uint32_t status = PASS;
+
+  if ((VarA - VarB) >= 0)
+  {
+    if ((VarA - VarB) > MaxError)
+    {
+      status = FAIL;
+    }
+  }
+  else
+  {
+    if ((VarB - VarA) > MaxError)
+    {
+      status = FAIL;
+    }
+  }
+
+  return status;
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  while (1)
+  {
+    /* LED3 is blinking */
+    BSP_LED_Toggle(LED3);
+    HAL_Delay(500);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..40c3948ba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,176 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_cordic_write;
+
+extern DMA_HandleTypeDef hdma_cordic_read;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CORDIC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspInit(CORDIC_HandleTypeDef* hcordic)
+{
+  if(hcordic->Instance==CORDIC)
+  {
+  /* USER CODE BEGIN CORDIC_MspInit 0 */
+
+  /* USER CODE END CORDIC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CORDIC_CLK_ENABLE();
+
+    /* CORDIC DMA Init */
+    /* CORDIC_WRITE Init */
+    hdma_cordic_write.Instance = DMA1_Channel1;
+    hdma_cordic_write.Init.Request = DMA_REQUEST_CORDIC_WRITE;
+    hdma_cordic_write.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_cordic_write.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_cordic_write.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_cordic_write.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_cordic_write.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_cordic_write.Init.Mode = DMA_NORMAL;
+    hdma_cordic_write.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_cordic_write) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hcordic,hdmaIn,hdma_cordic_write);
+
+    /* CORDIC_READ Init */
+    hdma_cordic_read.Instance = DMA1_Channel2;
+    hdma_cordic_read.Init.Request = DMA_REQUEST_CORDIC_READ;
+    hdma_cordic_read.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_cordic_read.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_cordic_read.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_cordic_read.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_cordic_read.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_cordic_read.Init.Mode = DMA_NORMAL;
+    hdma_cordic_read.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_cordic_read) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hcordic,hdmaOut,hdma_cordic_read);
+
+  /* USER CODE BEGIN CORDIC_MspInit 1 */
+
+  /* USER CODE END CORDIC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief CORDIC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspDeInit(CORDIC_HandleTypeDef* hcordic)
+{
+  if(hcordic->Instance==CORDIC)
+  {
+  /* USER CODE BEGIN CORDIC_MspDeInit 0 */
+  /* Reset CORDIC peripheral */
+  __HAL_RCC_CORDIC_FORCE_RESET();
+  __HAL_RCC_CORDIC_RELEASE_RESET();
+
+  /* USER CODE END CORDIC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CORDIC_CLK_DISABLE();
+
+    /* CORDIC DMA DeInit */
+    HAL_DMA_DeInit(hcordic->hdmaIn);
+    HAL_DMA_DeInit(hcordic->hdmaOut);
+  /* USER CODE BEGIN CORDIC_MspDeInit 1 */
+
+  /* USER CODE END CORDIC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..dd01dbb70
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c
@@ -0,0 +1,234 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_cordic_write;
+extern DMA_HandleTypeDef hdma_cordic_read;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_cordic_write);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 channel2 global interrupt.
+  */
+void DMA1_Channel2_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_cordic_read);
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/readme.txt
new file mode 100644
index 000000000..210228c06
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/readme.txt
@@ -0,0 +1,86 @@
+/**
+  @page CORDIC_Sin_DMA CORDIC Sines calculation in DMA mode example
+
+  @verbatim
+  ******************************************************************************
+  * @file    CORDIC/CORDIC_Sin_DMA/readme.txt
+  * @author  MCD Application Team
+  * @brief   Sines calculation in DMA mode example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to use the CORDIC peripheral to calculate array of sines in DMA mode.
+
+In this example, the CORDIC peripheral is configured in sine function, q1.31
+format for both input and output data, and with 6 cycles of precision.
+The input data provided to CORDIC peripheral are angles in radians
+divided by PI, in q1.31 format. The output data are sines in q1.31 format.
+For 6 cycles of precision, the maximal expected residual error of the
+calculated sines is 2^-19.
+
+DMA is used to transfer input data from memory to the CORDIC peripheral and
+output data from CORDIC peripheral to memory, so that CPU is offloaded.
+
+The calculated sines are stored in aCalculatedSin[] array.
+The residual error of calculation results is verified, by comparing to
+reference values in aRefSin[] obtained from double precision floating point
+calculation.
+
+STM32 board LEDs are used to monitor the example status:
+  - LED1 is ON when correct CORDIC sine results are calculated.
+  - LED3 is blinking (1 second period) when exceeding residual error
+    on CORDIC sine results is detected or when there is an initialization error.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+CORDIC, Sine, DMA mode.
+
+@par Directory contents
+
+  - CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - CORDIC/CORDIC_Sinus_DMA/Inc/main.h                  Header for main.c module
+  - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_it.c          Interrupt handlers
+  - CORDIC/CORDIC_Sinus_DMA/Src/main.c                  Main program
+  - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - CORDIC/CORDIC_Sinus_DMA/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device
+    and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/CRC_Bytes_Stream_7bit_CRC.ioc b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/CRC_Bytes_Stream_7bit_CRC.ioc
new file mode 100644
index 000000000..f893585f6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/CRC_Bytes_Stream_7bit_CRC.ioc
@@ -0,0 +1,130 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+CRC.CRCLength=CRC_POLYLENGTH_7B
+CRC.DefaultInitValueUse=DEFAULT_INIT_VALUE_ENABLE
+CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_DISABLE
+CRC.GeneratingPolynomial=X6+X5+X2+X0
+CRC.IPParameters=DefaultPolynomialUse,CRCLength,GeneratingPolynomial,DefaultInitValueUse,InputDataInversionMode,OutputDataInversionMode,InputDataFormat
+CRC.InputDataFormat=CRC_INPUTDATA_FORMAT_BYTES
+CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_NONE
+CRC.OutputDataInversionMode=CRC_OUTPUTDATA_INVERSION_DISABLE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CRC
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CRC_VS_CRC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CRC_Bytes_Stream_7bit_CRC.ioc
+ProjectManager.ProjectName=CRC_Bytes_Stream_7bit_CRC
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_CRC_Init-CRC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CRC_VS_CRC.Mode=CRC_Activate
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CRC_Bytes_Stream_7bit_CRC
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewd b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewd
new file mode 100644
index 000000000..943f1f6b1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>CRC_Bytes_Stream_7bit_CRC</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewp b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewp
new file mode 100644
index 000000000..2d6e10b0a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>CRC_Bytes_Stream_7bit_CRC</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>CRC_Bytes_Stream_7bit_CRC/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>CRC_Bytes_Stream_7bit_CRC/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>CRC_Bytes_Stream_7bit_CRC/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
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+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
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+          <name>IlinkSuppressDiags</name>
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+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
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+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
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+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
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+        <name>STM32G474E-EVAL1</name>
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+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
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+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
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+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
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+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
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+      <file>
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+      <file>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
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+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
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+      <file>
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+      </file>
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+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
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+      <file>
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+      <file>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
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+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/Project.eww
new file mode 100644
index 000000000..74343f16c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\CRC_Bytes_Stream_7bit_CRC.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h
new file mode 100644
index 000000000..667a377c3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..4a7e0a82a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..f9a39e1b1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvoptx
new file mode 100644
index 000000000..8789e6805
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvoptx
@@ -0,0 +1,657 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>CRC_Bytes_Stream_7bit_CRC</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <FileNumber>2</FileNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvprojx
new file mode 100644
index 000000000..415a892dd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvprojx
@@ -0,0 +1,602 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>CRC_Bytes_Stream_7bit_CRC</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
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+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>CRC_Bytes_Stream_7bit_CRC\</OutputDirectory>
+          <OutputName>CRC_Bytes_Stream_7bit_CRC</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
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+          </BeforeMake>
+          <AfterMake>
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+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
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+          <IncludeLibraryModules></IncludeLibraryModules>
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+          <TargetDllName>SARMCM3.DLL</TargetDllName>
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+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
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+        </DebugOption>
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+            <RunIndependent>0</RunIndependent>
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+          <Flash3></Flash3>
+          <Flash4></Flash4>
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+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
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+        <TargetArmAds>
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+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="CRC_Bytes_Stream_7bit_CRC"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..aeb04e89e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.488387719">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.488387719" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.488387719" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.488387719." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1977518224" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1156398206" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.2108753015" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.530909343" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1987737121" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.249689500" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1079733196" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1332393938" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1202621756" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1595768273" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.707979778" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/CRC_Bytes_Stream_7bit_CRC}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1185591982" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1856425487" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.848552168" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1232344000" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1456622754" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.823545422" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.925909297" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1830272741" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1287656749" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.81680705" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.787356657" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1415861762" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.83056237" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+	</storageModule>
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+		<project id="CRC_Bytes_Stream_7bit_CRC.null.46871286" name="CRC_Bytes_Stream_7bit_CRC"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
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+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.project
new file mode 100644
index 000000000..9e838952e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CRC_Bytes_Stream_7bit_CRC</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>CRC_Bytes_Stream_7bit_CRC.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/CRC_Bytes_Stream_7bit_CRC.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c
new file mode 100644
index 000000000..24a0971bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c
@@ -0,0 +1,349 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the STM32G4xx CRC HAL API
+  *          to compute 7-bit CRC codes from buffers of data bytes (8-bit data),
+  *          based on a user-defined generating polynomial.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define BUFFER_SIZE_5  5  /* CRC7_DATA8_TEST5[] is 5-byte long   */
+#define BUFFER_SIZE_17 17 /* CRC7_DATA8_TEST17[] is 17-byte long */
+#define BUFFER_SIZE_1  1  /* CRC7_DATA8_TEST1[] is 1-byte long   */
+#define BUFFER_SIZE_2  2  /* CRC7_DATA8_TEST2[] is 2-byte long   */
+
+/* User-defined polynomial */
+#define CRC_POLYNOMIAL_7B  0x65  /* X^7 + X^6 + X^5 + X^2 + 1,
+                                   used in Train Communication Network, IEC 60870-5[17] */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+/* USER CODE BEGIN PV */
+/* Used for storing CRC Value */
+__IO uint32_t uwCRCValue = 0;
+
+/* Bytes buffers that will consecutively yield CRCs */
+static const uint8_t CRC7_DATA8_TEST5[5]   = {0x12, 0x34, 0xBA, 0x71, 0xAD};
+static const uint8_t CRC7_DATA8_TEST17[17] = {0x12, 0x34, 0xBA, 0x71, 0xAD,
+                                              0x11, 0x56, 0xDC, 0x88, 0x1B,
+                                              0xEE, 0x4D, 0x82, 0x93, 0xA6,
+                                              0x7F, 0xC3
+                                             };
+static const uint8_t CRC7_DATA8_TEST1[1]   = {0x19};
+static const uint8_t CRC7_DATA8_TEST2[2]   = {0xAB, 0xCD};
+
+uint32_t * CRC7_DATA8_PTR_TEST1 = (uint32_t *)CRC7_DATA8_TEST1;
+uint32_t * CRC7_DATA8_PTR_TEST2 = (uint32_t *)CRC7_DATA8_TEST2;
+
+
+/* Expected CRC Values */
+/* The 7 LSB bits are the 7-bit long CRC */
+uint32_t uwExpectedCRCValue_1 = 0x00000057;    /* First byte stream CRC  */
+uint32_t uwExpectedCRCValue_2 = 0x0000006E;    /* Second byte stream CRC */
+uint32_t uwExpectedCRCValue_3 = 0x0000004B;    /* Third byte stream CRC  */
+uint32_t uwExpectedCRCValue_4 = 0x00000026;    /* Fourth byte stream CRC */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_CRC_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_CRC_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /****************************************************************************/
+  /*                                                                          */
+  /*         CRC computation of a first bytes stream                          */
+  /*                                                                          */
+  /****************************************************************************/
+
+  /* The 7-bit long CRC of a 5-byte buffer is computed. After peripheral initialization,
+     the CRC calculator is initialized with the default value that is 0x7F for
+     a 7-bit CRC.
+
+    The computed CRC is stored in uint32_t uwCRCValue. The 7-bit long CRC is made of
+    uwCRCValue 7 LSB bits. */
+
+  uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)&CRC7_DATA8_TEST5, BUFFER_SIZE_5);
+
+  /* Compare the CRC value to the expected one */
+  if (uwCRCValue != uwExpectedCRCValue_1)
+  {
+    /* Wrong CRC value: Turn LED3 on */
+    Error_Handler();
+  }
+
+
+  /****************************************************************************/
+  /*                                                                          */
+  /*         CRC computation of a second bytes stream                         */
+  /*                                                                          */
+  /****************************************************************************/
+
+  /* The 7-bit long CRC of a 17-byte buffer is computed. The CRC calculator
+    is not re-initialized, instead the previously computed CRC is used
+    as initial value. */
+
+  uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)&CRC7_DATA8_TEST17, BUFFER_SIZE_17);
+
+  /* Compare the CRC value to the expected one */
+  if (uwCRCValue != uwExpectedCRCValue_2)
+  {
+    /* Wrong CRC value: Turn LED3 on */
+    Error_Handler();
+  }
+
+
+  /****************************************************************************/
+  /*                                                                          */
+  /*         CRC computation of a single byte                                 */
+  /*                                                                          */
+  /****************************************************************************/
+
+  /* The 7-bit long CRC of a 1-byte buffer is computed. The CRC calculator
+    is not re-initialized, instead the previously computed CRC is used
+    as initial value. */
+
+  uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)CRC7_DATA8_PTR_TEST1, BUFFER_SIZE_1);
+
+  /* Compare the CRC value to the expected one */
+  if (uwCRCValue != uwExpectedCRCValue_3)
+  {
+    /* Wrong CRC value: Turn LED3 on */
+    Error_Handler();
+  }
+
+
+  /****************************************************************************/
+  /*                                                                          */
+  /*         CRC computation of the last bytes stream                         */
+  /*                                                                          */
+  /****************************************************************************/
+
+  /* The 7-bit long CRC of a 2-byte buffer is computed. The CRC calculator
+    is re-initialized with the default value that is 0x7F for a 7-bit CRC.
+    This is done with a call to HAL_CRC_Calculate() instead of
+    HAL_CRC_Accumulate(). */
+
+  uwCRCValue = HAL_CRC_Calculate(&hcrc, (uint32_t *)CRC7_DATA8_PTR_TEST2, BUFFER_SIZE_2);
+
+  /* Compare the CRC value to the expected one */
+  if (uwCRCValue != uwExpectedCRCValue_4)
+  {
+    /* Wrong CRC value: Turn LED3 on */
+    Error_Handler();
+  }
+  else
+  {
+    /* Right CRC value: Turn LED1 on */
+    BSP_LED_On(LED1);
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
+  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
+  hcrc.Init.GeneratingPolynomial = 101;
+  hcrc.Init.CRCLength = CRC_POLYLENGTH_7B;
+  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..bd4dbf467
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,130 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CRC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief CRC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+  /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+  /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+  /* USER CODE END CRC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..29cb96337
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c
@@ -0,0 +1,120 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt
new file mode 100644
index 000000000..0ee94b476
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt
@@ -0,0 +1,104 @@
+/**
+  @page CRC_Bytes_Stream_7bit_CRC  Bytes Buffers 7-bit CRC Computation Example
+
+  @verbatim
+  ******************************************************************************
+  * @file    CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt
+  * @author  MCD Application Team
+  * @brief   7-bit long CRC computation from bytes (8-bit data) buffers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure the CRC using the HAL API. The CRC (cyclic
+redundancy check) calculation unit computes 7-bit CRC codes derived from buffers
+of 8-bit data (bytes). The user-defined generating polynomial is manually set
+to 0x65, that is, X^7 + X^6 + X^5 + X^2 + 1, as used in the Train Communication
+Network, IEC 60870-5[17].
+
+At the beginning of the main program, the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK).
+
+The CRC peripheral configuration is ensured by HAL_CRC_Init() function.
+The latter is calling HAL_CRC_MspInit() function which core is implementing
+the configuration of the needed CRC resources according to the used hardware (CLOCK).
+You can update HAL_CRC_Init() input parameters to change the CRC configuration.
+
+In this example, the user-defined generating polynomial is configured by
+HAL_CRC_Init(). At the same time, it is set that neither input or output data
+must be reversed, the default init value is used and it is specified that input
+data type is byte.
+
+First, a 5-byte long buffer is processed to yield a first CRC.
+
+Next, a second CRC is computed from a 17-byte long buffer. For the latter,
+the CRC calculator is not re-initialized and instead the previously computed CRC
+is used as initial value.
+
+Then, a third CRC is computed from a 1-byte long buffer. Again, the CRC calculator
+is not re-initialized, the previously computed CRC is used as initial value.
+
+Finally, a fourth CRC is computed from a 2-byte long buffer. This time, the CRC
+calculator is re-initialized with the IP default value that is 0x7F for a 7-bit CRC.
+This is done with a call to HAL_CRC_Calculate() instead of HAL_CRC_Accumulate().
+
+Each time, the calculated CRC code is stored in uwCRCValue variable.
+Once calculated, the CRC value (uwCRCValue) is compared to the CRC expected value (uwExpectedCRCValue_1, 2, 3 or 4).
+
+STM32 board LEDs are used to monitor the example status:
+  - LED1 (GREEN) is ON when the correct CRC value is calculated
+  - LED3 (RED) is ON when there is an error in initialization or if an incorrect CRC value is calculated.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@par Keywords
+
+Security, CRC, CRC Polynomial, IEC 60870-5
+
+@par Directory contents
+
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h                  Header for main.c module
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c          Interrupt handlers
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c                  Main program
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/CRC_Data_Reversing_16bit_CRC.ioc b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/CRC_Data_Reversing_16bit_CRC.ioc
new file mode 100644
index 000000000..dd2de928b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/CRC_Data_Reversing_16bit_CRC.ioc
@@ -0,0 +1,131 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+CRC.CRCLength=CRC_POLYLENGTH_16B
+CRC.DefaultInitValueUse=DEFAULT_INIT_VALUE_DISABLE
+CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_DISABLE
+CRC.GeneratingPolynomial=X12+X5+X0
+CRC.IPParameters=DefaultPolynomialUse,CRCLength,GeneratingPolynomial,DefaultInitValueUse,InitValue,InputDataInversionMode,OutputDataInversionMode,InputDataFormat
+CRC.InitValue=0x5ABE
+CRC.InputDataFormat=CRC_INPUTDATA_FORMAT_BYTES
+CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_WORD
+CRC.OutputDataInversionMode=CRC_OUTPUTDATA_INVERSION_ENABLE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CRC
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CRC_VS_CRC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CRC_Data_Reversing_16bit_CRC.ioc
+ProjectManager.ProjectName=CRC_Data_Reversing_16bit_CRC
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_CRC_Init-CRC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CRC_VS_CRC.Mode=CRC_Activate
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CRC_Data_Reversing_16bit_CRC
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewd b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewd
new file mode 100644
index 000000000..f2d300a23
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>CRC_Data_Reversing_16bit_CRC</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewp b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewp
new file mode 100644
index 000000000..767ba9afd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>CRC_Data_Reversing_16bit_CRC</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>CRC_Data_Reversing_16bit_CRC/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>CRC_Data_Reversing_16bit_CRC/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>CRC_Data_Reversing_16bit_CRC/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
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+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/Project.eww
new file mode 100644
index 000000000..331d40ecb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\CRC_Data_Reversing_16bit_CRC.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h
new file mode 100644
index 000000000..b5296adb7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..4a7e0a82a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..bbb84344f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvoptx
new file mode 100644
index 000000000..1c4fd1318
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvoptx
@@ -0,0 +1,657 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>CRC_Data_Reversing_16bit_CRC</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvprojx
new file mode 100644
index 000000000..663799ff6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvprojx
@@ -0,0 +1,602 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>CRC_Data_Reversing_16bit_CRC</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+          <Vendor>STMicroelectronics</Vendor>
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+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <StartupFile></StartupFile>
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+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
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+          <SLE66AMisc></SLE66AMisc>
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+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="CRC_Data_Reversing_16bit_CRC"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..5b30b7b49
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.806617609">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.806617609" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.806617609" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.806617609." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1433744950" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1901922312" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.567756036" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1005725285" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1527306319" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1384719970" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1638656020" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.341872902" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1034630586" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1607165208" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.94358272" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="CRC_Data_Reversing_16bit_CRC.null.141970038" name="CRC_Data_Reversing_16bit_CRC"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.806617609;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.806617609.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1698986063;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.539343400">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1349379252;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1349379252.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.832216957;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.595120842">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/.project
new file mode 100644
index 000000000..98158806c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CRC_Data_Reversing_16bit_CRC</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>CRC_Data_Reversing_16bit_CRC.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/CRC_Data_Reversing_16bit_CRC.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/main.c
new file mode 100644
index 000000000..33674350a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/main.c
@@ -0,0 +1,348 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Data_Reversing_16bit_CRC/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the STM32G4xx CRC HAL API
+  *          to compute a 16-bit CRC code from a data bytes (8-bit data) buffer,
+  *          based on a user-defined generating polynomial and initialization
+  *          value, with input and output data reversing features enabled.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define BUFFER_SIZE  9  /* Input buffer CRC16_DATA8[] is 9-byte long */
+
+/* User-defined polynomial */
+#define CRC_POLYNOMIAL_16B  0x1021  /* X^16 + X^12 + X^5 + 1, CRC-CCITT generating polynomial */
+
+/* User-defined CRC init value */
+/* As the CRC is 16-bit long, the init value is 16-bit long as well */
+#define CRC_INIT_VALUE      0x5ABE
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+/* USER CODE BEGIN PV */
+
+/* Used for storing CRC Value */
+__IO uint32_t uwCRCValue = 0;
+
+/* Input data buffer */
+static const uint8_t CRC16_DATA8[BUFFER_SIZE] = {0x4D, 0x3C, 0x2B, 0x1A,
+                                                 0xBE, 0x71, 0xC9, 0x8A,
+                                                 0x5E};
+
+/* Check input data buffer, used to verify data reversal options */
+static const uint8_t CRC16_DATA8_CHECK[BUFFER_SIZE] = {0x58, 0xD4, 0x3C, 0xB2,
+                                                       0x51, 0x93, 0x8E, 0x7D,
+                                                       0x7A};
+
+/* Expected CRC value yielded by CRC16_DATA8[] input buffer
+   with output data reversal feature disabled (default)
+   The 16 LSB bits are the 16-bit long CRC. */
+uint32_t uwExpectedCRCValue = 0x0000C20A;
+/* Expected CRC value yielded by CRC16_DATA8[] input buffer
+   with output data reversal feature enabled.
+   The 16 LSB bits are the 16-bit long CRC. */
+uint32_t uwExpectedCRCValue_reversed;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_CRC_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_CRC_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /* The bit reversal is done on a full word basis.
+
+     The input stream yielded by CRC16_DATA8[] is the sequence of
+     bytes 0x4D, 0x3C, 0x2B, 0x1A, 0xBE, 0x71, ...
+     meaning that the first word written in the CRC DR register is
+      0x4D3C2B1A.
+
+     Bit reversal done by the hardware on the full word leads to the actual
+     CRC processing of
+      0x58D43CB2.
+
+     Similarly, the second word written in the peripheral is 0xBE71C98A, leading to
+     the processing of 0x51938E7D after hardware input data reversal.
+
+     Note that when the software writes less than a word in the peripheral (to minimize the
+     number of write accesses for a given number of bytes), the bit-reversal operation
+     is carried out only on the inputted data.
+     Therefore, the last written data is the last byte 0x5E, processed as 0x7A
+     by the hardware after bit-reversal to wrap-up the CRC computation.
+
+     This means that the field InputDataInversionMode set to CRC_INPUTDATA_INVERSION_WORD
+     applied to {0x4D, 0x3C, 0x2B, 0x1A, 0xBE, 0x71, 0xC9, 0x8A, 0x5E}
+     yields the same result as InputDataInversionMode set to CRC_INPUTDATA_INVERSION_NONE
+     applied to {0x58, 0xD4, 0x3C, 0xB2, 0x51, 0x93, 0x8E, 0x7D, 0x7A}.
+
+  */
+
+  /****************************************************************************/
+  /*                                                                          */
+  /*                      CRC computation                                     */
+  /*                                                                          */
+  /****************************************************************************/
+
+  /* The 16-bit long CRC of the 9-byte buffer is computed. After peripheral initialization,
+     the CRC calculator is initialized with the user-defined value that is 0x5ABE.
+
+    The computed CRC is stored in uint32_t uwCRCValue. The 16-bit long CRC is made of
+    uwCRCValue 16 LSB bits. */
+
+  uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)&CRC16_DATA8, BUFFER_SIZE);
+
+  /* Compare the CRC value to the expected one (reversed) */
+  uwExpectedCRCValue_reversed = (__RBIT(uwExpectedCRCValue) >> 16);
+  if (uwCRCValue != uwExpectedCRCValue_reversed)
+  {
+    /* Wrong CRC value: Turn LED3 on */
+    Error_Handler();
+  }
+
+
+
+  /****************************************************************************/
+  /*                                                                          */
+  /*         CRC computation with reversal options disabled                   */
+  /*                                                                          */
+  /****************************************************************************/
+
+  /* Next, the input and output data inversion features are disabled and
+     it is verified that the input data CRC16_DATA8_CHECK[] which is defined with
+     a different endianness scheme yields the same CRC.
+
+     As explained above, CRC16_DATA8_CHECK is obtained from CRC16_DATA8
+     by a bit-reversal operation carried out on full word and vice versa. */
+
+
+  /* Reversal options are disabled */
+  hcrc.Init.InputDataInversionMode  = CRC_INPUTDATA_INVERSION_NONE;
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+
+   /* Peripheral re-initialization. The CRC calculator is initialized again with
+     the user-defined value that is 0x5ABE. */
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+
+  /*  The newly computed CRC is stored in uint32_t uwCRCValue. */
+  uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)&CRC16_DATA8_CHECK, BUFFER_SIZE);
+
+
+  /* Compare the new CRC value to the expected one, taking into account the
+     output data reversal feature is disabled. */
+  if (uwCRCValue != uwExpectedCRCValue)
+  {
+    /* Wrong CRC value: Turn LED3 on */
+    Error_Handler();
+  }
+  else
+  {
+    /* Right CRC value: Turn LED1 on */
+    BSP_LED_On(LED1);
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
+  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
+  hcrc.Init.GeneratingPolynomial = 4129;
+  hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
+  hcrc.Init.InitValue = 0x5ABE;
+  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_WORD;
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
+  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..596806fb2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,130 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CRC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief CRC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+  /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+  /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+  /* USER CODE END CRC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..7df9cad47
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_it.c
@@ -0,0 +1,119 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/readme.txt
new file mode 100644
index 000000000..0e4e3d2ef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/readme.txt
@@ -0,0 +1,107 @@
+/**
+  @page CRC_Data_Reversing_16bit_CRC 16-bit CRC Computation With Data Reversal Options Enabled Example
+
+  @verbatim
+  ******************************************************************************
+  * @file    CRC/CRC_Data_Reversing_16bit_CRC/readme.txt
+  * @author  MCD Application Team
+  * @brief   16-bit long CRC computation with data reversal options enabled.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure the CRC using the HAL API. The CRC (cyclic
+redundancy check) calculation unit computes a 16-bit CRC code derived from a
+buffer of 8-bit data (bytes). Input and output data reversal features are
+enabled. The user-defined generating polynomial is manually set to 0x1021,
+that is, X^16 + X^12 + X^5 + 1 which is the CRC-CCITT generating polynomial.
+
+At the beginning of the main program, the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK).
+
+The CRC peripheral configuration is ensured by HAL_CRC_Init() function.
+The latter is calling HAL_CRC_MspInit() function which core is implementing
+the configuration of the needed CRC resources according to the used hardware (CLOCK).
+You can update HAL_CRC_Init() input parameters to change the CRC configuration.
+
+In this example, the user-defined generating polynomial is configured by
+HAL_CRC_Init(). At the same time, input data reversal feature is set to bit
+reversal on full word.
+Output data reversal is enabled as well (only bit-level reversal option is available).
+Additionally, the default init value is discarded and a user-defined one is used
+instead.
+It is specified finally that input data type is byte.
+
+The 16-bit long CRC is computed, stored in uwCRCValue variable then compared to the
+CRC expected value stored in uwExpectedCRCValue_reversed variable.
+
+
+For clarity's sake, a second CRC computation is then carried out with the input
+and output data reversal options disabled, everything else being equal.
+
+The input buffer used for this second CRC computation is derived from the
+first input buffer by a bit-reversal operation carried out on full word (and vice versa).
+
+It is checked that the same CRC is derived, taking into account that output data
+reversal feature is disabled (i.e. the newly computed 16-bit CRC is equal to the
+expected without reversal, whose value is stored in uwExpectedCRCValue variable).
+
+
+
+STM32 board LEDs are used to monitor the example status:
+  - LED1 (GREEN) is ON when the correct CRC value is calculated
+  - LED3 (RED) is ON when there is an error in initialization or if an incorrect CRC value is calculated.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@par Keywords
+
+Security, CRC, CRC Polynomial, IEC 60870-5, Data reversing
+
+@par Directory contents
+
+  - CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h                  Header for main.c module
+  - CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_it.c          Interrupt handlers
+  - CRC/CRC_Data_Reversing_16bit_CRC/Src/main.c                  Main program
+  - CRC/CRC_Data_Reversing_16bit_CRC/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - CRC/CRC_Data_Reversing_16bit_CRC/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/CRC_Example.ioc b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/CRC_Example.ioc
new file mode 100644
index 000000000..c1eed3e8a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/CRC_Example.ioc
@@ -0,0 +1,128 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+CRC.DefaultInitValueUse=DEFAULT_INIT_VALUE_ENABLE
+CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_ENABLE
+CRC.IPParameters=DefaultPolynomialUse,DefaultInitValueUse,InputDataInversionMode,OutputDataInversionMode,InputDataFormat
+CRC.InputDataFormat=CRC_INPUTDATA_FORMAT_WORDS
+CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_NONE
+CRC.OutputDataInversionMode=CRC_OUTPUTDATA_INVERSION_DISABLE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CRC
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CRC_VS_CRC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CRC_Example.ioc
+ProjectManager.ProjectName=CRC_Example
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_CRC_Init-CRC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CRC_VS_CRC.Mode=CRC_Activate
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CRC_Example
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/CRC_Example.ewd b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/CRC_Example.ewd
new file mode 100644
index 000000000..2fb72f988
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/CRC_Example.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>CRC_Example</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/CRC_Example.ewp b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/CRC_Example.ewp
new file mode 100644
index 000000000..2aa832cd5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/CRC_Example.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>CRC_Example</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>CRC_Example/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>CRC_Example/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>CRC_Example/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
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+          <name>GBECoreSlave</name>
+          <version>26</version>
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+          <name>OGUseCmsisDspLib</name>
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+          <name>GRuntimeLibThreads</name>
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+          <name>CoreVariant</name>
+          <version>26</version>
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+          <name>GFPUDeviceSlave</name>
+          <state></state>
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+          <name>NrRegs</name>
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+          <state>1</state>
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+          <name>NEON</name>
+          <state>0</state>
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+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
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+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
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+        <option>
+          <name>OGLibAdditionalLocale</name>
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+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
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+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
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+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
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+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
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+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
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+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
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+    </settings>
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+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
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+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
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+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
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+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
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+          <name>CCPreprocLine</name>
+          <state>0</state>
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+          <name>CCListCFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
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+          <name>CCListCMessages</name>
+          <state>0</state>
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+          <name>CCListAssFile</name>
+          <state>0</state>
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+          <name>CCListAssSource</name>
+          <state>0</state>
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+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
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+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
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+          <name>CCDiagRemark</name>
+          <state></state>
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+          <name>CCDiagWarning</name>
+          <state></state>
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+          <name>CCDiagError</name>
+          <state></state>
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+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
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+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
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+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
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+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
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+          <name>IExtraOptions</name>
+          <state></state>
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+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
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+          <name>CCRequirePrototypes</name>
+          <state>0</state>
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+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
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+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
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+          <name>IFpuProcessor</name>
+          <state>1</state>
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+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
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+        <option>
+          <name>PreInclude</name>
+          <state></state>
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+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
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+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
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+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
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+          <state>0</state>
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+          <name>CCCodeSection</name>
+          <state>.text</state>
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+          <name>IProcessorMode2</name>
+          <state>1</state>
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+          <name>CCOptLevel</name>
+          <state>3</state>
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+          <name>CCOptStrategy</name>
+          <version>0</version>
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+          <name>CCOptLevelSlave</name>
+          <state>3</state>
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+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
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+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
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+          <name>CCPosIndRopi</name>
+          <state>0</state>
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+          <name>CCPosIndRwpi</name>
+          <state>0</state>
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+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
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+        <option>
+          <name>IccLang</name>
+          <state>0</state>
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+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
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+          <name>IccAllowVLA</name>
+          <state>0</state>
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+          <name>IccStaticDestr</name>
+          <state>0</state>
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+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
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+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
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+          <name>IccFloatSemantics</name>
+          <state>0</state>
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+          <name>CCNoLiteralPool</name>
+          <state>0</state>
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+          <name>CCOptStrategySlave</name>
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+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/Project.eww
new file mode 100644
index 000000000..d699b2b26
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\CRC_Example.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/main.h
new file mode 100644
index 000000000..78169b564
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Example/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..4a7e0a82a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..085d1f4c4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Example/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/CRC_Example.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/CRC_Example.uvoptx
new file mode 100644
index 000000000..d3406fcf3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/CRC_Example.uvoptx
@@ -0,0 +1,640 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>CRC_Example</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
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+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/CRC_Example.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/CRC_Example.uvprojx
new file mode 100644
index 000000000..9f4d7eda1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/CRC_Example.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>CRC_Example</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
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+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
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+          <DBRegisterFilePath></DBRegisterFilePath>
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+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>CRC_Example\Exe\</OutputDirectory>
+          <OutputName>CRC_Example</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
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+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <nStopU1X>0</nStopU1X>
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+          </BeforeCompile>
+          <BeforeMake>
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+            <UserProg1Name></UserProg1Name>
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+          </AfterMake>
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+        </TargetCommonOption>
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+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
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+          <pFcArmRoot></pFcArmRoot>
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+        <TargetArmAds>
+          <ArmAdsMisc>
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+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
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+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="CRC_Example"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..aa881033d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1553114489">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1553114489" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1553114489" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1553114489." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.436860229" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.740331183" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.4860786" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1201177485" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.303734230" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.783009775" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1072662192" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1541067377" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.727008929" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1238497606" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.475178549" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/CRC_Example}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1174798204" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1752002368" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1792973451" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							</tool>
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+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.960132551" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1910087133" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1693603830" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.276928298" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.443781379" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.934029495" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.40960714" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1393213446" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.665971010" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.336388193" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1656125638" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1358794351" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.924458925" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.605174359" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.346525095" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1467680539" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1336751036" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1180599725" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1552366678" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="CRC_Example.null.1078127424" name="CRC_Example"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.260421252;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.260421252.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1707489201;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1693603830">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1553114489;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1553114489.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1792973451;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1348656003">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/.project
new file mode 100644
index 000000000..e91365dd6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CRC_Example</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>CRC_Example.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/CRC_Example.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/main.c
new file mode 100644
index 000000000..9db3a2e4b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/main.c
@@ -0,0 +1,272 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Example/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the STM32G4xx CRC HAL API
+  *          to get a CRC code of a given buffer of data words (32-bit),
+  *          based on a fixed generator polynomial (0x4C11DB7).
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define BUFFER_SIZE    114
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+/* USER CODE BEGIN PV */
+
+/* Used for storing CRC Value */
+__IO uint32_t uwCRCValue = 0;
+
+static const uint32_t aDataBuffer[BUFFER_SIZE] =
+{
+  0x00001021, 0x20423063, 0x408450a5, 0x60c670e7, 0x9129a14a, 0xb16bc18c,
+  0xd1ade1ce, 0xf1ef1231, 0x32732252, 0x52b54294, 0x72f762d6, 0x93398318,
+  0xa35ad3bd, 0xc39cf3ff, 0xe3de2462, 0x34430420, 0x64e674c7, 0x44a45485,
+  0xa56ab54b, 0x85289509, 0xf5cfc5ac, 0xd58d3653, 0x26721611, 0x063076d7,
+  0x569546b4, 0xb75ba77a, 0x97198738, 0xf7dfe7fe, 0xc7bc48c4, 0x58e56886,
+  0x78a70840, 0x18612802, 0xc9ccd9ed, 0xe98ef9af, 0x89489969, 0xa90ab92b,
+  0x4ad47ab7, 0x6a961a71, 0x0a503a33, 0x2a12dbfd, 0xfbbfeb9e, 0x9b798b58,
+  0xbb3bab1a, 0x6ca67c87, 0x5cc52c22, 0x3c030c60, 0x1c41edae, 0xfd8fcdec,
+  0xad2abd0b, 0x8d689d49, 0x7e976eb6, 0x5ed54ef4, 0x2e321e51, 0x0e70ff9f,
+  0xefbedfdd, 0xcffcbf1b, 0x9f598f78, 0x918881a9, 0xb1caa1eb, 0xd10cc12d,
+  0xe16f1080, 0x00a130c2, 0x20e35004, 0x40257046, 0x83b99398, 0xa3fbb3da,
+  0xc33dd31c, 0xe37ff35e, 0x129022f3, 0x32d24235, 0x52146277, 0x7256b5ea,
+  0x95a88589, 0xf56ee54f, 0xd52cc50d, 0x34e224c3, 0x04817466, 0x64475424,
+  0x4405a7db, 0xb7fa8799, 0xe75ff77e, 0xc71dd73c, 0x26d336f2, 0x069116b0,
+  0x76764615, 0x5634d94c, 0xc96df90e, 0xe92f99c8, 0xb98aa9ab, 0x58444865,
+  0x78066827, 0x18c008e1, 0x28a3cb7d, 0xdb5ceb3f, 0xfb1e8bf9, 0x9bd8abbb,
+  0x4a755a54, 0x6a377a16, 0x0af11ad0, 0x2ab33a92, 0xed0fdd6c, 0xcd4dbdaa,
+  0xad8b9de8, 0x8dc97c26, 0x5c644c45, 0x3ca22c83, 0x1ce00cc1, 0xef1fff3e,
+  0xdf7caf9b, 0xbfba8fd9, 0x9ff86e17, 0x7e364e55, 0x2e933eb2, 0x0ed11ef0
+};
+
+/* Expected CRC Value */
+uint32_t uwExpectedCRCValue = 0x379E9F06;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_CRC_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_CRC_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /* Compute the CRC of "aDataBuffer" */
+  uwCRCValue = HAL_CRC_Calculate(&hcrc, (uint32_t *)aDataBuffer, BUFFER_SIZE);
+
+  /* Compare the CRC value to the Expected one */
+  if (uwCRCValue != uwExpectedCRCValue)
+  {
+    /* Wrong CRC value: Turn LED3 on */
+    Error_Handler();
+  }
+  else
+  {
+    /* Right CRC value: Turn LED1 on */
+    BSP_LED_On(LED1);
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
+  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
+  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_WORDS;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..0f7a6f887
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,130 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Example/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CRC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief CRC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+  /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+  /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+  /* USER CODE END CRC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a47006939
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/stm32g4xx_it.c
@@ -0,0 +1,120 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_Example/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/readme.txt
new file mode 100644
index 000000000..21e280b34
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Example/readme.txt
@@ -0,0 +1,86 @@
+/**
+  @page CRC_Example Cyclic Redundancy Check Example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    CRC/CRC_Example/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of Cyclic Redundancy Check Example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+How to configure the CRC using the HAL API. The CRC (cyclic
+redundancy check) calculation unit computes the CRC code of a given buffer of
+32-bit data words, using a fixed generator polynomial (0x4C11DB7).
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+
+The CRC peripheral configuration is ensured by HAL_CRC_Init() function.
+The latter is calling HAL_CRC_MspInit() function which core is implementing
+the configuration of the needed CRC resources according to the used hardware (CLOCK). 
+You can update HAL_CRC_Init() input parameters to change the CRC configuration.
+
+The calculated CRC code is stored in uwCRCValue variable
+and compared with the expected one stored in uwExpectedCRCValue variable.
+
+STM32G474E-EVAL1 Rev B LEDs are used to monitor the example status:
+  - LED1 (GREEN) is ON when a correct CRC value is calculated
+  - LED3 (RED) is ON when an incorrect CRC value is calculated or when there is an initialization error.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@par Keywords
+
+Security, CRC, CRC Polynomial, IEC 60870-5, hardware CRC
+
+@par Directory contents
+
+  - CRC/CRC_Example/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - CRC/CRC_Example/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - CRC/CRC_Example/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - CRC/CRC_Example/Inc/main.h                  Header for main.c module
+  - CRC/CRC_Example/Src/stm32g4xx_it.c          Interrupt handlers
+  - CRC/CRC_Example/Src/main.c                  Main program
+  - CRC/CRC_Example/Src/stm32g4xx_hal_msp.c     HAL MSP module 
+  - CRC/CRC_Example/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+     
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  
+  - This example has been tested with an STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device 
+    and development board.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+ 
+ */
+ 
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/CRC_UserDefinedPolynomial.ioc b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/CRC_UserDefinedPolynomial.ioc
new file mode 100644
index 000000000..acfcc120e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/CRC_UserDefinedPolynomial.ioc
@@ -0,0 +1,130 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+CRC.CRCLength=CRC_POLYLENGTH_8B
+CRC.DefaultInitValueUse=DEFAULT_INIT_VALUE_ENABLE
+CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_DISABLE
+CRC.GeneratingPolynomial=X7+X4+X3+X1+X0
+CRC.IPParameters=DefaultPolynomialUse,CRCLength,GeneratingPolynomial,DefaultInitValueUse,InputDataInversionMode,OutputDataInversionMode,InputDataFormat
+CRC.InputDataFormat=CRC_INPUTDATA_FORMAT_WORDS
+CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_NONE
+CRC.OutputDataInversionMode=CRC_OUTPUTDATA_INVERSION_DISABLE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CRC
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CRC_VS_CRC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CRC_UserDefinedPolynomial.ioc
+ProjectManager.ProjectName=CRC_UserDefinedPolynomial
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_CRC_Init-CRC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CRC_VS_CRC.Mode=CRC_Activate
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CRC_UserDefinedPolynomial
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/CRC_UserDefinedPolynomial.ewd b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/CRC_UserDefinedPolynomial.ewd
new file mode 100644
index 000000000..63c771ac1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/CRC_UserDefinedPolynomial.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>CRC_UserDefinedPolynomial</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/CRC_UserDefinedPolynomial.ewp b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/CRC_UserDefinedPolynomial.ewp
new file mode 100644
index 000000000..6ea9c462e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/CRC_UserDefinedPolynomial.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>CRC_UserDefinedPolynomial</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>CRC_UserDefinedPolynomial/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>CRC_UserDefinedPolynomial/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>CRC_UserDefinedPolynomial/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
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+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
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+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
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+          <name>CCStdIncCheck</name>
+          <state>0</state>
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+          <name>CCCodeSection</name>
+          <state>.text</state>
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+          <name>IProcessorMode2</name>
+          <state>1</state>
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+          <name>CCOptLevel</name>
+          <state>3</state>
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+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
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+          <name>CCPosIndRopi</name>
+          <state>0</state>
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+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
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+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
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+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
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+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
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+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
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+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
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+          <name>CCOptStrategySlave</name>
+          <version>0</version>
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+          <name>CCGuardCalls</name>
+          <state>1</state>
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+          <name>CCEncSource</name>
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+          <name>CCEncOutput</name>
+          <state>0</state>
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+          <name>CCEncOutputBom</name>
+          <state>1</state>
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+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
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+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
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+      </data>
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+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
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+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>AObjPrefix</name>
+          <state>1</state>
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+          <name>AEndian</name>
+          <state>1</state>
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+          <name>ACaseSensitivity</name>
+          <state>1</state>
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+          <name>AWarnWhat</name>
+          <state>0</state>
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+          <name>AWarnOne</name>
+          <state></state>
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+          <name>AWarnRange1</name>
+          <state></state>
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+          <name>AWarnRange2</name>
+          <state></state>
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+          <name>ADebug</name>
+          <state>1</state>
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+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
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+          <name>ADefines</name>
+          <state></state>
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+          <state>0</state>
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+          <state>$FILE_BNAME$.o</state>
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+          <state>100</state>
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+          <state>0</state>
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+          <name>AUserIncludes</name>
+          <state></state>
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+          <name>AExtraOptionsCheckV2</name>
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+        <option>
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+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>OOCOutputFormat</name>
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+          <state>1</state>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>CRC_UserDefinedPolynomial.hex</state>
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+          <state>1</state>
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+          <state>1</state>
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+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
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+        <extensions></extensions>
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+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
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+        <prebuild></prebuild>
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+    </settings>
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+        <version>20</version>
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+          <name>IlinkInputFileSlave</name>
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+          <name>IlinkLogInitialization</name>
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+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
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+          <name>IlinkIcfFileSlave</name>
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+          <state>1</state>
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+          <state>0x11021</state>
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+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
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+          <state>1</state>
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+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
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+        <option>
+          <name>CrcFullSize</name>
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+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
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+          <name>IlinkOptExceptionsForce</name>
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+          <name>IlinkCmsis</name>
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+          <name>IlinkOptMergeDuplSections</name>
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+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
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+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
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+          <name>IlinkLogCallGraph</name>
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+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
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+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/Project.eww
new file mode 100644
index 000000000..783423055
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\CRC_UserDefinedPolynomial.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/main.h
new file mode 100644
index 000000000..0767b95cb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_UserDefinedPolynomial/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..4a7e0a82a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..a242d3c59
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/CRC_UserDefinedPolynomial.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/CRC_UserDefinedPolynomial.uvoptx
new file mode 100644
index 000000000..4f304fecb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/CRC_UserDefinedPolynomial.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>CRC_UserDefinedPolynomial</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
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+      <OPTTT>
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+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
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+      <DebugOpt>
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+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>24</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>25</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash_ramfunc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>26</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_exti.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>27</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>28</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>30</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
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+      <GroupNumber>6</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
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+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/CRC_UserDefinedPolynomial.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/CRC_UserDefinedPolynomial.uvprojx
new file mode 100644
index 000000000..b51f70172
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/CRC_UserDefinedPolynomial.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>CRC_UserDefinedPolynomial</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>CRC_UserDefinedPolynomial\Exe\</OutputDirectory>
+          <OutputName>CRC_UserDefinedPolynomial</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
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+          <Aads>
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+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="CRC_UserDefinedPolynomial"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..da6c441d0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449680672">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449680672" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449680672" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449680672." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1532349935" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
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+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1068502206" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1532254420" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1376845799" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.525831762" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
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+							<builder buildPath="${workspace_loc:/CRC_UserDefinedPolynomial}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1895207955" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.292659970" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.804691480" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1989042323" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.751852075" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
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+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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+	<storageModule moduleId="scannerConfiguration">
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+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.219729104;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.219729104.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.999113921;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.825401886">
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+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/.project
new file mode 100644
index 000000000..8bd4aea53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CRC_UserDefinedPolynomial</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>CRC_UserDefinedPolynomial.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/CRC_UserDefinedPolynomial.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
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+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
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+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/main.c
new file mode 100644
index 000000000..75c80dfff
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/main.c
@@ -0,0 +1,258 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_UserDefinedPolynomial/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the STM32G4xx CRC HAL API
+  *          to compute a CRC code of a given buffer of data words (32-bit),
+  *          based on a user-defined generating polynomial.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* aDataBuffer is 32 bit long*/
+#define BUFFER_SIZE 1
+
+/* The user defined polynomial*/
+#define CRC_POLYNOMIAL_8B 0x9B /* X^8 + X^7 + X^4 + X^3 + X + 1 */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+/* USER CODE BEGIN PV */
+
+/* Used for storing CRC Value */
+__IO uint32_t uwCRCValue = 0;
+
+/* Buffer containing the data on which the CRC will be calculated
+  (one-word buffer in this example) */
+static const uint32_t aDataBuffer = 0x1234;
+
+/* Expected CRC Value */
+uint32_t uwExpectedCRCValue = 0xEF;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_CRC_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_CRC_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /* Compute the CRC of "aDataBuffer" */
+  uwCRCValue = HAL_CRC_Calculate(&hcrc, (uint32_t *)&aDataBuffer, BUFFER_SIZE);
+
+  /* Compare the CRC value to the Expected one */
+  if (uwCRCValue != uwExpectedCRCValue)
+  {
+    /* Wrong CRC value: enter Error_Handler */
+    Error_Handler();
+  }
+  else
+  {
+    /* Right CRC value: Turn LED1 on */
+    BSP_LED_On(LED1);
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
+  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
+  hcrc.Init.GeneratingPolynomial = 155;
+  hcrc.Init.CRCLength = CRC_POLYLENGTH_8B;
+  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_WORDS;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..f94aae869
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,130 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CRC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief CRC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+  /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+  /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+  /* USER CODE END CRC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..42954ca90
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_it.c
@@ -0,0 +1,127 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/readme.txt
new file mode 100644
index 000000000..24a4f8014
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_UserDefinedPolynomial/readme.txt
@@ -0,0 +1,86 @@
+/**
+  @page CRC_UserDefinedPolynomial User-defined generating polynomial CRC Example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    CRC/CRC_UserDefinedPolynomial/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of CRC Example with user-defined generating polynomial.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+How to configure the CRC using the HAL API. The CRC (cyclic
+redundancy check) calculation unit computes the 8-bit CRC code for a given
+buffer of 32-bit data words, based on a user-defined generating polynomial.
+In this example, the polynomial is set manually to 0x9B, that is,
+X^8 + X^7 + X^4 + X^3 + X + 1.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK).
+
+The CRC peripheral configuration is ensured by HAL_CRC_Init() function.
+The latter is calling HAL_CRC_MspInit() function which core is implementing
+the configuration of the needed CRC resources according to the used hardware (CLOCK). 
+You can update HAL_CRC_Init() input parameters to change the CRC configuration.
+
+The calculated CRC code is stored in uwCRCValue variable.
+Once calculated, the CRC value (uwCRCValue) is compared to the CRC expected value (uwExpectedCRCValue).
+
+STM32 board's LEDs are used to monitor the example status:
+  - LED1 (GREEN) is ON when the correct CRC value is calculated
+  - LED3 (RED) is ON when there is an error in initialization or if an incorrect CRC value is calculated.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@par Keywords
+
+Security, CRC, CRC Polynomial, IEC 60870-5, hardware CRC, user-defined generating polynomial
+
+@par Directory contents
+
+  - CRC/CRC_UserDefinedPolynomial/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - CRC/CRC_UserDefinedPolynomial/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - CRC/CRC_UserDefinedPolynomial/Inc/main.h                  Header for main.c module
+  - CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_it.c          Interrupt handlers
+  - CRC/CRC_UserDefinedPolynomial/Src/main.c                  Main program
+  - CRC/CRC_UserDefinedPolynomial/Src/stm32g4xx_hal_msp.c     HAL MSP module 
+  - CRC/CRC_UserDefinedPolynomial/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+     
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+ 
+ */
+ 
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/.extSettings b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/DAC_DualConversion.ioc b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/DAC_DualConversion.ioc
new file mode 100644
index 000000000..f794698a2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/DAC_DualConversion.ioc
@@ -0,0 +1,129 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+DAC1.DAC_Channel-DAC_OUT2=DAC_CHANNEL_2
+DAC1.IPParameters=DAC_Channel-DAC_OUT2
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DAC1
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA4
+Mcu.Pin1=PA5
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA4.Signal=COMP_DAC11_group
+PA5.Signal=COMP_DAC12_group
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=DAC_DualConversion.ioc
+ProjectManager.ProjectName=DAC_DualConversion
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DAC1_Init-DAC1-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1
+SH.COMP_DAC11_group.ConfNb=1
+SH.COMP_DAC12_group.0=DAC1_OUT2,DAC_OUT2
+SH.COMP_DAC12_group.ConfNb=1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=DAC_DualConversion
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/DAC_DualConversion.ewd b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/DAC_DualConversion.ewd
new file mode 100644
index 000000000..79bcc6619
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/DAC_DualConversion.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>DAC_DualConversion</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/DAC_DualConversion.ewp b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/DAC_DualConversion.ewp
new file mode 100644
index 000000000..9275a8d4d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/DAC_DualConversion.ewp
@@ -0,0 +1,1155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>DAC_DualConversion</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>DAC_DualConversion/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>DAC_DualConversion/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>DAC_DualConversion/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>DAC_DualConversion.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
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+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>DAC_DualConversion.out</state>
+        </option>
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+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
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+          <name>IlinkKeepSymbols</name>
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+          <name>IlinkRawBinarySegment</name>
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+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
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+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
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+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/Project.eww
new file mode 100644
index 000000000..0ce54afc5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\DAC_DualConversion.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/main.h
new file mode 100644
index 000000000..1473b161a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/main.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversion/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..272800667
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_DAC_MODULE_ENABLED
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..9c8ead020
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversion/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/DAC_DualConversion.uvoptx b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/DAC_DualConversion.uvoptx
new file mode 100644
index 000000000..b944addf0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/DAC_DualConversion.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>DAC_DualConversion</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
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+  </Group>
+
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+    <GroupName>Application/User</GroupName>
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+      <RteFlg>0</RteFlg>
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+  </Group>
+
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+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/DAC_DualConversion.uvprojx b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/DAC_DualConversion.uvprojx
new file mode 100644
index 000000000..764234a8d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/DAC_DualConversion.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>DAC_DualConversion</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>DAC_DualConversion\Exe\</OutputDirectory>
+          <OutputName>DAC_DualConversion</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
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+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
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+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
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+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
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+                <StartAddress>0x0</StartAddress>
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+              <Ocm3>
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+              <Ocm4>
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+                <StartAddress>0x0</StartAddress>
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+                <StartAddress>0x0</StartAddress>
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+              </Ocm5>
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+                <StartAddress>0x0</StartAddress>
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+              <IRAM>
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+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
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+              <IROM>
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+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
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+              <XRAM>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+              <OCR_RVCT1>
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+                <StartAddress>0x0</StartAddress>
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+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
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+            <Optim>4</Optim>
+            <oTime>0</oTime>
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+            <uThumb>0</uThumb>
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+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
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+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
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+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="DAC_DualConversion"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..8662a3098
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.808513715">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.808513715" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.808513715" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.808513715." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.419726947" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
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+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.933169296" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.631641711" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.855975737" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.397418431" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1673210464" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1093714733" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/DAC_DualConversion}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1642169788" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1761003645" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1819503308" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.548687696" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+								</option>
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+							<builder buildPath="${workspace_loc:/DAC_DualConversion}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1055236814" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1108765013" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
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+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1769327596" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
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+							</tool>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2034908404" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.335890693" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1944944052" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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+							</tool>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.476483877" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1344510951" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.247992715" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.555874638" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.442029902" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1230287499" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1933045286" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="DAC_DualConversion.null.850327793" name="DAC_DualConversion"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.577682890;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.577682890.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1885102865;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1694706110">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.808513715;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.808513715.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1819503308;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2085996515">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/.project
new file mode 100644
index 000000000..af8f1663e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>DAC_DualConversion</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>DAC_DualConversion.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/DAC_DualConversion.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
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+		</link>
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+		</link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/main.c
new file mode 100644
index 000000000..67729bb70
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/main.c
@@ -0,0 +1,336 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversion/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a short description of how to use the DAC
+  *          dual channel mode to generate signal on both DAC channels at
+  *          the same time.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+DAC_HandleTypeDef hdac1;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+uint16_t wave1[4] = {0x000, 0x7FF, 0xFFF, 0x7FF};
+uint16_t wave2[4] = {0x7FF, 0xFFF, 0x7FF, 0x000};
+uint16_t waveIndex = 0;
+
+/* Variable to manage push button on board: interface between ExtLine interruption and main program */
+__IO   uint8_t ubUserButtonClickEvent = RESET;  /* Event detection: Set after User Button interrupt */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DAC1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DAC1_Init();
+  /* USER CODE BEGIN 2 */
+  
+  /* Initialize LED on board */
+  BSP_LED_Init(LED1);
+  
+  /* Configure User push-button in Interrupt mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  
+  /* Set initial DAC values to convert */
+  if (HAL_DACEx_DualSetValue(&hdac1, DAC_ALIGN_12B_R,wave1[waveIndex], wave2[waveIndex]) != HAL_OK)
+  {
+    /* DAC value set error */
+    Error_Handler();
+  }
+  
+  /* Start DAC converters */
+  if (HAL_DACEx_DualStart(&hdac1) != HAL_OK)
+  {
+    /* DAC conversion start error */
+    Error_Handler();
+  }
+  
+  BSP_LED_On(LED1);
+  while (1)
+  {
+    /* Wait for event on push button to perform following actions */
+    while ((ubUserButtonClickEvent) == RESET)
+    {
+    }
+    /* Reset variable for next loop iteration (with debounce) */
+    HAL_Delay(200);
+    ubUserButtonClickEvent = RESET;
+    
+    waveIndex++;
+    if (waveIndex >= sizeof(wave1)/sizeof(wave1[0])) waveIndex = 0;
+    
+    /* Set new DAC values to convert */
+    if (HAL_DACEx_DualSetValue(&hdac1, DAC_ALIGN_12B_R,wave1[waveIndex], wave2[waveIndex]) != HAL_OK)
+    {
+      /* DAC value set error */
+      Error_Handler();
+    }
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief DAC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DAC1_Init(void)
+{
+
+  /* USER CODE BEGIN DAC1_Init 0 */
+
+  /* USER CODE END DAC1_Init 0 */
+
+  DAC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN DAC1_Init 1 */
+
+  /* USER CODE END DAC1_Init 1 */
+
+  /** DAC Initialization
+  */
+  hdac1.Instance = DAC1;
+  if (HAL_DAC_Init(&hdac1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** DAC channel OUT1 config
+  */
+  sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
+  sConfig.DAC_DMADoubleDataMode = DISABLE;
+  sConfig.DAC_SignedFormat = DISABLE;
+  sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
+  sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
+  sConfig.DAC_Trigger2 = DAC_TRIGGER_NONE;
+  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+  sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_EXTERNAL;
+  sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
+  if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** DAC channel OUT2 config
+  */
+  if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DAC1_Init 2 */
+  /** DAC calibration
+  */
+  if (HAL_DACEx_SelfCalibrate(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DACEx_SelfCalibrate(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE END DAC1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/*   USER IRQ HANDLER TREATMENT                                               */
+/******************************************************************************/
+
+/**
+  * @brief EXTI line detection callbacks
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ if (GPIO_Pin == USER_BUTTON_PIN)
+ {
+   /* Set variable to report push button event to main program */
+   ubUserButtonClickEvent = SET;
+ }
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1) 
+  {
+    /* Toggle LED1 */
+    BSP_LED_Off(LED1);
+    HAL_Delay(800);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+    BSP_LED_Off(LED1);
+    HAL_Delay(180);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  Error_Handler();
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..c27c5a22b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,149 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversion/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief DAC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hdac->Instance==DAC1)
+  {
+  /* USER CODE BEGIN DAC1_MspInit 0 */
+
+  /* USER CODE END DAC1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DAC1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**DAC1 GPIO Configuration
+    PA4     ------> DAC1_OUT1
+    PA5     ------> DAC1_OUT2
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN DAC1_MspInit 1 */
+
+  /* USER CODE END DAC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief DAC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
+{
+  if(hdac->Instance==DAC1)
+  {
+  /* USER CODE BEGIN DAC1_MspDeInit 0 */
+
+  /* USER CODE END DAC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DAC1_CLK_DISABLE();
+
+    /**DAC1 GPIO Configuration
+    PA4     ------> DAC1_OUT1
+    PA5     ------> DAC1_OUT2
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5);
+
+  /* USER CODE BEGIN DAC1_MspDeInit 1 */
+
+  /* USER CODE END DAC1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..540d8c3e3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/stm32g4xx_it.c
@@ -0,0 +1,214 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversion/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles external line 4_15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/readme.txt b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/readme.txt
new file mode 100644
index 000000000..8c35ffadf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversion/readme.txt
@@ -0,0 +1,102 @@
+/**
+  @page DAC_DualConversion DAC example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversion/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the DAC_DualConversion example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+Use DAC dual channel mode to generate signal on both DAC channels at the same time.
+
+Example configuration:
+DAC conversions are made as soon as data are written in register through call of
+HAL_DACEx_DualSetValue API.
+
+Example execution:
+At startup, DAC channels are converted as follow:
+- Channel 1: ~0V
+- Channel 2: ~1.65V
+
+Upon each press on User push-button, the data to convert for each DAC channels are
+changed changes to next one in list:
+Configuration #0:
+- Channel 1: ~0V
+- Channel 2: ~1.65V
+Configuration #1:
+- Channel 1: ~1.65V
+- Channel 2: ~3.3V
+Configuration #2:
+- Channel 1: ~3.3V
+- Channel 2: ~1.65V
+Configuration #3:
+- Channel 1: ~1.65V
+- Channel 2: ~0V
+
+Note: when configuration #4 is selected, a press on User push-button returns to initial
+offset configuration. Subsequent presses will allow to go through above configuration again.
+                  
+For debug: variable to monitor with debugger watch window:
+ - "waveIndex": waveIndex is equal to current configuration number
+
+Connection needed:
+Oscilloscope probe need to be connected to PA4 (pin 41 connector CN6)
+and PA5 (pin 40 connector CN6) to observe wave generation effects.
+
+Other peripherals used:
+  1 GPIO for LED
+  2 GPIOs for analog output: PA4 (pin 41 connector CN6) and PA5 (pin 40 connector CN6)
+  1 GPIO for push button
+  
+Board settings:
+
+
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, DAC, Digital to Analog, Single conversion, Timer trigger, DMA, OPAMP
+
+@par Directory contents 
+
+  - DAC/DAC_DualConversion/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - DAC/DAC_DualConversion/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - DAC/DAC_DualConversion/Inc/main.h                        Header for main.c module  
+  - DAC/DAC_DualConversion/Src/stm32g4xx_it.c          Interrupt handlers
+  - DAC/DAC_DualConversion/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - DAC/DAC_DualConversion/Src/main.c                        Main program
+  - DAC/DAC_DualConversion/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/.extSettings b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/DAC_DualConversionFromDMA.ioc b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/DAC_DualConversionFromDMA.ioc
new file mode 100644
index 000000000..077fdfd5d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/DAC_DualConversionFromDMA.ioc
@@ -0,0 +1,165 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+DAC1.DAC_Channel-DAC_OUT2=DAC_CHANNEL_2
+DAC1.DAC_Trigger_OUT1-DAC_OUT1=DAC_TRIGGER_T2_TRGO
+DAC1.DAC_Trigger_OUT2-DAC_OUT2=DAC_TRIGGER_T2_TRGO
+DAC1.IPParameters=DAC_Trigger_OUT1-DAC_OUT1,DAC_Trigger_OUT2-DAC_OUT2,DAC_Channel-DAC_OUT2
+Dma.DAC1_CH1.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.DAC1_CH1.0.EventEnable=DISABLE
+Dma.DAC1_CH1.0.Instance=DMA1_Channel1
+Dma.DAC1_CH1.0.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.DAC1_CH1.0.MemInc=DMA_MINC_ENABLE
+Dma.DAC1_CH1.0.Mode=DMA_CIRCULAR
+Dma.DAC1_CH1.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.DAC1_CH1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.DAC1_CH1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.DAC1_CH1.0.Priority=DMA_PRIORITY_LOW
+Dma.DAC1_CH1.0.RequestNumber=1
+Dma.DAC1_CH1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.DAC1_CH1.0.SignalID=NONE
+Dma.DAC1_CH1.0.SyncEnable=DISABLE
+Dma.DAC1_CH1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.DAC1_CH1.0.SyncRequestNumber=1
+Dma.DAC1_CH1.0.SyncSignalID=NONE
+Dma.Request0=DAC1_CH1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DAC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM2
+Mcu.IPNb=6
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA4
+Mcu.Pin1=PA5
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_TIM2_VS_ClockSourceINT
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA4.Signal=COMP_DAC11_group
+PA5.Signal=COMP_DAC12_group
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=DAC_DualConversionFromDMA.ioc
+ProjectManager.ProjectName=DAC_DualConversionFromDMA
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_DAC1_Init-DAC1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1
+SH.COMP_DAC11_group.ConfNb=1
+SH.COMP_DAC12_group.0=DAC1_OUT2,DAC_OUT2
+SH.COMP_DAC12_group.ConfNb=1
+TIM2.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM2.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM2.CounterMode=TIM_COUNTERMODE_UP
+TIM2.Dithering=Disable
+TIM2.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger
+TIM2.PeriodNoDither=999
+TIM2.Prescaler=149
+TIM2.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM2.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM2_VS_ClockSourceINT.Mode=Internal
+VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=DAC_DualConversionFromDMA
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/DAC_DualConversionFromDMA.ewd b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/DAC_DualConversionFromDMA.ewd
new file mode 100644
index 000000000..24aa19639
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/DAC_DualConversionFromDMA.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>DAC_DualConversionFromDMA</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/DAC_DualConversionFromDMA.ewp b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/DAC_DualConversionFromDMA.ewp
new file mode 100644
index 000000000..c99f22423
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/DAC_DualConversionFromDMA.ewp
@@ -0,0 +1,1155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>DAC_DualConversionFromDMA</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>DAC_DualConversionFromDMA/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>DAC_DualConversionFromDMA/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>DAC_DualConversionFromDMA/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/Project.eww
new file mode 100644
index 000000000..38fd443b8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\DAC_DualConversionFromDMA.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/main.h
new file mode 100644
index 000000000..d5ea0d491
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/main.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversionFromDMA/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..e65b6b371
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_DAC_MODULE_ENABLED
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b3c032d31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/DAC_DualConversionFromDMA.uvoptx b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/DAC_DualConversionFromDMA.uvoptx
new file mode 100644
index 000000000..36e3baf8d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/DAC_DualConversionFromDMA.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>DAC_DualConversionFromDMA</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
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+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <bShared>0</bShared>
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+  </Group>
+
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diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/DAC_DualConversionFromDMA.uvprojx b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/DAC_DualConversionFromDMA.uvprojx
new file mode 100644
index 000000000..941b4e0b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/DAC_DualConversionFromDMA.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>DAC_DualConversionFromDMA</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>DAC_DualConversionFromDMA\Exe\</OutputDirectory>
+          <OutputName>DAC_DualConversionFromDMA</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
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+          </BeforeMake>
+          <AfterMake>
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+          </AfterMake>
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+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
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+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
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+          <IncludeLibraryModules></IncludeLibraryModules>
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+          </OPTHX>
+        </DebugOption>
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+          <Flash1>
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+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
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+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
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+        </Utilities>
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+          <ArmAdsMisc>
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+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
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+            <AdsLszi>1</AdsLszi>
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+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
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+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
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+            <hadXRAM>0</hadXRAM>
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+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
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+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
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+            <uLtcg>0</uLtcg>
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+            <RoSelD>3</RoSelD>
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+                <Size>0x0</Size>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
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+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
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+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
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+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="DAC_DualConversionFromDMA"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..89769b48e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.924283611">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.924283611" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.924283611" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.924283611." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.177976691" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1026635686" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1877247349" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1912806899" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.731843583" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1903468151" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1304053083" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1911598041" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1264580738" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1724435882" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1924102448" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/DAC_DualConversionFromDMA}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1592380499" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1219749083" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.442287186" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.489767907" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1797913512" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1546623315" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.516165932" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1496072480" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
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diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/.project
new file mode 100644
index 000000000..87622bf14
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>DAC_DualConversionFromDMA</name>
+	<comment></comment>
+	<projects>
+	</projects>
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+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
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+	</buildSpec>
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+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>DAC_DualConversionFromDMA.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/DAC_DualConversionFromDMA.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/main.c
new file mode 100644
index 000000000..607e76fe8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/main.c
@@ -0,0 +1,372 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversionFromDMA/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a short description of how to use the DAC
+  *          dual channel mode with DMA to generate signal on both DAC channels
+  *          at the same time.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+DAC_HandleTypeDef hdac1;
+DMA_HandleTypeDef hdma_dac1_ch1;
+
+TIM_HandleTypeDef htim2;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+uint32_t wave[4] = {0x07FF0000, 0x0FFF07FF, 0x07FF0FFF, 0x000007FF};
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_DAC1_Init(void);
+static void MX_TIM2_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_DAC1_Init();
+  MX_TIM2_Init();
+  /* USER CODE BEGIN 2 */
+  
+  /* Initialize LED on board */
+  BSP_LED_Init(LED1);
+  
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  
+  /* Set initial DAC values to convert */
+  if (HAL_DACEx_DualSetValue(&hdac1, DAC_ALIGN_12B_R, 0, 0) != HAL_OK)
+  {
+    /* DAC value set error */
+    Error_Handler();
+  }
+  
+  /* Start Timer trigger */
+  if (HAL_TIM_Base_Start(&htim2) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  
+  /* Start DAC converters */
+  if (HAL_DACEx_DualStart_DMA(&hdac1, DAC_CHANNEL_1, wave, sizeof(wave)/sizeof(wave[0]), DAC_ALIGN_12B_R) != HAL_OK)
+  {
+    /* DAC conversion start error */
+    Error_Handler();
+  }
+  
+  BSP_LED_On(LED1);
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief DAC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DAC1_Init(void)
+{
+
+  /* USER CODE BEGIN DAC1_Init 0 */
+
+  /* USER CODE END DAC1_Init 0 */
+
+  DAC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN DAC1_Init 1 */
+
+  /* USER CODE END DAC1_Init 1 */
+
+  /** DAC Initialization
+  */
+  hdac1.Instance = DAC1;
+  if (HAL_DAC_Init(&hdac1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** DAC channel OUT1 config
+  */
+  sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
+  sConfig.DAC_DMADoubleDataMode = DISABLE;
+  sConfig.DAC_SignedFormat = DISABLE;
+  sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
+  sConfig.DAC_Trigger = DAC_TRIGGER_T2_TRGO;
+  sConfig.DAC_Trigger2 = DAC_TRIGGER_NONE;
+  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+  sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_EXTERNAL;
+  sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
+  if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** DAC channel OUT2 config
+  */
+  if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DAC1_Init 2 */
+  /** DAC calibration
+  */
+  if (HAL_DACEx_SelfCalibrate(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DACEx_SelfCalibrate(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE END DAC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM2_Init(void)
+{
+
+  /* USER CODE BEGIN TIM2_Init 0 */
+
+  /* USER CODE END TIM2_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM2_Init 1 */
+
+  /* USER CODE END TIM2_Init 1 */
+  htim2.Instance = TIM2;
+  htim2.Init.Prescaler = 149;
+  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim2.Init.Period = 999;
+  htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM2_Init 2 */
+
+  /* USER CODE END TIM2_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1) 
+  {
+    /* Toggle LED1 */
+    BSP_LED_Off(LED1);
+    HAL_Delay(800);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+    BSP_LED_Off(LED1);
+    HAL_Delay(180);
+    BSP_LED_On(LED1);
+    HAL_Delay(10);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  Error_Handler();
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..696592690
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,214 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_dac1_ch1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief DAC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hdac->Instance==DAC1)
+  {
+  /* USER CODE BEGIN DAC1_MspInit 0 */
+
+  /* USER CODE END DAC1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DAC1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**DAC1 GPIO Configuration
+    PA4     ------> DAC1_OUT1
+    PA5     ------> DAC1_OUT2
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* DAC1 DMA Init */
+    /* DAC1_CH1 Init */
+    hdma_dac1_ch1.Instance = DMA1_Channel1;
+    hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
+    hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_dac1_ch1.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_dac1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
+    hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_dac1_ch1) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hdac,DMA_Handle1,hdma_dac1_ch1);
+
+  /* USER CODE BEGIN DAC1_MspInit 1 */
+
+  /* USER CODE END DAC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief DAC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
+{
+  if(hdac->Instance==DAC1)
+  {
+  /* USER CODE BEGIN DAC1_MspDeInit 0 */
+
+  /* USER CODE END DAC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DAC1_CLK_DISABLE();
+
+    /**DAC1 GPIO Configuration
+    PA4     ------> DAC1_OUT1
+    PA5     ------> DAC1_OUT2
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5);
+
+    /* DAC1 DMA DeInit */
+    HAL_DMA_DeInit(hdac->DMA_Handle1);
+  /* USER CODE BEGIN DAC1_MspDeInit 1 */
+
+  /* USER CODE END DAC1_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspInit 0 */
+
+  /* USER CODE END TIM2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM2_CLK_ENABLE();
+  /* USER CODE BEGIN TIM2_MspInit 1 */
+
+  /* USER CODE END TIM2_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+  /* USER CODE END TIM2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM2_CLK_DISABLE();
+  /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+  /* USER CODE END TIM2_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..27f6d97e6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_it.c
@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_dac1_ch1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_dac1_ch1);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/readme.txt b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/readme.txt
new file mode 100644
index 000000000..9b17ff101
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_DualConversionFromDMA/readme.txt
@@ -0,0 +1,82 @@
+/**
+  @page DAC_DualConversionFromDMA DAC example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Examples/DAC/DAC_DualConversionFromDMA/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the DAC_DualConversionFromDMA example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+Use DAC dual channel mode with DMA to generate signal on both DAC channels at the same time.
+
+Example configuration:
+DAC conversions are made upon timer trigger and data feed from DMA.
+DAC channel 1 is used to trig DMA feeding. Both DAC channels are triggered by the
+same timer.
+
+Example execution:
+From the start, the timer is configured to trig the DAC channels at about 1kHz.
+DMA is feeding both channel at the time.
+Channel 1 pattern is ~0V/~1.65V/~3.3V/~1.65V
+Channel 2 pattern is ~1.65V/~3.3V/~1.65V/~0V
+
+Connection needed:
+Oscilloscope probe need to be connected to PA4 (pin 41 connector CN6)
+and PA5 (pin 40 connector CN6) to observe wave generation effects.
+
+Other peripherals used:
+  1 GPIO for LED
+  2 GPIOs for analog output: PA4 (pin 41 connector CN6) and PA5 (pin 40 connector CN6)
+  
+Board settings:
+
+
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, DAC, Digital to Analog, Single conversion, Timer trigger, DMA, OPAMP
+
+@par Directory contents 
+
+  - DAC/DAC_DualConversionFromDMA/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - DAC/DAC_DualConversionFromDMA/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - DAC/DAC_DualConversionFromDMA/Inc/main.h                        Header for main.c module  
+  - DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_it.c          Interrupt handlers
+  - DAC/DAC_DualConversionFromDMA/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - DAC/DAC_DualConversionFromDMA/Src/main.c                        Main program
+  - DAC/DAC_DualConversionFromDMA/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/.extSettings b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/DAC_SignalsGeneration2.ioc b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/DAC_SignalsGeneration2.ioc
new file mode 100644
index 000000000..60dc5eb4b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/DAC_SignalsGeneration2.ioc
@@ -0,0 +1,175 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+DAC1.DAC_Trigger2_OUT1-DAC_OUT1=DAC_TRIGGER_T6_TRGO
+DAC1.DAC_Trigger_OUT1-DAC_OUT1=DAC_TRIGGER_T2_TRGO
+DAC1.IPParameters=DAC_Trigger_OUT1-DAC_OUT1,DAC_Trigger2_OUT1-DAC_OUT1,WaveGeneration_OUT1-DAC_OUT1,PolaritySawtooth-DAC_OUT1,StepDataSawtooth-DAC_OUT1
+DAC1.IPParametersWithoutCheck=StepDataSawtooth-DAC_OUT1
+DAC1.PolaritySawtooth-DAC_OUT1=DAC_SAWTOOTH_POLARITY_INCREMENT
+DAC1.StepDataSawtooth-DAC_OUT1=0x10000/SAWTOOTH_NB_STEPS
+DAC1.WaveGeneration_OUT1-DAC_OUT1=SawtoothWaveGenerate
+Dma.DAC1_CH1.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.DAC1_CH1.0.EventEnable=DISABLE
+Dma.DAC1_CH1.0.Instance=DMA1_Channel1
+Dma.DAC1_CH1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.DAC1_CH1.0.MemInc=DMA_MINC_ENABLE
+Dma.DAC1_CH1.0.Mode=DMA_CIRCULAR
+Dma.DAC1_CH1.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.DAC1_CH1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.DAC1_CH1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.DAC1_CH1.0.Priority=DMA_PRIORITY_LOW
+Dma.DAC1_CH1.0.RequestNumber=1
+Dma.DAC1_CH1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.DAC1_CH1.0.SignalID=NONE
+Dma.DAC1_CH1.0.SyncEnable=DISABLE
+Dma.DAC1_CH1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.DAC1_CH1.0.SyncRequestNumber=1
+Dma.DAC1_CH1.0.SyncSignalID=NONE
+Dma.Request0=DAC1_CH1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DAC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM2
+Mcu.IP6=TIM6
+Mcu.IPNb=7
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA4
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.Pin3=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin4=VP_TIM6_VS_ClockSourceINT
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA4.Signal=COMP_DAC11_group
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=DAC_SignalsGeneration2.ioc
+ProjectManager.ProjectName=DAC_SignalsGeneration2
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_DAC1_Init-DAC1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM6_Init-TIM6-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1
+SH.COMP_DAC11_group.ConfNb=1
+TIM2.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM2.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM2.CounterMode=TIM_COUNTERMODE_UP
+TIM2.Dithering=Disable
+TIM2.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger
+TIM2.PeriodNoDither=999
+TIM2.Prescaler=149
+TIM2.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM2.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+TIM6.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM6.CounterMode=TIM_COUNTERMODE_UP
+TIM6.Dithering=Disable
+TIM6.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,AutoReloadPreload,TIM_MasterOutputTrigger
+TIM6.PeriodNoDither=2499
+TIM6.Prescaler=0
+TIM6.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM2_VS_ClockSourceINT.Mode=Internal
+VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
+VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer
+VP_TIM6_VS_ClockSourceINT.Signal=TIM6_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=DAC_SignalsGeneration2
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/DAC_SignalsGeneration2.ewd b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/DAC_SignalsGeneration2.ewd
new file mode 100644
index 000000000..7cb75440f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/DAC_SignalsGeneration2.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>DAC_SignalsGeneration2</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/DAC_SignalsGeneration2.ewp b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/DAC_SignalsGeneration2.ewp
new file mode 100644
index 000000000..9381f2369
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/DAC_SignalsGeneration2.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>DAC_SignalsGeneration2</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>DAC_SignalsGeneration2/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>DAC_SignalsGeneration2/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>DAC_SignalsGeneration2/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
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+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
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+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
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+          <name>PageLengthCheck</name>
+          <state>0</state>
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+        <option>
+          <name>PageLength</name>
+          <state>80</state>
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+          <name>TabSpacing</name>
+          <state>8</state>
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+        <option>
+          <name>AXRef</name>
+          <state>0</state>
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+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>DAC_SignalsGeneration2.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>DAC_SignalsGeneration2.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/Project.eww
new file mode 100644
index 000000000..de0241b18
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\DAC_SignalsGeneration2.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/main.h
new file mode 100644
index 000000000..5f45633a7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DAC/DAC_SignalsGeneration/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..e65b6b371
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_DAC_MODULE_ENABLED
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..a10f43278
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DAC/DAC_SignalsGeneration/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/DAC_SignalsGeneration2.uvoptx b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/DAC_SignalsGeneration2.uvoptx
new file mode 100644
index 000000000..cbcf5f0cb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/DAC_SignalsGeneration2.uvoptx
@@ -0,0 +1,652 @@
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+      <RteFlg>0</RteFlg>
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+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>25</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash_ramfunc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
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+      <GroupNumber>7</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_exti.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma.c</FilenameWithoutPath>
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+      <bShared>0</bShared>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma_ex.c</FilenameWithoutPath>
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+      <FilenameWithoutPath>stm32g4xx_hal_pwr.c</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+    <File>
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+      <FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
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+  </Group>
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+    <GroupName>Drivers/CMSIS</GroupName>
+    <tvExp>0</tvExp>
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+    <cbSel>0</cbSel>
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+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
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+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/DAC_SignalsGeneration2.uvprojx b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/DAC_SignalsGeneration2.uvprojx
new file mode 100644
index 000000000..998184828
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/DAC_SignalsGeneration2.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>DAC_SignalsGeneration2</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>DAC_SignalsGeneration2\Exe\</OutputDirectory>
+          <OutputName>DAC_SignalsGeneration2</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
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+            <AdsALst>1</AdsALst>
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+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+              <Ocm3>
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+                <StartAddress>0x0</StartAddress>
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+              <Ocm4>
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+                <StartAddress>0x0</StartAddress>
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+              <Ocm5>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+              <Ocm6>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
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+              <IROM>
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+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+              <OCR_RVCT2>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+                <Size>0x0</Size>
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+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
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+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+                <StartAddress>0x0</StartAddress>
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+                <StartAddress>0x0</StartAddress>
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+                <StartAddress>0x20000000</StartAddress>
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+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
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+            <Rwpi>0</Rwpi>
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+            <uThumb>0</uThumb>
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+            <uGnu>0</uGnu>
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+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
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+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
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+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
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+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="DAC_SignalsGeneration2"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..2f9a50749
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.4040400">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.4040400" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.4040400" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.4040400." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.500244357" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.608266985" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.630163550" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1453112220" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1054084401" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1521447832" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1288670638" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1691468573" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.990889866" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/DAC_SignalsGeneration2}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1226407173" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1926985202" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.143137138" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.809359168" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1899423757" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.906955503" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
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+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1341089032" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							<builder buildPath="${workspace_loc:/DAC_SignalsGeneration2}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.557552476" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.316527172" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1462519133" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.254146282" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.480170183" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1690505694" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1506555303" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
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+							</tool>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.727265405" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.705805442" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.522607969" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1568821923" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.766577310" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.680620019" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1316986360" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1075288012" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1906888402" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1857975348" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.689555488" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1629478251" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.547392671" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1451631919" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="DAC_SignalsGeneration2.null.1679232815" name="DAC_SignalsGeneration2"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1098883317;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1098883317.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1462519133;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1572638917">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.4040400;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.4040400.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.143137138;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1541855566">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/.project
new file mode 100644
index 000000000..3d0ec7565
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>DAC_SignalsGeneration2</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>DAC_SignalsGeneration2.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/DAC_SignalsGeneration2.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
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+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
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+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/main.c
new file mode 100644
index 000000000..2e0e86472
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/main.c
@@ -0,0 +1,525 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DAC/DAC_SignalsGeneration/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a short description of how to use the DAC
+  *          peripheral to generate several signals.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+typedef enum
+{
+  DAC_WAVE_SAWTOOTH,
+  DAC_WAVE_SINE
+} t_wavetype;
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define SAWTOOTH_NB_STEPS  60
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+DAC_HandleTypeDef hdac1;
+DMA_HandleTypeDef hdma_dac1_ch1;
+
+TIM_HandleTypeDef htim2;
+TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN PV */
+__IO uint8_t ubKeyPressed = RESET;
+__IO t_wavetype ubSelectedWavesForm = DAC_WAVE_SAWTOOTH;
+
+/* Sine wave values for a complete symbol */
+uint16_t sinewave[60] = {
+0x07ff,0x08cb,0x0994,0x0a5a,0x0b18,0x0bce,0x0c79,0x0d18,0x0da8,0x0e29,0x0e98,0x0ef4,0x0f3e,0x0f72,0x0f92,0x0f9d,
+0x0f92,0x0f72,0x0f3e,0x0ef4,0x0e98,0x0e29,0x0da8,0x0d18,0x0c79,0x0bce,0x0b18,0x0a5a,0x0994,0x08cb,0x07ff,0x0733,
+0x066a,0x05a4,0x04e6,0x0430,0x0385,0x02e6,0x0256,0x01d5,0x0166,0x010a,0x00c0,0x008c,0x006c,0x0061,0x006c,0x008c,
+0x00c0,0x010a,0x0166,0x01d5,0x0256,0x02e6,0x0385,0x0430,0x04e6,0x05a4,0x066a,0x0733};
+
+static DAC_ChannelConfTypeDef sDacConfig = {0};
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_DAC1_Init(void);
+static void MX_TIM2_Init(void);
+static void MX_TIM6_Init(void);
+/* USER CODE BEGIN PFP */
+static void DAC_ChangeWave(t_wavetype wave);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_DAC1_Init();
+  MX_TIM2_Init();
+  MX_TIM6_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+  /* Configure User push-button in Interrupt mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+  
+  /*## Start Time Base triggers ############################################*/
+  /* Enable TIM peripheral counter */
+  if (HAL_TIM_Base_Start(&htim2) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  if (HAL_TIM_Base_Start(&htim6) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  
+  /*## Start DAC conversions ###############################################*/
+  /* Start DAC wave generation */
+  if (HAL_DAC_Start(&hdac1, DAC_CHANNEL_1) != HAL_OK)
+  {
+    /* DAC conversion start error */
+    Error_Handler();
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  BSP_LED_On(LED1);
+  while (1)
+  {
+    /* If the Key is pressed */
+    if (ubKeyPressed != RESET)
+    {
+      /* select waves forms according to the User push-button status */
+      if (ubSelectedWavesForm == DAC_WAVE_SAWTOOTH) ubSelectedWavesForm = DAC_WAVE_SINE;
+      else ubSelectedWavesForm = DAC_WAVE_SAWTOOTH;
+      
+      DAC_ChangeWave(ubSelectedWavesForm);
+
+      ubKeyPressed = RESET;
+    }
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief DAC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DAC1_Init(void)
+{
+
+  /* USER CODE BEGIN DAC1_Init 0 */
+
+  /* USER CODE END DAC1_Init 0 */
+
+  DAC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN DAC1_Init 1 */
+
+  /* USER CODE END DAC1_Init 1 */
+
+  /** DAC Initialization
+  */
+  hdac1.Instance = DAC1;
+  if (HAL_DAC_Init(&hdac1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** DAC channel OUT1 config
+  */
+  sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
+  sConfig.DAC_DMADoubleDataMode = DISABLE;
+  sConfig.DAC_SignedFormat = DISABLE;
+  sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
+  sConfig.DAC_Trigger = DAC_TRIGGER_T2_TRGO;
+  sConfig.DAC_Trigger2 = DAC_TRIGGER_T6_TRGO;
+  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+  sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_EXTERNAL;
+  sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
+  if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Sawtooth wave generation on DAC OUT1
+  */
+  if (HAL_DACEx_SawtoothWaveGenerate(&hdac1, DAC_CHANNEL_1, DAC_SAWTOOTH_POLARITY_INCREMENT, 0, 0x10000/SAWTOOTH_NB_STEPS) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DAC1_Init 2 */
+  if (HAL_DACEx_SelfCalibrate(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* Save DAC configuration to reconfigure it upon needs later */
+  sDacConfig = sConfig;
+  /* USER CODE END DAC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM2_Init(void)
+{
+
+  /* USER CODE BEGIN TIM2_Init 0 */
+
+  /* USER CODE END TIM2_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM2_Init 1 */
+
+  /* USER CODE END TIM2_Init 1 */
+  htim2.Instance = TIM2;
+  htim2.Init.Prescaler = 149;
+  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim2.Init.Period = 999;
+  htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM2_Init 2 */
+
+  /* USER CODE END TIM2_Init 2 */
+
+}
+
+/**
+  * @brief TIM6 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM6_Init(void)
+{
+
+  /* USER CODE BEGIN TIM6_Init 0 */
+
+  /* USER CODE END TIM6_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM6_Init 1 */
+
+  /* USER CODE END TIM6_Init 1 */
+  htim6.Instance = TIM6;
+  htim6.Init.Prescaler = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim6.Init.Period = 2499;
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM6_Init 2 */
+
+  /* USER CODE END TIM6_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+static void DAC_ChangeWave(t_wavetype wave)
+{
+  uint32_t tmp;
+  
+  /* Suspend Time Base triggers */
+  if (HAL_TIM_Base_Stop(&htim2) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  if (HAL_TIM_Base_Stop(&htim6) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  
+  switch(wave)
+  {
+    case DAC_WAVE_SAWTOOTH:
+      if (HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1) != HAL_OK)
+      {
+        /* DAC conversion start error */
+        Error_Handler();
+      }
+      break;
+    case DAC_WAVE_SINE:
+      if (HAL_DAC_Stop(&hdac1, DAC_CHANNEL_1) != HAL_OK)
+      {
+        /* DAC conversion start error */
+        Error_Handler();
+      }
+      break;
+    default:
+      Error_Handler();
+      break;
+  }
+
+  /* Re-configure DAC */
+  tmp = sDacConfig.DAC_Trigger;
+  sDacConfig.DAC_Trigger = sDacConfig.DAC_Trigger2;
+  sDacConfig.DAC_Trigger2 = tmp;
+  if (HAL_DAC_ConfigChannel(&hdac1, &sDacConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  
+  /* Generate new wave */
+  switch(wave)
+  {
+    case DAC_WAVE_SAWTOOTH:
+      if (HAL_DACEx_SawtoothWaveGenerate(&hdac1, DAC_CHANNEL_1, DAC_SAWTOOTH_POLARITY_INCREMENT, 0, 0x10000/SAWTOOTH_NB_STEPS) != HAL_OK)
+      {
+        Error_Handler();
+      }
+      if (HAL_DAC_Start(&hdac1, DAC_CHANNEL_1) != HAL_OK)
+      {
+        /* DAC conversion start error */
+        Error_Handler();
+      }
+      break;
+    case DAC_WAVE_SINE:
+      if (HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1,
+                            (uint32_t *)sinewave,
+                            60,
+                            DAC_ALIGN_12B_R
+                           ) != HAL_OK)
+      {
+        /* DAC conversion start error */
+        Error_Handler();
+      }
+      break;
+    default:
+      Error_Handler();
+      break;
+  }
+  
+  /* Resume Time Base triggers */
+  if (HAL_TIM_Base_Start(&htim2) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+  if (HAL_TIM_Base_Start(&htim6) != HAL_OK)
+  {
+    /* Counter enable error */
+    Error_Handler();
+  }
+}
+
+
+/**
+  * @brief EXTI line detection callbacks
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{ 
+  /* Change the wave */
+  ubKeyPressed = SET;
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Error if LED3 is slowly blinking (1 sec. period) */
+  while(1)
+  {    
+    BSP_LED_Toggle(LED3); 
+    HAL_Delay(1000);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..09da6b8fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,234 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DAC/DAC_SignalsGeneration/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_dac1_ch1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief DAC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hdac->Instance==DAC1)
+  {
+  /* USER CODE BEGIN DAC1_MspInit 0 */
+  
+  /* USER CODE END DAC1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DAC1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**DAC1 GPIO Configuration
+    PA4     ------> DAC1_OUT1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_4;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* DAC1 DMA Init */
+    /* DAC1_CH1 Init */
+    hdma_dac1_ch1.Instance = DMA1_Channel1;
+    hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
+    hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_dac1_ch1.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_dac1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
+    hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_dac1_ch1) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hdac,DMA_Handle1,hdma_dac1_ch1);
+
+  /* USER CODE BEGIN DAC1_MspInit 1 */
+  
+  /* USER CODE END DAC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief DAC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
+{
+  if(hdac->Instance==DAC1)
+  {
+  /* USER CODE BEGIN DAC1_MspDeInit 0 */
+
+  /* USER CODE END DAC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DAC1_CLK_DISABLE();
+
+    /**DAC1 GPIO Configuration
+    PA4     ------> DAC1_OUT1
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4);
+
+    /* DAC1 DMA DeInit */
+    HAL_DMA_DeInit(hdac->DMA_Handle1);
+  /* USER CODE BEGIN DAC1_MspDeInit 1 */
+
+  /* USER CODE END DAC1_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspInit 0 */
+
+  /* USER CODE END TIM2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM2_CLK_ENABLE();
+  /* USER CODE BEGIN TIM2_MspInit 1 */
+
+  /* USER CODE END TIM2_MspInit 1 */
+  }
+  else if(htim_base->Instance==TIM6)
+  {
+  /* USER CODE BEGIN TIM6_MspInit 0 */
+
+  /* USER CODE END TIM6_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM6_CLK_ENABLE();
+  /* USER CODE BEGIN TIM6_MspInit 1 */
+
+  /* USER CODE END TIM6_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+  /* USER CODE END TIM2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM2_CLK_DISABLE();
+  /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+  /* USER CODE END TIM2_MspDeInit 1 */
+  }
+  else if(htim_base->Instance==TIM6)
+  {
+  /* USER CODE BEGIN TIM6_MspDeInit 0 */
+
+  /* USER CODE END TIM6_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM6_CLK_DISABLE();
+  /* USER CODE BEGIN TIM6_MspDeInit 1 */
+
+  /* USER CODE END TIM6_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..32af56e91
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/stm32g4xx_it.c
@@ -0,0 +1,227 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DAC/DAC_SignalsGeneration/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_dac1_ch1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_dac1_ch1);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/readme.txt b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/readme.txt
new file mode 100644
index 000000000..4e14d2096
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DAC/DAC_SignalsGeneration2/readme.txt
@@ -0,0 +1,94 @@
+/**
+  @page DAC_SignalsGeneration2 DAC Signals generation example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    DAC/DAC_SignalsGeneration2/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the DAC Signals generation example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+Use the DAC peripheral to generate several signals using the DMA
+controller and the DAC internal wave generator.
+
+Example configuration:
+
+Example execution:
+Form the start, the internal DAC wave generator is used to generate a Sawtooth wave.
+
+For each press on User push-button, the signal to generate is changed between
+    - Sawtooth waveform, amplitute: ~3V, frequency: ~1kHz.
+    - Sine waveform using DMA transfer, amplitute: ~3V, frequency: ~1kHz.
+
+For debug: variable to monitor with debugger watch window:
+ - "ubSelectedWavesForm": DAC current wave to be generated
+
+Connection needed:
+Oscilloscope probe need to be connected to PA4 (pin 41 connector CN6) to observe waves generation effects.
+
+Other peripherals used:
+  1 GPIO for LED
+  1 GPIO for analog output: PA4 (pin 41 connector CN6)
+  1 GPIO for push button
+  TIMER
+  DMA
+
+STM32G474E-EVAL1 Rev B board's LED can be used to monitor the process status:
+  - LED3 is slowly blinking (1 sec. period) and example is stopped (using infinite loop)
+  when there is an error during process.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Analog, DAC, Signals generation, DMA, Sawtooth, Sine, Waveform
+
+@par Directory contents 
+
+  - DAC/DAC_SignalsGeneration2/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - DAC/DAC_SignalsGeneration/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - DAC/DAC_SignalsGeneration/Inc/stm32g4xx_it.h          DAC interrupt handlers header file
+  - DAC/DAC_SignalsGeneration/Inc/main.h                  Header for main.c module  
+  - DAC/DAC_SignalsGeneration/Src/stm32g4xx_it.c          DAC interrupt handlers
+  - DAC/DAC_SignalsGeneration/Src/main.c                  Main program
+  - DAC/DAC_SignalsGeneration/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - DAC/DAC_SignalsGeneration/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+@par Hardware and Software environment  
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Rev B Set-up :
+      - Use User push-button connected to PC.13.
+      - Use analog output PA4 (pin 41 connector CN6) 
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+  
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/.extSettings b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/DMA_FLASHToRAM.ioc b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/DMA_FLASHToRAM.ioc
new file mode 100644
index 000000000..fe6255c5a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/DMA_FLASHToRAM.ioc
@@ -0,0 +1,139 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.MEMTOMEM.0.Direction=DMA_MEMORY_TO_MEMORY
+Dma.MEMTOMEM.0.EventEnable=DISABLE
+Dma.MEMTOMEM.0.Instance=DMA1_Channel1
+Dma.MEMTOMEM.0.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.MEMTOMEM.0.MemInc=DMA_MINC_ENABLE
+Dma.MEMTOMEM.0.Mode=DMA_NORMAL
+Dma.MEMTOMEM.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.MEMTOMEM.0.PeriphInc=DMA_PINC_ENABLE
+Dma.MEMTOMEM.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.MEMTOMEM.0.Priority=DMA_PRIORITY_LOW
+Dma.MEMTOMEM.0.RequestNumber=1
+Dma.MEMTOMEM.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.MEMTOMEM.0.SignalID=NONE
+Dma.MEMTOMEM.0.SyncEnable=DISABLE
+Dma.MEMTOMEM.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.MEMTOMEM.0.SyncRequestNumber=1
+Dma.MEMTOMEM.0.SyncSignalID=NONE
+Dma.Request0=MEMTOMEM
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DMA
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=DMA_FLASHToRAM.ioc
+ProjectManager.ProjectName=DMA_FLASHToRAM
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_DMA_Init-DMA-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=DMA_FLASHToRAM
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/DMA_FLASHToRAM.ewd b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/DMA_FLASHToRAM.ewd
new file mode 100644
index 000000000..71f8571fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/DMA_FLASHToRAM.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>DMA_FLASHToRAM</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/DMA_FLASHToRAM.ewp b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/DMA_FLASHToRAM.ewp
new file mode 100644
index 000000000..8419dfabd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/DMA_FLASHToRAM.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>DMA_FLASHToRAM</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>DMA_FLASHToRAM/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>DMA_FLASHToRAM/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>DMA_FLASHToRAM/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
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+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/Project.eww
new file mode 100644
index 000000000..d6ac81382
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\DMA_FLASHToRAM.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/main.h
new file mode 100644
index 000000000..cd18aedbc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DMA/DMA_FLASHToRAM/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+#define BUFFER_SIZE 32
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..c26fc7f68
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DMA/DMA_FLASHToRAM/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/DMA_FLASHToRAM.uvoptx b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/DMA_FLASHToRAM.uvoptx
new file mode 100644
index 000000000..cf4a62a3b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/DMA_FLASHToRAM.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>DMA_FLASHToRAM</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/DMA_FLASHToRAM.uvprojx b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/DMA_FLASHToRAM.uvprojx
new file mode 100644
index 000000000..2493cfbbe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/DMA_FLASHToRAM.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>DMA_FLASHToRAM</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
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+          <OutputName>DMA_FLASHToRAM</OutputName>
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+          <SimDlgDll>DCM.DLL</SimDlgDll>
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+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
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+            <RvctStartVector></RvctStartVector>
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+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
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+            <Rwpi>0</Rwpi>
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+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
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+              <FilePath>startup_stm32g474xx.s</FilePath>
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+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
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+              <FilePath>../Src/main.c</FilePath>
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+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
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+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
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+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
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+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
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+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
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+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
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+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
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+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
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+              <FileName>stm32g4xx_hal_i2c.c</FileName>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
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+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
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+              <FileName>stm32g4xx_hal_spi.c</FileName>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
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+          <GroupName>Drivers/CMSIS</GroupName>
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+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
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+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="DMA_FLASHToRAM"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..4d2a6166f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.167757093">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.167757093" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.167757093" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.167757093." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.531664875" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.338105254" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1018515026" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.611818558" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.2072533428" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.467480615" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1119924222" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.437733780" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.678207263" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.800675334" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="DMA_FLASHToRAM.null.873878943" name="DMA_FLASHToRAM"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.529841977;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.529841977.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1098061990;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1217781978">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.167757093;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.167757093.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1353178373;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.834479791">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/.project
new file mode 100644
index 000000000..0ecf3671f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>DMA_FLASHToRAM</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>DMA_FLASHToRAM.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/DMA_FLASHToRAM.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/main.c
new file mode 100644
index 000000000..883aa7dd0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/main.c
@@ -0,0 +1,307 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DMA/DMA_FLASHToRAM/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a description of how to use a DMA channel
+  *          to transfer a word data buffer from FLASH memory to embedded
+  *          SRAM memory through the STM32G4xx HAL API.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+DMA_HandleTypeDef hdma_memtomem_dma1_channel1;
+/* USER CODE BEGIN PV */
+
+static const uint32_t aSRC_Const_Buffer[BUFFER_SIZE] =
+{
+  0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10,
+  0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20,
+  0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30,
+  0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40,
+  0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50,
+  0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60,
+  0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70,
+  0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80
+};
+
+static uint32_t aDST_Buffer[BUFFER_SIZE];
+
+static __IO uint32_t transferErrorDetected;    /* Set to 1 if an error transfer is detected */
+static __IO uint32_t transferCompleteDetected; /* Set to 1 if transfer is correctly completed */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_DMA_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+static void TransferComplete(DMA_HandleTypeDef *hdma_memtomem_dma1_channel1);
+static void TransferError(DMA_HandleTypeDef *hdma_memtomem_dma1_channel1);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+    
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_DMA_Init();
+  /* USER CODE BEGIN 2 */
+  /* Initialize LED1 */
+  BSP_LED_Init(LED1);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  /* Reset transferErrorDetected to 0, it will be set to 1 if a transfer error is detected */
+  transferErrorDetected = 0;
+  /* Reset transferCompleteDetected to 0, it will be set to 1 if a transfer is correctly completed */
+  transferCompleteDetected = 0;
+
+  /* Select Callbacks functions called after Transfer complete and Transfer error */
+  HAL_DMA_RegisterCallback(&hdma_memtomem_dma1_channel1, HAL_DMA_XFER_CPLT_CB_ID, TransferComplete);
+  HAL_DMA_RegisterCallback(&hdma_memtomem_dma1_channel1, HAL_DMA_XFER_ERROR_CB_ID, TransferError);
+  
+  /* Configure the source, destination and buffer size DMA fields and Start DMA Channel/Stream transfer */
+  /* Enable All the DMA interrupts */
+  if (HAL_DMA_Start_IT(&hdma_memtomem_dma1_channel1, (uint32_t)&aSRC_Const_Buffer, (uint32_t)&aDST_Buffer, BUFFER_SIZE) != HAL_OK)
+  {
+    /* Transfer Error */
+    Error_Handler();
+  }
+
+  /* Infinite loop */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    if (transferErrorDetected == 1)
+    {
+      /* Toggle LED1 with a period of 200 ms */
+      BSP_LED_Toggle(LED1);
+      HAL_Delay(200);
+    }
+    if (transferCompleteDetected == 1)
+    {
+      /* Turn LED1 on*/
+      BSP_LED_On(LED1);
+      transferCompleteDetected = 0;
+    }
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * Enable DMA controller clock
+  * Configure DMA for memory to memory transfers
+  *   hdma_memtomem_dma1_channel1
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* Configure DMA request hdma_memtomem_dma1_channel1 on DMA1_Channel1 */
+  hdma_memtomem_dma1_channel1.Instance = DMA1_Channel1;
+  hdma_memtomem_dma1_channel1.Init.Request = DMA_REQUEST_MEM2MEM;
+  hdma_memtomem_dma1_channel1.Init.Direction = DMA_MEMORY_TO_MEMORY;
+  hdma_memtomem_dma1_channel1.Init.PeriphInc = DMA_PINC_ENABLE;
+  hdma_memtomem_dma1_channel1.Init.MemInc = DMA_MINC_ENABLE;
+  hdma_memtomem_dma1_channel1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+  hdma_memtomem_dma1_channel1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+  hdma_memtomem_dma1_channel1.Init.Mode = DMA_NORMAL;
+  hdma_memtomem_dma1_channel1.Init.Priority = DMA_PRIORITY_LOW;
+  if (HAL_DMA_Init(&hdma_memtomem_dma1_channel1) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  DMA conversion complete callback
+  * @note   This function is executed when the transfer complete interrupt
+  *         is generated
+  * @retval None
+  */
+static void TransferComplete(DMA_HandleTypeDef *hdma_memtomem_dma1_channel1)
+{
+  transferCompleteDetected = 1;
+}
+
+/**
+  * @brief  DMA conversion error callback
+  * @note   This function is executed when the transfer error interrupt
+  *         is generated during DMA transfer
+  * @retval None
+  */
+static void TransferError(DMA_HandleTypeDef *hdma_memtomem_dma1_channel1)
+{
+  transferErrorDetected = 1;
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  while (1)
+  {
+    /* Toggle LED1 with a period of 1 s */
+    BSP_LED_Toggle(LED1);
+    HAL_Delay(1000);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..b93b788a4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DMA/DMA_FLASHToRAM/Inc/stm32g4xx_hal_msp.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..fde3a352f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/stm32g4xx_it.c
@@ -0,0 +1,132 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    DMA/DMA_FLASHToRAM/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_memtomem_dma1_channel1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_memtomem_dma1_channel1);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/readme.txt b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/readme.txt
new file mode 100644
index 000000000..4d68b1879
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/DMA/DMA_FLASHToRAM/readme.txt
@@ -0,0 +1,91 @@
+/**
+  @page DMA_FLASHToRAM DMA FLASH To RAM Example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    DMA/DMA_FLASHToRAM/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the DMA FLASH to RAM example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+How to use a DMA to transfer a word data buffer from Flash memory to embedded 
+SRAM through the HAL API.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+
+DMA1_Channel1 is configured to transfer the contents of a 32-word data 
+buffer stored in Flash memory to the reception buffer declared in RAM.
+
+The start of transfer is triggered by software. DMA1_Channel1 memory-to-memory
+transfer is enabled. Source and destination addresses incrementing is also enabled.
+The transfer is started by setting the channel enable bit for DMA1_Channel1.
+At the end of the transfer a Transfer Complete interrupt is generated since it
+is enabled and the callback function (customized by user) is called.
+
+STM32G474E-EVAL1 Rev B board's LEDs can be used to monitor the transfer status:
+ - LED1 is ON when the transfer is complete (into the Transfer Complete interrupt
+   routine).
+ - LED1 is toggled with a period of 200 ms when there is a transfer error 
+ - LED1 is toggled with a period of 1000 ms when Error_Handler() is called
+ 
+It is possible to select a different channel for the DMA transfer
+example by modifying defines values in the file main.h.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+System, DMA, Data Transfer, Memory to memory, Stream, Flash, RAM
+
+@par Directory contents 
+
+  - DMA/DMA_FLASHToRAM/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - DMA/DMA_FLASHToRAM/Src/system_stm32g4xx.c           stm32g4xx system source file
+  - DMA/DMA_FLASHToRAM/Src/stm32g4xx_it.c               Interrupt handlers
+  - DMA/DMA_FLASHToRAM/Src/main.c                             Main program
+  - DMA/DMA_FLASHToRAM/Inc/stm32g4xx_hal_conf.h         HAL Configuration file
+  - DMA/DMA_FLASHToRAM/Inc/stm32g4xx_it.h               Interrupt handlers header file
+  - DMA/DMA_FLASHToRAM/Inc/main.h                             Main program header file
+  - DMA/DMA_FLASHToRAM/Src/stm32g4xx_hal_msp.c          HAL MSP module
+
+     
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx Devices.
+
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B 
+    board and can be easily tailored to any other supported device 
+    and development board.    
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+   
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/.extSettings b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/FDCAN_Classic_Frame_Networking.ewd b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/FDCAN_Classic_Frame_Networking.ewd
new file mode 100644
index 000000000..16d9f418b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/FDCAN_Classic_Frame_Networking.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FDCAN_Classic_Frame_Networking</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>80.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/FDCAN_Classic_Frame_Networking.ewp b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/FDCAN_Classic_Frame_Networking.ewp
new file mode 100644
index 000000000..d7867c28e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/FDCAN_Classic_Frame_Networking.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FDCAN_Classic_Frame_Networking</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FDCAN_Classic_Frame_Networking/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FDCAN_Classic_Frame_Networking/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FDCAN_Classic_Frame_Networking/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/Project.eww
new file mode 100644
index 000000000..43fc2c267
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FDCAN_Classic_Frame_Networking.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..2937166b0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0xA00;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/FDCAN_Classic_Frame_Networking.ioc b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/FDCAN_Classic_Frame_Networking.ioc
new file mode 100644
index 000000000..c561b6fed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/FDCAN_Classic_Frame_Networking.ioc
@@ -0,0 +1,152 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FDCAN1.AutoRetransmission=ENABLE
+FDCAN1.CalculateBaudRateNominal=1000000
+FDCAN1.CalculateTimeQuantumNominal=12.5
+FDCAN1.ClockDivider=FDCAN_CLOCK_DIV1
+FDCAN1.DataPrescaler=1
+FDCAN1.DataSyncJumpWidth=4
+FDCAN1.DataTimeSeg1=5
+FDCAN1.DataTimeSeg2=4
+FDCAN1.ExtFiltersNbr=0
+FDCAN1.FrameFormat=FDCAN_FRAME_FD_BRS
+FDCAN1.IPParameters=ClockDivider,FrameFormat,Mode,AutoRetransmission,TransmitPause,ProtocolException,NominalPrescaler,NominalSyncJumpWidth,NominalTimeSeg1,NominalTimeSeg2,DataPrescaler,DataSyncJumpWidth,DataTimeSeg1,DataTimeSeg2,StdFiltersNbr,ExtFiltersNbr,TxFifoQueueMode,CalculateTimeQuantumNominal,CalculateBaudRateNominal
+FDCAN1.Mode=FDCAN_MODE_NORMAL
+FDCAN1.NominalPrescaler=1
+FDCAN1.NominalSyncJumpWidth=16
+FDCAN1.NominalTimeSeg1=63
+FDCAN1.NominalTimeSeg2=16
+FDCAN1.ProtocolException=DISABLE
+FDCAN1.StdFiltersNbr=1
+FDCAN1.TransmitPause=ENABLE
+FDCAN1.TxFifoQueueMode=FDCAN_TX_FIFO_OPERATION
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FDCAN1
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PB8-BOOT0
+Mcu.Pin1=PB9
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.FDCAN1_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PB8-BOOT0.GPIOParameters=GPIO_Speed
+PB8-BOOT0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PB8-BOOT0.Locked=true
+PB8-BOOT0.Mode=FDCAN_Activate
+PB8-BOOT0.Signal=FDCAN1_RX
+PB9.GPIOParameters=GPIO_Speed
+PB9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PB9.Locked=true
+PB9.Mode=FDCAN_Activate
+PB9.Signal=FDCAN1_TX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FDCAN_Classic_Frame_Networking.ioc
+ProjectManager.ProjectName=FDCAN_Classic_Frame_Networking
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0xA00
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_FDCAN1_Init-FDCAN1-false-HAL-true
+RCC.ADC12Freq_Value=80000000
+RCC.ADC345Freq_Value=80000000
+RCC.AHBFreq_Value=80000000
+RCC.APB1Freq_Value=80000000
+RCC.APB1TimFreq_Value=80000000
+RCC.APB2Freq_Value=80000000
+RCC.APB2TimFreq_Value=80000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=80000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=80000000
+RCC.FDCANFreq_Value=80000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=80000000
+RCC.HRTIM1Freq_Value=80000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=80000000
+RCC.I2C2Freq_Value=80000000
+RCC.I2C3Freq_Value=80000000
+RCC.I2C4Freq_Value=80000000
+RCC.I2SFreq_Value=80000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=80000000
+RCC.LPUART1Freq_Value=80000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV2
+RCC.PLLN=20
+RCC.PLLPoutputFreq_Value=80000000
+RCC.PLLQoutputFreq_Value=80000000
+RCC.PLLRCLKFreq_Value=80000000
+RCC.PWRFreq_Value=80000000
+RCC.QSPIFreq_Value=80000000
+RCC.RNGFreq_Value=80000000
+RCC.SAI1Freq_Value=80000000
+RCC.SYSCLKFreq_VALUE=80000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=80000000
+RCC.UART5Freq_Value=80000000
+RCC.USART1Freq_Value=80000000
+RCC.USART2Freq_Value=80000000
+RCC.USART3Freq_Value=80000000
+RCC.USBFreq_Value=80000000
+RCC.VCOInputFreq_Value=8000000
+RCC.VCOOutputFreq_Value=160000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=FDCAN_Classic_Frame_Networking
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/main.h
new file mode 100644
index 000000000..f04107857
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Classic_Frame_Networking/Src/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..b0600744c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+#define HAL_FDCAN_MODULE_ENABLED
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..ce457d806
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void FDCAN1_IT0_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/FDCAN_Classic_Frame_Networking.uvoptx b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/FDCAN_Classic_Frame_Networking.uvoptx
new file mode 100644
index 000000000..38dbb1571
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/FDCAN_Classic_Frame_Networking.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FDCAN_Classic_Frame_Networking</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
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+      <RteFlg>0</RteFlg>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/CMSIS</GroupName>
+    <tvExp>0</tvExp>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/system_stm32g4xx.c</PathWithFileName>
+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/FDCAN_Classic_Frame_Networking.uvprojx b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/FDCAN_Classic_Frame_Networking.uvprojx
new file mode 100644
index 000000000..0bd12ef1d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/FDCAN_Classic_Frame_Networking.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FDCAN_Classic_Frame_Networking</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
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+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FDCAN_Classic_Frame_Networking\Exe\</OutputDirectory>
+          <OutputName>FDCAN_Classic_Frame_Networking</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
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+          </AfterMake>
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+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
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+          <UseCPPCompiler>0</UseCPPCompiler>
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+          <IncludeLibraryModules></IncludeLibraryModules>
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+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+        <DebugOption>
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+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
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+            <UseExternalTool>0</UseExternalTool>
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+          </Flash1>
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+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
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+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
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+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
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+          <Files>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
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+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
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+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FDCAN_Classic_Frame_Networking"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..c6e0cbe56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0xA00
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..82142d283
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.193895537">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.193895537" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.193895537" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.193895537." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.998258473" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.888716998" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.994024105" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1396473839" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.478545290" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.415275245" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.429014787" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.278369236" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.448030176" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.794485128" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1668034317" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FDCAN_Classic_Frame_Networking}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1989736886" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.979426584" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.302017304" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1196951142" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.756048509" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.642738701" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.582050275" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.2002423456" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.123184682" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1451123691" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1504666054" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1494599681" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1218182808" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1345581092" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2082312695" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.2048402975" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.448047353" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.2128647437" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.827979953" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.184345746">
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1671205571" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.174240744" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.328887829" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1683489254" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.954339247" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.14907566" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1764090124" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.475098673" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.2102774218" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.289622694" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.274403762" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.119458170" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1449938705" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.833577147" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1118370675" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1760906116" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.550852949" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FDCAN_Classic_Frame_Networking.null.1359504773" name="FDCAN_Classic_Frame_Networking"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.193895537;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.193895537.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1196951142;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1748919859">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.184345746;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.184345746.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1581290192;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1671205571">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/.project
new file mode 100644
index 000000000..05ba435b4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FDCAN_Classic_Frame_Networking</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FDCAN_Classic_Frame_Networking.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FDCAN_Classic_Frame_Networking.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_fdcan.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..a3efc4267
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0xa00;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/main.c
new file mode 100644
index 000000000..c7d73616c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/main.c
@@ -0,0 +1,432 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Classic_Frame_Networking/Src/main.c 
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to configure the FDCAN peripheral to
+  *          send and receive Classic CAN frames
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define KEY_PRESSED     GPIO_PIN_RESET
+#define KEY_NOT_PRESSED GPIO_PIN_SET
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+FDCAN_HandleTypeDef hfdcan1;
+
+/* USER CODE BEGIN PV */
+uint8_t ubKeyNumber = 0x0;
+FDCAN_RxHeaderTypeDef RxHeader;
+uint8_t RxData[8];
+FDCAN_TxHeaderTypeDef TxHeader;
+uint8_t TxData[8];
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_FDCAN1_Init(void);
+/* USER CODE BEGIN PFP */
+static void FDCAN_Config(void);
+static void LED_Display(uint8_t LedStatus);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure User push-button in interrupt mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_GPIO);
+
+  /* Configure LED1, LED2, LED3 and LED4 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  BSP_LED_Init(LED3);
+  BSP_LED_Init(LED4);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_FDCAN1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Configure the FDCAN peripheral */
+  FDCAN_Config();
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    while (BSP_PB_GetState(BUTTON_USER) == KEY_PRESSED)
+    {
+      if (ubKeyNumber == 0x4)
+      {
+        ubKeyNumber = 0x00;
+      }
+      else
+      {
+        LED_Display(++ubKeyNumber);
+
+        /* Set the data to be transmitted */
+        TxData[0] = ubKeyNumber;
+        TxData[1] = 0xAD;
+
+        /* Start the Transmission process */
+        if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &TxHeader, TxData) != HAL_OK)
+        {
+          /* Transmission request Error */
+          Error_Handler();
+        }
+        HAL_Delay(10);
+
+        while (BSP_PB_GetState(BUTTON_USER) != KEY_NOT_PRESSED)
+        {
+        }
+      }
+    }
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+  RCC_OscInitStruct.PLL.PLLN = 20;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief FDCAN1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_FDCAN1_Init(void)
+{
+
+  /* USER CODE BEGIN FDCAN1_Init 0 */
+
+  /* USER CODE END FDCAN1_Init 0 */
+
+  /* USER CODE BEGIN FDCAN1_Init 1 */
+
+  /* USER CODE END FDCAN1_Init 1 */
+  hfdcan1.Instance = FDCAN1;
+  hfdcan1.Init.ClockDivider = FDCAN_CLOCK_DIV1;
+  hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS;
+  hfdcan1.Init.Mode = FDCAN_MODE_NORMAL;
+  hfdcan1.Init.AutoRetransmission = ENABLE;
+  hfdcan1.Init.TransmitPause = ENABLE;
+  hfdcan1.Init.ProtocolException = DISABLE;
+  hfdcan1.Init.NominalPrescaler = 1;
+  hfdcan1.Init.NominalSyncJumpWidth = 16;
+  hfdcan1.Init.NominalTimeSeg1 = 63;
+  hfdcan1.Init.NominalTimeSeg2 = 16;
+  hfdcan1.Init.DataPrescaler = 1;
+  hfdcan1.Init.DataSyncJumpWidth = 4;
+  hfdcan1.Init.DataTimeSeg1 = 5;
+  hfdcan1.Init.DataTimeSeg2 = 4;
+  hfdcan1.Init.StdFiltersNbr = 1;
+  hfdcan1.Init.ExtFiltersNbr = 0;
+  hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
+  if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN FDCAN1_Init 2 */
+
+  /* USER CODE END FDCAN1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/**
+  * @brief  Configures the FDCAN.
+  * @param  None
+  * @retval None
+  */
+static void FDCAN_Config(void)
+{
+  FDCAN_FilterTypeDef sFilterConfig;
+
+  /* Configure Rx filter */
+  sFilterConfig.IdType = FDCAN_STANDARD_ID;
+  sFilterConfig.FilterIndex = 0;
+  sFilterConfig.FilterType = FDCAN_FILTER_MASK;
+  sFilterConfig.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
+  sFilterConfig.FilterID1 = 0x321;
+  sFilterConfig.FilterID2 = 0x7FF;
+  if (HAL_FDCAN_ConfigFilter(&hfdcan1, &sFilterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Configure global filter:
+     Filter all remote frames with STD and EXT ID
+     Reject non matching frames with STD ID and EXT ID */
+  if (HAL_FDCAN_ConfigGlobalFilter(&hfdcan1, FDCAN_REJECT, FDCAN_REJECT, FDCAN_FILTER_REMOTE, FDCAN_FILTER_REMOTE) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Start the FDCAN module */
+  if (HAL_FDCAN_Start(&hfdcan1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  if (HAL_FDCAN_ActivateNotification(&hfdcan1, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Prepare Tx Header */
+  TxHeader.Identifier = 0x321;
+  TxHeader.IdType = FDCAN_STANDARD_ID;
+  TxHeader.TxFrameType = FDCAN_DATA_FRAME;
+  TxHeader.DataLength = FDCAN_DLC_BYTES_2;
+  TxHeader.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
+  TxHeader.BitRateSwitch = FDCAN_BRS_OFF;
+  TxHeader.FDFormat = FDCAN_CLASSIC_CAN;
+  TxHeader.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
+  TxHeader.MessageMarker = 0;
+}
+
+/**
+  * @brief  Rx FIFO 0 callback.
+  * @param  hfdcan: pointer to an FDCAN_HandleTypeDef structure that contains
+  *         the configuration information for the specified FDCAN.
+  * @param  RxFifo0ITs: indicates which Rx FIFO 0 interrupts are signalled.
+  *         This parameter can be any combination of @arg FDCAN_Rx_Fifo0_Interrupts.
+  * @retval None
+  */
+void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
+{
+  if((RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) != RESET)
+  {
+    /* Retrieve Rx messages from RX FIFO0 */
+    if (HAL_FDCAN_GetRxMessage(hfdcan, FDCAN_RX_FIFO0, &RxHeader, RxData) != HAL_OK)
+    {
+    Error_Handler();
+    }
+
+    /* Display LEDx */
+    if ((RxHeader.Identifier == 0x321) && (RxHeader.IdType == FDCAN_STANDARD_ID) && (RxHeader.DataLength == FDCAN_DLC_BYTES_2))
+    {
+      LED_Display(RxData[0]);
+      ubKeyNumber = RxData[0];
+    }
+  }
+}
+
+/**
+  * @brief  Turns ON/OFF the dedicated LED.
+  * @param  LedStatus: LED number from 1 to 4
+  * @retval None
+  */
+void LED_Display(uint8_t LedStatus)
+{
+  /* Turn OFF all LEDs */
+  BSP_LED_Off(LED1);
+  BSP_LED_Off(LED2);
+  BSP_LED_Off(LED3);
+  BSP_LED_Off(LED4);
+
+  switch(LedStatus)
+  {
+    case (1):
+      /* Turn ON LED1 */
+      BSP_LED_On(LED1);
+      break;
+
+    case (2):
+      /* Turn ON LED2 */
+      BSP_LED_On(LED2);
+      break;
+
+    case (3):
+      /* Turn ON LED3 */
+      BSP_LED_On(LED3);
+      break;
+
+    case (4):
+      /* Turn ON LED4 */
+      BSP_LED_On(LED4);
+      break;
+
+    default:
+      break;
+  }
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn LED1, LED2, LED3 and LED4 on */
+  BSP_LED_On(LED1);
+  BSP_LED_On(LED2);
+  BSP_LED_On(LED3);
+  BSP_LED_On(LED4);
+
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..39f6c45a0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,167 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief FDCAN MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hfdcan: FDCAN handle pointer
+* @retval None
+*/
+void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hfdcan->Instance==FDCAN1)
+  {
+  /* USER CODE BEGIN FDCAN1_MspInit 0 */
+
+  /* USER CODE END FDCAN1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
+    PeriphClkInit.FdcanClockSelection = RCC_FDCANCLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_FDCAN_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**FDCAN1 GPIO Configuration
+    PB8-BOOT0     ------> FDCAN1_RX
+    PB9     ------> FDCAN1_TX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    /* FDCAN1 interrupt Init */
+    HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn);
+  /* USER CODE BEGIN FDCAN1_MspInit 1 */
+
+  /* USER CODE END FDCAN1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief FDCAN MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hfdcan: FDCAN handle pointer
+* @retval None
+*/
+void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* hfdcan)
+{
+  if(hfdcan->Instance==FDCAN1)
+  {
+  /* USER CODE BEGIN FDCAN1_MspDeInit 0 */
+
+  /* USER CODE END FDCAN1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_FDCAN_CLK_DISABLE();
+
+    /**FDCAN1 GPIO Configuration
+    PB8-BOOT0     ------> FDCAN1_RX
+    PB9     ------> FDCAN1_TX
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
+
+    /* FDCAN1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(FDCAN1_IT0_IRQn);
+  /* USER CODE BEGIN FDCAN1_MspDeInit 1 */
+
+  /* USER CODE END FDCAN1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..8fbb00f4a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_it.c
@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Classic_Frame_Networking/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern FDCAN_HandleTypeDef hfdcan1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles FDCAN1 interrupt 0.
+  */
+void FDCAN1_IT0_IRQHandler(void)
+{
+  /* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */
+
+  /* USER CODE END FDCAN1_IT0_IRQn 0 */
+  HAL_FDCAN_IRQHandler(&hfdcan1);
+  /* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */
+
+  /* USER CODE END FDCAN1_IT0_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/readme.txt b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/readme.txt
new file mode 100644
index 000000000..af62de987
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Classic_Frame_Networking/readme.txt
@@ -0,0 +1,120 @@
+/**
+  @page FDCAN_Classic_Frame_Networking FDCAN Classic Frame Networking example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Classic_Frame_Networking/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the FDCAN_Classic_Frame_Networking ewample.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure the FDCAN peripheral to send and receive Classic CAN frames.
+
+The sent frames are used to control LEDs by pressing User push-button.
+
+The CAN serial communication link is a bus to which a number of units may be
+connected. This number has no theoretical limit. Practically the total number
+of units will be limited by delay times and/or electrical loads on the bus line.
+
+FDCAN peripheral is configured to operate in classic CAN frame mode, with CAN
+Bit Rate of 1 MBit/s.
+
+This program behaves as follows:
+
+  At the beginning of the main program the HAL_Init() function is called to reset
+  all the peripherals, initialize the Flash interface and the systick.
+  The SystemClock_Config() function is used to configure the system clock (SYSCLK)
+  to run at 80 MHz.
+
+  After reset, all LEDs are OFF on the couple of eval boards connected to the CAN bus.
+  By Pressing User push-button: a CAN frame is sent on the CAN bus, to turn
+  ON LED1 and turn OFF all other LEDs on both eval boards.
+  Each time User push-button is pressed again, the LEDn+1 is turned ON, and all
+  other LEDs are turned OFF on both eval boards.
+
+  If at any time of the process an error is encountered, all LEDs are turned ON.
+
+@note Any unit in the CAN bus may play the role of sender (by pressing
+      User push-button) or receiver.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+FDCAN, Networking, Classic, CAN
+
+@par Directory contents
+
+  - FDCAN/FDCAN_Classic_Frame_Networking/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - FDCAN/FDCAN_Loopback/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - FDCAN/FDCAN_Loopback/Inc/stm32g4xx_it.h          Header for stm32g4xx_it.c
+  - FDCAN/FDCAN_Loopback/Inc/main.h                  Header for main.c module
+  - FDCAN/FDCAN_Loopback/Src/stm32g4xx_it.c          Interrupt handlers
+  - FDCAN/FDCAN_Loopback/Src/main.c                  Main program
+  - FDCAN/FDCAN_Loopback/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - FDCAN/FDCAN_Loopback/Src/system_stm32g4xx.c      stm32g4xx system source file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with a couple of STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 set-up:
+    - Jumper JP1 => fitted (on each board)
+    - Jumper JP4 => fitted (on each board)
+    - Connect the 2 points CN12 CAN connector (CAN-H and CAN-L) of the first eval board,
+      to the 2 points CN12 CAN connectors (resp. CAN-H and CAN-L) of the second eval board.
+       _________________________                       _________________________ 
+      |           ______________|                     |______________           |
+      |          |FDCAN1        |                     |        FDCAN1|          |
+      |          |              |                     |              |          |
+      |          |       CAN    |1___________________1|    CAN       |          |
+      |          |    connector |2___________________2| connector    |          |
+      |          |      (CN12)  |                     |   (CN12)     |          |
+      |          |______________|                     |______________|          |
+      |                         |                     |                         |
+      |   _    _    _    _      |                     |   _    _    _    _      |
+      |  |_|  |_|  |_|  |_|     |                     |  |_|  |_|  |_|  |_|     |
+      | LED1 LED2 LED3 LED4     |                     | LED1 LED2 LED3 LED4     |
+      |          _              |                     |          _              |
+      |         (_)             |                     |         (_)             |
+      |         User            |                     |         User            |
+      |                         |                     |                         |
+      |      STM32 Board 1      |                     |      STM32 Board 2      |
+      |                         |                     |                         |
+      |_________________________|                     |_________________________|
+
+  - This example can also be tested by connecting the CAN connector to a different
+    development board (ex: STM32373C-EVAL1...) loaded with the corresponding CAN Networking example.
+    In this case, user must ensure that the CAN bit rate configuration is also equal to 1Mbit/s.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+  - Open your preferred toolchain
+  - Rebuild all files and load your image into target memory
+  - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/.extSettings b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/FDCAN_Loopback.ewd b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/FDCAN_Loopback.ewd
new file mode 100644
index 000000000..f15676981
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/FDCAN_Loopback.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FDCAN_Loopback</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>80.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/FDCAN_Loopback.ewp b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/FDCAN_Loopback.ewp
new file mode 100644
index 000000000..049cbe617
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/FDCAN_Loopback.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FDCAN_Loopback</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FDCAN_Loopback/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FDCAN_Loopback/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FDCAN_Loopback/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>FDCAN_Loopback.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>FDCAN_Loopback.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/Project.eww
new file mode 100644
index 000000000..b3c2c3b64
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FDCAN_Loopback.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/FDCAN_Loopback.ioc b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/FDCAN_Loopback.ioc
new file mode 100644
index 000000000..9b70c3c1f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/FDCAN_Loopback.ioc
@@ -0,0 +1,151 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FDCAN1.AutoRetransmission=ENABLE
+FDCAN1.CalculateBaudRateNominal=1000000
+FDCAN1.CalculateTimeQuantumNominal=12.5
+FDCAN1.ClockDivider=FDCAN_CLOCK_DIV1
+FDCAN1.DataPrescaler=1
+FDCAN1.DataSyncJumpWidth=4
+FDCAN1.DataTimeSeg1=5
+FDCAN1.DataTimeSeg2=4
+FDCAN1.ExtFiltersNbr=1
+FDCAN1.FrameFormat=FDCAN_FRAME_FD_BRS
+FDCAN1.IPParameters=ClockDivider,FrameFormat,Mode,AutoRetransmission,TransmitPause,ProtocolException,NominalPrescaler,NominalSyncJumpWidth,NominalTimeSeg1,NominalTimeSeg2,DataPrescaler,DataSyncJumpWidth,DataTimeSeg1,DataTimeSeg2,StdFiltersNbr,ExtFiltersNbr,TxFifoQueueMode,CalculateTimeQuantumNominal,CalculateBaudRateNominal
+FDCAN1.Mode=FDCAN_MODE_EXTERNAL_LOOPBACK
+FDCAN1.NominalPrescaler=1
+FDCAN1.NominalSyncJumpWidth=16
+FDCAN1.NominalTimeSeg1=63
+FDCAN1.NominalTimeSeg2=16
+FDCAN1.ProtocolException=DISABLE
+FDCAN1.StdFiltersNbr=1
+FDCAN1.TransmitPause=ENABLE
+FDCAN1.TxFifoQueueMode=FDCAN_TX_FIFO_OPERATION
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FDCAN1
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PB8-BOOT0
+Mcu.Pin1=PB9
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PB8-BOOT0.GPIOParameters=GPIO_Speed
+PB8-BOOT0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PB8-BOOT0.Locked=true
+PB8-BOOT0.Mode=FDCAN_Activate
+PB8-BOOT0.Signal=FDCAN1_RX
+PB9.GPIOParameters=GPIO_Speed
+PB9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PB9.Locked=true
+PB9.Mode=FDCAN_Activate
+PB9.Signal=FDCAN1_TX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FDCAN_Loopback.ioc
+ProjectManager.ProjectName=FDCAN_Loopback
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_FDCAN1_Init-FDCAN1-false-HAL-true
+RCC.ADC12Freq_Value=80000000
+RCC.ADC345Freq_Value=80000000
+RCC.AHBFreq_Value=80000000
+RCC.APB1Freq_Value=80000000
+RCC.APB1TimFreq_Value=80000000
+RCC.APB2Freq_Value=80000000
+RCC.APB2TimFreq_Value=80000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=80000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=80000000
+RCC.FDCANFreq_Value=80000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=80000000
+RCC.HRTIM1Freq_Value=80000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=80000000
+RCC.I2C2Freq_Value=80000000
+RCC.I2C3Freq_Value=80000000
+RCC.I2C4Freq_Value=80000000
+RCC.I2SFreq_Value=80000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=80000000
+RCC.LPUART1Freq_Value=80000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV2
+RCC.PLLN=20
+RCC.PLLPoutputFreq_Value=80000000
+RCC.PLLQoutputFreq_Value=80000000
+RCC.PLLRCLKFreq_Value=80000000
+RCC.PWRFreq_Value=80000000
+RCC.QSPIFreq_Value=80000000
+RCC.RNGFreq_Value=80000000
+RCC.SAI1Freq_Value=80000000
+RCC.SYSCLKFreq_VALUE=80000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=80000000
+RCC.UART5Freq_Value=80000000
+RCC.USART1Freq_Value=80000000
+RCC.USART2Freq_Value=80000000
+RCC.USART3Freq_Value=80000000
+RCC.USBFreq_Value=80000000
+RCC.VCOInputFreq_Value=8000000
+RCC.VCOOutputFreq_Value=160000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=FDCAN_Loopback
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/main.h
new file mode 100644
index 000000000..0e52a4a89
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Loopback/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..b0600744c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+#define HAL_FDCAN_MODULE_ENABLED
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b856377a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Loopback/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/FDCAN_Loopback.uvoptx b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/FDCAN_Loopback.uvoptx
new file mode 100644
index 000000000..b5cf32655
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/FDCAN_Loopback.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FDCAN_Loopback</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>4</FileNumber>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_hal_msp.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_msp.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Doc</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>5</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../readme.txt</PathWithFileName>
+      <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+      <PathWithFileName>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</PathWithFileName>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/FDCAN_Loopback.uvprojx b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/FDCAN_Loopback.uvprojx
new file mode 100644
index 000000000..88e31c95d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/FDCAN_Loopback.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FDCAN_Loopback</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FDCAN_Loopback\Exe\</OutputDirectory>
+          <OutputName>FDCAN_Loopback</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
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+            <AdsANot>0</AdsANot>
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+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_fdcan.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FDCAN_Loopback"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..a636867b2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.745469965">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.745469965" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.745469965" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.745469965." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1927538884" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.601716521" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1321233760" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.429679301" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.605895132" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.305811405" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.208457082" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.2056075722" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.699281298" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.826155251" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1931046571" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FDCAN_Loopback}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.600582934" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1321725342" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1572288413" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1907073648" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1448541845" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.748805675" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.324988640" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1345651012" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1573081631" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.543959291" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1488399975" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+							</tool>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1747553170" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.680842870" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.277089343" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1179045823" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1653714643" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
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+				</configuration>
+			</storageModule>
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1076216670." name="/" resourcePath="">
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+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.471103190" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1108962289" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.777187902" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1148459685" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1274812824" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1763017014" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1363489314" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.561261168" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FDCAN_Loopback}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.612833077" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1351228428" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.518271174" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.915915612" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1423994809" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.2142195566" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.88829059" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.656188196" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.586529800" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.642469929" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1844583259" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.285256801" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.196571074" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.97362590" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.2073562563" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.2115348984" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1613439145" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.999734715" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.507467716" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1083875654" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1788469535" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1015032128" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.440825096" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1908389858" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.83425797" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FDCAN_Loopback.null.385947798" name="FDCAN_Loopback"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.745469965;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.745469965.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1448541845;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.543959291">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1076216670;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1076216670.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.915915612;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.586529800">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/.project
new file mode 100644
index 000000000..0ed47f7e3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FDCAN_Loopback</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FDCAN_Loopback.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FDCAN_Loopback.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_fdcan.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/main.c
new file mode 100644
index 000000000..701117dd3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/main.c
@@ -0,0 +1,441 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Loopback/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to configure the FDCAN peripheral to
+  *          operate in loopback mode.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+FDCAN_HandleTypeDef hfdcan1;
+
+/* USER CODE BEGIN PV */
+FDCAN_FilterTypeDef sFilterConfig;
+FDCAN_TxHeaderTypeDef TxHeader;
+FDCAN_RxHeaderTypeDef RxHeader;
+uint8_t TxData0[] = {0x10, 0x32, 0x54, 0x76, 0x98, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
+uint8_t TxData1[] = {0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55};
+uint8_t TxData2[] = {0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00};
+uint8_t RxData[12];
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_FDCAN1_Init(void);
+/* USER CODE BEGIN PFP */
+static uint32_t BufferCmp8b(uint8_t* pBuffer1, uint8_t* pBuffer2, uint16_t BufferLength);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_FDCAN1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /*##-1 Configure the FDCAN filters ########################################*/
+  /* Configure standard ID reception filter to Rx FIFO 0 */
+  sFilterConfig.IdType = FDCAN_STANDARD_ID;
+  sFilterConfig.FilterIndex = 0;
+  sFilterConfig.FilterType = FDCAN_FILTER_DUAL;
+  sFilterConfig.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
+  sFilterConfig.FilterID1 = 0x444;
+  sFilterConfig.FilterID2 = 0x555;
+  if (HAL_FDCAN_ConfigFilter(&hfdcan1, &sFilterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Configure extended ID reception filter to Rx FIFO 1 */
+  sFilterConfig.IdType = FDCAN_EXTENDED_ID;
+  sFilterConfig.FilterIndex = 0;
+  sFilterConfig.FilterType = FDCAN_FILTER_RANGE_NO_EIDM;
+  sFilterConfig.FilterConfig = FDCAN_FILTER_TO_RXFIFO1;
+  sFilterConfig.FilterID1 = 0x1111111;
+  sFilterConfig.FilterID2 = 0x2222222;
+  if (HAL_FDCAN_ConfigFilter(&hfdcan1, &sFilterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Configure global filter:
+     Filter all remote frames with STD and EXT ID
+     Reject non matching frames with STD ID and EXT ID */
+  if (HAL_FDCAN_ConfigGlobalFilter(&hfdcan1, FDCAN_REJECT, FDCAN_REJECT, FDCAN_FILTER_REMOTE, FDCAN_FILTER_REMOTE) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*##-2 Start FDCAN controller (continuous listening CAN bus) ##############*/
+  if (HAL_FDCAN_Start(&hfdcan1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*##-3 Transmit messages ##################################################*/
+  /* Add message to Tx FIFO */
+  TxHeader.Identifier = 0x444;
+  TxHeader.IdType = FDCAN_STANDARD_ID;
+  TxHeader.TxFrameType = FDCAN_DATA_FRAME;
+  TxHeader.DataLength = FDCAN_DLC_BYTES_12;
+  TxHeader.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
+  TxHeader.BitRateSwitch = FDCAN_BRS_ON;
+  TxHeader.FDFormat = FDCAN_FD_CAN;
+  TxHeader.TxEventFifoControl = FDCAN_STORE_TX_EVENTS;
+  TxHeader.MessageMarker = 0x52;
+  if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &TxHeader, TxData0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Add second message to Tx FIFO */
+  TxHeader.Identifier = 0x1111112;
+  TxHeader.IdType = FDCAN_EXTENDED_ID;
+  TxHeader.TxFrameType = FDCAN_DATA_FRAME;
+  TxHeader.DataLength = FDCAN_DLC_BYTES_12;
+  TxHeader.ErrorStateIndicator = FDCAN_ESI_PASSIVE;
+  TxHeader.BitRateSwitch = FDCAN_BRS_ON;
+  TxHeader.FDFormat = FDCAN_FD_CAN;
+  TxHeader.TxEventFifoControl = FDCAN_STORE_TX_EVENTS;
+  TxHeader.MessageMarker = 0xCC;
+  if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &TxHeader, TxData1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Add third message to Tx FIFO */
+  TxHeader.Identifier = 0x1111113;
+  TxHeader.IdType = FDCAN_EXTENDED_ID;
+  TxHeader.TxFrameType = FDCAN_DATA_FRAME;
+  TxHeader.DataLength = FDCAN_DLC_BYTES_12;
+  TxHeader.ErrorStateIndicator = FDCAN_ESI_PASSIVE;
+  TxHeader.BitRateSwitch = FDCAN_BRS_OFF;
+  TxHeader.FDFormat = FDCAN_FD_CAN;
+  TxHeader.TxEventFifoControl = FDCAN_STORE_TX_EVENTS;
+  TxHeader.MessageMarker = 0xDD;
+  if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &TxHeader, TxData2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Wait transmissions complete */
+  while (HAL_FDCAN_GetTxFifoFreeLevel(&hfdcan1) != 3) {}
+
+
+  /*##-4 Receive messages ###################################################*/
+  /* Check one message is received in Rx FIFO 0 */
+  if(HAL_FDCAN_GetRxFifoFillLevel(&hfdcan1, FDCAN_RX_FIFO0) != 1)
+  {
+    Error_Handler();
+  }
+
+  /* Retrieve message from Rx FIFO 0 */
+  if (HAL_FDCAN_GetRxMessage(&hfdcan1, FDCAN_RX_FIFO0, &RxHeader, RxData) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Compare payload to expected data */
+  if (BufferCmp8b(TxData0, RxData, 12) != 0)
+  {
+    Error_Handler();
+  }
+
+  /* Check two messages are received in Rx FIFO 1 */
+  if(HAL_FDCAN_GetRxFifoFillLevel(&hfdcan1, FDCAN_RX_FIFO1) != 2)
+  {
+    Error_Handler();
+  }
+
+  /* Retrieve message from Rx FIFO 1 */
+  if (HAL_FDCAN_GetRxMessage(&hfdcan1, FDCAN_RX_FIFO1, &RxHeader, RxData) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Compare payload to expected data */
+  if (BufferCmp8b(TxData1, RxData, 12) != 0)
+  {
+    Error_Handler();
+  }
+
+  /* Retrieve next message from Rx FIFO 1 */
+  if (HAL_FDCAN_GetRxMessage(&hfdcan1, FDCAN_RX_FIFO1, &RxHeader, RxData) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Compare payload to expected data */
+  if (BufferCmp8b(TxData2, RxData, 12) != 0)
+  {
+    Error_Handler();
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* Toggle LED1 */
+    BSP_LED_Toggle(LED1);
+    HAL_Delay(100);
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+  RCC_OscInitStruct.PLL.PLLN = 20;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief FDCAN1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_FDCAN1_Init(void)
+{
+
+  /* USER CODE BEGIN FDCAN1_Init 0 */
+
+  /* USER CODE END FDCAN1_Init 0 */
+
+  /* USER CODE BEGIN FDCAN1_Init 1 */
+
+  /* USER CODE END FDCAN1_Init 1 */
+  hfdcan1.Instance = FDCAN1;
+  hfdcan1.Init.ClockDivider = FDCAN_CLOCK_DIV1;
+  hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS;
+  hfdcan1.Init.Mode = FDCAN_MODE_EXTERNAL_LOOPBACK;
+  hfdcan1.Init.AutoRetransmission = ENABLE;
+  hfdcan1.Init.TransmitPause = ENABLE;
+  hfdcan1.Init.ProtocolException = DISABLE;
+  hfdcan1.Init.NominalPrescaler = 1;
+  hfdcan1.Init.NominalSyncJumpWidth = 16;
+  hfdcan1.Init.NominalTimeSeg1 = 63;
+  hfdcan1.Init.NominalTimeSeg2 = 16;
+  hfdcan1.Init.DataPrescaler = 1;
+  hfdcan1.Init.DataSyncJumpWidth = 4;
+  hfdcan1.Init.DataTimeSeg1 = 5;
+  hfdcan1.Init.DataTimeSeg2 = 4;
+  hfdcan1.Init.StdFiltersNbr = 1;
+  hfdcan1.Init.ExtFiltersNbr = 1;
+  hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
+  if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN FDCAN1_Init 2 */
+
+  /* USER CODE END FDCAN1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/**
+  * @brief Compares two buffers.
+  * @par Input
+  *  - pBuffer1, pBuffer2: buffers to be compared.
+  *  - BufferLength: buffer's length
+  * @par Output
+  * None.
+  * @retval
+  *   0: pBuffer1 identical to pBuffer2
+  *   1: pBuffer1 differs from pBuffer2
+  */
+static uint32_t BufferCmp8b(uint8_t* pBuffer1, uint8_t* pBuffer2, uint16_t BufferLength)
+{
+  while(BufferLength--)
+  {
+    if(*pBuffer1 != *pBuffer2)
+    {
+      return 1;
+    }
+
+    pBuffer1++;
+    pBuffer2++;
+  }
+  return 0;
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..8a88bfd70
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,162 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Loopback/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief FDCAN MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hfdcan: FDCAN handle pointer
+* @retval None
+*/
+void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hfdcan->Instance==FDCAN1)
+  {
+  /* USER CODE BEGIN FDCAN1_MspInit 0 */
+
+  /* USER CODE END FDCAN1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
+    PeriphClkInit.FdcanClockSelection = RCC_FDCANCLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_FDCAN_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**FDCAN1 GPIO Configuration
+    PB8-BOOT0     ------> FDCAN1_RX
+    PB9     ------> FDCAN1_TX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN FDCAN1_MspInit 1 */
+
+  /* USER CODE END FDCAN1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief FDCAN MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hfdcan: FDCAN handle pointer
+* @retval None
+*/
+void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* hfdcan)
+{
+  if(hfdcan->Instance==FDCAN1)
+  {
+  /* USER CODE BEGIN FDCAN1_MspDeInit 0 */
+
+  /* USER CODE END FDCAN1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_FDCAN_CLK_DISABLE();
+
+    /**FDCAN1 GPIO Configuration
+    PB8-BOOT0     ------> FDCAN1_RX
+    PB9     ------> FDCAN1_TX
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
+
+  /* USER CODE BEGIN FDCAN1_MspDeInit 1 */
+
+  /* USER CODE END FDCAN1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..15db14d9b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/stm32g4xx_it.c
@@ -0,0 +1,205 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Loopback/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/readme.txt b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/readme.txt
new file mode 100644
index 000000000..13407c796
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FDCAN/FDCAN_Loopback/readme.txt
@@ -0,0 +1,89 @@
+/**
+  @page FDCAN_Loopback FDCAN Loopback example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FDCAN/FDCAN_Loopback/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FDCAN_Loopback example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure the FDCAN to operate in loopback mode.
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+The SystemClock_Config() function is used to configure the system clock (SYSCLK)
+to run at 80 MHz.
+
+Then:
+  - FDCAN module is configured to operate in external loopback mode,
+    with Nominal Bit Rate of 1 MBit/s and Data Bit Rate of 8 MBit/s.
+  - FDCAN module is configured to receive:
+     - messages with pre-defined standard ID to Rx FIFO 0
+     - messages with pre-defined extended ID to Rx FIFO 1
+  - FDCAN module is started.
+  - The following messages are then sent:
+     - one standard ID message matching Rx FIFO 0 filter
+     - two extended ID messages matching Rx FIFO 1 filter
+
+Main program checks that the three messages are received as expected
+If the result is OK, LED1 start blinking
+If the messages are not correctly received, or if at any time of the process an error is encountered,
+LED3 is turned ON.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+FDCAN, Loopback, Polling
+
+@par Directory contents
+
+  - FDCAN/FDCAN_Loopback/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - FDCAN/FDCAN_Loopback/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - FDCAN/FDCAN_Loopback/Inc/stm32g4xx_it.h          Header for stm32g4xx_it.c
+  - FDCAN/FDCAN_Loopback/Inc/main.h                  Header for main.c module
+  - FDCAN/FDCAN_Loopback/Src/stm32g4xx_it.c          Interrupt handlers
+  - FDCAN/FDCAN_Loopback/Src/main.c                  Main program
+  - FDCAN/FDCAN_Loopback/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - FDCAN/FDCAN_Loopback/Src/system_stm32g4xx.c      stm32g4xx system source file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with an STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 set-up
+    - Jumper JP1 => fitted
+    - Jumper JP4 => fitted
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+  - Open your preferred toolchain
+  - Rebuild all files and load your image into target memory
+  - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/.extSettings b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/.extSettings
new file mode 100644
index 000000000..5e56b2a45
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/.extSettings
@@ -0,0 +1,11 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152;..\..\..\..\..\..\Drivers\BSP\Components\Common;..\..\..\..\..\..\Utilities\LCD
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c;../../../../../../Drivers/BSP/Components/hx8347d/hx8347d.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
+Drivers/STM32G4xx_HAL_Driver=../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c;
+Drivers/Utilities/LCD=../../../../../../Utilities/LCD/stm32_lcd.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Binary/FLASH_DualBoot.bin b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Binary/FLASH_DualBoot.bin
new file mode 100644
index 000000000..9c875d825
Binary files /dev/null and b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Binary/FLASH_DualBoot.bin differ
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/FLASH_DualBoot.ewd b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/FLASH_DualBoot.ewd
new file mode 100644
index 000000000..9b05fc127
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/FLASH_DualBoot.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FLASH_DualBoot</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/FLASH_DualBoot.ewp b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/FLASH_DualBoot.ewp
new file mode 100644
index 000000000..004c0c09f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/FLASH_DualBoot.ewp
@@ -0,0 +1,1169 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FLASH_DualBoot</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FLASH_DualBoot/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FLASH_DualBoot/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FLASH_DualBoot/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
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+          <state>1</state>
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+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
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+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
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+          <name>DSPExtension</name>
+          <state>1</state>
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+          <state>$PROJ_DIR$/../Inc</state>
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+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/hx8347d/hx8347d.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>Utilities</name>
+      <group>
+        <name>LCD</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Utilities/LCD/stm32_lcd.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/Project.eww
new file mode 100644
index 000000000..0f0157855
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FLASH_DualBoot.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..2937166b0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0xA00;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/FLASH_DualBoot.ioc b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/FLASH_DualBoot.ioc
new file mode 100644
index 000000000..ee7d5f83a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/FLASH_DualBoot.ioc
@@ -0,0 +1,118 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FLASH_DualBoot.ioc
+ProjectManager.ProjectName=FLASH_DualBoot
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0xA00
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=FLASH_DualBoot
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/main.h
new file mode 100644
index 000000000..4a5b8bbf5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/main.h
@@ -0,0 +1,92 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_DualBoot/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include "stm32g474e_eval_lcd.h"
+#include "stm32_lcd.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* Select Bank to be flashed */
+#define FLASH_BANK1
+/* #define FLASH_BANK2 */
+
+#if defined(FLASH_BANK1)&&defined(FLASH_BANK2)
+  #error "Select either FLASH_BANK1 or FLASH_BANK2"
+#endif
+
+/* Messages to display on LCD */
+#define MESSAGE1     "STM32G474QET6"
+#define MESSAGE2     "Flash Dual-boot example"
+#define MESSAGE3     "Device running on"
+#ifdef FLASH_BANK1
+#define MESSAGE4     "FLASH BANK1"
+#else
+#define MESSAGE4     "FLASH BANK2"
+#endif
+#define MESSAGE5     "Push User push-button"
+#define MESSAGE6     "to swap bank"
+
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..3a926b022
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_DualBoot/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/FLASH_DualBoot.uvoptx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/FLASH_DualBoot.uvoptx
new file mode 100644
index 000000000..6357ee40c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/FLASH_DualBoot.uvoptx
@@ -0,0 +1,669 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
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+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>28</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash_ramfunc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>29</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>30</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>31</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>32</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>33</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/Utilities/LCD</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <GroupNumber>8</GroupNumber>
+      <FileNumber>34</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Utilities/LCD/stm32_lcd.c</PathWithFileName>
+      <FilenameWithoutPath>stm32_lcd.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <GroupNumber>9</GroupNumber>
+      <FileNumber>35</FileNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/system_stm32g4xx.c</PathWithFileName>
+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/FLASH_DualBoot.uvprojx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/FLASH_DualBoot.uvprojx
new file mode 100644
index 000000000..91e075e3d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/FLASH_DualBoot.uvprojx
@@ -0,0 +1,616 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FLASH_DualBoot</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FLASH_DualBoot\</OutputDirectory>
+          <OutputName>FLASH_DualBoot</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152;../../../../../../Drivers/BSP/Components/Common;../../../../../../Utilities/LCD</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
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+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>hx8347d_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>hx8347d.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/hx8347d/hx8347d.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_lcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/Utilities/LCD</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32_lcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Utilities/LCD/stm32_lcd.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FLASH_DualBoot"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..c6e0cbe56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0xA00
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..b8a4c5a04
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/.cproject
@@ -0,0 +1,179 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2088092180">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2088092180" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2088092180" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2088092180." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1057113146" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.906467251" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.729118627" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1947030466" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.620071567" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1777252833" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.745061311" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.995637670" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.4445507" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.973211866" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../../../../../../Utilities/LCD | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/Components/Common | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary.2098752501" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary" value="true" valueType="boolean"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.249663066" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FLASH_DualBoot}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1605152174" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.810097330" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1924140424" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.506556310" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.935030011" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.2061629384" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1547758747" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1401119915" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.650762823" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Utilities/LCD"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/Common"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.857504183" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1410839883" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1512601522" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.966691643" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../../../../../../Utilities/LCD | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/Components/Common | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary.1235392513" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary" value="true" valueType="boolean"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.890512442" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FLASH_DualBoot}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1081994404" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.965659023" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.638994089" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1401848438" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1426898335" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.2090475548" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1460702857" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1924412471" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.942900095" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Utilities/LCD"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/Common"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2083383636" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1454781079" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2072346146" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.792293177" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.520501163" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.109554868" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.705910628" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.109865878" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1892078444" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.530334762" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1641444129" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.279489364" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1072613647" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1092479480" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.924490514" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1132049301" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1249891108" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FLASH_DualBoot.null.1543808226" name="FLASH_DualBoot"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.55869452;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.55869452.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1426898335;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2083383636">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2088092180;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2088092180.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.935030011;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.819059609">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/.project
new file mode 100644
index 000000000..508c185cc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/.project
@@ -0,0 +1,210 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FLASH_DualBoot</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FLASH_DualBoot.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FLASH_DualBoot.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/hx8347d.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/hx8347d_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/Utilities/LCD/stm32_lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Utilities/LCD/stm32_lcd.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..5d1b706fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + 0x18000 ;     /* end of "SRAM" type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0xa00;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/main.c
new file mode 100644
index 000000000..e9e50f842
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/main.c
@@ -0,0 +1,349 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_DualBoot/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a description of how to boot from bank1 or bank2
+  *          of the STM32G4xx FLASH.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+FLASH_OBProgramInitTypeDef    OBInit;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+static void Display_ExampleDescription(void);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+  /* Configure BUTTON_USER */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_GPIO);
+
+  /* Initialize LED1, LED2 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  BSP_LED_Init(LED3);
+
+  /* Display messages on LCD */
+  Display_ExampleDescription();
+
+  /* Turn on LEDs */
+  BSP_LED_On(LED1);
+  BSP_LED_On(LED2);
+
+  /*--- If User push-button is pushed, Set or reset BFB2 bit to enable or disable
+  boot from Bank2 (active after next reset), w/ Boot pins set in Boot from Flash
+  memory position ---*/
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* Wait for User push-button is released */
+    if (BSP_PB_GetState(BUTTON_USER) == RESET)
+    {
+      while (BSP_PB_GetState(BUTTON_USER) == RESET);
+
+      /* Allow Access to Flash control registers and user Flash */
+      HAL_FLASH_Unlock();
+
+      /* Clear OPTVERR bit set on virgin samples */
+      __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+      /* Allow Access to option bytes sector */
+      HAL_FLASH_OB_Unlock();
+
+      /* Get the Dual boot configuration status */
+      HAL_FLASHEx_OBGetConfig(&OBInit);
+
+      /* Enable/Disable dual boot feature */
+      OBInit.OptionType = OPTIONBYTE_USER;
+      OBInit.USERType   = OB_USER_BFB2;
+
+      if (((OBInit.USERConfig) & (OB_BFB2_ENABLE)) == OB_BFB2_ENABLE)
+      {
+        OBInit.USERConfig = OB_BFB2_DISABLE;
+      }
+      else
+      {
+        OBInit.USERConfig = OB_BFB2_ENABLE;
+      }
+
+      if(HAL_FLASHEx_OBProgram (&OBInit) != HAL_OK)
+      {
+        /*
+        Error occurred while setting option bytes configuration.
+        User can add here some code to deal with this error.
+        To know the code error, user can call function 'HAL_FLASH_GetError()'
+        */
+        /* Infinite loop */
+        while (1)
+        {
+          BSP_LED_On(LED3);
+        }
+      }
+
+      /* Start the Option Bytes programming process */
+      if (HAL_FLASH_OB_Launch() != HAL_OK)
+      {
+        /*
+        Error occurred while reloading option bytes configuration.
+        User can add here some code to deal with this error.
+        To know the code error, user can call function 'HAL_FLASH_GetError()'
+        */
+        /* Infinite loop */
+        while (1)
+        {
+          BSP_LED_On(LED3);
+        }
+      }
+
+      /* Prevent Access to option bytes sector */
+      HAL_FLASH_OB_Lock();
+
+      /* Disable the Flash option control register access (recommended to protect
+      the option Bytes against possible unwanted operations) */
+      HAL_FLASH_Lock();
+
+    }
+    else
+    {
+#ifdef FLASH_BANK1
+      /* Toggle LED1 */
+      BSP_LED_Toggle(LED1);
+#else
+      /* Toggle LED2 */
+      BSP_LED_Toggle(LED2);
+#endif
+
+      /* Insert 50 ms delay */
+      HAL_Delay(50);
+    }
+
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Display main example messages
+  * @param  None
+  * @retval None
+  */
+static void Display_ExampleDescription(void)
+{
+  uint32_t x_size;
+
+  /* Initialize the LCD */
+  BSP_LCD_Init(0, LCD_ORIENTATION_LANDSCAPE);
+  UTIL_LCD_SetFuncDriver(&LCD_Driver); /* SetFunc before setting device */
+  UTIL_LCD_SetDevice(0);               /* SetDevice after funcDriver is set */
+
+  /* Clear the LCD */
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+  BSP_LCD_DisplayOn(0);
+  BSP_LCD_GetXSize(0, &x_size);
+#ifdef FLASH_BANK1
+  UTIL_LCD_FillRect(0, 0, x_size, 80, UTIL_LCD_COLOR_BLUE);
+#else
+  UTIL_LCD_FillRect(0, 0, x_size, 80, UTIL_LCD_COLOR_RED);
+#endif
+
+  /* Display LCD messages */
+#ifdef FLASH_BANK1
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+#else
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_RED);
+#endif
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 10, (uint8_t *)MESSAGE1, CENTER_MODE);
+
+  UTIL_LCD_SetFont(&Font16);
+  UTIL_LCD_DisplayStringAt(0, 40, (uint8_t *)MESSAGE2, CENTER_MODE);
+
+#ifdef FLASH_BANK1
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+#else
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+#endif
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 95,  (uint8_t *)MESSAGE3, CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 110, (uint8_t *)MESSAGE4, CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 140, (uint8_t *)MESSAGE5, CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 155, (uint8_t *)MESSAGE6, CENTER_MODE);
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..0886fd367
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_DualBoot/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..da8c68373
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/stm32g4xx_it.c
@@ -0,0 +1,117 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_DualBoot/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/readme.txt b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/readme.txt
new file mode 100644
index 000000000..87c5ac48f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_DualBoot/readme.txt
@@ -0,0 +1,103 @@
+/**
+  @page FLASH_DualBoot  FLASH Dual Boot example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FLASH/FLASH_DualBoot/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FLASH Dual boot example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This example guides you through the different configuration steps by mean of HAL API
+how to program bank1 and bank2 of the STM32G4xx internal Flash memory mounted on STM32G474E-EVAL1 Rev B
+and swap between both of them.
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system clock (SYSCLK)
+to run at 170 MHz.
+
+Below are the steps to run this example:
+1- Select bank2 configuration by commenting FLASH_BANK1 and uncommenting FLASH_BANK2 defines
+   in "main.h", and generate its binary (ie: FLASH_DualBoot.bin)
+
+2- Load this binary at the bank2 of the flash(at the address 0x08040000) using
+   STM32 CubeProgrammer (www.st.com) or any similar tool.
+@note:
+ - You can avoid step 1 by directly loading the binary file provided with the example
+ - You have to configure your preferred toolchain in order to generate the binary
+   file after compiling the project.
+ - You can use STM32 CubeProgrammer or any similar tool to initially reset the
+   BFB2 bit (disable the dual boot feature).
+
+3- Select bank1 configuration by uncommenting FLASH_BANK1 and commenting FLASH_BANK2 defines
+   in "main.h", and run it, this project will be loaded in the bank1 of the flash: at the
+   address 0x08000000
+
+4- Click the User push-button to swap between the two banks
+
+- If program in bank1 is selected, a message with a blue text back color will be
+  displayed on LCD and LED1 will remain toggling while LED2 is turn on.
+
+- If program in bank2 is selected, a message with a red text back color will be
+  displayed on LCD and LED2 will remain toggling while LED1 is turn on.
+
+- If error occurs LED3 is turn on.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@note If Bootloader version is lower than V13.4 (0xD4) then the example might not work as expected due to known limitation on Bootloader.
+      The Bootloader version can be found in the address 0x1FFF6FFE and should be 0xD4 or higher for the example to work correctly.
+
+@par Keywords
+
+Memory, Flash, Dual boot, Dual Bank, Execute, Binary, Option bytes
+
+@par Directory contents
+
+  - FLASH/FLASH_DualBoot/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - FLASH/FLASH_DualBoot/Inc/stm32g4xx_hal_conf.h        HAL Configuration file
+  - FLASH/FLASH_DualBoot/Inc/stm32g4xx_it.h              Header for stm32g4xx_it.c
+  - FLASH/FLASH_DualBoot/Inc/main.h                      Header for main.c module
+  - FLASH/FLASH_DualBoot/Src/stm32g4xx_it.c              Interrupt handlers
+  - FLASH/FLASH_DualBoot/Src/main.c                      Main program
+  - FLASH/FLASH_DualBoot/Src/stm32g4xx_msp_hal.c         MSP initialization and de-initialization
+  - FLASH/FLASH_DualBoot/Src/system_stm32g4xx.c          STM32G4xx system clock configuration file
+  - FLASH/FLASH_DualBoot/Binary/FLASH_DualBoot.bin       Binary file to load at bank2
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/.extSettings b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/FLASH_EraseProgram.ewd b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/FLASH_EraseProgram.ewd
new file mode 100644
index 000000000..54fb943bb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/FLASH_EraseProgram.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FLASH_EraseProgram</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/FLASH_EraseProgram.ewp b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/FLASH_EraseProgram.ewp
new file mode 100644
index 000000000..0f50b659b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/FLASH_EraseProgram.ewp
@@ -0,0 +1,1147 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FLASH_EraseProgram</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FLASH_EraseProgram/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FLASH_EraseProgram/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FLASH_EraseProgram/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
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+          <name>CCEncSource</name>
+          <state>0</state>
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+          <name>CCEncOutput</name>
+          <state>0</state>
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+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
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+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
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+    </settings>
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+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
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+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>AObjPrefix</name>
+          <state>1</state>
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+          <state>1</state>
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+          <name>ACaseSensitivity</name>
+          <state>1</state>
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+          <name>AWarnWhat</name>
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+          <name>AWarnOne</name>
+          <state></state>
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+          <name>AWarnRange1</name>
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+          <name>AWarnRange2</name>
+          <state></state>
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+          <name>ADebug</name>
+          <state>1</state>
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+          <name>AltRegisterNames</name>
+          <state>0</state>
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+          <state></state>
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+          <state>$FILE_BNAME$.o</state>
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+          <state>100</state>
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+          <name>AIgnoreStdInclude</name>
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+          <name>AExtraOptionsV2</name>
+          <state></state>
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+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
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+          <state>FLASH_EraseProgram.hex</state>
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+      <archiveVersion>1</archiveVersion>
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+      <archiveVersion>0</archiveVersion>
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+          <state>FLASH_EraseProgram.out</state>
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+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
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+          <name>IlinkLogFile</name>
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+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/Project.eww
new file mode 100644
index 000000000..f7c2d132e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FLASH_EraseProgram.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/FLASH_EraseProgram.ioc b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/FLASH_EraseProgram.ioc
new file mode 100644
index 000000000..abe71af8a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/FLASH_EraseProgram.ioc
@@ -0,0 +1,118 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FLASH_EraseProgram.ioc
+ProjectManager.ProjectName=FLASH_EraseProgram
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=FLASH_EraseProgram
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/main.h
new file mode 100644
index 000000000..191e1a814
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/main.h
@@ -0,0 +1,327 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_EraseProgram/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Base address of the Flash pages */
+
+#define ADDR_FLASH_PAGE_0     ((uint32_t)0x08000000) /* Base @ of Page 0, 2 Kbytes */
+#define ADDR_FLASH_PAGE_1     ((uint32_t)0x08000800) /* Base @ of Page 1, 2 Kbytes */
+#define ADDR_FLASH_PAGE_2     ((uint32_t)0x08001000) /* Base @ of Page 2, 2 Kbytes */
+#define ADDR_FLASH_PAGE_3     ((uint32_t)0x08001800) /* Base @ of Page 3, 2 Kbytes */
+#define ADDR_FLASH_PAGE_4     ((uint32_t)0x08002000) /* Base @ of Page 4, 2 Kbytes */
+#define ADDR_FLASH_PAGE_5     ((uint32_t)0x08002800) /* Base @ of Page 5, 2 Kbytes */
+#define ADDR_FLASH_PAGE_6     ((uint32_t)0x08003000) /* Base @ of Page 6, 2 Kbytes */
+#define ADDR_FLASH_PAGE_7     ((uint32_t)0x08003800) /* Base @ of Page 7, 2 Kbytes */
+#define ADDR_FLASH_PAGE_8     ((uint32_t)0x08004000) /* Base @ of Page 8, 2 Kbytes */
+#define ADDR_FLASH_PAGE_9     ((uint32_t)0x08004800) /* Base @ of Page 9, 2 Kbytes */
+#define ADDR_FLASH_PAGE_10    ((uint32_t)0x08005000) /* Base @ of Page 10, 2 Kbytes */
+#define ADDR_FLASH_PAGE_11    ((uint32_t)0x08005800) /* Base @ of Page 11, 2 Kbytes */
+#define ADDR_FLASH_PAGE_12    ((uint32_t)0x08006000) /* Base @ of Page 12, 2 Kbytes */
+#define ADDR_FLASH_PAGE_13    ((uint32_t)0x08006800) /* Base @ of Page 13, 2 Kbytes */
+#define ADDR_FLASH_PAGE_14    ((uint32_t)0x08007000) /* Base @ of Page 14, 2 Kbytes */
+#define ADDR_FLASH_PAGE_15    ((uint32_t)0x08007800) /* Base @ of Page 15, 2 Kbytes */
+#define ADDR_FLASH_PAGE_16    ((uint32_t)0x08008000) /* Base @ of Page 16, 2 Kbytes */
+#define ADDR_FLASH_PAGE_17    ((uint32_t)0x08008800) /* Base @ of Page 17, 2 Kbytes */
+#define ADDR_FLASH_PAGE_18    ((uint32_t)0x08009000) /* Base @ of Page 18, 2 Kbytes */
+#define ADDR_FLASH_PAGE_19    ((uint32_t)0x08009800) /* Base @ of Page 19, 2 Kbytes */
+#define ADDR_FLASH_PAGE_20    ((uint32_t)0x0800A000) /* Base @ of Page 20, 2 Kbytes */
+#define ADDR_FLASH_PAGE_21    ((uint32_t)0x0800A800) /* Base @ of Page 21, 2 Kbytes */
+#define ADDR_FLASH_PAGE_22    ((uint32_t)0x0800B000) /* Base @ of Page 22, 2 Kbytes */
+#define ADDR_FLASH_PAGE_23    ((uint32_t)0x0800B800) /* Base @ of Page 23, 2 Kbytes */
+#define ADDR_FLASH_PAGE_24    ((uint32_t)0x0800C000) /* Base @ of Page 24, 2 Kbytes */
+#define ADDR_FLASH_PAGE_25    ((uint32_t)0x0800C800) /* Base @ of Page 25, 2 Kbytes */
+#define ADDR_FLASH_PAGE_26    ((uint32_t)0x0800D000) /* Base @ of Page 26, 2 Kbytes */
+#define ADDR_FLASH_PAGE_27    ((uint32_t)0x0800D800) /* Base @ of Page 27, 2 Kbytes */
+#define ADDR_FLASH_PAGE_28    ((uint32_t)0x0800E000) /* Base @ of Page 28, 2 Kbytes */
+#define ADDR_FLASH_PAGE_29    ((uint32_t)0x0800E800) /* Base @ of Page 29, 2 Kbytes */
+#define ADDR_FLASH_PAGE_30    ((uint32_t)0x0800F000) /* Base @ of Page 30, 2 Kbytes */
+#define ADDR_FLASH_PAGE_31    ((uint32_t)0x0800F800) /* Base @ of Page 31, 2 Kbytes */
+#define ADDR_FLASH_PAGE_32    ((uint32_t)0x08010000) /* Base @ of Page 32, 2 Kbytes */
+#define ADDR_FLASH_PAGE_33    ((uint32_t)0x08010800) /* Base @ of Page 33, 2 Kbytes */
+#define ADDR_FLASH_PAGE_34    ((uint32_t)0x08011000) /* Base @ of Page 34, 2 Kbytes */
+#define ADDR_FLASH_PAGE_35    ((uint32_t)0x08011800) /* Base @ of Page 35, 2 Kbytes */
+#define ADDR_FLASH_PAGE_36    ((uint32_t)0x08012000) /* Base @ of Page 36, 2 Kbytes */
+#define ADDR_FLASH_PAGE_37    ((uint32_t)0x08012800) /* Base @ of Page 37, 2 Kbytes */
+#define ADDR_FLASH_PAGE_38    ((uint32_t)0x08013000) /* Base @ of Page 38, 2 Kbytes */
+#define ADDR_FLASH_PAGE_39    ((uint32_t)0x08013800) /* Base @ of Page 39, 2 Kbytes */
+#define ADDR_FLASH_PAGE_40    ((uint32_t)0x08014000) /* Base @ of Page 40, 2 Kbytes */
+#define ADDR_FLASH_PAGE_41    ((uint32_t)0x08014800) /* Base @ of Page 41, 2 Kbytes */
+#define ADDR_FLASH_PAGE_42    ((uint32_t)0x08015000) /* Base @ of Page 42, 2 Kbytes */
+#define ADDR_FLASH_PAGE_43    ((uint32_t)0x08015800) /* Base @ of Page 43, 2 Kbytes */
+#define ADDR_FLASH_PAGE_44    ((uint32_t)0x08016000) /* Base @ of Page 44, 2 Kbytes */
+#define ADDR_FLASH_PAGE_45    ((uint32_t)0x08016800) /* Base @ of Page 45, 2 Kbytes */
+#define ADDR_FLASH_PAGE_46    ((uint32_t)0x08017000) /* Base @ of Page 46, 2 Kbytes */
+#define ADDR_FLASH_PAGE_47    ((uint32_t)0x08017800) /* Base @ of Page 47, 2 Kbytes */
+#define ADDR_FLASH_PAGE_48    ((uint32_t)0x08018000) /* Base @ of Page 48, 2 Kbytes */
+#define ADDR_FLASH_PAGE_49    ((uint32_t)0x08018800) /* Base @ of Page 49, 2 Kbytes */
+#define ADDR_FLASH_PAGE_50    ((uint32_t)0x08019000) /* Base @ of Page 50, 2 Kbytes */
+#define ADDR_FLASH_PAGE_51    ((uint32_t)0x08019800) /* Base @ of Page 51, 2 Kbytes */
+#define ADDR_FLASH_PAGE_52    ((uint32_t)0x0801A000) /* Base @ of Page 52, 2 Kbytes */
+#define ADDR_FLASH_PAGE_53    ((uint32_t)0x0801A800) /* Base @ of Page 53, 2 Kbytes */
+#define ADDR_FLASH_PAGE_54    ((uint32_t)0x0801B000) /* Base @ of Page 54, 2 Kbytes */
+#define ADDR_FLASH_PAGE_55    ((uint32_t)0x0801B800) /* Base @ of Page 55, 2 Kbytes */
+#define ADDR_FLASH_PAGE_56    ((uint32_t)0x0801C000) /* Base @ of Page 56, 2 Kbytes */
+#define ADDR_FLASH_PAGE_57    ((uint32_t)0x0801C800) /* Base @ of Page 57, 2 Kbytes */
+#define ADDR_FLASH_PAGE_58    ((uint32_t)0x0801D000) /* Base @ of Page 58, 2 Kbytes */
+#define ADDR_FLASH_PAGE_59    ((uint32_t)0x0801D800) /* Base @ of Page 59, 2 Kbytes */
+#define ADDR_FLASH_PAGE_60    ((uint32_t)0x0801E000) /* Base @ of Page 60, 2 Kbytes */
+#define ADDR_FLASH_PAGE_61    ((uint32_t)0x0801E800) /* Base @ of Page 61, 2 Kbytes */
+#define ADDR_FLASH_PAGE_62    ((uint32_t)0x0801F000) /* Base @ of Page 62, 2 Kbytes */
+#define ADDR_FLASH_PAGE_63    ((uint32_t)0x0801F800) /* Base @ of Page 63, 2 Kbytes */
+#define ADDR_FLASH_PAGE_64    ((uint32_t)0x08020000) /* Base @ of Page 64, 2 Kbytes */
+#define ADDR_FLASH_PAGE_65    ((uint32_t)0x08020800) /* Base @ of Page 65, 2 Kbytes */
+#define ADDR_FLASH_PAGE_66    ((uint32_t)0x08021000) /* Base @ of Page 66, 2 Kbytes */
+#define ADDR_FLASH_PAGE_67    ((uint32_t)0x08021800) /* Base @ of Page 67, 2 Kbytes */
+#define ADDR_FLASH_PAGE_68    ((uint32_t)0x08022000) /* Base @ of Page 68, 2 Kbytes */
+#define ADDR_FLASH_PAGE_69    ((uint32_t)0x08022800) /* Base @ of Page 69, 2 Kbytes */
+#define ADDR_FLASH_PAGE_70    ((uint32_t)0x08023000) /* Base @ of Page 70, 2 Kbytes */
+#define ADDR_FLASH_PAGE_71    ((uint32_t)0x08023800) /* Base @ of Page 71, 2 Kbytes */
+#define ADDR_FLASH_PAGE_72    ((uint32_t)0x08024000) /* Base @ of Page 72, 2 Kbytes */
+#define ADDR_FLASH_PAGE_73    ((uint32_t)0x08024800) /* Base @ of Page 73, 2 Kbytes */
+#define ADDR_FLASH_PAGE_74    ((uint32_t)0x08025000) /* Base @ of Page 74, 2 Kbytes */
+#define ADDR_FLASH_PAGE_75    ((uint32_t)0x08025800) /* Base @ of Page 75, 2 Kbytes */
+#define ADDR_FLASH_PAGE_76    ((uint32_t)0x08026000) /* Base @ of Page 76, 2 Kbytes */
+#define ADDR_FLASH_PAGE_77    ((uint32_t)0x08026800) /* Base @ of Page 77, 2 Kbytes */
+#define ADDR_FLASH_PAGE_78    ((uint32_t)0x08027000) /* Base @ of Page 78, 2 Kbytes */
+#define ADDR_FLASH_PAGE_79    ((uint32_t)0x08027800) /* Base @ of Page 79, 2 Kbytes */
+#define ADDR_FLASH_PAGE_80    ((uint32_t)0x08028000) /* Base @ of Page 80, 2 Kbytes */
+#define ADDR_FLASH_PAGE_81    ((uint32_t)0x08028800) /* Base @ of Page 81, 2 Kbytes */
+#define ADDR_FLASH_PAGE_82    ((uint32_t)0x08029000) /* Base @ of Page 82, 2 Kbytes */
+#define ADDR_FLASH_PAGE_83    ((uint32_t)0x08029800) /* Base @ of Page 83, 2 Kbytes */
+#define ADDR_FLASH_PAGE_84    ((uint32_t)0x0802A000) /* Base @ of Page 84, 2 Kbytes */
+#define ADDR_FLASH_PAGE_85    ((uint32_t)0x0802A800) /* Base @ of Page 85, 2 Kbytes */
+#define ADDR_FLASH_PAGE_86    ((uint32_t)0x0802B000) /* Base @ of Page 86, 2 Kbytes */
+#define ADDR_FLASH_PAGE_87    ((uint32_t)0x0802B800) /* Base @ of Page 87, 2 Kbytes */
+#define ADDR_FLASH_PAGE_88    ((uint32_t)0x0802C000) /* Base @ of Page 88, 2 Kbytes */
+#define ADDR_FLASH_PAGE_89    ((uint32_t)0x0802C800) /* Base @ of Page 89, 2 Kbytes */
+#define ADDR_FLASH_PAGE_90    ((uint32_t)0x0802D000) /* Base @ of Page 90, 2 Kbytes */
+#define ADDR_FLASH_PAGE_91    ((uint32_t)0x0802D800) /* Base @ of Page 91, 2 Kbytes */
+#define ADDR_FLASH_PAGE_92    ((uint32_t)0x0802E000) /* Base @ of Page 92, 2 Kbytes */
+#define ADDR_FLASH_PAGE_93    ((uint32_t)0x0802E800) /* Base @ of Page 93, 2 Kbytes */
+#define ADDR_FLASH_PAGE_94    ((uint32_t)0x0802F000) /* Base @ of Page 94, 2 Kbytes */
+#define ADDR_FLASH_PAGE_95    ((uint32_t)0x0802F800) /* Base @ of Page 95, 2 Kbytes */
+#define ADDR_FLASH_PAGE_96    ((uint32_t)0x08030000) /* Base @ of Page 96, 2 Kbytes */
+#define ADDR_FLASH_PAGE_97    ((uint32_t)0x08030800) /* Base @ of Page 97, 2 Kbytes */
+#define ADDR_FLASH_PAGE_98    ((uint32_t)0x08031000) /* Base @ of Page 98, 2 Kbytes */
+#define ADDR_FLASH_PAGE_99    ((uint32_t)0x08031800) /* Base @ of Page 99, 2 Kbytes */
+#define ADDR_FLASH_PAGE_100   ((uint32_t)0x08032000) /* Base @ of Page 100, 2 Kbytes */
+#define ADDR_FLASH_PAGE_101   ((uint32_t)0x08032800) /* Base @ of Page 101, 2 Kbytes */
+#define ADDR_FLASH_PAGE_102   ((uint32_t)0x08033000) /* Base @ of Page 102, 2 Kbytes */
+#define ADDR_FLASH_PAGE_103   ((uint32_t)0x08033800) /* Base @ of Page 103, 2 Kbytes */
+#define ADDR_FLASH_PAGE_104   ((uint32_t)0x08034000) /* Base @ of Page 104, 2 Kbytes */
+#define ADDR_FLASH_PAGE_105   ((uint32_t)0x08034800) /* Base @ of Page 105, 2 Kbytes */
+#define ADDR_FLASH_PAGE_106   ((uint32_t)0x08035000) /* Base @ of Page 106, 2 Kbytes */
+#define ADDR_FLASH_PAGE_107   ((uint32_t)0x08035800) /* Base @ of Page 107, 2 Kbytes */
+#define ADDR_FLASH_PAGE_108   ((uint32_t)0x08036000) /* Base @ of Page 108, 2 Kbytes */
+#define ADDR_FLASH_PAGE_109   ((uint32_t)0x08036800) /* Base @ of Page 109, 2 Kbytes */
+#define ADDR_FLASH_PAGE_110   ((uint32_t)0x08037000) /* Base @ of Page 110, 2 Kbytes */
+#define ADDR_FLASH_PAGE_111   ((uint32_t)0x08037800) /* Base @ of Page 111, 2 Kbytes */
+#define ADDR_FLASH_PAGE_112   ((uint32_t)0x08038000) /* Base @ of Page 112, 2 Kbytes */
+#define ADDR_FLASH_PAGE_113   ((uint32_t)0x08038800) /* Base @ of Page 113, 2 Kbytes */
+#define ADDR_FLASH_PAGE_114   ((uint32_t)0x08039000) /* Base @ of Page 114, 2 Kbytes */
+#define ADDR_FLASH_PAGE_115   ((uint32_t)0x08039800) /* Base @ of Page 115, 2 Kbytes */
+#define ADDR_FLASH_PAGE_116   ((uint32_t)0x0803A000) /* Base @ of Page 116, 2 Kbytes */
+#define ADDR_FLASH_PAGE_117   ((uint32_t)0x0803A800) /* Base @ of Page 117, 2 Kbytes */
+#define ADDR_FLASH_PAGE_118   ((uint32_t)0x0803B000) /* Base @ of Page 118, 2 Kbytes */
+#define ADDR_FLASH_PAGE_119   ((uint32_t)0x0803B800) /* Base @ of Page 119, 2 Kbytes */
+#define ADDR_FLASH_PAGE_120   ((uint32_t)0x0803C000) /* Base @ of Page 120, 2 Kbytes */
+#define ADDR_FLASH_PAGE_121   ((uint32_t)0x0803C800) /* Base @ of Page 121, 2 Kbytes */
+#define ADDR_FLASH_PAGE_122   ((uint32_t)0x0803D000) /* Base @ of Page 122, 2 Kbytes */
+#define ADDR_FLASH_PAGE_123   ((uint32_t)0x0803D800) /* Base @ of Page 123, 2 Kbytes */
+#define ADDR_FLASH_PAGE_124   ((uint32_t)0x0803E000) /* Base @ of Page 124, 2 Kbytes */
+#define ADDR_FLASH_PAGE_125   ((uint32_t)0x0803E800) /* Base @ of Page 125, 2 Kbytes */
+#define ADDR_FLASH_PAGE_126   ((uint32_t)0x0803F000) /* Base @ of Page 126, 2 Kbytes */
+#define ADDR_FLASH_PAGE_127   ((uint32_t)0x0803F800) /* Base @ of Page 127, 2 Kbytes */
+#define ADDR_FLASH_PAGE_128   ((uint32_t)0x08040000) /* Base @ of Page 128, 2 Kbytes */
+#define ADDR_FLASH_PAGE_129   ((uint32_t)0x08040800) /* Base @ of Page 129, 2 Kbytes */
+#define ADDR_FLASH_PAGE_130   ((uint32_t)0x08041000) /* Base @ of Page 130, 2 Kbytes */
+#define ADDR_FLASH_PAGE_131   ((uint32_t)0x08041800) /* Base @ of Page 131, 2 Kbytes */
+#define ADDR_FLASH_PAGE_132   ((uint32_t)0x08042000) /* Base @ of Page 132, 2 Kbytes */
+#define ADDR_FLASH_PAGE_133   ((uint32_t)0x08042800) /* Base @ of Page 133, 2 Kbytes */
+#define ADDR_FLASH_PAGE_134   ((uint32_t)0x08043000) /* Base @ of Page 134, 2 Kbytes */
+#define ADDR_FLASH_PAGE_135   ((uint32_t)0x08043800) /* Base @ of Page 135, 2 Kbytes */
+#define ADDR_FLASH_PAGE_136   ((uint32_t)0x08044000) /* Base @ of Page 136, 2 Kbytes */
+#define ADDR_FLASH_PAGE_137   ((uint32_t)0x08044800) /* Base @ of Page 137, 2 Kbytes */
+#define ADDR_FLASH_PAGE_138   ((uint32_t)0x08045000) /* Base @ of Page 138, 2 Kbytes */
+#define ADDR_FLASH_PAGE_139   ((uint32_t)0x08045800) /* Base @ of Page 139, 2 Kbytes */
+#define ADDR_FLASH_PAGE_140   ((uint32_t)0x08046000) /* Base @ of Page 140, 2 Kbytes */
+#define ADDR_FLASH_PAGE_141   ((uint32_t)0x08046800) /* Base @ of Page 141, 2 Kbytes */
+#define ADDR_FLASH_PAGE_142   ((uint32_t)0x08047000) /* Base @ of Page 142, 2 Kbytes */
+#define ADDR_FLASH_PAGE_143   ((uint32_t)0x08047800) /* Base @ of Page 143, 2 Kbytes */
+#define ADDR_FLASH_PAGE_144   ((uint32_t)0x08048000) /* Base @ of Page 144, 2 Kbytes */
+#define ADDR_FLASH_PAGE_145   ((uint32_t)0x08048800) /* Base @ of Page 145, 2 Kbytes */
+#define ADDR_FLASH_PAGE_146   ((uint32_t)0x08049000) /* Base @ of Page 146, 2 Kbytes */
+#define ADDR_FLASH_PAGE_147   ((uint32_t)0x08049800) /* Base @ of Page 147, 2 Kbytes */
+#define ADDR_FLASH_PAGE_148   ((uint32_t)0x0804a000) /* Base @ of Page 148, 2 Kbytes */
+#define ADDR_FLASH_PAGE_149   ((uint32_t)0x0804a800) /* Base @ of Page 149, 2 Kbytes */
+#define ADDR_FLASH_PAGE_150   ((uint32_t)0x0804b000) /* Base @ of Page 150, 2 Kbytes */
+#define ADDR_FLASH_PAGE_151   ((uint32_t)0x0804b800) /* Base @ of Page 151, 2 Kbytes */
+#define ADDR_FLASH_PAGE_152   ((uint32_t)0x0804c000) /* Base @ of Page 152, 2 Kbytes */
+#define ADDR_FLASH_PAGE_153   ((uint32_t)0x0804c800) /* Base @ of Page 153, 2 Kbytes */
+#define ADDR_FLASH_PAGE_154   ((uint32_t)0x0804d000) /* Base @ of Page 154, 2 Kbytes */
+#define ADDR_FLASH_PAGE_155   ((uint32_t)0x0804d800) /* Base @ of Page 155, 2 Kbytes */
+#define ADDR_FLASH_PAGE_156   ((uint32_t)0x0804e000) /* Base @ of Page 156, 2 Kbytes */
+#define ADDR_FLASH_PAGE_157   ((uint32_t)0x0804e800) /* Base @ of Page 157, 2 Kbytes */
+#define ADDR_FLASH_PAGE_158   ((uint32_t)0x0804f000) /* Base @ of Page 158, 2 Kbytes */
+#define ADDR_FLASH_PAGE_159   ((uint32_t)0x0804f800) /* Base @ of Page 159, 2 Kbytes */
+#define ADDR_FLASH_PAGE_160   ((uint32_t)0x08050000) /* Base @ of Page 160, 2 Kbytes */
+#define ADDR_FLASH_PAGE_161   ((uint32_t)0x08050800) /* Base @ of Page 161, 2 Kbytes */
+#define ADDR_FLASH_PAGE_162   ((uint32_t)0x08051000) /* Base @ of Page 162, 2 Kbytes */
+#define ADDR_FLASH_PAGE_163   ((uint32_t)0x08051800) /* Base @ of Page 163, 2 Kbytes */
+#define ADDR_FLASH_PAGE_164   ((uint32_t)0x08052000) /* Base @ of Page 164, 2 Kbytes */
+#define ADDR_FLASH_PAGE_165   ((uint32_t)0x08052800) /* Base @ of Page 165, 2 Kbytes */
+#define ADDR_FLASH_PAGE_166   ((uint32_t)0x08053000) /* Base @ of Page 166, 2 Kbytes */
+#define ADDR_FLASH_PAGE_167   ((uint32_t)0x08053800) /* Base @ of Page 167, 2 Kbytes */
+#define ADDR_FLASH_PAGE_168   ((uint32_t)0x08054000) /* Base @ of Page 168, 2 Kbytes */
+#define ADDR_FLASH_PAGE_169   ((uint32_t)0x08054800) /* Base @ of Page 169, 2 Kbytes */
+#define ADDR_FLASH_PAGE_170   ((uint32_t)0x08055000) /* Base @ of Page 170, 2 Kbytes */
+#define ADDR_FLASH_PAGE_171   ((uint32_t)0x08055800) /* Base @ of Page 171, 2 Kbytes */
+#define ADDR_FLASH_PAGE_172   ((uint32_t)0x08056000) /* Base @ of Page 172, 2 Kbytes */
+#define ADDR_FLASH_PAGE_173   ((uint32_t)0x08056800) /* Base @ of Page 173, 2 Kbytes */
+#define ADDR_FLASH_PAGE_174   ((uint32_t)0x08057000) /* Base @ of Page 174, 2 Kbytes */
+#define ADDR_FLASH_PAGE_175   ((uint32_t)0x08057800) /* Base @ of Page 175, 2 Kbytes */
+#define ADDR_FLASH_PAGE_176   ((uint32_t)0x08058000) /* Base @ of Page 176, 2 Kbytes */
+#define ADDR_FLASH_PAGE_177   ((uint32_t)0x08058800) /* Base @ of Page 177, 2 Kbytes */
+#define ADDR_FLASH_PAGE_178   ((uint32_t)0x08059000) /* Base @ of Page 178, 2 Kbytes */
+#define ADDR_FLASH_PAGE_179   ((uint32_t)0x08059800) /* Base @ of Page 179, 2 Kbytes */
+#define ADDR_FLASH_PAGE_180   ((uint32_t)0x0805a000) /* Base @ of Page 180, 2 Kbytes */
+#define ADDR_FLASH_PAGE_181   ((uint32_t)0x0805a800) /* Base @ of Page 181, 2 Kbytes */
+#define ADDR_FLASH_PAGE_182   ((uint32_t)0x0805b000) /* Base @ of Page 182, 2 Kbytes */
+#define ADDR_FLASH_PAGE_183   ((uint32_t)0x0805b800) /* Base @ of Page 183, 2 Kbytes */
+#define ADDR_FLASH_PAGE_184   ((uint32_t)0x0805c000) /* Base @ of Page 184, 2 Kbytes */
+#define ADDR_FLASH_PAGE_185   ((uint32_t)0x0805c800) /* Base @ of Page 185, 2 Kbytes */
+#define ADDR_FLASH_PAGE_186   ((uint32_t)0x0805d000) /* Base @ of Page 186, 2 Kbytes */
+#define ADDR_FLASH_PAGE_187   ((uint32_t)0x0805d800) /* Base @ of Page 187, 2 Kbytes */
+#define ADDR_FLASH_PAGE_188   ((uint32_t)0x0805e000) /* Base @ of Page 188, 2 Kbytes */
+#define ADDR_FLASH_PAGE_189   ((uint32_t)0x0805e800) /* Base @ of Page 189, 2 Kbytes */
+#define ADDR_FLASH_PAGE_190   ((uint32_t)0x0805f000) /* Base @ of Page 190, 2 Kbytes */
+#define ADDR_FLASH_PAGE_191   ((uint32_t)0x0805f800) /* Base @ of Page 191, 2 Kbytes */
+#define ADDR_FLASH_PAGE_192   ((uint32_t)0x08060000) /* Base @ of Page 192, 2 Kbytes */
+#define ADDR_FLASH_PAGE_193   ((uint32_t)0x08060800) /* Base @ of Page 193, 2 Kbytes */
+#define ADDR_FLASH_PAGE_194   ((uint32_t)0x08061000) /* Base @ of Page 194, 2 Kbytes */
+#define ADDR_FLASH_PAGE_195   ((uint32_t)0x08061800) /* Base @ of Page 195, 2 Kbytes */
+#define ADDR_FLASH_PAGE_196   ((uint32_t)0x08062000) /* Base @ of Page 196, 2 Kbytes */
+#define ADDR_FLASH_PAGE_197   ((uint32_t)0x08062800) /* Base @ of Page 197, 2 Kbytes */
+#define ADDR_FLASH_PAGE_198   ((uint32_t)0x08063000) /* Base @ of Page 198, 2 Kbytes */
+#define ADDR_FLASH_PAGE_199   ((uint32_t)0x08063800) /* Base @ of Page 199, 2 Kbytes */
+#define ADDR_FLASH_PAGE_200   ((uint32_t)0x08064000) /* Base @ of Page 200, 2 Kbytes */
+#define ADDR_FLASH_PAGE_201   ((uint32_t)0x08064800) /* Base @ of Page 201, 2 Kbytes */
+#define ADDR_FLASH_PAGE_202   ((uint32_t)0x08065000) /* Base @ of Page 202, 2 Kbytes */
+#define ADDR_FLASH_PAGE_203   ((uint32_t)0x08065800) /* Base @ of Page 203, 2 Kbytes */
+#define ADDR_FLASH_PAGE_204   ((uint32_t)0x08066000) /* Base @ of Page 204, 2 Kbytes */
+#define ADDR_FLASH_PAGE_205   ((uint32_t)0x08066800) /* Base @ of Page 205, 2 Kbytes */
+#define ADDR_FLASH_PAGE_206   ((uint32_t)0x08067000) /* Base @ of Page 206, 2 Kbytes */
+#define ADDR_FLASH_PAGE_207   ((uint32_t)0x08067800) /* Base @ of Page 207, 2 Kbytes */
+#define ADDR_FLASH_PAGE_208   ((uint32_t)0x08068000) /* Base @ of Page 208, 2 Kbytes */
+#define ADDR_FLASH_PAGE_209   ((uint32_t)0x08068800) /* Base @ of Page 209, 2 Kbytes */
+#define ADDR_FLASH_PAGE_210   ((uint32_t)0x08069000) /* Base @ of Page 210, 2 Kbytes */
+#define ADDR_FLASH_PAGE_211   ((uint32_t)0x08069800) /* Base @ of Page 211, 2 Kbytes */
+#define ADDR_FLASH_PAGE_212   ((uint32_t)0x0806a000) /* Base @ of Page 212, 2 Kbytes */
+#define ADDR_FLASH_PAGE_213   ((uint32_t)0x0806a800) /* Base @ of Page 213, 2 Kbytes */
+#define ADDR_FLASH_PAGE_214   ((uint32_t)0x0806b000) /* Base @ of Page 214, 2 Kbytes */
+#define ADDR_FLASH_PAGE_215   ((uint32_t)0x0806b800) /* Base @ of Page 215, 2 Kbytes */
+#define ADDR_FLASH_PAGE_216   ((uint32_t)0x0806c000) /* Base @ of Page 216, 2 Kbytes */
+#define ADDR_FLASH_PAGE_217   ((uint32_t)0x0806c800) /* Base @ of Page 217, 2 Kbytes */
+#define ADDR_FLASH_PAGE_218   ((uint32_t)0x0806d000) /* Base @ of Page 218, 2 Kbytes */
+#define ADDR_FLASH_PAGE_219   ((uint32_t)0x0806d800) /* Base @ of Page 219, 2 Kbytes */
+#define ADDR_FLASH_PAGE_220   ((uint32_t)0x0806e000) /* Base @ of Page 220, 2 Kbytes */
+#define ADDR_FLASH_PAGE_221   ((uint32_t)0x0806e800) /* Base @ of Page 221, 2 Kbytes */
+#define ADDR_FLASH_PAGE_222   ((uint32_t)0x0806f000) /* Base @ of Page 222, 2 Kbytes */
+#define ADDR_FLASH_PAGE_223   ((uint32_t)0x0806f800) /* Base @ of Page 223, 2 Kbytes */
+#define ADDR_FLASH_PAGE_224   ((uint32_t)0x08070000) /* Base @ of Page 224, 2 Kbytes */
+#define ADDR_FLASH_PAGE_225   ((uint32_t)0x08070800) /* Base @ of Page 225, 2 Kbytes */
+#define ADDR_FLASH_PAGE_226   ((uint32_t)0x08071000) /* Base @ of Page 226, 2 Kbytes */
+#define ADDR_FLASH_PAGE_227   ((uint32_t)0x08071800) /* Base @ of Page 227, 2 Kbytes */
+#define ADDR_FLASH_PAGE_228   ((uint32_t)0x08072000) /* Base @ of Page 228, 2 Kbytes */
+#define ADDR_FLASH_PAGE_229   ((uint32_t)0x08072800) /* Base @ of Page 229, 2 Kbytes */
+#define ADDR_FLASH_PAGE_230   ((uint32_t)0x08073000) /* Base @ of Page 230, 2 Kbytes */
+#define ADDR_FLASH_PAGE_231   ((uint32_t)0x08073800) /* Base @ of Page 231, 2 Kbytes */
+#define ADDR_FLASH_PAGE_232   ((uint32_t)0x08074000) /* Base @ of Page 232, 2 Kbytes */
+#define ADDR_FLASH_PAGE_233   ((uint32_t)0x08074800) /* Base @ of Page 233, 2 Kbytes */
+#define ADDR_FLASH_PAGE_234   ((uint32_t)0x08075000) /* Base @ of Page 234, 2 Kbytes */
+#define ADDR_FLASH_PAGE_235   ((uint32_t)0x08075800) /* Base @ of Page 235, 2 Kbytes */
+#define ADDR_FLASH_PAGE_236   ((uint32_t)0x08076000) /* Base @ of Page 236, 2 Kbytes */
+#define ADDR_FLASH_PAGE_237   ((uint32_t)0x08076800) /* Base @ of Page 237, 2 Kbytes */
+#define ADDR_FLASH_PAGE_238   ((uint32_t)0x08077000) /* Base @ of Page 238, 2 Kbytes */
+#define ADDR_FLASH_PAGE_239   ((uint32_t)0x08077800) /* Base @ of Page 239, 2 Kbytes */
+#define ADDR_FLASH_PAGE_240   ((uint32_t)0x08078000) /* Base @ of Page 240, 2 Kbytes */
+#define ADDR_FLASH_PAGE_241   ((uint32_t)0x08078800) /* Base @ of Page 241, 2 Kbytes */
+#define ADDR_FLASH_PAGE_242   ((uint32_t)0x08079000) /* Base @ of Page 242, 2 Kbytes */
+#define ADDR_FLASH_PAGE_243   ((uint32_t)0x08079800) /* Base @ of Page 243, 2 Kbytes */
+#define ADDR_FLASH_PAGE_244   ((uint32_t)0x0807a000) /* Base @ of Page 244, 2 Kbytes */
+#define ADDR_FLASH_PAGE_245   ((uint32_t)0x0807a800) /* Base @ of Page 245, 2 Kbytes */
+#define ADDR_FLASH_PAGE_246   ((uint32_t)0x0807b000) /* Base @ of Page 246, 2 Kbytes */
+#define ADDR_FLASH_PAGE_247   ((uint32_t)0x0807b800) /* Base @ of Page 247, 2 Kbytes */
+#define ADDR_FLASH_PAGE_248   ((uint32_t)0x0807c000) /* Base @ of Page 248, 2 Kbytes */
+#define ADDR_FLASH_PAGE_249   ((uint32_t)0x0807c800) /* Base @ of Page 249, 2 Kbytes */
+#define ADDR_FLASH_PAGE_250   ((uint32_t)0x0807d000) /* Base @ of Page 250, 2 Kbytes */
+#define ADDR_FLASH_PAGE_251   ((uint32_t)0x0807d800) /* Base @ of Page 251, 2 Kbytes */
+#define ADDR_FLASH_PAGE_252   ((uint32_t)0x0807e000) /* Base @ of Page 252, 2 Kbytes */
+#define ADDR_FLASH_PAGE_253   ((uint32_t)0x0807e800) /* Base @ of Page 253, 2 Kbytes */
+#define ADDR_FLASH_PAGE_254   ((uint32_t)0x0807f000) /* Base @ of Page 254, 2 Kbytes */
+#define ADDR_FLASH_PAGE_255   ((uint32_t)0x0807f800) /* Base @ of Page 255, 2 Kbytes */
+      
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..d4db5410d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_EraseProgram/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/FLASH_EraseProgram.uvoptx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/FLASH_EraseProgram.uvoptx
new file mode 100644
index 000000000..4140a9177
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/FLASH_EraseProgram.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FLASH_EraseProgram</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <GroupNumber>2</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
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+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
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+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Doc</GroupName>
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+    <cbSel>0</cbSel>
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+
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diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/FLASH_EraseProgram.uvprojx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/FLASH_EraseProgram.uvprojx
new file mode 100644
index 000000000..c861a6712
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/FLASH_EraseProgram.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FLASH_EraseProgram</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FLASH_EraseProgram\Exe\</OutputDirectory>
+          <OutputName>FLASH_EraseProgram</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
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+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
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+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
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+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
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+            <OptFeed>0</OptFeed>
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+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FLASH_EraseProgram"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..a42c02162
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/.cproject
@@ -0,0 +1,172 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1748372468">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1748372468" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1748372468" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1748372468." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.966655570" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.2049163771" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1058379563" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.868433032" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.14683319" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.416100703" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2094789445" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1674089022" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.975893402" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.951159994" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1117984958" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FLASH_EraseProgram}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1706746531" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1678962741" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.523305336" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1849262558" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1654113360" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.603993622" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1314429151" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1148381223" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.696761567" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1849947745" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1633913635" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.940140754" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.281801179" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.261008198" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.21724401" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1609537962" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1381865557" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1288474263" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1127049929" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.670406466" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.363707715" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.68052935" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1638430586" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
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+				</configuration>
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+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.759912568" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.2014498552" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1497134993" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.518051078" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1984377844" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FLASH_EraseProgram}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.90262283" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.212323647" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1827593151" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1097853222" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1268259174" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.859359147" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.921155645" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.701688" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1259815241" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.953070671" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.626531893" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2142467298" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.913962275" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1460978355" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.489509727" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1768455344" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1454160580" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.361482331" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.926292500" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.894805245" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.138728129" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1142409256" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.64165103" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1242045568" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.610882660" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1537534061" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FLASH_EraseProgram.null.2104181121" name="FLASH_EraseProgram"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1527904938;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1527904938.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1268259174;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.953070671">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1748372468;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1748372468.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1654113360;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1849947745">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/.project
new file mode 100644
index 000000000..84c68c7d9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FLASH_EraseProgram</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FLASH_EraseProgram.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FLASH_EraseProgram.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/main.c
new file mode 100644
index 000000000..7466e2615
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/main.c
@@ -0,0 +1,353 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_EraseProgram/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a description of how to erase and program the
+  *          STM32G4xx FLASH.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define FLASH_USER_START_ADDR   ADDR_FLASH_PAGE_6   /* Start @ of user Flash area */
+#define FLASH_USER_END_ADDR     (ADDR_FLASH_PAGE_127 + FLASH_PAGE_SIZE - 1)   /* End @ of user Flash area */
+
+#define DATA_32                 ((uint32_t)0x12345678)
+#define DATA_64                 ((uint64_t)0x1234567812345678)
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+uint32_t FirstPage = 0, NbOfPages = 0, BankNumber = 0;
+uint32_t Address = 0, PageError = 0;
+__IO uint32_t MemoryProgramStatus = 0;
+__IO uint32_t data32 = 0;
+
+/*Variable used for Erase procedure*/
+static FLASH_EraseInitTypeDef EraseInitStruct;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+static uint32_t GetPage(uint32_t Address);
+static uint32_t GetBank(uint32_t Address);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+  /* Configure the system clock to 170 MHz */
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+  /* Initialize LED1, LED3 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  BSP_LED_Init(LED3);
+
+  /* Unlock the Flash to enable the flash control register access *************/
+  HAL_FLASH_Unlock();
+
+ /* Clear OPTVERR bit set on virgin samples */
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+  /* Erase the user Flash area
+    (area defined by FLASH_USER_START_ADDR and FLASH_USER_END_ADDR) ***********/
+
+  /* Get the 1st page to erase */
+  FirstPage = GetPage(FLASH_USER_START_ADDR);
+
+  /* Get the number of pages to erase from 1st page */
+  NbOfPages = GetPage(FLASH_USER_END_ADDR) - FirstPage + 1;
+
+  /* Get the bank */
+  BankNumber = GetBank(FLASH_USER_START_ADDR);
+
+  /* Fill EraseInit structure*/
+  EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
+  EraseInitStruct.Banks       = BankNumber;
+  EraseInitStruct.Page        = FirstPage;
+  EraseInitStruct.NbPages     = NbOfPages;
+
+  /* Note: If an erase operation in Flash memory also concerns data in the data or instruction cache,
+     you have to make sure that these data are rewritten before they are accessed during code
+     execution. If this cannot be done safely, it is recommended to flush the caches by setting the
+     DCRST and ICRST bits in the FLASH_CR register. */
+  if (HAL_FLASHEx_Erase(&EraseInitStruct, &PageError) != HAL_OK)
+  {
+    /*
+      Error occurred while page erase.
+      User can add here some code to deal with this error.
+      PageError will contain the faulty page and then to know the code error on this page,
+      user can call function 'HAL_FLASH_GetError()'
+    */
+    /* Infinite loop */
+    while (1)
+    {
+      /* Turn on LED3 */
+      BSP_LED_On(LED3);
+    }
+  }
+
+  /* Program the user Flash area word by word
+    (area defined by FLASH_USER_START_ADDR and FLASH_USER_END_ADDR) ***********/
+
+  Address = FLASH_USER_START_ADDR;
+
+  while (Address < FLASH_USER_END_ADDR)
+  {
+    if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, Address, DATA_64) == HAL_OK)
+    {
+      Address = Address + 8;  /* increment to next double word*/
+    }
+   else
+    {
+      /* Error occurred while writing data in Flash memory.
+         User can add here some code to deal with this error */
+      while (1)
+      {
+        /* Turn on LED3 */
+        BSP_LED_On(LED3);
+      }
+    }
+  }
+
+  /* Lock the Flash to disable the flash control register access (recommended
+     to protect the FLASH memory against possible unwanted operation) *********/
+  HAL_FLASH_Lock();
+
+  /* Check if the programmed data is OK
+      MemoryProgramStatus = 0: data programmed correctly
+      MemoryProgramStatus != 0: number of words not programmed correctly ******/
+  Address = FLASH_USER_START_ADDR;
+  MemoryProgramStatus = 0x0;
+
+  while (Address < FLASH_USER_END_ADDR)
+  {
+    data32 = *(__IO uint32_t *)Address;
+
+    if (data32 != DATA_32)
+    {
+      MemoryProgramStatus++;
+    }
+    Address = Address + 4;
+  }
+
+  /*Check if there is an issue to program data*/
+  if (MemoryProgramStatus == 0)
+  {
+    /* No error detected. Switch on LED1*/
+    BSP_LED_On(LED1);
+  }
+  else
+  {
+    /* Error detected. Switch on LED3*/
+    BSP_LED_On(LED3);
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+
+
+/**
+  * @brief  Gets the page of a given address
+  * @param  Addr: Address of the FLASH Memory
+  * @retval The page of a given address
+  */
+static uint32_t GetPage(uint32_t Addr)
+{
+  uint32_t page = 0;
+
+  if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
+  {
+    /* Bank 1 */
+    page = (Addr - FLASH_BASE) / FLASH_PAGE_SIZE;
+  }
+  else
+  {
+    /* Bank 2 */
+    page = (Addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
+  }
+
+  return page;
+}
+
+/**
+  * @brief  Gets the bank of a given address
+  * @param  Addr: Address of the FLASH Memory
+  * @retval The bank of a given address
+  */
+static uint32_t GetBank(uint32_t Addr)
+{
+  return FLASH_BANK_1;
+}
+
+
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..33a626d80
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_EraseProgram/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..8367d467a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/stm32g4xx_it.c
@@ -0,0 +1,117 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_EraseProgram/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/readme.txt b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/readme.txt
new file mode 100644
index 000000000..7bf836fbd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_EraseProgram/readme.txt
@@ -0,0 +1,89 @@
+/**
+  @page FLASH_EraseProgram FLASH Erase and Program example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FLASH/FLASH_EraseProgram/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FLASH Erase and Program example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure and use the FLASH HAL API to erase and program the internal
+Flash memory.
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system clock (SYSCLK)
+to run at 170 MHz.
+
+After Reset, the Flash memory Program/Erase Controller is locked. A dedicated function
+is used to enable the FLASH control register access.
+Before programming the desired addresses, an erase operation is performed using
+the flash erase page feature. The erase procedure is done by filling the erase init
+structure giving the starting erase page and the number of pages to erase.
+At this stage, all these pages will be erased one by one separately.
+
+@note: if problem occurs on a page, erase will be stopped and faulty page will
+be returned to user (through variable 'PageError').
+
+Once this operation is finished, page double-word programming operation will be performed
+in the Flash memory. The written data is then read back and checked.
+
+The STM32G474E-EVAL1 Rev B board LEDs can be used to monitor the transfer status:
+ - LED1 is ON when there are no errors detected after data programming
+ - LED3 is ON when there are errors detected after data programming
+ - LED3 is ON when there is an issue during erase or program procedure
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Memory, FLASH, Erase, Program, Sector, Mass Erase
+
+@par Directory contents
+
+  - FLASH/FLASH_EraseProgram/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - FLASH/FLASH_EraseProgram/Inc/stm32g4xx_hal_conf.h        HAL Configuration file
+  - FLASH/FLASH_EraseProgram/Inc/stm32g4xx_it.h              Header for stm32g4xx_it.c
+  - FLASH/FLASH_EraseProgram/Inc/main.h                      Header for main.c module
+  - FLASH/FLASH_EraseProgram/Src/stm32g4xx_it.c              Interrupt handlers
+  - FLASH/FLASH_EraseProgram/Src/main.c                      Main program
+  - FLASH/FLASH_EraseProgram/Src/stm32g4xx_hal_msp.c         MSP initialization and de-initialization
+  - FLASH/FLASH_EraseProgram/Src/system_stm32g4xx.c          STM32G4xx system clock configuration file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/.extSettings b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/.extSettings
new file mode 100644
index 000000000..d6a56a7d8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=CORTEX;GPIO;RCC;FLASH;PWR;I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/FLASH_FastProgram.ewd b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/FLASH_FastProgram.ewd
new file mode 100644
index 000000000..753a4d907
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/FLASH_FastProgram.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FLASH_FastProgram</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/FLASH_FastProgram.ewp b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/FLASH_FastProgram.ewp
new file mode 100644
index 000000000..24a119e4d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/FLASH_FastProgram.ewp
@@ -0,0 +1,1147 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FLASH_FastProgram</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FLASH_FastProgram/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FLASH_FastProgram/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FLASH_FastProgram/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
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+          <name>AListing</name>
+          <state>1</state>
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+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
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+          <name>MacExec</name>
+          <state>0</state>
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+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
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+          <name>MultiLine</name>
+          <state>0</state>
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+          <state>0</state>
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+          <name>PageLength</name>
+          <state>80</state>
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+          <state>8</state>
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+          <name>AXRef</name>
+          <state>0</state>
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+          <name>AXRefDefines</name>
+          <state>0</state>
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+          <name>AXRefInternal</name>
+          <state>0</state>
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+          <name>AXRefDual</name>
+          <state>0</state>
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+          <name>AProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
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+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
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+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
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+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
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+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>FLASH_FastProgram.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>FLASH_FastProgram.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/Project.eww
new file mode 100644
index 000000000..7f51d8347
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FLASH_FastProgram.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/FLASH_FastProgram.ioc b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/FLASH_FastProgram.ioc
new file mode 100644
index 000000000..1e629208c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/FLASH_FastProgram.ioc
@@ -0,0 +1,118 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FLASH_FastProgram.ioc
+ProjectManager.ProjectName=FLASH_FastProgram
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=FLASH_FastProgram
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/main.h
new file mode 100644
index 000000000..ace37522b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/main.h
@@ -0,0 +1,328 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_FastProgram/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Base address of the Flash pages */
+
+#define ADDR_FLASH_PAGE_0     ((uint32_t)0x08000000) /* Base @ of Page 0, 2 Kbytes */
+#define ADDR_FLASH_PAGE_1     ((uint32_t)0x08000800) /* Base @ of Page 1, 2 Kbytes */
+#define ADDR_FLASH_PAGE_2     ((uint32_t)0x08001000) /* Base @ of Page 2, 2 Kbytes */
+#define ADDR_FLASH_PAGE_3     ((uint32_t)0x08001800) /* Base @ of Page 3, 2 Kbytes */
+#define ADDR_FLASH_PAGE_4     ((uint32_t)0x08002000) /* Base @ of Page 4, 2 Kbytes */
+#define ADDR_FLASH_PAGE_5     ((uint32_t)0x08002800) /* Base @ of Page 5, 2 Kbytes */
+#define ADDR_FLASH_PAGE_6     ((uint32_t)0x08003000) /* Base @ of Page 6, 2 Kbytes */
+#define ADDR_FLASH_PAGE_7     ((uint32_t)0x08003800) /* Base @ of Page 7, 2 Kbytes */
+#define ADDR_FLASH_PAGE_8     ((uint32_t)0x08004000) /* Base @ of Page 8, 2 Kbytes */
+#define ADDR_FLASH_PAGE_9     ((uint32_t)0x08004800) /* Base @ of Page 9, 2 Kbytes */
+#define ADDR_FLASH_PAGE_10    ((uint32_t)0x08005000) /* Base @ of Page 10, 2 Kbytes */
+#define ADDR_FLASH_PAGE_11    ((uint32_t)0x08005800) /* Base @ of Page 11, 2 Kbytes */
+#define ADDR_FLASH_PAGE_12    ((uint32_t)0x08006000) /* Base @ of Page 12, 2 Kbytes */
+#define ADDR_FLASH_PAGE_13    ((uint32_t)0x08006800) /* Base @ of Page 13, 2 Kbytes */
+#define ADDR_FLASH_PAGE_14    ((uint32_t)0x08007000) /* Base @ of Page 14, 2 Kbytes */
+#define ADDR_FLASH_PAGE_15    ((uint32_t)0x08007800) /* Base @ of Page 15, 2 Kbytes */
+#define ADDR_FLASH_PAGE_16    ((uint32_t)0x08008000) /* Base @ of Page 16, 2 Kbytes */
+#define ADDR_FLASH_PAGE_17    ((uint32_t)0x08008800) /* Base @ of Page 17, 2 Kbytes */
+#define ADDR_FLASH_PAGE_18    ((uint32_t)0x08009000) /* Base @ of Page 18, 2 Kbytes */
+#define ADDR_FLASH_PAGE_19    ((uint32_t)0x08009800) /* Base @ of Page 19, 2 Kbytes */
+#define ADDR_FLASH_PAGE_20    ((uint32_t)0x0800A000) /* Base @ of Page 20, 2 Kbytes */
+#define ADDR_FLASH_PAGE_21    ((uint32_t)0x0800A800) /* Base @ of Page 21, 2 Kbytes */
+#define ADDR_FLASH_PAGE_22    ((uint32_t)0x0800B000) /* Base @ of Page 22, 2 Kbytes */
+#define ADDR_FLASH_PAGE_23    ((uint32_t)0x0800B800) /* Base @ of Page 23, 2 Kbytes */
+#define ADDR_FLASH_PAGE_24    ((uint32_t)0x0800C000) /* Base @ of Page 24, 2 Kbytes */
+#define ADDR_FLASH_PAGE_25    ((uint32_t)0x0800C800) /* Base @ of Page 25, 2 Kbytes */
+#define ADDR_FLASH_PAGE_26    ((uint32_t)0x0800D000) /* Base @ of Page 26, 2 Kbytes */
+#define ADDR_FLASH_PAGE_27    ((uint32_t)0x0800D800) /* Base @ of Page 27, 2 Kbytes */
+#define ADDR_FLASH_PAGE_28    ((uint32_t)0x0800E000) /* Base @ of Page 28, 2 Kbytes */
+#define ADDR_FLASH_PAGE_29    ((uint32_t)0x0800E800) /* Base @ of Page 29, 2 Kbytes */
+#define ADDR_FLASH_PAGE_30    ((uint32_t)0x0800F000) /* Base @ of Page 30, 2 Kbytes */
+#define ADDR_FLASH_PAGE_31    ((uint32_t)0x0800F800) /* Base @ of Page 31, 2 Kbytes */
+#define ADDR_FLASH_PAGE_32    ((uint32_t)0x08010000) /* Base @ of Page 32, 2 Kbytes */
+#define ADDR_FLASH_PAGE_33    ((uint32_t)0x08010800) /* Base @ of Page 33, 2 Kbytes */
+#define ADDR_FLASH_PAGE_34    ((uint32_t)0x08011000) /* Base @ of Page 34, 2 Kbytes */
+#define ADDR_FLASH_PAGE_35    ((uint32_t)0x08011800) /* Base @ of Page 35, 2 Kbytes */
+#define ADDR_FLASH_PAGE_36    ((uint32_t)0x08012000) /* Base @ of Page 36, 2 Kbytes */
+#define ADDR_FLASH_PAGE_37    ((uint32_t)0x08012800) /* Base @ of Page 37, 2 Kbytes */
+#define ADDR_FLASH_PAGE_38    ((uint32_t)0x08013000) /* Base @ of Page 38, 2 Kbytes */
+#define ADDR_FLASH_PAGE_39    ((uint32_t)0x08013800) /* Base @ of Page 39, 2 Kbytes */
+#define ADDR_FLASH_PAGE_40    ((uint32_t)0x08014000) /* Base @ of Page 40, 2 Kbytes */
+#define ADDR_FLASH_PAGE_41    ((uint32_t)0x08014800) /* Base @ of Page 41, 2 Kbytes */
+#define ADDR_FLASH_PAGE_42    ((uint32_t)0x08015000) /* Base @ of Page 42, 2 Kbytes */
+#define ADDR_FLASH_PAGE_43    ((uint32_t)0x08015800) /* Base @ of Page 43, 2 Kbytes */
+#define ADDR_FLASH_PAGE_44    ((uint32_t)0x08016000) /* Base @ of Page 44, 2 Kbytes */
+#define ADDR_FLASH_PAGE_45    ((uint32_t)0x08016800) /* Base @ of Page 45, 2 Kbytes */
+#define ADDR_FLASH_PAGE_46    ((uint32_t)0x08017000) /* Base @ of Page 46, 2 Kbytes */
+#define ADDR_FLASH_PAGE_47    ((uint32_t)0x08017800) /* Base @ of Page 47, 2 Kbytes */
+#define ADDR_FLASH_PAGE_48    ((uint32_t)0x08018000) /* Base @ of Page 48, 2 Kbytes */
+#define ADDR_FLASH_PAGE_49    ((uint32_t)0x08018800) /* Base @ of Page 49, 2 Kbytes */
+#define ADDR_FLASH_PAGE_50    ((uint32_t)0x08019000) /* Base @ of Page 50, 2 Kbytes */
+#define ADDR_FLASH_PAGE_51    ((uint32_t)0x08019800) /* Base @ of Page 51, 2 Kbytes */
+#define ADDR_FLASH_PAGE_52    ((uint32_t)0x0801A000) /* Base @ of Page 52, 2 Kbytes */
+#define ADDR_FLASH_PAGE_53    ((uint32_t)0x0801A800) /* Base @ of Page 53, 2 Kbytes */
+#define ADDR_FLASH_PAGE_54    ((uint32_t)0x0801B000) /* Base @ of Page 54, 2 Kbytes */
+#define ADDR_FLASH_PAGE_55    ((uint32_t)0x0801B800) /* Base @ of Page 55, 2 Kbytes */
+#define ADDR_FLASH_PAGE_56    ((uint32_t)0x0801C000) /* Base @ of Page 56, 2 Kbytes */
+#define ADDR_FLASH_PAGE_57    ((uint32_t)0x0801C800) /* Base @ of Page 57, 2 Kbytes */
+#define ADDR_FLASH_PAGE_58    ((uint32_t)0x0801D000) /* Base @ of Page 58, 2 Kbytes */
+#define ADDR_FLASH_PAGE_59    ((uint32_t)0x0801D800) /* Base @ of Page 59, 2 Kbytes */
+#define ADDR_FLASH_PAGE_60    ((uint32_t)0x0801E000) /* Base @ of Page 60, 2 Kbytes */
+#define ADDR_FLASH_PAGE_61    ((uint32_t)0x0801E800) /* Base @ of Page 61, 2 Kbytes */
+#define ADDR_FLASH_PAGE_62    ((uint32_t)0x0801F000) /* Base @ of Page 62, 2 Kbytes */
+#define ADDR_FLASH_PAGE_63    ((uint32_t)0x0801F800) /* Base @ of Page 63, 2 Kbytes */
+#define ADDR_FLASH_PAGE_64    ((uint32_t)0x08020000) /* Base @ of Page 64, 2 Kbytes */
+#define ADDR_FLASH_PAGE_65    ((uint32_t)0x08020800) /* Base @ of Page 65, 2 Kbytes */
+#define ADDR_FLASH_PAGE_66    ((uint32_t)0x08021000) /* Base @ of Page 66, 2 Kbytes */
+#define ADDR_FLASH_PAGE_67    ((uint32_t)0x08021800) /* Base @ of Page 67, 2 Kbytes */
+#define ADDR_FLASH_PAGE_68    ((uint32_t)0x08022000) /* Base @ of Page 68, 2 Kbytes */
+#define ADDR_FLASH_PAGE_69    ((uint32_t)0x08022800) /* Base @ of Page 69, 2 Kbytes */
+#define ADDR_FLASH_PAGE_70    ((uint32_t)0x08023000) /* Base @ of Page 70, 2 Kbytes */
+#define ADDR_FLASH_PAGE_71    ((uint32_t)0x08023800) /* Base @ of Page 71, 2 Kbytes */
+#define ADDR_FLASH_PAGE_72    ((uint32_t)0x08024000) /* Base @ of Page 72, 2 Kbytes */
+#define ADDR_FLASH_PAGE_73    ((uint32_t)0x08024800) /* Base @ of Page 73, 2 Kbytes */
+#define ADDR_FLASH_PAGE_74    ((uint32_t)0x08025000) /* Base @ of Page 74, 2 Kbytes */
+#define ADDR_FLASH_PAGE_75    ((uint32_t)0x08025800) /* Base @ of Page 75, 2 Kbytes */
+#define ADDR_FLASH_PAGE_76    ((uint32_t)0x08026000) /* Base @ of Page 76, 2 Kbytes */
+#define ADDR_FLASH_PAGE_77    ((uint32_t)0x08026800) /* Base @ of Page 77, 2 Kbytes */
+#define ADDR_FLASH_PAGE_78    ((uint32_t)0x08027000) /* Base @ of Page 78, 2 Kbytes */
+#define ADDR_FLASH_PAGE_79    ((uint32_t)0x08027800) /* Base @ of Page 79, 2 Kbytes */
+#define ADDR_FLASH_PAGE_80    ((uint32_t)0x08028000) /* Base @ of Page 80, 2 Kbytes */
+#define ADDR_FLASH_PAGE_81    ((uint32_t)0x08028800) /* Base @ of Page 81, 2 Kbytes */
+#define ADDR_FLASH_PAGE_82    ((uint32_t)0x08029000) /* Base @ of Page 82, 2 Kbytes */
+#define ADDR_FLASH_PAGE_83    ((uint32_t)0x08029800) /* Base @ of Page 83, 2 Kbytes */
+#define ADDR_FLASH_PAGE_84    ((uint32_t)0x0802A000) /* Base @ of Page 84, 2 Kbytes */
+#define ADDR_FLASH_PAGE_85    ((uint32_t)0x0802A800) /* Base @ of Page 85, 2 Kbytes */
+#define ADDR_FLASH_PAGE_86    ((uint32_t)0x0802B000) /* Base @ of Page 86, 2 Kbytes */
+#define ADDR_FLASH_PAGE_87    ((uint32_t)0x0802B800) /* Base @ of Page 87, 2 Kbytes */
+#define ADDR_FLASH_PAGE_88    ((uint32_t)0x0802C000) /* Base @ of Page 88, 2 Kbytes */
+#define ADDR_FLASH_PAGE_89    ((uint32_t)0x0802C800) /* Base @ of Page 89, 2 Kbytes */
+#define ADDR_FLASH_PAGE_90    ((uint32_t)0x0802D000) /* Base @ of Page 90, 2 Kbytes */
+#define ADDR_FLASH_PAGE_91    ((uint32_t)0x0802D800) /* Base @ of Page 91, 2 Kbytes */
+#define ADDR_FLASH_PAGE_92    ((uint32_t)0x0802E000) /* Base @ of Page 92, 2 Kbytes */
+#define ADDR_FLASH_PAGE_93    ((uint32_t)0x0802E800) /* Base @ of Page 93, 2 Kbytes */
+#define ADDR_FLASH_PAGE_94    ((uint32_t)0x0802F000) /* Base @ of Page 94, 2 Kbytes */
+#define ADDR_FLASH_PAGE_95    ((uint32_t)0x0802F800) /* Base @ of Page 95, 2 Kbytes */
+#define ADDR_FLASH_PAGE_96    ((uint32_t)0x08030000) /* Base @ of Page 96, 2 Kbytes */
+#define ADDR_FLASH_PAGE_97    ((uint32_t)0x08030800) /* Base @ of Page 97, 2 Kbytes */
+#define ADDR_FLASH_PAGE_98    ((uint32_t)0x08031000) /* Base @ of Page 98, 2 Kbytes */
+#define ADDR_FLASH_PAGE_99    ((uint32_t)0x08031800) /* Base @ of Page 99, 2 Kbytes */
+#define ADDR_FLASH_PAGE_100   ((uint32_t)0x08032000) /* Base @ of Page 100, 2 Kbytes */
+#define ADDR_FLASH_PAGE_101   ((uint32_t)0x08032800) /* Base @ of Page 101, 2 Kbytes */
+#define ADDR_FLASH_PAGE_102   ((uint32_t)0x08033000) /* Base @ of Page 102, 2 Kbytes */
+#define ADDR_FLASH_PAGE_103   ((uint32_t)0x08033800) /* Base @ of Page 103, 2 Kbytes */
+#define ADDR_FLASH_PAGE_104   ((uint32_t)0x08034000) /* Base @ of Page 104, 2 Kbytes */
+#define ADDR_FLASH_PAGE_105   ((uint32_t)0x08034800) /* Base @ of Page 105, 2 Kbytes */
+#define ADDR_FLASH_PAGE_106   ((uint32_t)0x08035000) /* Base @ of Page 106, 2 Kbytes */
+#define ADDR_FLASH_PAGE_107   ((uint32_t)0x08035800) /* Base @ of Page 107, 2 Kbytes */
+#define ADDR_FLASH_PAGE_108   ((uint32_t)0x08036000) /* Base @ of Page 108, 2 Kbytes */
+#define ADDR_FLASH_PAGE_109   ((uint32_t)0x08036800) /* Base @ of Page 109, 2 Kbytes */
+#define ADDR_FLASH_PAGE_110   ((uint32_t)0x08037000) /* Base @ of Page 110, 2 Kbytes */
+#define ADDR_FLASH_PAGE_111   ((uint32_t)0x08037800) /* Base @ of Page 111, 2 Kbytes */
+#define ADDR_FLASH_PAGE_112   ((uint32_t)0x08038000) /* Base @ of Page 112, 2 Kbytes */
+#define ADDR_FLASH_PAGE_113   ((uint32_t)0x08038800) /* Base @ of Page 113, 2 Kbytes */
+#define ADDR_FLASH_PAGE_114   ((uint32_t)0x08039000) /* Base @ of Page 114, 2 Kbytes */
+#define ADDR_FLASH_PAGE_115   ((uint32_t)0x08039800) /* Base @ of Page 115, 2 Kbytes */
+#define ADDR_FLASH_PAGE_116   ((uint32_t)0x0803A000) /* Base @ of Page 116, 2 Kbytes */
+#define ADDR_FLASH_PAGE_117   ((uint32_t)0x0803A800) /* Base @ of Page 117, 2 Kbytes */
+#define ADDR_FLASH_PAGE_118   ((uint32_t)0x0803B000) /* Base @ of Page 118, 2 Kbytes */
+#define ADDR_FLASH_PAGE_119   ((uint32_t)0x0803B800) /* Base @ of Page 119, 2 Kbytes */
+#define ADDR_FLASH_PAGE_120   ((uint32_t)0x0803C000) /* Base @ of Page 120, 2 Kbytes */
+#define ADDR_FLASH_PAGE_121   ((uint32_t)0x0803C800) /* Base @ of Page 121, 2 Kbytes */
+#define ADDR_FLASH_PAGE_122   ((uint32_t)0x0803D000) /* Base @ of Page 122, 2 Kbytes */
+#define ADDR_FLASH_PAGE_123   ((uint32_t)0x0803D800) /* Base @ of Page 123, 2 Kbytes */
+#define ADDR_FLASH_PAGE_124   ((uint32_t)0x0803E000) /* Base @ of Page 124, 2 Kbytes */
+#define ADDR_FLASH_PAGE_125   ((uint32_t)0x0803E800) /* Base @ of Page 125, 2 Kbytes */
+#define ADDR_FLASH_PAGE_126   ((uint32_t)0x0803F000) /* Base @ of Page 126, 2 Kbytes */
+#define ADDR_FLASH_PAGE_127   ((uint32_t)0x0803F800) /* Base @ of Page 127, 2 Kbytes */
+#define ADDR_FLASH_PAGE_128   ((uint32_t)0x08040000) /* Base @ of Page 128, 2 Kbytes */
+#define ADDR_FLASH_PAGE_129   ((uint32_t)0x08040800) /* Base @ of Page 129, 2 Kbytes */
+#define ADDR_FLASH_PAGE_130   ((uint32_t)0x08041000) /* Base @ of Page 130, 2 Kbytes */
+#define ADDR_FLASH_PAGE_131   ((uint32_t)0x08041800) /* Base @ of Page 131, 2 Kbytes */
+#define ADDR_FLASH_PAGE_132   ((uint32_t)0x08042000) /* Base @ of Page 132, 2 Kbytes */
+#define ADDR_FLASH_PAGE_133   ((uint32_t)0x08042800) /* Base @ of Page 133, 2 Kbytes */
+#define ADDR_FLASH_PAGE_134   ((uint32_t)0x08043000) /* Base @ of Page 134, 2 Kbytes */
+#define ADDR_FLASH_PAGE_135   ((uint32_t)0x08043800) /* Base @ of Page 135, 2 Kbytes */
+#define ADDR_FLASH_PAGE_136   ((uint32_t)0x08044000) /* Base @ of Page 136, 2 Kbytes */
+#define ADDR_FLASH_PAGE_137   ((uint32_t)0x08044800) /* Base @ of Page 137, 2 Kbytes */
+#define ADDR_FLASH_PAGE_138   ((uint32_t)0x08045000) /* Base @ of Page 138, 2 Kbytes */
+#define ADDR_FLASH_PAGE_139   ((uint32_t)0x08045800) /* Base @ of Page 139, 2 Kbytes */
+#define ADDR_FLASH_PAGE_140   ((uint32_t)0x08046000) /* Base @ of Page 140, 2 Kbytes */
+#define ADDR_FLASH_PAGE_141   ((uint32_t)0x08046800) /* Base @ of Page 141, 2 Kbytes */
+#define ADDR_FLASH_PAGE_142   ((uint32_t)0x08047000) /* Base @ of Page 142, 2 Kbytes */
+#define ADDR_FLASH_PAGE_143   ((uint32_t)0x08047800) /* Base @ of Page 143, 2 Kbytes */
+#define ADDR_FLASH_PAGE_144   ((uint32_t)0x08048000) /* Base @ of Page 144, 2 Kbytes */
+#define ADDR_FLASH_PAGE_145   ((uint32_t)0x08048800) /* Base @ of Page 145, 2 Kbytes */
+#define ADDR_FLASH_PAGE_146   ((uint32_t)0x08049000) /* Base @ of Page 146, 2 Kbytes */
+#define ADDR_FLASH_PAGE_147   ((uint32_t)0x08049800) /* Base @ of Page 147, 2 Kbytes */
+#define ADDR_FLASH_PAGE_148   ((uint32_t)0x0804a000) /* Base @ of Page 148, 2 Kbytes */
+#define ADDR_FLASH_PAGE_149   ((uint32_t)0x0804a800) /* Base @ of Page 149, 2 Kbytes */
+#define ADDR_FLASH_PAGE_150   ((uint32_t)0x0804b000) /* Base @ of Page 150, 2 Kbytes */
+#define ADDR_FLASH_PAGE_151   ((uint32_t)0x0804b800) /* Base @ of Page 151, 2 Kbytes */
+#define ADDR_FLASH_PAGE_152   ((uint32_t)0x0804c000) /* Base @ of Page 152, 2 Kbytes */
+#define ADDR_FLASH_PAGE_153   ((uint32_t)0x0804c800) /* Base @ of Page 153, 2 Kbytes */
+#define ADDR_FLASH_PAGE_154   ((uint32_t)0x0804d000) /* Base @ of Page 154, 2 Kbytes */
+#define ADDR_FLASH_PAGE_155   ((uint32_t)0x0804d800) /* Base @ of Page 155, 2 Kbytes */
+#define ADDR_FLASH_PAGE_156   ((uint32_t)0x0804e000) /* Base @ of Page 156, 2 Kbytes */
+#define ADDR_FLASH_PAGE_157   ((uint32_t)0x0804e800) /* Base @ of Page 157, 2 Kbytes */
+#define ADDR_FLASH_PAGE_158   ((uint32_t)0x0804f000) /* Base @ of Page 158, 2 Kbytes */
+#define ADDR_FLASH_PAGE_159   ((uint32_t)0x0804f800) /* Base @ of Page 159, 2 Kbytes */
+#define ADDR_FLASH_PAGE_160   ((uint32_t)0x08050000) /* Base @ of Page 160, 2 Kbytes */
+#define ADDR_FLASH_PAGE_161   ((uint32_t)0x08050800) /* Base @ of Page 161, 2 Kbytes */
+#define ADDR_FLASH_PAGE_162   ((uint32_t)0x08051000) /* Base @ of Page 162, 2 Kbytes */
+#define ADDR_FLASH_PAGE_163   ((uint32_t)0x08051800) /* Base @ of Page 163, 2 Kbytes */
+#define ADDR_FLASH_PAGE_164   ((uint32_t)0x08052000) /* Base @ of Page 164, 2 Kbytes */
+#define ADDR_FLASH_PAGE_165   ((uint32_t)0x08052800) /* Base @ of Page 165, 2 Kbytes */
+#define ADDR_FLASH_PAGE_166   ((uint32_t)0x08053000) /* Base @ of Page 166, 2 Kbytes */
+#define ADDR_FLASH_PAGE_167   ((uint32_t)0x08053800) /* Base @ of Page 167, 2 Kbytes */
+#define ADDR_FLASH_PAGE_168   ((uint32_t)0x08054000) /* Base @ of Page 168, 2 Kbytes */
+#define ADDR_FLASH_PAGE_169   ((uint32_t)0x08054800) /* Base @ of Page 169, 2 Kbytes */
+#define ADDR_FLASH_PAGE_170   ((uint32_t)0x08055000) /* Base @ of Page 170, 2 Kbytes */
+#define ADDR_FLASH_PAGE_171   ((uint32_t)0x08055800) /* Base @ of Page 171, 2 Kbytes */
+#define ADDR_FLASH_PAGE_172   ((uint32_t)0x08056000) /* Base @ of Page 172, 2 Kbytes */
+#define ADDR_FLASH_PAGE_173   ((uint32_t)0x08056800) /* Base @ of Page 173, 2 Kbytes */
+#define ADDR_FLASH_PAGE_174   ((uint32_t)0x08057000) /* Base @ of Page 174, 2 Kbytes */
+#define ADDR_FLASH_PAGE_175   ((uint32_t)0x08057800) /* Base @ of Page 175, 2 Kbytes */
+#define ADDR_FLASH_PAGE_176   ((uint32_t)0x08058000) /* Base @ of Page 176, 2 Kbytes */
+#define ADDR_FLASH_PAGE_177   ((uint32_t)0x08058800) /* Base @ of Page 177, 2 Kbytes */
+#define ADDR_FLASH_PAGE_178   ((uint32_t)0x08059000) /* Base @ of Page 178, 2 Kbytes */
+#define ADDR_FLASH_PAGE_179   ((uint32_t)0x08059800) /* Base @ of Page 179, 2 Kbytes */
+#define ADDR_FLASH_PAGE_180   ((uint32_t)0x0805a000) /* Base @ of Page 180, 2 Kbytes */
+#define ADDR_FLASH_PAGE_181   ((uint32_t)0x0805a800) /* Base @ of Page 181, 2 Kbytes */
+#define ADDR_FLASH_PAGE_182   ((uint32_t)0x0805b000) /* Base @ of Page 182, 2 Kbytes */
+#define ADDR_FLASH_PAGE_183   ((uint32_t)0x0805b800) /* Base @ of Page 183, 2 Kbytes */
+#define ADDR_FLASH_PAGE_184   ((uint32_t)0x0805c000) /* Base @ of Page 184, 2 Kbytes */
+#define ADDR_FLASH_PAGE_185   ((uint32_t)0x0805c800) /* Base @ of Page 185, 2 Kbytes */
+#define ADDR_FLASH_PAGE_186   ((uint32_t)0x0805d000) /* Base @ of Page 186, 2 Kbytes */
+#define ADDR_FLASH_PAGE_187   ((uint32_t)0x0805d800) /* Base @ of Page 187, 2 Kbytes */
+#define ADDR_FLASH_PAGE_188   ((uint32_t)0x0805e000) /* Base @ of Page 188, 2 Kbytes */
+#define ADDR_FLASH_PAGE_189   ((uint32_t)0x0805e800) /* Base @ of Page 189, 2 Kbytes */
+#define ADDR_FLASH_PAGE_190   ((uint32_t)0x0805f000) /* Base @ of Page 190, 2 Kbytes */
+#define ADDR_FLASH_PAGE_191   ((uint32_t)0x0805f800) /* Base @ of Page 191, 2 Kbytes */
+#define ADDR_FLASH_PAGE_192   ((uint32_t)0x08060000) /* Base @ of Page 192, 2 Kbytes */
+#define ADDR_FLASH_PAGE_193   ((uint32_t)0x08060800) /* Base @ of Page 193, 2 Kbytes */
+#define ADDR_FLASH_PAGE_194   ((uint32_t)0x08061000) /* Base @ of Page 194, 2 Kbytes */
+#define ADDR_FLASH_PAGE_195   ((uint32_t)0x08061800) /* Base @ of Page 195, 2 Kbytes */
+#define ADDR_FLASH_PAGE_196   ((uint32_t)0x08062000) /* Base @ of Page 196, 2 Kbytes */
+#define ADDR_FLASH_PAGE_197   ((uint32_t)0x08062800) /* Base @ of Page 197, 2 Kbytes */
+#define ADDR_FLASH_PAGE_198   ((uint32_t)0x08063000) /* Base @ of Page 198, 2 Kbytes */
+#define ADDR_FLASH_PAGE_199   ((uint32_t)0x08063800) /* Base @ of Page 199, 2 Kbytes */
+#define ADDR_FLASH_PAGE_200   ((uint32_t)0x08064000) /* Base @ of Page 200, 2 Kbytes */
+#define ADDR_FLASH_PAGE_201   ((uint32_t)0x08064800) /* Base @ of Page 201, 2 Kbytes */
+#define ADDR_FLASH_PAGE_202   ((uint32_t)0x08065000) /* Base @ of Page 202, 2 Kbytes */
+#define ADDR_FLASH_PAGE_203   ((uint32_t)0x08065800) /* Base @ of Page 203, 2 Kbytes */
+#define ADDR_FLASH_PAGE_204   ((uint32_t)0x08066000) /* Base @ of Page 204, 2 Kbytes */
+#define ADDR_FLASH_PAGE_205   ((uint32_t)0x08066800) /* Base @ of Page 205, 2 Kbytes */
+#define ADDR_FLASH_PAGE_206   ((uint32_t)0x08067000) /* Base @ of Page 206, 2 Kbytes */
+#define ADDR_FLASH_PAGE_207   ((uint32_t)0x08067800) /* Base @ of Page 207, 2 Kbytes */
+#define ADDR_FLASH_PAGE_208   ((uint32_t)0x08068000) /* Base @ of Page 208, 2 Kbytes */
+#define ADDR_FLASH_PAGE_209   ((uint32_t)0x08068800) /* Base @ of Page 209, 2 Kbytes */
+#define ADDR_FLASH_PAGE_210   ((uint32_t)0x08069000) /* Base @ of Page 210, 2 Kbytes */
+#define ADDR_FLASH_PAGE_211   ((uint32_t)0x08069800) /* Base @ of Page 211, 2 Kbytes */
+#define ADDR_FLASH_PAGE_212   ((uint32_t)0x0806a000) /* Base @ of Page 212, 2 Kbytes */
+#define ADDR_FLASH_PAGE_213   ((uint32_t)0x0806a800) /* Base @ of Page 213, 2 Kbytes */
+#define ADDR_FLASH_PAGE_214   ((uint32_t)0x0806b000) /* Base @ of Page 214, 2 Kbytes */
+#define ADDR_FLASH_PAGE_215   ((uint32_t)0x0806b800) /* Base @ of Page 215, 2 Kbytes */
+#define ADDR_FLASH_PAGE_216   ((uint32_t)0x0806c000) /* Base @ of Page 216, 2 Kbytes */
+#define ADDR_FLASH_PAGE_217   ((uint32_t)0x0806c800) /* Base @ of Page 217, 2 Kbytes */
+#define ADDR_FLASH_PAGE_218   ((uint32_t)0x0806d000) /* Base @ of Page 218, 2 Kbytes */
+#define ADDR_FLASH_PAGE_219   ((uint32_t)0x0806d800) /* Base @ of Page 219, 2 Kbytes */
+#define ADDR_FLASH_PAGE_220   ((uint32_t)0x0806e000) /* Base @ of Page 220, 2 Kbytes */
+#define ADDR_FLASH_PAGE_221   ((uint32_t)0x0806e800) /* Base @ of Page 221, 2 Kbytes */
+#define ADDR_FLASH_PAGE_222   ((uint32_t)0x0806f000) /* Base @ of Page 222, 2 Kbytes */
+#define ADDR_FLASH_PAGE_223   ((uint32_t)0x0806f800) /* Base @ of Page 223, 2 Kbytes */
+#define ADDR_FLASH_PAGE_224   ((uint32_t)0x08070000) /* Base @ of Page 224, 2 Kbytes */
+#define ADDR_FLASH_PAGE_225   ((uint32_t)0x08070800) /* Base @ of Page 225, 2 Kbytes */
+#define ADDR_FLASH_PAGE_226   ((uint32_t)0x08071000) /* Base @ of Page 226, 2 Kbytes */
+#define ADDR_FLASH_PAGE_227   ((uint32_t)0x08071800) /* Base @ of Page 227, 2 Kbytes */
+#define ADDR_FLASH_PAGE_228   ((uint32_t)0x08072000) /* Base @ of Page 228, 2 Kbytes */
+#define ADDR_FLASH_PAGE_229   ((uint32_t)0x08072800) /* Base @ of Page 229, 2 Kbytes */
+#define ADDR_FLASH_PAGE_230   ((uint32_t)0x08073000) /* Base @ of Page 230, 2 Kbytes */
+#define ADDR_FLASH_PAGE_231   ((uint32_t)0x08073800) /* Base @ of Page 231, 2 Kbytes */
+#define ADDR_FLASH_PAGE_232   ((uint32_t)0x08074000) /* Base @ of Page 232, 2 Kbytes */
+#define ADDR_FLASH_PAGE_233   ((uint32_t)0x08074800) /* Base @ of Page 233, 2 Kbytes */
+#define ADDR_FLASH_PAGE_234   ((uint32_t)0x08075000) /* Base @ of Page 234, 2 Kbytes */
+#define ADDR_FLASH_PAGE_235   ((uint32_t)0x08075800) /* Base @ of Page 235, 2 Kbytes */
+#define ADDR_FLASH_PAGE_236   ((uint32_t)0x08076000) /* Base @ of Page 236, 2 Kbytes */
+#define ADDR_FLASH_PAGE_237   ((uint32_t)0x08076800) /* Base @ of Page 237, 2 Kbytes */
+#define ADDR_FLASH_PAGE_238   ((uint32_t)0x08077000) /* Base @ of Page 238, 2 Kbytes */
+#define ADDR_FLASH_PAGE_239   ((uint32_t)0x08077800) /* Base @ of Page 239, 2 Kbytes */
+#define ADDR_FLASH_PAGE_240   ((uint32_t)0x08078000) /* Base @ of Page 240, 2 Kbytes */
+#define ADDR_FLASH_PAGE_241   ((uint32_t)0x08078800) /* Base @ of Page 241, 2 Kbytes */
+#define ADDR_FLASH_PAGE_242   ((uint32_t)0x08079000) /* Base @ of Page 242, 2 Kbytes */
+#define ADDR_FLASH_PAGE_243   ((uint32_t)0x08079800) /* Base @ of Page 243, 2 Kbytes */
+#define ADDR_FLASH_PAGE_244   ((uint32_t)0x0807a000) /* Base @ of Page 244, 2 Kbytes */
+#define ADDR_FLASH_PAGE_245   ((uint32_t)0x0807a800) /* Base @ of Page 245, 2 Kbytes */
+#define ADDR_FLASH_PAGE_246   ((uint32_t)0x0807b000) /* Base @ of Page 246, 2 Kbytes */
+#define ADDR_FLASH_PAGE_247   ((uint32_t)0x0807b800) /* Base @ of Page 247, 2 Kbytes */
+#define ADDR_FLASH_PAGE_248   ((uint32_t)0x0807c000) /* Base @ of Page 248, 2 Kbytes */
+#define ADDR_FLASH_PAGE_249   ((uint32_t)0x0807c800) /* Base @ of Page 249, 2 Kbytes */
+#define ADDR_FLASH_PAGE_250   ((uint32_t)0x0807d000) /* Base @ of Page 250, 2 Kbytes */
+#define ADDR_FLASH_PAGE_251   ((uint32_t)0x0807d800) /* Base @ of Page 251, 2 Kbytes */
+#define ADDR_FLASH_PAGE_252   ((uint32_t)0x0807e000) /* Base @ of Page 252, 2 Kbytes */
+#define ADDR_FLASH_PAGE_253   ((uint32_t)0x0807e800) /* Base @ of Page 253, 2 Kbytes */
+#define ADDR_FLASH_PAGE_254   ((uint32_t)0x0807f000) /* Base @ of Page 254, 2 Kbytes */
+#define ADDR_FLASH_PAGE_255   ((uint32_t)0x0807f800) /* Base @ of Page 255, 2 Kbytes */
+      
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..39fd88a7a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_FastProgram/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/FLASH_FastProgram.uvoptx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/FLASH_FastProgram.uvoptx
new file mode 100644
index 000000000..4e9f5e333
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/FLASH_FastProgram.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FLASH_FastProgram</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/FLASH_FastProgram.uvprojx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/FLASH_FastProgram.uvprojx
new file mode 100644
index 000000000..2166bd11b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/FLASH_FastProgram.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FLASH_FastProgram</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FLASH_FastProgram\Exe\</OutputDirectory>
+          <OutputName>FLASH_FastProgram</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
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+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FLASH_FastProgram"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..099f130e1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.793818549">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.793818549" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.793818549" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.793818549." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1489130422" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.809611810" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.416065614" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1698665735" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1510112909" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1535216769" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.394017267" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.664267785" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.999336302" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1554279431" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.98759842" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FLASH_FastProgram}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.182742484" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.349050217" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.444873240" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1842984357" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.818317649" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1659259205" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.2015084003" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.715840889" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1770313799" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1036446649" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1854913022" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.272163341" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1256492171" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1753212787" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1950383403" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
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+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FLASH_FastProgram.null.313504466" name="FLASH_FastProgram"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.793818549;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.793818549.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.818317649;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1918731531">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1340144;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1340144.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1952789850;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1746226954">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/.project
new file mode 100644
index 000000000..dce51c913
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FLASH_FastProgram</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FLASH_FastProgram.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FLASH_FastProgram.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/main.c
new file mode 100644
index 000000000..38dfa79be
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/main.c
@@ -0,0 +1,345 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_FastProgram/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a description of how to erase and fast program
+  *          the STM32G4xx FLASH.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define FLASH_ROW_SIZE          32
+
+/* !!! Be careful the user area should be in another bank than the code !!! */
+#define FLASH_USER_START_ADDR   ADDR_FLASH_PAGE_128   /* Start @ of user Flash area */
+#define FLASH_USER_END_ADDR     (ADDR_FLASH_PAGE_255 + FLASH_PAGE_SIZE - 1)   /* End @ of user Flash area */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+uint32_t BankNumber = 0;
+uint32_t Address = 0, PAGEError = 0;
+__IO uint32_t MemoryProgramStatus = 0;
+__IO uint64_t data64 = 0;
+
+/* Variable used for Erase procedure*/
+static FLASH_EraseInitTypeDef EraseInitStruct;
+
+/* Table used for fast programming */
+static const uint64_t Data64_To_Prog[FLASH_ROW_SIZE] = {
+  0x0000000000000000, 0x1111111111111111, 0x2222222222222222, 0x3333333333333333,
+  0x4444444444444444, 0x5555555555555555, 0x6666666666666666, 0x7777777777777777,
+  0x8888888888888888, 0x9999999999999999, 0xAAAAAAAAAAAAAAAA, 0xBBBBBBBBBBBBBBBB,
+  0xCCCCCCCCCCCCCCCC, 0xDDDDDDDDDDDDDDDD, 0xEEEEEEEEEEEEEEEE, 0xFFFFFFFFFFFFFFFF,
+  0x0011001100110011, 0x2233223322332233, 0x4455445544554455, 0x6677667766776677,
+  0x8899889988998899, 0xAABBAABBAABBAABB, 0xCCDDCCDDCCDDCCDD, 0xEEFFEEFFEEFFEEFF,
+  0x2200220022002200, 0x3311331133113311, 0x6644664466446644, 0x7755775577557755,
+  0xAA88AA88AA88AA88, 0xBB99BB99BB99BB99, 0xEECCEECCEECCEECC, 0xFFDDFFDDFFDDFFDD};
+
+uint8_t data_index = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+static uint32_t GetBank(uint32_t Address);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  uint32_t src_addr = (uint32_t)Data64_To_Prog;
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+  /* Initialize LED1, LED3 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  BSP_LED_Init(LED3);
+
+  /* Unlock the Flash to enable the flash control register access *************/
+  HAL_FLASH_Unlock();
+
+  /* Erase the user Flash area
+    (area defined by FLASH_USER_START_ADDR and FLASH_USER_END_ADDR) ***********/
+
+  /* Clear OPTVERR bit set on virgin samples */
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+  /* Get the bank */
+  BankNumber = GetBank(FLASH_USER_START_ADDR);
+
+  /* Fill EraseInit structure*/
+  EraseInitStruct.TypeErase = FLASH_TYPEERASE_MASSERASE;
+  EraseInitStruct.Banks     = BankNumber;
+
+  if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK)
+  {
+    /*
+      Error occurred while mass erase.
+      User can add here some code to deal with this error.
+      To know the code error, user can call function 'HAL_FLASH_GetError()'
+    */
+    /* Infinite loop */
+    while (1)
+    {
+      /* Switch on LED3 to indicate error in Erase operation */
+      BSP_LED_On(LED3);
+    }
+  }
+
+  /* Program the user Flash area word by word
+    (area defined by FLASH_USER_START_ADDR and FLASH_USER_END_ADDR) ***********/
+
+  Address = FLASH_USER_START_ADDR;
+
+  while (Address < FLASH_USER_END_ADDR)
+  {
+    if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FAST, Address, (uint64_t)src_addr) == HAL_OK)
+    {
+      Address = Address + (FLASH_ROW_SIZE*sizeof(uint64_t));
+    }
+   else
+    {
+      /* Error occurred while writing data in Flash memory.
+         User can add here some code to deal with this error */
+      while (1)
+      {
+        /* Switch on LED3 to indicate error in Write operation */
+        BSP_LED_On(LED3);
+      }
+    }
+  }
+
+  /* Lock the Flash to disable the flash control register access (recommended
+     to protect the FLASH memory against possible unwanted operation) *********/
+  HAL_FLASH_Lock();
+
+  /* Check if the programmed data is OK
+      MemoryProgramStatus = 0: data programmed correctly
+      MemoryProgramStatus != 0: number of words not programmed correctly ******/
+  Address = FLASH_USER_START_ADDR;
+  MemoryProgramStatus = 0x0;
+
+  while (Address < FLASH_USER_END_ADDR)
+  {
+    for (data_index = 0; data_index < FLASH_ROW_SIZE; data_index++)
+    {
+      data64 = *(__IO uint64_t *)Address;
+
+      if(data64 != Data64_To_Prog[data_index])
+      {
+        MemoryProgramStatus++;
+      }
+      Address = Address + sizeof(uint64_t);
+    }
+  }
+
+  /*Check if there is an issue to program data*/
+  if (MemoryProgramStatus == 0)
+  {
+    /* No error detected. Switch on LED1*/
+    BSP_LED_On(LED1);
+  }
+  else
+  {
+    /* Error detected. Switch on LED3*/
+    BSP_LED_On(LED3);
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/**
+  * @brief  Gets the bank of a given address
+  * @param  Addr: Address of the FLASH Memory
+  * @retval The bank of a given address
+  */
+static uint32_t GetBank(uint32_t Addr)
+{
+  uint32_t bank = 0;
+
+  if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0)
+  {
+    /* No Bank swap */
+    if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
+    {
+      bank = FLASH_BANK_1;
+    }
+    else
+    {
+      bank = FLASH_BANK_2;
+    }
+  }
+  else
+  {
+    /* Bank swap */
+    if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
+    {
+      bank = FLASH_BANK_2;
+    }
+    else
+    {
+      bank = FLASH_BANK_1;
+    }
+  }
+
+  return bank;
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..fd0017feb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_FastProgram/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..09a350a1e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/stm32g4xx_it.c
@@ -0,0 +1,117 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_FastProgram/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/readme.txt b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/readme.txt
new file mode 100644
index 000000000..b7f7179fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_FastProgram/readme.txt
@@ -0,0 +1,87 @@
+/**
+  @page FLASH_FastProgram FLASH Erase and Fast Program example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FLASH/FLASH_FastProgram/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FLASH Erase and Fast Program example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure and use the FLASH HAL API to erase and fast program the
+internal Flash memory.
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system clock (SYSCLK)
+to run at 170 MHz.
+
+After Reset, the Flash memory Program/Erase Controller is locked. A dedicated function
+is used to enable the FLASH control register access.
+Before programming the desired addresses, an erase operation is performed using
+the flash erase page feature. The erase procedure is done by filling the erase init
+structure giving the bank which will be mass erased.
+
+Once this operation is finished, page fast programming operation will be performed
+in the Flash memory. The written data is then read back and checked.
+
+The STM32G474E-EVAL1 Rev B board LEDs can be used to monitor the transfer status:
+ - LED1 is ON when there are no errors detected after data programming
+ - LED3 is ON when there are errors detected after data programming
+ - LED3 is ON when there is an issue during erase or program procedure
+
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+
+@par Keywords
+
+Memory, FLASH, Fast Program, Sector, Mass Erase
+
+@par Directory contents
+
+  - FLASH/FLASH_FastProgram/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - FLASH/FLASH_FastProgram/Inc/stm32g4xx_hal_conf.h        HAL Configuration file
+  - FLASH/FLASH_FastProgram/Inc/stm32g4xx_it.h              Header for stm32g4xx_it.c
+  - FLASH/FLASH_FastProgram/Inc/main.h                      Header for main.c module
+  - FLASH/FLASH_FastProgram/Src/stm32g4xx_it.c              Interrupt handlers
+  - FLASH/FLASH_FastProgram/Src/main.c                      Main program
+  - FLASH/FLASH_FastProgram/Src/stm32g4xx_hal_msp.c         MSP initialization and de-initialization
+  - FLASH/FLASH_FastProgram/Src/system_stm32g4xx.c          STM32G4xx system clock configuration file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/.extSettings b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/FLASH_WriteProtection.ewd b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/FLASH_WriteProtection.ewd
new file mode 100644
index 000000000..1b88b2db6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/FLASH_WriteProtection.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FLASH_WriteProtection</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/FLASH_WriteProtection.ewp b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/FLASH_WriteProtection.ewp
new file mode 100644
index 000000000..215df0648
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/FLASH_WriteProtection.ewp
@@ -0,0 +1,1147 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FLASH_WriteProtection</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FLASH_WriteProtection/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FLASH_WriteProtection/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FLASH_WriteProtection/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
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+        <option>
+          <name>PageLength</name>
+          <state>80</state>
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+        <option>
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+          <state>8</state>
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+          <name>AProcessor</name>
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+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
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+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
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+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>FLASH_WriteProtection.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>FLASH_WriteProtection.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/Project.eww
new file mode 100644
index 000000000..04a601f2a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FLASH_WriteProtection.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/FLASH_WriteProtection.ioc b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/FLASH_WriteProtection.ioc
new file mode 100644
index 000000000..21c26537a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/FLASH_WriteProtection.ioc
@@ -0,0 +1,118 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FLASH_WriteProtection.ioc
+ProjectManager.ProjectName=FLASH_WriteProtection
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=FLASH_WriteProtection
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/main.h
new file mode 100644
index 000000000..72d837366
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/main.h
@@ -0,0 +1,328 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_WriteProtection/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Base address of the Flash pages */
+
+#define ADDR_FLASH_PAGE_0     ((uint32_t)0x08000000) /* Base @ of Page 0, 2 Kbytes */
+#define ADDR_FLASH_PAGE_1     ((uint32_t)0x08000800) /* Base @ of Page 1, 2 Kbytes */
+#define ADDR_FLASH_PAGE_2     ((uint32_t)0x08001000) /* Base @ of Page 2, 2 Kbytes */
+#define ADDR_FLASH_PAGE_3     ((uint32_t)0x08001800) /* Base @ of Page 3, 2 Kbytes */
+#define ADDR_FLASH_PAGE_4     ((uint32_t)0x08002000) /* Base @ of Page 4, 2 Kbytes */
+#define ADDR_FLASH_PAGE_5     ((uint32_t)0x08002800) /* Base @ of Page 5, 2 Kbytes */
+#define ADDR_FLASH_PAGE_6     ((uint32_t)0x08003000) /* Base @ of Page 6, 2 Kbytes */
+#define ADDR_FLASH_PAGE_7     ((uint32_t)0x08003800) /* Base @ of Page 7, 2 Kbytes */
+#define ADDR_FLASH_PAGE_8     ((uint32_t)0x08004000) /* Base @ of Page 8, 2 Kbytes */
+#define ADDR_FLASH_PAGE_9     ((uint32_t)0x08004800) /* Base @ of Page 9, 2 Kbytes */
+#define ADDR_FLASH_PAGE_10    ((uint32_t)0x08005000) /* Base @ of Page 10, 2 Kbytes */
+#define ADDR_FLASH_PAGE_11    ((uint32_t)0x08005800) /* Base @ of Page 11, 2 Kbytes */
+#define ADDR_FLASH_PAGE_12    ((uint32_t)0x08006000) /* Base @ of Page 12, 2 Kbytes */
+#define ADDR_FLASH_PAGE_13    ((uint32_t)0x08006800) /* Base @ of Page 13, 2 Kbytes */
+#define ADDR_FLASH_PAGE_14    ((uint32_t)0x08007000) /* Base @ of Page 14, 2 Kbytes */
+#define ADDR_FLASH_PAGE_15    ((uint32_t)0x08007800) /* Base @ of Page 15, 2 Kbytes */
+#define ADDR_FLASH_PAGE_16    ((uint32_t)0x08008000) /* Base @ of Page 16, 2 Kbytes */
+#define ADDR_FLASH_PAGE_17    ((uint32_t)0x08008800) /* Base @ of Page 17, 2 Kbytes */
+#define ADDR_FLASH_PAGE_18    ((uint32_t)0x08009000) /* Base @ of Page 18, 2 Kbytes */
+#define ADDR_FLASH_PAGE_19    ((uint32_t)0x08009800) /* Base @ of Page 19, 2 Kbytes */
+#define ADDR_FLASH_PAGE_20    ((uint32_t)0x0800A000) /* Base @ of Page 20, 2 Kbytes */
+#define ADDR_FLASH_PAGE_21    ((uint32_t)0x0800A800) /* Base @ of Page 21, 2 Kbytes */
+#define ADDR_FLASH_PAGE_22    ((uint32_t)0x0800B000) /* Base @ of Page 22, 2 Kbytes */
+#define ADDR_FLASH_PAGE_23    ((uint32_t)0x0800B800) /* Base @ of Page 23, 2 Kbytes */
+#define ADDR_FLASH_PAGE_24    ((uint32_t)0x0800C000) /* Base @ of Page 24, 2 Kbytes */
+#define ADDR_FLASH_PAGE_25    ((uint32_t)0x0800C800) /* Base @ of Page 25, 2 Kbytes */
+#define ADDR_FLASH_PAGE_26    ((uint32_t)0x0800D000) /* Base @ of Page 26, 2 Kbytes */
+#define ADDR_FLASH_PAGE_27    ((uint32_t)0x0800D800) /* Base @ of Page 27, 2 Kbytes */
+#define ADDR_FLASH_PAGE_28    ((uint32_t)0x0800E000) /* Base @ of Page 28, 2 Kbytes */
+#define ADDR_FLASH_PAGE_29    ((uint32_t)0x0800E800) /* Base @ of Page 29, 2 Kbytes */
+#define ADDR_FLASH_PAGE_30    ((uint32_t)0x0800F000) /* Base @ of Page 30, 2 Kbytes */
+#define ADDR_FLASH_PAGE_31    ((uint32_t)0x0800F800) /* Base @ of Page 31, 2 Kbytes */
+#define ADDR_FLASH_PAGE_32    ((uint32_t)0x08010000) /* Base @ of Page 32, 2 Kbytes */
+#define ADDR_FLASH_PAGE_33    ((uint32_t)0x08010800) /* Base @ of Page 33, 2 Kbytes */
+#define ADDR_FLASH_PAGE_34    ((uint32_t)0x08011000) /* Base @ of Page 34, 2 Kbytes */
+#define ADDR_FLASH_PAGE_35    ((uint32_t)0x08011800) /* Base @ of Page 35, 2 Kbytes */
+#define ADDR_FLASH_PAGE_36    ((uint32_t)0x08012000) /* Base @ of Page 36, 2 Kbytes */
+#define ADDR_FLASH_PAGE_37    ((uint32_t)0x08012800) /* Base @ of Page 37, 2 Kbytes */
+#define ADDR_FLASH_PAGE_38    ((uint32_t)0x08013000) /* Base @ of Page 38, 2 Kbytes */
+#define ADDR_FLASH_PAGE_39    ((uint32_t)0x08013800) /* Base @ of Page 39, 2 Kbytes */
+#define ADDR_FLASH_PAGE_40    ((uint32_t)0x08014000) /* Base @ of Page 40, 2 Kbytes */
+#define ADDR_FLASH_PAGE_41    ((uint32_t)0x08014800) /* Base @ of Page 41, 2 Kbytes */
+#define ADDR_FLASH_PAGE_42    ((uint32_t)0x08015000) /* Base @ of Page 42, 2 Kbytes */
+#define ADDR_FLASH_PAGE_43    ((uint32_t)0x08015800) /* Base @ of Page 43, 2 Kbytes */
+#define ADDR_FLASH_PAGE_44    ((uint32_t)0x08016000) /* Base @ of Page 44, 2 Kbytes */
+#define ADDR_FLASH_PAGE_45    ((uint32_t)0x08016800) /* Base @ of Page 45, 2 Kbytes */
+#define ADDR_FLASH_PAGE_46    ((uint32_t)0x08017000) /* Base @ of Page 46, 2 Kbytes */
+#define ADDR_FLASH_PAGE_47    ((uint32_t)0x08017800) /* Base @ of Page 47, 2 Kbytes */
+#define ADDR_FLASH_PAGE_48    ((uint32_t)0x08018000) /* Base @ of Page 48, 2 Kbytes */
+#define ADDR_FLASH_PAGE_49    ((uint32_t)0x08018800) /* Base @ of Page 49, 2 Kbytes */
+#define ADDR_FLASH_PAGE_50    ((uint32_t)0x08019000) /* Base @ of Page 50, 2 Kbytes */
+#define ADDR_FLASH_PAGE_51    ((uint32_t)0x08019800) /* Base @ of Page 51, 2 Kbytes */
+#define ADDR_FLASH_PAGE_52    ((uint32_t)0x0801A000) /* Base @ of Page 52, 2 Kbytes */
+#define ADDR_FLASH_PAGE_53    ((uint32_t)0x0801A800) /* Base @ of Page 53, 2 Kbytes */
+#define ADDR_FLASH_PAGE_54    ((uint32_t)0x0801B000) /* Base @ of Page 54, 2 Kbytes */
+#define ADDR_FLASH_PAGE_55    ((uint32_t)0x0801B800) /* Base @ of Page 55, 2 Kbytes */
+#define ADDR_FLASH_PAGE_56    ((uint32_t)0x0801C000) /* Base @ of Page 56, 2 Kbytes */
+#define ADDR_FLASH_PAGE_57    ((uint32_t)0x0801C800) /* Base @ of Page 57, 2 Kbytes */
+#define ADDR_FLASH_PAGE_58    ((uint32_t)0x0801D000) /* Base @ of Page 58, 2 Kbytes */
+#define ADDR_FLASH_PAGE_59    ((uint32_t)0x0801D800) /* Base @ of Page 59, 2 Kbytes */
+#define ADDR_FLASH_PAGE_60    ((uint32_t)0x0801E000) /* Base @ of Page 60, 2 Kbytes */
+#define ADDR_FLASH_PAGE_61    ((uint32_t)0x0801E800) /* Base @ of Page 61, 2 Kbytes */
+#define ADDR_FLASH_PAGE_62    ((uint32_t)0x0801F000) /* Base @ of Page 62, 2 Kbytes */
+#define ADDR_FLASH_PAGE_63    ((uint32_t)0x0801F800) /* Base @ of Page 63, 2 Kbytes */
+#define ADDR_FLASH_PAGE_64    ((uint32_t)0x08020000) /* Base @ of Page 64, 2 Kbytes */
+#define ADDR_FLASH_PAGE_65    ((uint32_t)0x08020800) /* Base @ of Page 65, 2 Kbytes */
+#define ADDR_FLASH_PAGE_66    ((uint32_t)0x08021000) /* Base @ of Page 66, 2 Kbytes */
+#define ADDR_FLASH_PAGE_67    ((uint32_t)0x08021800) /* Base @ of Page 67, 2 Kbytes */
+#define ADDR_FLASH_PAGE_68    ((uint32_t)0x08022000) /* Base @ of Page 68, 2 Kbytes */
+#define ADDR_FLASH_PAGE_69    ((uint32_t)0x08022800) /* Base @ of Page 69, 2 Kbytes */
+#define ADDR_FLASH_PAGE_70    ((uint32_t)0x08023000) /* Base @ of Page 70, 2 Kbytes */
+#define ADDR_FLASH_PAGE_71    ((uint32_t)0x08023800) /* Base @ of Page 71, 2 Kbytes */
+#define ADDR_FLASH_PAGE_72    ((uint32_t)0x08024000) /* Base @ of Page 72, 2 Kbytes */
+#define ADDR_FLASH_PAGE_73    ((uint32_t)0x08024800) /* Base @ of Page 73, 2 Kbytes */
+#define ADDR_FLASH_PAGE_74    ((uint32_t)0x08025000) /* Base @ of Page 74, 2 Kbytes */
+#define ADDR_FLASH_PAGE_75    ((uint32_t)0x08025800) /* Base @ of Page 75, 2 Kbytes */
+#define ADDR_FLASH_PAGE_76    ((uint32_t)0x08026000) /* Base @ of Page 76, 2 Kbytes */
+#define ADDR_FLASH_PAGE_77    ((uint32_t)0x08026800) /* Base @ of Page 77, 2 Kbytes */
+#define ADDR_FLASH_PAGE_78    ((uint32_t)0x08027000) /* Base @ of Page 78, 2 Kbytes */
+#define ADDR_FLASH_PAGE_79    ((uint32_t)0x08027800) /* Base @ of Page 79, 2 Kbytes */
+#define ADDR_FLASH_PAGE_80    ((uint32_t)0x08028000) /* Base @ of Page 80, 2 Kbytes */
+#define ADDR_FLASH_PAGE_81    ((uint32_t)0x08028800) /* Base @ of Page 81, 2 Kbytes */
+#define ADDR_FLASH_PAGE_82    ((uint32_t)0x08029000) /* Base @ of Page 82, 2 Kbytes */
+#define ADDR_FLASH_PAGE_83    ((uint32_t)0x08029800) /* Base @ of Page 83, 2 Kbytes */
+#define ADDR_FLASH_PAGE_84    ((uint32_t)0x0802A000) /* Base @ of Page 84, 2 Kbytes */
+#define ADDR_FLASH_PAGE_85    ((uint32_t)0x0802A800) /* Base @ of Page 85, 2 Kbytes */
+#define ADDR_FLASH_PAGE_86    ((uint32_t)0x0802B000) /* Base @ of Page 86, 2 Kbytes */
+#define ADDR_FLASH_PAGE_87    ((uint32_t)0x0802B800) /* Base @ of Page 87, 2 Kbytes */
+#define ADDR_FLASH_PAGE_88    ((uint32_t)0x0802C000) /* Base @ of Page 88, 2 Kbytes */
+#define ADDR_FLASH_PAGE_89    ((uint32_t)0x0802C800) /* Base @ of Page 89, 2 Kbytes */
+#define ADDR_FLASH_PAGE_90    ((uint32_t)0x0802D000) /* Base @ of Page 90, 2 Kbytes */
+#define ADDR_FLASH_PAGE_91    ((uint32_t)0x0802D800) /* Base @ of Page 91, 2 Kbytes */
+#define ADDR_FLASH_PAGE_92    ((uint32_t)0x0802E000) /* Base @ of Page 92, 2 Kbytes */
+#define ADDR_FLASH_PAGE_93    ((uint32_t)0x0802E800) /* Base @ of Page 93, 2 Kbytes */
+#define ADDR_FLASH_PAGE_94    ((uint32_t)0x0802F000) /* Base @ of Page 94, 2 Kbytes */
+#define ADDR_FLASH_PAGE_95    ((uint32_t)0x0802F800) /* Base @ of Page 95, 2 Kbytes */
+#define ADDR_FLASH_PAGE_96    ((uint32_t)0x08030000) /* Base @ of Page 96, 2 Kbytes */
+#define ADDR_FLASH_PAGE_97    ((uint32_t)0x08030800) /* Base @ of Page 97, 2 Kbytes */
+#define ADDR_FLASH_PAGE_98    ((uint32_t)0x08031000) /* Base @ of Page 98, 2 Kbytes */
+#define ADDR_FLASH_PAGE_99    ((uint32_t)0x08031800) /* Base @ of Page 99, 2 Kbytes */
+#define ADDR_FLASH_PAGE_100   ((uint32_t)0x08032000) /* Base @ of Page 100, 2 Kbytes */
+#define ADDR_FLASH_PAGE_101   ((uint32_t)0x08032800) /* Base @ of Page 101, 2 Kbytes */
+#define ADDR_FLASH_PAGE_102   ((uint32_t)0x08033000) /* Base @ of Page 102, 2 Kbytes */
+#define ADDR_FLASH_PAGE_103   ((uint32_t)0x08033800) /* Base @ of Page 103, 2 Kbytes */
+#define ADDR_FLASH_PAGE_104   ((uint32_t)0x08034000) /* Base @ of Page 104, 2 Kbytes */
+#define ADDR_FLASH_PAGE_105   ((uint32_t)0x08034800) /* Base @ of Page 105, 2 Kbytes */
+#define ADDR_FLASH_PAGE_106   ((uint32_t)0x08035000) /* Base @ of Page 106, 2 Kbytes */
+#define ADDR_FLASH_PAGE_107   ((uint32_t)0x08035800) /* Base @ of Page 107, 2 Kbytes */
+#define ADDR_FLASH_PAGE_108   ((uint32_t)0x08036000) /* Base @ of Page 108, 2 Kbytes */
+#define ADDR_FLASH_PAGE_109   ((uint32_t)0x08036800) /* Base @ of Page 109, 2 Kbytes */
+#define ADDR_FLASH_PAGE_110   ((uint32_t)0x08037000) /* Base @ of Page 110, 2 Kbytes */
+#define ADDR_FLASH_PAGE_111   ((uint32_t)0x08037800) /* Base @ of Page 111, 2 Kbytes */
+#define ADDR_FLASH_PAGE_112   ((uint32_t)0x08038000) /* Base @ of Page 112, 2 Kbytes */
+#define ADDR_FLASH_PAGE_113   ((uint32_t)0x08038800) /* Base @ of Page 113, 2 Kbytes */
+#define ADDR_FLASH_PAGE_114   ((uint32_t)0x08039000) /* Base @ of Page 114, 2 Kbytes */
+#define ADDR_FLASH_PAGE_115   ((uint32_t)0x08039800) /* Base @ of Page 115, 2 Kbytes */
+#define ADDR_FLASH_PAGE_116   ((uint32_t)0x0803A000) /* Base @ of Page 116, 2 Kbytes */
+#define ADDR_FLASH_PAGE_117   ((uint32_t)0x0803A800) /* Base @ of Page 117, 2 Kbytes */
+#define ADDR_FLASH_PAGE_118   ((uint32_t)0x0803B000) /* Base @ of Page 118, 2 Kbytes */
+#define ADDR_FLASH_PAGE_119   ((uint32_t)0x0803B800) /* Base @ of Page 119, 2 Kbytes */
+#define ADDR_FLASH_PAGE_120   ((uint32_t)0x0803C000) /* Base @ of Page 120, 2 Kbytes */
+#define ADDR_FLASH_PAGE_121   ((uint32_t)0x0803C800) /* Base @ of Page 121, 2 Kbytes */
+#define ADDR_FLASH_PAGE_122   ((uint32_t)0x0803D000) /* Base @ of Page 122, 2 Kbytes */
+#define ADDR_FLASH_PAGE_123   ((uint32_t)0x0803D800) /* Base @ of Page 123, 2 Kbytes */
+#define ADDR_FLASH_PAGE_124   ((uint32_t)0x0803E000) /* Base @ of Page 124, 2 Kbytes */
+#define ADDR_FLASH_PAGE_125   ((uint32_t)0x0803E800) /* Base @ of Page 125, 2 Kbytes */
+#define ADDR_FLASH_PAGE_126   ((uint32_t)0x0803F000) /* Base @ of Page 126, 2 Kbytes */
+#define ADDR_FLASH_PAGE_127   ((uint32_t)0x0803F800) /* Base @ of Page 127, 2 Kbytes */
+#define ADDR_FLASH_PAGE_128   ((uint32_t)0x08040000) /* Base @ of Page 128, 2 Kbytes */
+#define ADDR_FLASH_PAGE_129   ((uint32_t)0x08040800) /* Base @ of Page 129, 2 Kbytes */
+#define ADDR_FLASH_PAGE_130   ((uint32_t)0x08041000) /* Base @ of Page 130, 2 Kbytes */
+#define ADDR_FLASH_PAGE_131   ((uint32_t)0x08041800) /* Base @ of Page 131, 2 Kbytes */
+#define ADDR_FLASH_PAGE_132   ((uint32_t)0x08042000) /* Base @ of Page 132, 2 Kbytes */
+#define ADDR_FLASH_PAGE_133   ((uint32_t)0x08042800) /* Base @ of Page 133, 2 Kbytes */
+#define ADDR_FLASH_PAGE_134   ((uint32_t)0x08043000) /* Base @ of Page 134, 2 Kbytes */
+#define ADDR_FLASH_PAGE_135   ((uint32_t)0x08043800) /* Base @ of Page 135, 2 Kbytes */
+#define ADDR_FLASH_PAGE_136   ((uint32_t)0x08044000) /* Base @ of Page 136, 2 Kbytes */
+#define ADDR_FLASH_PAGE_137   ((uint32_t)0x08044800) /* Base @ of Page 137, 2 Kbytes */
+#define ADDR_FLASH_PAGE_138   ((uint32_t)0x08045000) /* Base @ of Page 138, 2 Kbytes */
+#define ADDR_FLASH_PAGE_139   ((uint32_t)0x08045800) /* Base @ of Page 139, 2 Kbytes */
+#define ADDR_FLASH_PAGE_140   ((uint32_t)0x08046000) /* Base @ of Page 140, 2 Kbytes */
+#define ADDR_FLASH_PAGE_141   ((uint32_t)0x08046800) /* Base @ of Page 141, 2 Kbytes */
+#define ADDR_FLASH_PAGE_142   ((uint32_t)0x08047000) /* Base @ of Page 142, 2 Kbytes */
+#define ADDR_FLASH_PAGE_143   ((uint32_t)0x08047800) /* Base @ of Page 143, 2 Kbytes */
+#define ADDR_FLASH_PAGE_144   ((uint32_t)0x08048000) /* Base @ of Page 144, 2 Kbytes */
+#define ADDR_FLASH_PAGE_145   ((uint32_t)0x08048800) /* Base @ of Page 145, 2 Kbytes */
+#define ADDR_FLASH_PAGE_146   ((uint32_t)0x08049000) /* Base @ of Page 146, 2 Kbytes */
+#define ADDR_FLASH_PAGE_147   ((uint32_t)0x08049800) /* Base @ of Page 147, 2 Kbytes */
+#define ADDR_FLASH_PAGE_148   ((uint32_t)0x0804a000) /* Base @ of Page 148, 2 Kbytes */
+#define ADDR_FLASH_PAGE_149   ((uint32_t)0x0804a800) /* Base @ of Page 149, 2 Kbytes */
+#define ADDR_FLASH_PAGE_150   ((uint32_t)0x0804b000) /* Base @ of Page 150, 2 Kbytes */
+#define ADDR_FLASH_PAGE_151   ((uint32_t)0x0804b800) /* Base @ of Page 151, 2 Kbytes */
+#define ADDR_FLASH_PAGE_152   ((uint32_t)0x0804c000) /* Base @ of Page 152, 2 Kbytes */
+#define ADDR_FLASH_PAGE_153   ((uint32_t)0x0804c800) /* Base @ of Page 153, 2 Kbytes */
+#define ADDR_FLASH_PAGE_154   ((uint32_t)0x0804d000) /* Base @ of Page 154, 2 Kbytes */
+#define ADDR_FLASH_PAGE_155   ((uint32_t)0x0804d800) /* Base @ of Page 155, 2 Kbytes */
+#define ADDR_FLASH_PAGE_156   ((uint32_t)0x0804e000) /* Base @ of Page 156, 2 Kbytes */
+#define ADDR_FLASH_PAGE_157   ((uint32_t)0x0804e800) /* Base @ of Page 157, 2 Kbytes */
+#define ADDR_FLASH_PAGE_158   ((uint32_t)0x0804f000) /* Base @ of Page 158, 2 Kbytes */
+#define ADDR_FLASH_PAGE_159   ((uint32_t)0x0804f800) /* Base @ of Page 159, 2 Kbytes */
+#define ADDR_FLASH_PAGE_160   ((uint32_t)0x08050000) /* Base @ of Page 160, 2 Kbytes */
+#define ADDR_FLASH_PAGE_161   ((uint32_t)0x08050800) /* Base @ of Page 161, 2 Kbytes */
+#define ADDR_FLASH_PAGE_162   ((uint32_t)0x08051000) /* Base @ of Page 162, 2 Kbytes */
+#define ADDR_FLASH_PAGE_163   ((uint32_t)0x08051800) /* Base @ of Page 163, 2 Kbytes */
+#define ADDR_FLASH_PAGE_164   ((uint32_t)0x08052000) /* Base @ of Page 164, 2 Kbytes */
+#define ADDR_FLASH_PAGE_165   ((uint32_t)0x08052800) /* Base @ of Page 165, 2 Kbytes */
+#define ADDR_FLASH_PAGE_166   ((uint32_t)0x08053000) /* Base @ of Page 166, 2 Kbytes */
+#define ADDR_FLASH_PAGE_167   ((uint32_t)0x08053800) /* Base @ of Page 167, 2 Kbytes */
+#define ADDR_FLASH_PAGE_168   ((uint32_t)0x08054000) /* Base @ of Page 168, 2 Kbytes */
+#define ADDR_FLASH_PAGE_169   ((uint32_t)0x08054800) /* Base @ of Page 169, 2 Kbytes */
+#define ADDR_FLASH_PAGE_170   ((uint32_t)0x08055000) /* Base @ of Page 170, 2 Kbytes */
+#define ADDR_FLASH_PAGE_171   ((uint32_t)0x08055800) /* Base @ of Page 171, 2 Kbytes */
+#define ADDR_FLASH_PAGE_172   ((uint32_t)0x08056000) /* Base @ of Page 172, 2 Kbytes */
+#define ADDR_FLASH_PAGE_173   ((uint32_t)0x08056800) /* Base @ of Page 173, 2 Kbytes */
+#define ADDR_FLASH_PAGE_174   ((uint32_t)0x08057000) /* Base @ of Page 174, 2 Kbytes */
+#define ADDR_FLASH_PAGE_175   ((uint32_t)0x08057800) /* Base @ of Page 175, 2 Kbytes */
+#define ADDR_FLASH_PAGE_176   ((uint32_t)0x08058000) /* Base @ of Page 176, 2 Kbytes */
+#define ADDR_FLASH_PAGE_177   ((uint32_t)0x08058800) /* Base @ of Page 177, 2 Kbytes */
+#define ADDR_FLASH_PAGE_178   ((uint32_t)0x08059000) /* Base @ of Page 178, 2 Kbytes */
+#define ADDR_FLASH_PAGE_179   ((uint32_t)0x08059800) /* Base @ of Page 179, 2 Kbytes */
+#define ADDR_FLASH_PAGE_180   ((uint32_t)0x0805a000) /* Base @ of Page 180, 2 Kbytes */
+#define ADDR_FLASH_PAGE_181   ((uint32_t)0x0805a800) /* Base @ of Page 181, 2 Kbytes */
+#define ADDR_FLASH_PAGE_182   ((uint32_t)0x0805b000) /* Base @ of Page 182, 2 Kbytes */
+#define ADDR_FLASH_PAGE_183   ((uint32_t)0x0805b800) /* Base @ of Page 183, 2 Kbytes */
+#define ADDR_FLASH_PAGE_184   ((uint32_t)0x0805c000) /* Base @ of Page 184, 2 Kbytes */
+#define ADDR_FLASH_PAGE_185   ((uint32_t)0x0805c800) /* Base @ of Page 185, 2 Kbytes */
+#define ADDR_FLASH_PAGE_186   ((uint32_t)0x0805d000) /* Base @ of Page 186, 2 Kbytes */
+#define ADDR_FLASH_PAGE_187   ((uint32_t)0x0805d800) /* Base @ of Page 187, 2 Kbytes */
+#define ADDR_FLASH_PAGE_188   ((uint32_t)0x0805e000) /* Base @ of Page 188, 2 Kbytes */
+#define ADDR_FLASH_PAGE_189   ((uint32_t)0x0805e800) /* Base @ of Page 189, 2 Kbytes */
+#define ADDR_FLASH_PAGE_190   ((uint32_t)0x0805f000) /* Base @ of Page 190, 2 Kbytes */
+#define ADDR_FLASH_PAGE_191   ((uint32_t)0x0805f800) /* Base @ of Page 191, 2 Kbytes */
+#define ADDR_FLASH_PAGE_192   ((uint32_t)0x08060000) /* Base @ of Page 192, 2 Kbytes */
+#define ADDR_FLASH_PAGE_193   ((uint32_t)0x08060800) /* Base @ of Page 193, 2 Kbytes */
+#define ADDR_FLASH_PAGE_194   ((uint32_t)0x08061000) /* Base @ of Page 194, 2 Kbytes */
+#define ADDR_FLASH_PAGE_195   ((uint32_t)0x08061800) /* Base @ of Page 195, 2 Kbytes */
+#define ADDR_FLASH_PAGE_196   ((uint32_t)0x08062000) /* Base @ of Page 196, 2 Kbytes */
+#define ADDR_FLASH_PAGE_197   ((uint32_t)0x08062800) /* Base @ of Page 197, 2 Kbytes */
+#define ADDR_FLASH_PAGE_198   ((uint32_t)0x08063000) /* Base @ of Page 198, 2 Kbytes */
+#define ADDR_FLASH_PAGE_199   ((uint32_t)0x08063800) /* Base @ of Page 199, 2 Kbytes */
+#define ADDR_FLASH_PAGE_200   ((uint32_t)0x08064000) /* Base @ of Page 200, 2 Kbytes */
+#define ADDR_FLASH_PAGE_201   ((uint32_t)0x08064800) /* Base @ of Page 201, 2 Kbytes */
+#define ADDR_FLASH_PAGE_202   ((uint32_t)0x08065000) /* Base @ of Page 202, 2 Kbytes */
+#define ADDR_FLASH_PAGE_203   ((uint32_t)0x08065800) /* Base @ of Page 203, 2 Kbytes */
+#define ADDR_FLASH_PAGE_204   ((uint32_t)0x08066000) /* Base @ of Page 204, 2 Kbytes */
+#define ADDR_FLASH_PAGE_205   ((uint32_t)0x08066800) /* Base @ of Page 205, 2 Kbytes */
+#define ADDR_FLASH_PAGE_206   ((uint32_t)0x08067000) /* Base @ of Page 206, 2 Kbytes */
+#define ADDR_FLASH_PAGE_207   ((uint32_t)0x08067800) /* Base @ of Page 207, 2 Kbytes */
+#define ADDR_FLASH_PAGE_208   ((uint32_t)0x08068000) /* Base @ of Page 208, 2 Kbytes */
+#define ADDR_FLASH_PAGE_209   ((uint32_t)0x08068800) /* Base @ of Page 209, 2 Kbytes */
+#define ADDR_FLASH_PAGE_210   ((uint32_t)0x08069000) /* Base @ of Page 210, 2 Kbytes */
+#define ADDR_FLASH_PAGE_211   ((uint32_t)0x08069800) /* Base @ of Page 211, 2 Kbytes */
+#define ADDR_FLASH_PAGE_212   ((uint32_t)0x0806a000) /* Base @ of Page 212, 2 Kbytes */
+#define ADDR_FLASH_PAGE_213   ((uint32_t)0x0806a800) /* Base @ of Page 213, 2 Kbytes */
+#define ADDR_FLASH_PAGE_214   ((uint32_t)0x0806b000) /* Base @ of Page 214, 2 Kbytes */
+#define ADDR_FLASH_PAGE_215   ((uint32_t)0x0806b800) /* Base @ of Page 215, 2 Kbytes */
+#define ADDR_FLASH_PAGE_216   ((uint32_t)0x0806c000) /* Base @ of Page 216, 2 Kbytes */
+#define ADDR_FLASH_PAGE_217   ((uint32_t)0x0806c800) /* Base @ of Page 217, 2 Kbytes */
+#define ADDR_FLASH_PAGE_218   ((uint32_t)0x0806d000) /* Base @ of Page 218, 2 Kbytes */
+#define ADDR_FLASH_PAGE_219   ((uint32_t)0x0806d800) /* Base @ of Page 219, 2 Kbytes */
+#define ADDR_FLASH_PAGE_220   ((uint32_t)0x0806e000) /* Base @ of Page 220, 2 Kbytes */
+#define ADDR_FLASH_PAGE_221   ((uint32_t)0x0806e800) /* Base @ of Page 221, 2 Kbytes */
+#define ADDR_FLASH_PAGE_222   ((uint32_t)0x0806f000) /* Base @ of Page 222, 2 Kbytes */
+#define ADDR_FLASH_PAGE_223   ((uint32_t)0x0806f800) /* Base @ of Page 223, 2 Kbytes */
+#define ADDR_FLASH_PAGE_224   ((uint32_t)0x08070000) /* Base @ of Page 224, 2 Kbytes */
+#define ADDR_FLASH_PAGE_225   ((uint32_t)0x08070800) /* Base @ of Page 225, 2 Kbytes */
+#define ADDR_FLASH_PAGE_226   ((uint32_t)0x08071000) /* Base @ of Page 226, 2 Kbytes */
+#define ADDR_FLASH_PAGE_227   ((uint32_t)0x08071800) /* Base @ of Page 227, 2 Kbytes */
+#define ADDR_FLASH_PAGE_228   ((uint32_t)0x08072000) /* Base @ of Page 228, 2 Kbytes */
+#define ADDR_FLASH_PAGE_229   ((uint32_t)0x08072800) /* Base @ of Page 229, 2 Kbytes */
+#define ADDR_FLASH_PAGE_230   ((uint32_t)0x08073000) /* Base @ of Page 230, 2 Kbytes */
+#define ADDR_FLASH_PAGE_231   ((uint32_t)0x08073800) /* Base @ of Page 231, 2 Kbytes */
+#define ADDR_FLASH_PAGE_232   ((uint32_t)0x08074000) /* Base @ of Page 232, 2 Kbytes */
+#define ADDR_FLASH_PAGE_233   ((uint32_t)0x08074800) /* Base @ of Page 233, 2 Kbytes */
+#define ADDR_FLASH_PAGE_234   ((uint32_t)0x08075000) /* Base @ of Page 234, 2 Kbytes */
+#define ADDR_FLASH_PAGE_235   ((uint32_t)0x08075800) /* Base @ of Page 235, 2 Kbytes */
+#define ADDR_FLASH_PAGE_236   ((uint32_t)0x08076000) /* Base @ of Page 236, 2 Kbytes */
+#define ADDR_FLASH_PAGE_237   ((uint32_t)0x08076800) /* Base @ of Page 237, 2 Kbytes */
+#define ADDR_FLASH_PAGE_238   ((uint32_t)0x08077000) /* Base @ of Page 238, 2 Kbytes */
+#define ADDR_FLASH_PAGE_239   ((uint32_t)0x08077800) /* Base @ of Page 239, 2 Kbytes */
+#define ADDR_FLASH_PAGE_240   ((uint32_t)0x08078000) /* Base @ of Page 240, 2 Kbytes */
+#define ADDR_FLASH_PAGE_241   ((uint32_t)0x08078800) /* Base @ of Page 241, 2 Kbytes */
+#define ADDR_FLASH_PAGE_242   ((uint32_t)0x08079000) /* Base @ of Page 242, 2 Kbytes */
+#define ADDR_FLASH_PAGE_243   ((uint32_t)0x08079800) /* Base @ of Page 243, 2 Kbytes */
+#define ADDR_FLASH_PAGE_244   ((uint32_t)0x0807a000) /* Base @ of Page 244, 2 Kbytes */
+#define ADDR_FLASH_PAGE_245   ((uint32_t)0x0807a800) /* Base @ of Page 245, 2 Kbytes */
+#define ADDR_FLASH_PAGE_246   ((uint32_t)0x0807b000) /* Base @ of Page 246, 2 Kbytes */
+#define ADDR_FLASH_PAGE_247   ((uint32_t)0x0807b800) /* Base @ of Page 247, 2 Kbytes */
+#define ADDR_FLASH_PAGE_248   ((uint32_t)0x0807c000) /* Base @ of Page 248, 2 Kbytes */
+#define ADDR_FLASH_PAGE_249   ((uint32_t)0x0807c800) /* Base @ of Page 249, 2 Kbytes */
+#define ADDR_FLASH_PAGE_250   ((uint32_t)0x0807d000) /* Base @ of Page 250, 2 Kbytes */
+#define ADDR_FLASH_PAGE_251   ((uint32_t)0x0807d800) /* Base @ of Page 251, 2 Kbytes */
+#define ADDR_FLASH_PAGE_252   ((uint32_t)0x0807e000) /* Base @ of Page 252, 2 Kbytes */
+#define ADDR_FLASH_PAGE_253   ((uint32_t)0x0807e800) /* Base @ of Page 253, 2 Kbytes */
+#define ADDR_FLASH_PAGE_254   ((uint32_t)0x0807f000) /* Base @ of Page 254, 2 Kbytes */
+#define ADDR_FLASH_PAGE_255   ((uint32_t)0x0807f800) /* Base @ of Page 255, 2 Kbytes */
+      
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..c43cdf600
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_WriteProtection/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/FLASH_WriteProtection.uvoptx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/FLASH_WriteProtection.uvoptx
new file mode 100644
index 000000000..128c4ea18
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/FLASH_WriteProtection.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FLASH_WriteProtection</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/FLASH_WriteProtection.uvprojx b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/FLASH_WriteProtection.uvprojx
new file mode 100644
index 000000000..de5039b1d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/FLASH_WriteProtection.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FLASH_WriteProtection</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FLASH_WriteProtection\Exe\</OutputDirectory>
+          <OutputName>FLASH_WriteProtection</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
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+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
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+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+          <OPTHX>
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+            <DriverSelection>4107</DriverSelection>
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+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
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+        <TargetArmAds>
+          <ArmAdsMisc>
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+            <asAsm>1</asAsm>
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+                <Size>0x80000</Size>
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+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
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+              </OCR_RVCT5>
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+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
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+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
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+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
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+            <Rwpi>0</Rwpi>
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+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FLASH_WriteProtection"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..2a6c0e5e8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1885947932">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1885947932" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1885947932" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1885947932." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1375677792" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1810112949" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1960790743" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.603850980" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.321974819" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1801439572" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1270060473" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.151188169" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1107546851" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
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+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FLASH_WriteProtection.null.1620762388" name="FLASH_WriteProtection"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1885947932;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1885947932.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2105518130;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1396225117">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2058275099;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2058275099.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.676999018;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1926353311">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/.project
new file mode 100644
index 000000000..36c0db124
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FLASH_WriteProtection</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FLASH_WriteProtection.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FLASH_WriteProtection.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/main.c
new file mode 100644
index 000000000..9603abf94
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/main.c
@@ -0,0 +1,594 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_WriteProtection/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example provides a description of how to set write protection on
+  *          STM32G4xx FLASH.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus;
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+#define FLASH_USER_START_ADDR       ADDR_FLASH_PAGE_8   /* Start @ of user Flash area */
+#define FLASH_USER_END_ADDR         (ADDR_FLASH_PAGE_127 + FLASH_PAGE_SIZE - 1)   /* End @ of user Flash area */
+
+#define DATA_32                     ((uint32_t)0x12345678)
+#define DATA_64                     ((uint64_t)0x1234567812345678)
+
+/* Uncomment this line to program the Flash pages */
+#define FLASH_PAGE_PROGRAM
+
+/* Uncomment this line to Enable Write Protection */
+/* #define WRITE_PROTECTION_ENABLE */
+
+/* Uncomment this line to Disable Write Protection */
+/* #define WRITE_PROTECTION_DISABLE */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+uint32_t StartPage = 0, EndPage = 0;
+uint32_t Address = 0;
+uint32_t PageError = 0;
+__IO TestStatus MemoryProgramStatus = PASSED;
+/*Variable used for Erase procedure*/
+#ifdef FLASH_PAGE_PROGRAM
+static FLASH_EraseInitTypeDef EraseInitStruct;
+#endif
+/*Variable used to handle the Options Bytes*/
+static FLASH_OBProgramInitTypeDef OptionsBytesStruct, OptionsBytesStruct2;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+static uint32_t GetPage(uint32_t Address);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+  /* Initialize LED1, LED3 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  BSP_LED_Init(LED3);
+
+  /* Initialize test status */
+  MemoryProgramStatus = PASSED;
+
+  /* Unlock the Flash to enable the flash control register access *************/
+  HAL_FLASH_Unlock();
+
+  /* Clear OPTVERR bit set on virgin samples */
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+  /* Unlock the Options Bytes *************************************************/
+  HAL_FLASH_OB_Unlock();
+
+  /* Get the number of the start and end pages */
+  StartPage = GetPage(FLASH_USER_START_ADDR);
+  EndPage   = GetPage(FLASH_USER_END_ADDR);
+
+  OptionsBytesStruct.WRPArea  = OB_WRPAREA_BANK1_AREAA;
+  OptionsBytesStruct2.WRPArea = OB_WRPAREA_BANK1_AREAB;
+
+  /* Get pages write protection status ****************************************/
+  HAL_FLASHEx_OBGetConfig(&OptionsBytesStruct);
+  HAL_FLASHEx_OBGetConfig(&OptionsBytesStruct2);
+
+#ifdef WRITE_PROTECTION_DISABLE
+  /* Check if desired pages are already write protected ***********************/
+  if ((OptionsBytesStruct.WRPStartOffset == StartPage) && (OptionsBytesStruct.WRPEndOffset == EndPage))
+  {
+    /* Current area correspond to the area to disable */
+    OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct.WRPStartOffset = 0xFF;
+    OptionsBytesStruct.WRPEndOffset   = 0;
+  }
+  else if ((OptionsBytesStruct.WRPStartOffset == StartPage) && (OptionsBytesStruct.WRPEndOffset > EndPage))
+  {
+    /* Current area is bigger than the area to disable : */
+    /* - End of area is bigger than the last page to un-protect */
+    OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct.WRPStartOffset = EndPage + 1;
+  }
+  else if ((OptionsBytesStruct.WRPStartOffset < StartPage) && (OptionsBytesStruct.WRPEndOffset == EndPage))
+  {
+    /* Current area is bigger than the area to disable : */
+    /* - Start of area is lower than the first page to un-protect */
+    OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct.WRPEndOffset   = StartPage - 1;
+  }
+  else if ((OptionsBytesStruct.WRPStartOffset < StartPage) && (OptionsBytesStruct.WRPEndOffset > EndPage))
+  {
+    /* Current area is bigger than the area to disable */
+    /* - Start of area is lower than the first page to un-protect */
+    /* - End of area is bigger than the last page to un-protect */
+    if (OptionsBytesStruct2.WRPStartOffset > OptionsBytesStruct2.WRPEndOffset)
+    {
+      /* Second area of the bank can be used */
+      OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct2.WRPStartOffset = EndPage + 1;
+      OptionsBytesStruct2.WRPEndOffset   = OptionsBytesStruct.WRPEndOffset;
+
+      OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct.WRPEndOffset   = StartPage - 1;
+    }
+    else
+    {
+      /* Second area of the bank already used for WRP */
+      /* => Error : not possible to deactivate only the pages indicated */
+      while (1)
+      {
+        BSP_LED_On(LED3);
+      }
+    }
+  }
+  else if ((OptionsBytesStruct2.WRPStartOffset == StartPage) && (OptionsBytesStruct2.WRPEndOffset == EndPage))
+  {
+    /* Current area correspond to the area to disable */
+    OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct2.WRPStartOffset = 0xFF;
+    OptionsBytesStruct2.WRPEndOffset   = 0;
+  }
+  else if ((OptionsBytesStruct2.WRPStartOffset == StartPage) && (OptionsBytesStruct2.WRPEndOffset > EndPage))
+  {
+    /* Current area is bigger than the area to disable : */
+    /* - End of area is bigger than the last page to un-protect */
+    OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct2.WRPStartOffset = EndPage + 1;
+  }
+  else if ((OptionsBytesStruct2.WRPStartOffset < StartPage) && (OptionsBytesStruct2.WRPEndOffset == EndPage))
+  {
+    /* Current area is bigger than the area to disable : */
+    /* - Start of area is lower than the first page to un-protect */
+    OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct2.WRPEndOffset   = StartPage - 1;
+  }
+  else if ((OptionsBytesStruct2.WRPStartOffset < StartPage) && (OptionsBytesStruct2.WRPEndOffset > EndPage))
+  {
+    /* Current area is bigger than the area to disable */
+    /* - Start of area is lower than the first page to un-protect */
+    /* - End of area is bigger than the last page to un-protect */
+    if (OptionsBytesStruct.WRPStartOffset > OptionsBytesStruct.WRPEndOffset)
+    {
+      /* Second area of the bank can be used */
+      OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct.WRPStartOffset = EndPage + 1;
+      OptionsBytesStruct.WRPEndOffset   = OptionsBytesStruct2.WRPEndOffset;
+
+      OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct2.WRPEndOffset   = StartPage - 1;
+    }
+    else
+    {
+      /* Second area of the bank already used for WRP */
+      /* => Error : not possible to deactivate only the pages indicated */
+      while (1)
+      {
+        BSP_LED_On(LED3);
+      }
+    }
+  }
+
+#elif defined WRITE_PROTECTION_ENABLE
+  /* Check if desired pages are not yet write protected ***********************/
+  if ((OptionsBytesStruct.WRPStartOffset <= StartPage) && (OptionsBytesStruct.WRPEndOffset >= (StartPage - 1)))
+  {
+    /* Current area is adjacent to pages to be write protected */
+    if (OptionsBytesStruct.WRPEndOffset < EndPage)
+    {
+      /* Current area will be extended to include the pages to be write protected */
+      OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct.WRPEndOffset   = EndPage;
+    }
+  }
+  else if ((OptionsBytesStruct.WRPStartOffset <= (EndPage + 1)) && (OptionsBytesStruct.WRPEndOffset >= EndPage))
+  {
+    /* Current area is adjacent to pages to be write protected */
+    if (OptionsBytesStruct.WRPStartOffset > StartPage)
+    {
+      /* Current area will be extended to include the pages to be write protected */
+      OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct.WRPStartOffset = StartPage;
+    }
+  }
+  else if ((OptionsBytesStruct.WRPStartOffset > StartPage) && (OptionsBytesStruct.WRPEndOffset < EndPage))
+  {
+    /* Current area is included in pages to be write protected */
+    OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct.WRPStartOffset = StartPage;
+    OptionsBytesStruct.WRPEndOffset   = EndPage;
+  }
+  else if ((OptionsBytesStruct2.WRPStartOffset <= StartPage) && (OptionsBytesStruct2.WRPEndOffset >= (StartPage - 1)))
+  {
+    /* Current area is adjacent to pages to be write protected */
+    if (OptionsBytesStruct2.WRPEndOffset < EndPage)
+    {
+      /* Current area will be extended to include the pages to be write protected */
+      OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct2.WRPEndOffset   = EndPage;
+    }
+  }
+  else if ((OptionsBytesStruct2.WRPStartOffset <= (EndPage + 1)) && (OptionsBytesStruct2.WRPEndOffset >= EndPage))
+  {
+    /* Current area is adjacent to pages to be write protected */
+    if (OptionsBytesStruct2.WRPStartOffset > StartPage)
+    {
+      /* Current area will be extended to include the pages to be write protected */
+      OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+      OptionsBytesStruct2.WRPStartOffset = StartPage;
+    }
+  }
+  else if ((OptionsBytesStruct2.WRPStartOffset > StartPage) && (OptionsBytesStruct2.WRPEndOffset < EndPage))
+  {
+    /* Current area is included in pages to be write protected */
+    OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct2.WRPStartOffset = StartPage;
+    OptionsBytesStruct2.WRPEndOffset   = EndPage;
+  }
+  else if (OptionsBytesStruct.WRPStartOffset > OptionsBytesStruct.WRPEndOffset)
+  {
+    /* Current area is not used => it will be configured to protect the pages */
+    OptionsBytesStruct.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct.WRPStartOffset = StartPage;
+    OptionsBytesStruct.WRPEndOffset   = EndPage;
+  }
+  else if (OptionsBytesStruct2.WRPStartOffset > OptionsBytesStruct2.WRPEndOffset)
+  {
+    /* Current area is not used => it will be configured to protect the pages */
+    OptionsBytesStruct2.OptionType     = OPTIONBYTE_WRP;
+    OptionsBytesStruct2.WRPStartOffset = StartPage;
+    OptionsBytesStruct2.WRPEndOffset   = EndPage;
+  }
+  else
+  {
+    /* No more area available to protect the pages */
+    /* => Error : not possible to activate the pages indicated */
+    while (1)
+    {
+      BSP_LED_On(LED3);
+    }
+  }
+
+#endif /* WRITE_PROTECTION_DISABLE */
+
+  /* Configure write protected pages */
+  if (OptionsBytesStruct.OptionType == OPTIONBYTE_WRP)
+  {
+    if(HAL_FLASHEx_OBProgram(&OptionsBytesStruct) != HAL_OK)
+    {
+      /* Error occurred while options bytes programming. **********************/
+      while (1)
+      {
+        BSP_LED_On(LED3);
+      }
+    }
+  }
+
+  if (OptionsBytesStruct2.OptionType == OPTIONBYTE_WRP)
+  {
+    if(HAL_FLASHEx_OBProgram(&OptionsBytesStruct2) != HAL_OK)
+    {
+      /* Error occurred while options bytes programming. **********************/
+      while (1)
+      {
+        BSP_LED_On(LED3);
+      }
+    }
+  }
+
+  /* Generate System Reset to load the new option byte values ***************/
+  if ((OptionsBytesStruct.OptionType == OPTIONBYTE_WRP) || (OptionsBytesStruct2.OptionType == OPTIONBYTE_WRP))
+  {
+    HAL_FLASH_OB_Launch();
+  }
+
+  /* Lock the Options Bytes *************************************************/
+  HAL_FLASH_OB_Lock();
+
+#ifdef FLASH_PAGE_PROGRAM
+  /* The selected pages are write protected *******************************/
+  if (((OptionsBytesStruct.WRPStartOffset  <= StartPage) && (OptionsBytesStruct.WRPEndOffset  >= EndPage)) ||
+      ((OptionsBytesStruct2.WRPStartOffset <= StartPage) && (OptionsBytesStruct2.WRPEndOffset >= EndPage)))
+  {
+    /* The desired pages are write protected */
+    /* Check that it is not allowed to write in this page */
+    Address = FLASH_USER_START_ADDR;
+    if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, Address, DATA_64) != HAL_OK)
+      {
+      /* Error returned during programming. */
+      /* Check that WRPERR flag is well set */
+      if ((HAL_FLASH_GetError() & HAL_FLASH_ERROR_WRP) != 0)
+      {
+        MemoryProgramStatus = FAILED;
+      }
+      else
+      {
+        /* Another error occurred.
+           User can add here some code to deal with this error */
+        while (1)
+        {
+          BSP_LED_On(LED3);
+        }
+      }
+    }
+    else
+    {
+      /* Write operation is successful. Should not occur
+         User can add here some code to deal with this error */
+      while (1)
+      {
+        BSP_LED_On(LED3);
+      }
+    }
+  }
+  else
+  {
+    /* The desired pages are not write protected */
+    /* Fill EraseInit structure************************************************/
+    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
+    EraseInitStruct.Banks       = FLASH_BANK_1;
+    EraseInitStruct.Page        = StartPage;
+    EraseInitStruct.NbPages     = EndPage - StartPage + 1;
+
+    if (HAL_FLASHEx_Erase(&EraseInitStruct, &PageError) != HAL_OK)
+    {
+      /*
+        Error occurred while page erase.
+        User can add here some code to deal with this error.
+        PageError will contain the faulty page and then to know the code error on this page,
+        user can call function 'HAL_FLASH_GetError()'
+      */
+      while (1)
+      {
+        BSP_LED_On(LED3);
+      }
+    }
+
+    /* FLASH Word program of DATA_32 at addresses defined by FLASH_USER_START_ADDR and FLASH_USER_END_ADDR */
+    Address = FLASH_USER_START_ADDR;
+    while (Address < FLASH_USER_END_ADDR)
+    {
+      if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, Address, DATA_64) == HAL_OK)
+      {
+        Address = Address + 8;
+      }
+      else
+      {
+        /* Error occurred while writing data in Flash memory.
+           User can add here some code to deal with this error */
+        while (1)
+        {
+          BSP_LED_On(LED3);
+        }
+      }
+    }
+
+    /* Check the correctness of written data */
+    Address = FLASH_USER_START_ADDR;
+
+    while (Address < FLASH_USER_END_ADDR)
+    {
+      if((*(__IO uint32_t*) Address) != DATA_32)
+      {
+        MemoryProgramStatus = FAILED;
+      }
+      Address += 4;
+    }
+  }
+#endif /* FLASH_PAGE_PROGRAM */
+
+  /* Lock the Flash to disable the flash control register access (recommended
+     to protect the FLASH memory against possible unwanted operation) *********/
+  HAL_FLASH_Lock();
+
+  /*Check if there is an issue to program data*/
+  if (MemoryProgramStatus == PASSED)
+  {
+    /* No error detected. Switch on LED1*/
+    BSP_LED_On(LED1);
+  }
+  else
+  {
+    /* Error detected. Switch on LED3*/
+    BSP_LED_On(LED3);
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Gets the page of a given address
+  * @param  Addr: Address of the FLASH Memory
+  * @retval The page of a given address
+  */
+static uint32_t GetPage(uint32_t Addr)
+{
+  uint32_t page = 0;
+
+  if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
+  {
+    /* Bank 1 */
+    page = (Addr - FLASH_BASE) / FLASH_PAGE_SIZE;
+  }
+  else
+  {
+    /* Bank 2 */
+    page = (Addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
+  }
+
+  return page;
+}
+
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..fb4c61372
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_WriteProtection/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..0e2c9f131
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/stm32g4xx_it.c
@@ -0,0 +1,117 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FLASH/FLASH_WriteProtection/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/readme.txt b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/readme.txt
new file mode 100644
index 000000000..87c68fe1e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FLASH/FLASH_WriteProtection/readme.txt
@@ -0,0 +1,99 @@
+/**
+  @page FLASH_WriteProtection FLASH write protection
+
+  @verbatim
+  ******************************************************************************
+  * @file    FLASH/FLASH_WriteProtection/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the FLASH write protection example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure and use the FLASH HAL API to enable and disable the write
+protection of the internal Flash memory.
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system clock (SYSCLK)
+to run at 170 MHz.
+
+  - If WRITE_PROTECTION_ENABLE is selected, the write protection will be enabled
+    for the defined pages.
+    To load the new option byte values, a system Reset is necessary, for this, the
+    function HAL_FLASH_OB_Launch() is used.
+
+  - If WRITE_PROTECTION_DISABLE is selected, the write protection will be disabled
+    for the defined pages.
+    To load the new option byte values, a system Reset is necessary, for this, the
+    function HAL_FLASH_OB_Launch() is used.
+
+  - If FLASH_PAGE_PROGRAM is selected, then an erase operation is done by filling
+    the erase init structure giving the starting erase page and the number of
+    pages to erase. At this stage, all these pages will be erased one by one separately.
+
+    @note: if problem occurs on a page, erase will be stopped and faulty page will
+    be returned to user (through variable 'PageError').
+
+    Once this operation is finished, double-word programming operation will be performed
+    in the Flash memory. The written data is then read back and checked.
+
+STM32G474E-EVAL1 Rev B board's LED can be used to monitor the transfer status:
+ - LED1 is ON when there are no errors detected after programming
+    => should be the case when WRITE_PROTECTION_DISABLE flag is enabled
+ - LED3 is ON when there are errors detected after programming
+    => should be the case when WRITE_PROTECTION_ENABLE flag is enabled
+ - LED3 is ON when there is an issue during erase, program or OB program procedure
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Memory, FLASH, write protection, AREA, Sector, Mass Erase
+
+@par Directory contents
+
+  - FLASH/FLASH_WriteProtection/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - FLASH/FLASH_WriteProtection/Inc/stm32g4xx_hal_conf.h        HAL Configuration file
+  - FLASH/FLASH_WriteProtection/Inc/stm32g4xx_it.h              Header for stm32g4xx_it.c
+  - FLASH/FLASH_WriteProtection/Inc/main.h                      Header for main.c module
+  - FLASH/FLASH_WriteProtection/Src/stm32g4xx_it.c              Interrupt handlers
+  - FLASH/FLASH_WriteProtection/Src/main.c                      Main program
+  - FLASH/FLASH_WriteProtection/Src/stm32g4xx_hal_msp.c         MSP initialization and de-initialization
+  - FLASH/FLASH_WriteProtection/Src/system_stm32g4xx.c          STM32G4xx system clock configuration file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/.extSettings b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/FMAC_FIR_PollingToIT.ewd b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/FMAC_FIR_PollingToIT.ewd
new file mode 100644
index 000000000..1cb0623c2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/FMAC_FIR_PollingToIT.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>FMAC_FIR_PollingToIT</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/FMAC_FIR_PollingToIT.ewp b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/FMAC_FIR_PollingToIT.ewp
new file mode 100644
index 000000000..e8f88fc15
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/FMAC_FIR_PollingToIT.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>FMAC_FIR_PollingToIT</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FMAC_FIR_PollingToIT/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FMAC_FIR_PollingToIT/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FMAC_FIR_PollingToIT/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
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+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/Project.eww
new file mode 100644
index 000000000..f4917ab0b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\FMAC_FIR_PollingToIT.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..042ac5637
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__      = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__    = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__      = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__= 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__  = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/EXTI_ToggleLedOnIT.ioc b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/FMAC_FIR_PollingToIT.ioc
similarity index 78%
rename from Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/EXTI_ToggleLedOnIT.ioc
rename to Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/FMAC_FIR_PollingToIT.ioc
index 15cb99709..aca347f94 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/EXTI_ToggleLedOnIT.ioc
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/FMAC_FIR_PollingToIT.ioc
@@ -4,29 +4,27 @@ CAD.pinconfig=
 CAD.provider=
 File.Version=6
 KeepUserPlacement=true
-Mcu.CPN=STM32G474RET3
+Mcu.CPN=STM32G474QET6
 Mcu.Family=STM32G4
-Mcu.IP0=NVIC
-Mcu.IP1=RCC
-Mcu.IP2=SYS
-Mcu.IPNb=3
-Mcu.Name=STM32G474R(B-C-E)Tx
-Mcu.Package=LQFP64
-Mcu.Pin0=PC13
-Mcu.Pin1=PA5
-Mcu.Pin2=PC4
-Mcu.Pin3=VP_SYS_VS_Systick
-Mcu.Pin4=VP_SYS_VS_DBSignals
-Mcu.PinsNb=5
+Mcu.IP0=FMAC
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FMAC_VS_FMAC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
-Mcu.UserName=STM32G474RETx
+Mcu.UserName=STM32G474QETx
 MxCube.Version=6.10.0
 MxDb.Version=DB.6.0.100
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.FMAC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -36,26 +34,14 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-PA5.GPIOParameters=GPIO_Label
-PA5.GPIO_Label=LED2
-PA5.Locked=true
-PA5.Signal=GPIO_Output
-PC13.Locked=true
-PC13.Signal=GPXTI13
-PC4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PC4.GPIO_Label=USER_BUTTON
-PC4.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC4.GPIO_PuPd=GPIO_PULLUP
-PC4.Locked=true
-PC4.Signal=GPXTI4
 PinOutPanel.RotationAngle=0
 ProjectManager.AskForMigrate=true
 ProjectManager.BackupPrevious=false
-ProjectManager.CompilerOptimize=3
+ProjectManager.CompilerOptimize=6
 ProjectManager.ComputerToolchain=false
 ProjectManager.CoupleFile=false
 ProjectManager.DeletePrevious=true
-ProjectManager.DeviceId=STM32G474RETx
+ProjectManager.DeviceId=STM32G474QETx
 ProjectManager.FreePins=false
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
@@ -66,8 +52,8 @@ ProjectManager.MainLocation=Src
 ProjectManager.NoMain=false
 ProjectManager.PreviousToolchain=
 ProjectManager.ProjectBuild=false
-ProjectManager.ProjectFileName=EXTI_ToggleLedOnIT.ioc
-ProjectManager.ProjectName=EXTI_ToggleLedOnIT
+ProjectManager.ProjectFileName=FMAC_FIR_PollingToIT.ioc
+ProjectManager.ProjectName=FMAC_FIR_PollingToIT
 ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=
 ProjectManager.StackSize=0x400
@@ -76,7 +62,7 @@ ProjectManager.ToolChainLocation=
 ProjectManager.UAScriptAfterPath=
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_FMAC_Init-FMAC-false-HAL-true
 RCC.ADC12Freq_Value=170000000
 RCC.ADC345Freq_Value=170000000
 RCC.AHBFreq_Value=170000000
@@ -126,14 +112,12 @@ RCC.USART3Freq_Value=170000000
 RCC.USBFreq_Value=170000000
 RCC.VCOInputFreq_Value=4000000
 RCC.VCOOutputFreq_Value=340000000
-SH.GPXTI13.0=GPIO_EXTI13
-SH.GPXTI13.ConfNb=1
-SH.GPXTI4.0=GPIO_EXTI4
-SH.GPXTI4.ConfNb=1
+VP_FMAC_VS_FMAC.Mode=FMAC_Activate
+VP_FMAC_VS_FMAC.Signal=FMAC_VS_FMAC
 VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
 VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
 VP_SYS_VS_Systick.Mode=SysTick
 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
 board=custom
-ProjectManager.Example=EXTI_ToggleLedOnIT
+ProjectManager.Example=FMAC_FIR_PollingToIT
 ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/main.h
new file mode 100644
index 000000000..ac76d575d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/main.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FMAC/FMAC_FIR_PollingToIT/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Configuration: uncomment in order to use the clipping feature */
+#define CLIP_ENABLED
+
+/* Size of the data arrays */
+#define ARRAY_SIZE              508
+
+/* Size of the preloaded input data array (size <= INPUT_BUFFER_SIZE) */
+#define INPUT_ARRAY_1_SIZE      100
+
+/* Size of the input data arrays written during calculation */
+#define INPUT_ARRAY_2_SIZE      120
+#define INPUT_ARRAY_3_SIZE      110
+#define INPUT_ARRAY_4_SIZE      182
+
+/* Expected number of calls to HAL_FMAC_GetDataCallback */
+#define GET_DATA_CALLBACK_COUNT  3
+
+/* Size of the output data arrays read during calculation
+   Total expected size: input array size - number of feed-forward taps */
+#define OUTPUT_ARRAY_1_SIZE     259
+#define OUTPUT_ARRAY_2_SIZE     249
+
+/* Expected number of calls to HAL_FMAC_OutputDataReadyCallback */
+#define DATA_RDY_CALLBACK_COUNT 2
+
+
+
+/* Filter parameter P: number of feed-forward taps or coefficients in the range [2:127] */
+#define COEFF_VECTOR_B_SIZE     5
+
+/* Filter parameter Q: not used */
+#define FILTER_PARAM_Q_NOT_USED 0
+
+/* Filter parameter R: gain in the range [0:7] */
+#define GAIN                    1
+
+
+
+/* Throughput parameter: extra space in the input buffer (minimum: 0) */
+#define MEMORY_PARAMETER_D1     122
+
+/* Throughput parameter: extra space in the output buffer (minimum: 1) */
+#define MEMORY_PARAMETER_D2     123
+
+/* Throughput parameter: watermark threshold for the input buffer */
+#define INPUT_THRESHOLD         FMAC_THRESHOLD_1
+
+/* Throughput parameter: watermark threshold for the output buffer (inferior or equal to MEMORY_PARAMETER_D1) */
+#define OUTPUT_THRESHOLD        FMAC_THRESHOLD_1
+
+
+
+/* FMAC internal memory configuration: base address of the coefficient buffer */
+#define COEFFICIENT_BUFFER_BASE 0
+
+/* FMAC internal memory configuration: size of the coefficient buffer */
+#define COEFFICIENT_BUFFER_SIZE COEFF_VECTOR_B_SIZE
+
+/* FMAC internal memory configuration: base address of the input buffer */
+#define INPUT_BUFFER_BASE       COEFFICIENT_BUFFER_SIZE
+
+/* FMAC internal memory configuration: size of the input buffer */
+#define INPUT_BUFFER_SIZE       COEFF_VECTOR_B_SIZE + MEMORY_PARAMETER_D1
+
+/* FMAC internal memory configuration: base address of the input buffer */
+#define OUTPUT_BUFFER_BASE      COEFFICIENT_BUFFER_SIZE + INPUT_BUFFER_SIZE
+
+/* FMAC internal memory configuration: size of the input buffer */
+#define OUTPUT_BUFFER_SIZE      MEMORY_PARAMETER_D2
+
+
+
+/* Polling timeout */
+#define POLLING_TIMEOUT         1000
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..7a0b2b209
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+#define HAL_FMAC_MODULE_ENABLED
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..840502962
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void FMAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/FMAC_FIR_PollingToIT.uvoptx b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/FMAC_FIR_PollingToIT.uvoptx
new file mode 100644
index 000000000..e78a73b25
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/FMAC_FIR_PollingToIT.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>FMAC_FIR_PollingToIT</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
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+
+  <Group>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/FMAC_FIR_PollingToIT.uvprojx b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/FMAC_FIR_PollingToIT.uvprojx
new file mode 100644
index 000000000..6cbbfd444
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/FMAC_FIR_PollingToIT.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>FMAC_FIR_PollingToIT</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>FMAC_FIR_PollingToIT\Exe\</OutputDirectory>
+          <OutputName>FMAC_FIR_PollingToIT</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
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+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
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+            <uocRom>0</uocRom>
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+            <uocXRam>0</uocXRam>
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+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_fmac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="FMAC_FIR_PollingToIT"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..e7ff2a057
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1579158787">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1579158787" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1579158787" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1579158787." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.82791635" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.954660346" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1341639287" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1490266721" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1069771694" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1616682328" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.82779307" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.104771220" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1695977220" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1070772467" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.761305617" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/FMAC_FIR_PollingToIT}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1295413535" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.568005659" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.661521568" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1496859385" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.661820157" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.594795284" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.297627515" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1135902183" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.330417320" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1350505000" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.109052640" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1869875258" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1039949396" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.899464135" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2085037864" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1796283442" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.429391128" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.22741930">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.22741930" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
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+							<builder buildPath="${workspace_loc:/FMAC_FIR_PollingToIT}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.2006646433" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.206725900" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1564827162" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.2055030393" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.460901266" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1917138803" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.677400209" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+					</folderInfo>
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+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="FMAC_FIR_PollingToIT.null.1516088151" name="FMAC_FIR_PollingToIT"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1579158787;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1579158787.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.661820157;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2032531844">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.22741930;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.22741930.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.206725900;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2010796909">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/.project
new file mode 100644
index 000000000..1898dd206
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>FMAC_FIR_PollingToIT</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>FMAC_FIR_PollingToIT.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/FMAC_FIR_PollingToIT.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_fmac.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
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+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/main.c
new file mode 100644
index 000000000..69483a1a5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/main.c
@@ -0,0 +1,599 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FMAC/FMAC_FIR_PollingToIT/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use FMAC HAL API (FMAC instance)
+  *          to perform a FIR filter from polling mode to IT mode.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+FMAC_HandleTypeDef hfmac;
+
+/* USER CODE BEGIN PV */
+/* FMAC configuration structure */
+FMAC_FilterConfigTypeDef sFmacConfig;
+
+/* Array of filter coefficients B (feed-forward taps) in Q1.15 format */
+static int16_t aFilterCoeffB[COEFF_VECTOR_B_SIZE] =
+{
+    2212,  8848, 13272,  8848,  2212
+};
+
+/* Array of input values in Q1.15 format (in four parts in order to write new data during the calculation) */
+static int16_t aInputValues1[INPUT_ARRAY_1_SIZE] =
+{
+       0,  5276, -1548, 13844,     7, 17551,  5802, 16142, 14198, 12009,
+   21624,  8678, 24576,  8672, 21611, 11990, 14172, 16111,  5765, 17510,
+     -37, 13797, -1598,  5225,   -51, -5327,  1498,-13892,   -52,-17592,
+   -5838,-16174,-14223,-12029,-21637, -8685,-24576, -8665,-21597,-11970,
+  -14146,-16080, -5729,-17469,    82,-13749,  1647, -5174,   103,  5378,
+   -1449, 13939,    96, 17632,  5874, 16205, 14249, 12048, 21650,  8691,
+   24575,  8658, 21583, 11950, 14120, 16048,  5692, 17428,  -127, 13701,
+   -1697,  5122,  -154, -5429,  1399,-13987,  -141,-17673, -5910,-16236,
+  -14274,-12068,-21663, -8698,-24575, -8651,-21570,-11930,-14094,-16016,
+   -5655,-17387,   171,-13654,  1747, -5071,   206,  5480, -1349, 14034,
+};
+static int16_t aInputValues2[INPUT_ARRAY_2_SIZE] =
+{
+     185, 17713,  5946, 16267, 14299, 12087, 21676,  8704, 24574,  8643,
+   21556, 11909, 14067, 15984,  5618, 17346,  -216, 13606, -1797,  5020,
+    -257, -5530,  1300,-14081,  -229,-17754, -5982,-16297,-14324,-12106,
+  -21688, -8710,-24574, -8636,-21542,-11889,-14041,-15952, -5581,-17304,
+     261,-13558,  1847, -4969,   309,  5581, -1250, 14128,   273, 17794,
+    6018, 16328, 14349, 12124, 21701,  8715, 24573,  8628, 21527, 11868,
+   14014, 15920,  5544, 17263,  -306, 13510, -1897,  4918,  -360, -5632,
+    1201,-14176,  -317,-17834, -6053,-16358,-14374,-12143,-21713, -8721,
+  -24571, -8620,-21513,-11847,-13988,-15888, -5507,-17221,   352,-13462,
+    1947, -4867,   412,  5683, -1152, 14223,   361, 17874,  6089, 16389,
+   14399, 12162, 21725,  8726, 24570,  8612, 21498, 11826, 13961, 15856,
+    5470, 17180,  -397, 13414, -1997,  4816,  -463, -5734,  1102,-14270,
+};
+static int16_t aInputValues3[INPUT_ARRAY_3_SIZE] =
+{
+    -405,-17914, -6124,-16419,-14423,-12180,-21737, -8732,-24569, -8604,
+  -21484,-11805,-13934,-15823, -5432,-17138,   442,-13366,  2047, -4764,
+     515,  5785, -1053, 14317,   449, 17954,  6160, 16449, 14447, 12198,
+   21749,  8737, 24567,  8596, 21469, 11784, 13907, 15790,  5395, 17096,
+    -488, 13318, -2097,  4713,  -566, -5836,  1004,-14363,  -493,-17994,
+   -6195,-16479,-14472,-12216,-21760, -8742,-24565, -8587,-21454,-11763,
+  -13879,-15758, -5357,-17054,   533,-13269,  2147, -4662,   618,  5886,
+    -955, 14410,   536, 18033,  6230, 16509, 14496, 12234, 21772,  8747,
+   24563,  8579, 21438, 11741, 13852, 15725,  5319, 17012,  -579, 13221,
+   -2198,  4611,  -669, -5937,   905,-14457,  -580,-18073, -6265,-16538,
+  -14520,-12252,-21783, -8751,-24561, -8570,-21423,-11720,-13824,-15692,
+};
+static int16_t aInputValues4[INPUT_ARRAY_4_SIZE] =
+{
+   -5282,-16970,   624,-13173,  2248, -4559,   720,  5988,  -856, 14504,
+     623, 18112,  6299, 16568, 14543, 12270, 21794,  8756, 24559,  8561,
+   21408, 11698, 13797, 15659,  5244, 16928,  -670, 13124, -2298,  4508,
+    -772, -6038,   807,-14550,  -667,-18152, -6334,-16597,-14567,-12287,
+  -21805, -8760,-24557, -8552,-21392,-11676,-13769,-15625, -5205,-16886,
+     716,-13076,  2348, -4457,   823,  6089,  -758, 14597,   710, 18191,
+    6369, 16626, 14590, 12304, 21816,  8764, 24554,  8542, 21376, 11654,
+   13741, 15592,  5167, 16843,  -761, 13027, -2399,  4405,  -875, -6140,
+     709,-14643,  -753,-18230, -6403,-16656,-14614,-12321,-21827, -8768,
+  -24551, -8533,-21360,-11632,-13713,-15559, -5129,-16801,   807,-12979,
+    2449, -4354,   926,  6190,  -660, 14690,   796, 18269,  6437, 16685,
+   14637, 12338, 21837,  8772, 24548,  8523, 21344, 11609, 13684, 15525,
+    5090, 16758,  -853, 12930, -2500,  4303,  -977, -6241,   612,-14736,
+    -839,-18308, -6472,-16713,-14660,-12355,-21847, -8776,-24545, -8514,
+  -21328,-11587,-13656,-15491, -5052,-16715,   899,-12882,  2550, -4251,
+    1029,  6291,  -563, 14782,   882, 18347,  6506, 16742, 14683, 12372,
+   21858,  8779, 24542,  8504, 21311, 11564, 13628, 15457,  5013, 16673,
+    -946, 12833, -2600,  4200, -1080, -6342,   514,-14828,  -925,-18386,
+   -6540,-16771
+};
+
+/* Array of calculated filtered data in Q1.15 format (two parts) */
+static int16_t aCalculatedFilteredData1[OUTPUT_ARRAY_1_SIZE];
+static int16_t aCalculatedFilteredData2[OUTPUT_ARRAY_2_SIZE];
+
+/* Size of the currently handled input buffer aInputValuesX */
+uint16_t CurrentInputArraySize;
+
+/* Expected number of calculated samples for the used aCalculatedFilteredDataX */
+uint16_t ExpectedCalculatedFilteredDataSize;
+
+/* Status of the calculation */
+__IO uint32_t OutputDataReadyCallbackCount = 0;
+__IO uint32_t ErrorCount                   = 0;
+
+/* Array of reference filtered data for FIR "5 feed-forward taps, gain = 1" in Q1.15 format */
+static const int16_t aRefFilteredData[ARRAY_SIZE] =
+{
+#if defined(CLIP_ENABLED)
+  0x2370, 0x3498, 0x447e, 0x539a, 0x60ed, 0x6cdb, 0x76c6, 0x7ea8, 0x7fff, 0x7fff,
+  0x7fff, 0x7fff, 0x7fff, 0x7e7e, 0x768f, 0x6c98, 0x609e, 0x5343, 0x441f, 0x3432,
+  0x2306, 0x1185, 0xff92, 0xeda0, 0xdc24, 0xcb01, 0xbb21, 0xac0d, 0x9ec4, 0x92e1,
+  0x8902, 0x812d, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x81ac, 0x89a7, 0x93aa,
+  0x9fae, 0xad14, 0xbc40, 0xcc33, 0xdd63, 0xeee7, 0x00dc, 0x12cc, 0x2444, 0x3563,
+  0x453c, 0x5448, 0x6188, 0x6d61, 0x7734, 0x7efb, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+  0x7fff, 0x7e28, 0x7620, 0x6c11, 0x6002, 0x5293, 0x435f, 0x3366, 0x2230, 0x10aa,
+  0xfeb5, 0xecc5, 0xdb50, 0xca36, 0xba63, 0xab5f, 0x9e2a, 0x925c, 0x8895, 0x80da,
+  0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8201, 0x8a17, 0x9432, 0xa04c, 0xadc4,
+  0xbcff, 0xccff, 0xde39, 0xefc3, 0x01b9, 0x13a7, 0x251a, 0x362f, 0x45fb, 0x54f6,
+  0x6222, 0x6de5, 0x77a0, 0x7f4e, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7dd1,
+  0x75af, 0x6b88, 0x5f64, 0x51e3, 0x42a0, 0x329a, 0x215b, 0x0fcf, 0xfdd9, 0xebec,
+  0xda7c, 0xc96c, 0xb9a6, 0xaab2, 0x9d90, 0x91d9, 0x882a, 0x8089, 0x8000, 0x8000,
+  0x8000, 0x8000, 0x8000, 0x8259, 0x8a88, 0x94bb, 0xa0eb, 0xae75, 0xbdc0, 0xcdcc,
+  0xdf0f, 0xf09e, 0x0295, 0x1481, 0x25ed, 0x36f8, 0x46b7, 0x55a3, 0x62bc, 0x6e68,
+  0x780b, 0x7f9e, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7d79, 0x753d, 0x6aff,
+  0x5ec5, 0x5132, 0x41df, 0x31cc, 0x2085, 0x0ef4, 0xfcfc, 0xeb11, 0xd9a8, 0xc8a1,
+  0xb8e9, 0xaa06, 0x9cf8, 0x9156, 0x87bf, 0x8039, 0x8000, 0x8000, 0x8000, 0x8000,
+  0x8000, 0x82b2, 0x8afa, 0x9545, 0xa189, 0xaf27, 0xbe82, 0xce9a, 0xdfe5, 0xf179,
+  0x0371, 0x155b, 0x26c1, 0x37c2, 0x4774, 0x564f, 0x6354, 0x6eeb, 0x7875, 0x7fef,
+  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7d20, 0x74cb, 0x6a75, 0x5e26, 0x5080,
+  0x411d, 0x30fe, 0x1faf, 0x0e19, 0xfc20, 0xea37, 0xd8d4, 0xc7d8, 0xb82d, 0xa95b,
+  0x9c60, 0x90d4, 0x8756, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x830c,
+  0x8b6e, 0x95d0, 0xa229, 0xafd9, 0xbf43, 0xcf67, 0xe0bc, 0xf254, 0x044e, 0x1635,
+  0x2794, 0x388c, 0x4830, 0x56fa, 0x63ec, 0x6f6c, 0x78dd, 0x7fff, 0x7fff, 0x7fff,
+  0x7fff, 0x7fff, 0x7fff, 0x7cc6, 0x7457, 0x69e9, 0x5d85, 0x4fcc, 0x405a, 0x3030,
+  0x1ed8, 0x0d3d, 0xfb43, 0xe95e, 0xd802, 0xc70f, 0xb771, 0xa8b0, 0x9bc8, 0x9053,
+  0x86ee, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8367, 0x8be3, 0x965c,
+  0xa2ca, 0xb08d, 0xc006, 0xd036, 0xe193, 0xf32f, 0x052a, 0x170e, 0x2866, 0x3953,
+  0x48ea, 0x57a4, 0x6482, 0x6fec, 0x7945, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+  0x7fff, 0x7c6a, 0x73e2, 0x695d, 0x5ce3, 0x4f18, 0x3f97, 0x2f61, 0x1e00, 0x0c62,
+  0xfa67, 0xe884, 0xd72e, 0xc646, 0xb6b6, 0xa806, 0x9b33, 0x8fd4, 0x8687, 0x8000,
+  0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x83c3, 0x8c58, 0x96e9, 0xa36c, 0xb140,
+  0xc0c9, 0xd105, 0xe26a, 0xf40b, 0x0606, 0x17e7, 0x293a, 0x3a1c, 0x49a5, 0x584c,
+  0x6516, 0x706a, 0x79ab, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7c0e,
+  0x736c, 0x68d0, 0x5c42, 0x4e64, 0x3ed4, 0x2e92, 0x1d29, 0x0b86, 0xf98b, 0xe7ab,
+  0xd65d, 0xc57f, 0xb5fd, 0xa75d, 0x9a9e, 0x8f56, 0x8622, 0x8000, 0x8000, 0x8000,
+  0x8000, 0x8000, 0x8000, 0x8421, 0x8ccf, 0x9777, 0xa410, 0xb1f6, 0xc18d, 0xd1d4,
+  0xe341, 0xf4e6, 0x06e2, 0x18c0, 0x2a0c, 0x3ae4, 0x4a5f, 0x58f6, 0x65ab, 0x70e7,
+  0x7a0f, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7baf, 0x72f4, 0x6840,
+  0x5b9e, 0x4daf, 0x3e10, 0x2dc2, 0x1c51, 0x0aa9, 0xf8ae, 0xe6d2, 0xd58a, 0xc4b8,
+  0xb544, 0xa6b6, 0x9a0a, 0x8ed8, 0x85bd, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+  0x8000, 0x847f, 0x8d47, 0x9806, 0xa4b3, 0xb2ab, 0xc251, 0xd2a4, 0xe419, 0xf5c3,
+  0x07bf, 0x1999, 0x2add, 0x3bab, 0x4b17, 0x599c, 0x663e, 0x7164, 0x7a73, 0x7fff,
+  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7b4f, 0x727b, 0x67b0, 0x5af9, 0x4cf8,
+  0x3d4b, 0x2cf2, 0x1b7a, 0x09cf, 0xf7d3, 0xe5fa, 0xd4ba, 0xc3f2, 0xb48c, 0xa60f,
+  0x9978, 0x8e5d, 0x855b, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x84e0,
+  0x8dc1, 0x9897, 0xa558, 0xb362, 0xc316, 0xd374, 0xe4f1, 0xf69f, 0x089b, 0x1a71,
+  0x2bae, 0x3c70, 0x4bcf, 0x5a43, 0x66d1, 0x71e0, 0x7ad6, 0x7fff, 0x7fff, 0x7fff,
+  0x7fff, 0x7fff, 0x7fff, 0x7aee, 0x7201, 0x6720, 0x5a54, 0x4c41, 0x3c85, 0x2c22,
+  0x1aa2, 0x08f3, 0xf6f6, 0xe522, 0xd3e9, 0xc32b, 0xb3d4, 0xa568
+#else
+  0x2370, 0x3498, 0x447e, 0x539a, 0x60ed, 0x6cdb, 0x76c6, 0x7ea8, 0x8483, 0x87d3,
+  0x892a, 0x87c5, 0x8467, 0x7e7e, 0x768f, 0x6c98, 0x609e, 0x5343, 0x441f, 0x3432,
+  0x2306, 0x1185, 0xff92, 0xeda0, 0xdc24, 0xcb01, 0xbb21, 0xac0d, 0x9ec4, 0x92e1,
+  0x8902, 0x812d, 0x7b60, 0x781d, 0x76d5, 0x7848, 0x7bb5, 0x81ac, 0x89a7, 0x93aa,
+  0x9fae, 0xad14, 0xbc40, 0xcc33, 0xdd63, 0xeee7, 0x00dc, 0x12cc, 0x2444, 0x3563,
+  0x453c, 0x5448, 0x6188, 0x6d61, 0x7734, 0x7efb, 0x84bb, 0x87ef, 0x8929, 0x87a7,
+  0x842c, 0x7e28, 0x7620, 0x6c11, 0x6002, 0x5293, 0x435f, 0x3366, 0x2230, 0x10aa,
+  0xfeb5, 0xecc5, 0xdb50, 0xca36, 0xba63, 0xab5f, 0x9e2a, 0x925c, 0x8895, 0x80da,
+  0x7b28, 0x7802, 0x76d6, 0x7867, 0x7bef, 0x8201, 0x8a17, 0x9432, 0xa04c, 0xadc4,
+  0xbcff, 0xccff, 0xde39, 0xefc3, 0x01b9, 0x13a7, 0x251a, 0x362f, 0x45fb, 0x54f6,
+  0x6222, 0x6de5, 0x77a0, 0x7f4e, 0x84f2, 0x880a, 0x8927, 0x8788, 0x83f1, 0x7dd1,
+  0x75af, 0x6b88, 0x5f64, 0x51e3, 0x42a0, 0x329a, 0x215b, 0x0fcf, 0xfdd9, 0xebec,
+  0xda7c, 0xc96c, 0xb9a6, 0xaab2, 0x9d90, 0x91d9, 0x882a, 0x8089, 0x7af2, 0x77e8,
+  0x76d9, 0x7886, 0x7c2b, 0x8259, 0x8a88, 0x94bb, 0xa0eb, 0xae75, 0xbdc0, 0xcdcc,
+  0xdf0f, 0xf09e, 0x0295, 0x1481, 0x25ed, 0x36f8, 0x46b7, 0x55a3, 0x62bc, 0x6e68,
+  0x780b, 0x7f9e, 0x8527, 0x8823, 0x8923, 0x8767, 0x83b4, 0x7d79, 0x753d, 0x6aff,
+  0x5ec5, 0x5132, 0x41df, 0x31cc, 0x2085, 0x0ef4, 0xfcfc, 0xeb11, 0xd9a8, 0xc8a1,
+  0xb8e9, 0xaa06, 0x9cf8, 0x9156, 0x87bf, 0x8039, 0x7abd, 0x77d1, 0x76df, 0x78a9,
+  0x7c6a, 0x82b2, 0x8afa, 0x9545, 0xa189, 0xaf27, 0xbe82, 0xce9a, 0xdfe5, 0xf179,
+  0x0371, 0x155b, 0x26c1, 0x37c2, 0x4774, 0x564f, 0x6354, 0x6eeb, 0x7875, 0x7fef,
+  0x855c, 0x883a, 0x891d, 0x8745, 0x8375, 0x7d20, 0x74cb, 0x6a75, 0x5e26, 0x5080,
+  0x411d, 0x30fe, 0x1faf, 0x0e19, 0xfc20, 0xea37, 0xd8d4, 0xc7d8, 0xb82d, 0xa95b,
+  0x9c60, 0x90d4, 0x8756, 0x7fea, 0x7a8a, 0x77b9, 0x76e4, 0x78cb, 0x7ca8, 0x830c,
+  0x8b6e, 0x95d0, 0xa229, 0xafd9, 0xbf43, 0xcf67, 0xe0bc, 0xf254, 0x044e, 0x1635,
+  0x2794, 0x388c, 0x4830, 0x56fa, 0x63ec, 0x6f6c, 0x78dd, 0x803c, 0x858e, 0x8851,
+  0x8918, 0x8723, 0x8337, 0x7cc6, 0x7457, 0x69e9, 0x5d85, 0x4fcc, 0x405a, 0x3030,
+  0x1ed8, 0x0d3d, 0xfb43, 0xe95e, 0xd802, 0xc70f, 0xb771, 0xa8b0, 0x9bc8, 0x9053,
+  0x86ee, 0x7f9c, 0x7a58, 0x77a4, 0x76ec, 0x78ef, 0x7ce8, 0x8367, 0x8be3, 0x965c,
+  0xa2ca, 0xb08d, 0xc006, 0xd036, 0xe193, 0xf32f, 0x052a, 0x170e, 0x2866, 0x3953,
+  0x48ea, 0x57a4, 0x6482, 0x6fec, 0x7945, 0x808a, 0x85c0, 0x8866, 0x890f, 0x86fd,
+  0x82f5, 0x7c6a, 0x73e2, 0x695d, 0x5ce3, 0x4f18, 0x3f97, 0x2f61, 0x1e00, 0x0c62,
+  0xfa67, 0xe884, 0xd72e, 0xc646, 0xb6b6, 0xa806, 0x9b33, 0x8fd4, 0x8687, 0x7f4f,
+  0x7a27, 0x7790, 0x76f4, 0x7914, 0x7d2a, 0x83c3, 0x8c58, 0x96e9, 0xa36c, 0xb140,
+  0xc0c9, 0xd105, 0xe26a, 0xf40b, 0x0606, 0x17e7, 0x293a, 0x3a1c, 0x49a5, 0x584c,
+  0x6516, 0x706a, 0x79ab, 0x80d5, 0x85f0, 0x8879, 0x8906, 0x86d8, 0x82b4, 0x7c0e,
+  0x736c, 0x68d0, 0x5c42, 0x4e64, 0x3ed4, 0x2e92, 0x1d29, 0x0b86, 0xf98b, 0xe7ab,
+  0xd65d, 0xc57f, 0xb5fd, 0xa75d, 0x9a9e, 0x8f56, 0x8622, 0x7f05, 0x79f8, 0x777d,
+  0x76fe, 0x793b, 0x7d6c, 0x8421, 0x8ccf, 0x9777, 0xa410, 0xb1f6, 0xc18d, 0xd1d4,
+  0xe341, 0xf4e6, 0x06e2, 0x18c0, 0x2a0c, 0x3ae4, 0x4a5f, 0x58f6, 0x65ab, 0x70e7,
+  0x7a0f, 0x811f, 0x861e, 0x888b, 0x88fb, 0x86b0, 0x8270, 0x7baf, 0x72f4, 0x6840,
+  0x5b9e, 0x4daf, 0x3e10, 0x2dc2, 0x1c51, 0x0aa9, 0xf8ae, 0xe6d2, 0xd58a, 0xc4b8,
+  0xb544, 0xa6b6, 0x9a0a, 0x8ed8, 0x85bd, 0x7ebb, 0x79ca, 0x776b, 0x770a, 0x7963,
+  0x7db1, 0x847f, 0x8d47, 0x9806, 0xa4b3, 0xb2ab, 0xc251, 0xd2a4, 0xe419, 0xf5c3,
+  0x07bf, 0x1999, 0x2add, 0x3bab, 0x4b17, 0x599c, 0x663e, 0x7164, 0x7a73, 0x8168,
+  0x864b, 0x889b, 0x88ef, 0x8687, 0x822b, 0x7b4f, 0x727b, 0x67b0, 0x5af9, 0x4cf8,
+  0x3d4b, 0x2cf2, 0x1b7a, 0x09cf, 0xf7d3, 0xe5fa, 0xd4ba, 0xc3f2, 0xb48c, 0xa60f,
+  0x9978, 0x8e5d, 0x855b, 0x7e73, 0x799d, 0x775b, 0x7716, 0x798c, 0x7df6, 0x84e0,
+  0x8dc1, 0x9897, 0xa558, 0xb362, 0xc316, 0xd374, 0xe4f1, 0xf69f, 0x089b, 0x1a71,
+  0x2bae, 0x3c70, 0x4bcf, 0x5a43, 0x66d1, 0x71e0, 0x7ad6, 0x81b1, 0x8678, 0x88ab,
+  0x88e2, 0x865d, 0x81e5, 0x7aee, 0x7201, 0x6720, 0x5a54, 0x4c41, 0x3c85, 0x2c22,
+  0x1aa2, 0x08f3, 0xf6f6, 0xe522, 0xd3e9, 0xc32b, 0xb3d4, 0xa568
+#endif /* CLIP_ENABLED */
+};
+
+/* Auxiliary counter */
+uint32_t Index;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_FMAC_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_FMAC_Init();
+  /* USER CODE BEGIN 2 */
+
+  /*## Configure the FMAC peripheral #########################################*/
+  sFmacConfig.InputBaseAddress  = INPUT_BUFFER_BASE;
+  sFmacConfig.InputBufferSize   = INPUT_BUFFER_SIZE;
+  sFmacConfig.InputThreshold    = INPUT_THRESHOLD;
+  sFmacConfig.CoeffBaseAddress  = COEFFICIENT_BUFFER_BASE;
+  sFmacConfig.CoeffBufferSize   = COEFFICIENT_BUFFER_SIZE;
+  sFmacConfig.OutputBaseAddress = OUTPUT_BUFFER_BASE;
+  sFmacConfig.OutputBufferSize  = OUTPUT_BUFFER_SIZE;
+  sFmacConfig.OutputThreshold   = OUTPUT_THRESHOLD;
+  sFmacConfig.pCoeffA           = NULL;
+  sFmacConfig.CoeffASize        = 0;
+  sFmacConfig.pCoeffB           = aFilterCoeffB;
+  sFmacConfig.CoeffBSize        = COEFF_VECTOR_B_SIZE;
+  sFmacConfig.Filter            = FMAC_FUNC_CONVO_FIR;
+  sFmacConfig.InputAccess       = FMAC_BUFFER_ACCESS_POLLING;
+  sFmacConfig.OutputAccess      = FMAC_BUFFER_ACCESS_IT;
+#if defined(CLIP_ENABLED)
+  sFmacConfig.Clip              = FMAC_CLIP_ENABLED;
+#else
+  sFmacConfig.Clip              = FMAC_CLIP_DISABLED;
+#endif
+  sFmacConfig.P                 = COEFF_VECTOR_B_SIZE;
+  sFmacConfig.Q                 = FILTER_PARAM_Q_NOT_USED;
+  sFmacConfig.R                 = GAIN;
+
+  if (HAL_FMAC_FilterConfig(&hfmac, &sFmacConfig) != HAL_OK)
+  {
+    /* Configuration Error */
+    Error_Handler();
+  }
+
+  /*## Preload the input and output buffers ##################################*/
+  if (HAL_FMAC_FilterPreload(&hfmac, aInputValues1, INPUT_ARRAY_1_SIZE, NULL, 0) != HAL_OK)
+  {
+    /* Configuration Error */
+    Error_Handler();
+  }
+
+  /*## Start calculation of FIR filter in polling/IT mode ####################*/
+  ExpectedCalculatedFilteredDataSize = OUTPUT_ARRAY_1_SIZE;
+  if (HAL_FMAC_FilterStart(&hfmac, aCalculatedFilteredData1, &ExpectedCalculatedFilteredDataSize) != HAL_OK)
+  {
+    /* Processing Error */
+    Error_Handler();
+  }
+
+  /*## Append the 2nd part of the input data #################################*/
+  CurrentInputArraySize = INPUT_ARRAY_2_SIZE;
+  if (HAL_FMAC_AppendFilterData(&hfmac,
+                                aInputValues2,
+                                &CurrentInputArraySize) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*## Poll to write the 2nd part of the input data ##########################*/
+  if (HAL_FMAC_PollFilterData(&hfmac, POLLING_TIMEOUT) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*## Append the 3rd part of the input data #################################*/
+  CurrentInputArraySize = INPUT_ARRAY_3_SIZE;
+  if (HAL_FMAC_AppendFilterData(&hfmac,
+                                aInputValues3,
+                                &CurrentInputArraySize) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*## Poll to write the 3rd part of the input data ##########################*/
+  if (HAL_FMAC_PollFilterData(&hfmac, POLLING_TIMEOUT) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*## Append the 4th part of the input data #################################*/
+  CurrentInputArraySize = INPUT_ARRAY_4_SIZE;
+  if (HAL_FMAC_AppendFilterData(&hfmac,
+                                aInputValues4,
+                                &CurrentInputArraySize) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*## Poll to write the 4th part of the input data ##########################*/
+  if (HAL_FMAC_PollFilterData(&hfmac, POLLING_TIMEOUT) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /*## Wait for the end of the handling (no new data written) ################*/
+  /*  For simplicity reasons, this example is just waiting till the end of the
+      calculation, but the application may perform other tasks while the operation
+      is ongoing. */
+  while(OutputDataReadyCallbackCount < DATA_RDY_CALLBACK_COUNT)
+  {
+    if(ErrorCount != 0)
+    {
+      /* Processing Error */
+      Error_Handler();
+    }
+  }
+
+  /*## Stop the calculation of FIR filter in polling/DMA mode ################*/
+  if (HAL_FMAC_FilterStop(&hfmac) != HAL_OK)
+  {
+    /* Processing Error */
+    Error_Handler();
+  }
+
+  /*## Check the final error status ##########################################*/
+  if(ErrorCount != 0)
+  {
+    /* Processing Error */
+    Error_Handler();
+  }
+
+  /*## Compare FMAC results to the reference values ##########################*/
+  for (Index = 0; Index < OUTPUT_ARRAY_1_SIZE; Index++)
+  {
+    if (aCalculatedFilteredData1[Index]  != aRefFilteredData[Index])
+    {
+      /* Processing Error */
+      Error_Handler();
+    }
+  }
+  for (Index = 0; Index < OUTPUT_ARRAY_2_SIZE; Index++)
+  {
+    if (aCalculatedFilteredData2[Index]  != aRefFilteredData[OUTPUT_ARRAY_1_SIZE + Index])
+    {
+      /* Processing Error */
+      Error_Handler();
+    }
+  }
+
+  /* There is no error in the output values: Turn LED1 on */
+  BSP_LED_On(LED1);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief FMAC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_FMAC_Init(void)
+{
+
+  /* USER CODE BEGIN FMAC_Init 0 */
+
+  /* USER CODE END FMAC_Init 0 */
+
+  /* USER CODE BEGIN FMAC_Init 1 */
+
+  /* USER CODE END FMAC_Init 1 */
+  hfmac.Instance = FMAC;
+  if (HAL_FMAC_Init(&hfmac) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN FMAC_Init 2 */
+
+  /* USER CODE END FMAC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief FMAC output data ready callback
+  * @par hfmac: FMAC HAL handle
+  * @retval None
+  */
+void HAL_FMAC_OutputDataReadyCallback(FMAC_HandleTypeDef *hfmac)
+{
+  OutputDataReadyCallbackCount++;
+
+  if (OutputDataReadyCallbackCount == 1)
+  {
+    ExpectedCalculatedFilteredDataSize = OUTPUT_ARRAY_2_SIZE;
+    if (HAL_FMAC_ConfigFilterOutputBuffer(hfmac,
+                                          aCalculatedFilteredData2,
+                                          &ExpectedCalculatedFilteredDataSize) != HAL_OK)
+    {
+      ErrorCount++;
+    }
+  }
+  else
+  {
+    /* No more data will be read, disable the FMAC read interrupt */
+    __HAL_FMAC_DISABLE_IT(hfmac, FMAC_IT_RIEN);
+  }
+}
+
+/**
+  * @brief FMAC error callback
+  * @par hfmac: FMAC HAL handle
+  * @retval None
+  */
+void HAL_FMAC_ErrorCallback(FMAC_HandleTypeDef *hfmac)
+{
+  ErrorCount++;
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+    /* LED3 is blinking */
+    BSP_LED_Toggle(LED3);
+    HAL_Delay(500);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..5e1f10e09
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,136 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief FMAC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hfmac: FMAC handle pointer
+* @retval None
+*/
+void HAL_FMAC_MspInit(FMAC_HandleTypeDef* hfmac)
+{
+  if(hfmac->Instance==FMAC)
+  {
+  /* USER CODE BEGIN FMAC_MspInit 0 */
+
+  /* USER CODE END FMAC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_FMAC_CLK_ENABLE();
+    /* FMAC interrupt Init */
+    HAL_NVIC_SetPriority(FMAC_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FMAC_IRQn);
+  /* USER CODE BEGIN FMAC_MspInit 1 */
+
+  /* USER CODE END FMAC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief FMAC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hfmac: FMAC handle pointer
+* @retval None
+*/
+void HAL_FMAC_MspDeInit(FMAC_HandleTypeDef* hfmac)
+{
+  if(hfmac->Instance==FMAC)
+  {
+  /* USER CODE BEGIN FMAC_MspDeInit 0 */
+
+  /* USER CODE END FMAC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_FMAC_CLK_DISABLE();
+
+    /* FMAC interrupt DeInit */
+    HAL_NVIC_DisableIRQ(FMAC_IRQn);
+  /* USER CODE BEGIN FMAC_MspDeInit 1 */
+
+  /* USER CODE END FMAC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..2ebaac2db
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_it.c
@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern FMAC_HandleTypeDef hfmac;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles FMAC interrupt.
+  */
+void FMAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN FMAC_IRQn 0 */
+
+  /* USER CODE END FMAC_IRQn 0 */
+  HAL_FMAC_IRQHandler(&hfmac);
+  /* USER CODE BEGIN FMAC_IRQn 1 */
+
+  /* USER CODE END FMAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/readme.txt b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/readme.txt
new file mode 100644
index 000000000..ba7654825
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/FMAC/FMAC_FIR_PollingToIT/readme.txt
@@ -0,0 +1,117 @@
+/**
+  @page FMAC_FIR_PollingToIT FMAC FIR filter from polling mode to IT mode example
+
+  @verbatim
+  ******************************************************************************
+  * @file    FMAC/FMAC_FIR_PollingToIT/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of FMAC_FIR_PollingToIT example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to use the FMAC peripheral to perform a FIR filter from polling mode to IT mode.
+
+The FMAC peripheral is configured to perform a FIR filter with
+5 feed-forward taps and a gain equal to 1. The input and output
+thresholds are set to 1. The clipping feature can be enabled or disabled thanks
+to the compilation switch CLIP_ENABLED in main.h.
+
+The FMAC peripheral is configured so as to use the best of its 256 x 16-bit
+internal memory. This local memory is divided into three buffers:
+ -   0 to   4: coefficient buffer;
+ -   5 to 131: input buffer;
+ - 132 to 254: output buffer;
+ -        255: unused.
+
+Polling mode is used to transfer input data from memory to the FMAC peripheral.
+IT mode is used to transfer output data from FMAC peripheral to memory.
+
+The coefficient buffer contains the vector of feed-forward taps, named B
+(size comprised in [2:127]; here, size N = 5 elements).
+This buffer is initialized during the configuration step in polling mode.
+
+The size of the input buffer is the sum of:
+ - the size of the coefficient vector B (N = 5 elements);
+ - the size of the additional space D1 needed for throughput improvement
+   (minimum: 0; here, D1 = 122 elements).
+The input buffer is filled during the preload step in polling mode;
+new values are added in polling mode once the preloaded ones have been consumed.
+
+The size of the output buffer is the one of the additional space D2 needed for a
+better throughput (minimum: 1; here, D2 = 123 elements).
+The output buffer is read in IT mode when the result is available.
+
+The input data will be loaded in four times to demonstrate the preload and the writing in polling mode:
+ - 100 elements written during the preload (the input buffer isn't entirely filled);
+ - 120 elements provided after starting the filter;
+ - 110 elements provided when the previous data has been used;
+ - 182 elements provided when the previous data has been used.
+
+The output data will be read in two times through interrupts:
+ - buffer of 256 elements provided when starting the filter;
+ - buffer of 249 elements provided through callback when the previous buffer has been filled.
+
+With 512 input elements, the FMAC peripheral will be able to compute 508 output elements.
+These output elements are stored in aCalculatedFilteredData1[] and aCalculatedFilteredData2[].
+This result is compared to the expected one contained in aRefFilteredData[] in order to detect
+a possible error.
+
+STM32 board LEDs are used to monitor the example status:
+  - LED1 is ON when correct FMAC FIR results have been calculated.
+  - LED3 is blinking (1 second period) if an error is detected
+    in the FIR filter results or if there is an initialization or configuration error.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to
+      1 millisecond to have correct HAL operation.
+
+@par Keywords
+
+FMAC, FIR,  Filter, IT mode, Polling mode.
+
+@par Directory contents
+
+  - FMAC/FMAC_FIR_PollingToIT/Src/main.c                 Main program
+  - FMAC/FMAC_FIR_PollingToIT/Src/system_stm32g4xx.c     STM32G4xx system clock configuration file
+  - FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_it.c         Interrupt handlers
+  - FMAC/FMAC_FIR_PollingToIT/Src/stm32g4xx_hal_msp.c    HAL MSP module
+  - FMAC/FMAC_FIR_PollingToIT/Inc/main.h                 Main program header file
+  - FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_hal_conf.h   HAL Configuration file
+  - FMAC/FMAC_FIR_PollingToIT/Inc/stm32g4xx_it.h         Interrupt handlers header file
+  - FMAC/FMAC_FIR_PollingToIT/Inc/stm32g474e_eval_conf.h BSP configuration file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/.extSettings b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/GPIO_IOToggle.ewd b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/GPIO_IOToggle.ewd
new file mode 100644
index 000000000..ba9a2a13b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/GPIO_IOToggle.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>GPIO_IOToggle</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/GPIO_IOToggle.ewp b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/GPIO_IOToggle.ewp
new file mode 100644
index 000000000..47d4a3b13
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/GPIO_IOToggle.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>GPIO_IOToggle</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>GPIO_IOToggle/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>GPIO_IOToggle/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>GPIO_IOToggle/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>GPIO_IOToggle.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>GPIO_IOToggle.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/Project.eww
new file mode 100644
index 000000000..eb6a8dfe0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\GPIO_IOToggle.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/GPIO_IOToggle.ioc b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/GPIO_IOToggle.ioc
new file mode 100644
index 000000000..97ed31e52
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/GPIO_IOToggle.ioc
@@ -0,0 +1,118 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=GPIO_IOToggle.ioc
+ProjectManager.ProjectName=GPIO_IOToggle
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=GPIO_IOToggle
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/main.h
new file mode 100644
index 000000000..4611314fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    GPIO/GPIO_IOToggle/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..caff5eafe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    GPIO/GPIO_IOToggle/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/GPIO_IOToggle.uvoptx b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/GPIO_IOToggle.uvoptx
new file mode 100644
index 000000000..f64704010
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/GPIO_IOToggle.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>GPIO_IOToggle</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/GPIO_IOToggle.uvprojx b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/GPIO_IOToggle.uvprojx
new file mode 100644
index 000000000..66a4fb3fb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/GPIO_IOToggle.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>GPIO_IOToggle</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>GPIO_IOToggle\Exe\</OutputDirectory>
+          <OutputName>GPIO_IOToggle</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
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+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <nStopA1X>0</nStopA1X>
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+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
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+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
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+          <SimDlgDll>DCM.DLL</SimDlgDll>
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+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="GPIO_IOToggle"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..8e8c30ceb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1833460528">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1833460528" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1833460528" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1833460528." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.574194677" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.2093584269" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1650966686" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1468567252" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.248151331" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2071480009" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2020843810" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.955014916" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.254980149" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.440108280" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.315062351" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/GPIO_IOToggle}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.263498074" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.966971874" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1088166606" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1213657234" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1160707237" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+	</storageModule>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/.project
new file mode 100644
index 000000000..4a4a2f8b3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>GPIO_IOToggle</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>GPIO_IOToggle.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/GPIO_IOToggle.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/main.c
new file mode 100644
index 000000000..f86951256
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/main.c
@@ -0,0 +1,211 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    GPIO/GPIO_IOToggle/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example describes how to configure and use GPIOs through
+  *          the STM32G4xx HAL API.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+static GPIO_InitTypeDef  GPIO_InitStruct;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+   /* -1- Enable GPIO Clock (to be able to program the configuration registers) */
+  LED1_GPIO_CLK_ENABLE();
+
+  /* -2- Configure IO in output push-pull mode to drive external LEDs */
+  GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull  = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+
+  GPIO_InitStruct.Pin = LED1_PIN;
+  HAL_GPIO_Init(LED1_GPIO_PORT, &GPIO_InitStruct);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    HAL_GPIO_TogglePin(LED1_GPIO_PORT, LED1_PIN);
+    /* Insert delay 100 ms */
+    HAL_Delay(100);
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..6742ef9b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,87 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    GPIO/GPIO_IOToggle/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   This file provides code for the MSP Initialization 
+  *          and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a3d9cc51d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/stm32g4xx_it.c
@@ -0,0 +1,174 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    GPIO/GPIO_IOToggle/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/readme.txt b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/readme.txt
new file mode 100644
index 000000000..3c9716243
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/GPIO/GPIO_IOToggle/readme.txt
@@ -0,0 +1,71 @@
+/**
+  @page GPIO_IOToggle GPIO IO Toggle example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    GPIO/GPIO_IOToggle/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the GPIO IO Toggle example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to configure and use GPIOs through the HAL API.
+
+PG.09 IO (configured in output pushpull mode) toggles in a forever loop.
+On STM32G474E-EVAL1 Rev B board this IO is connected to LED1.
+
+In this example, HCLK is configured at 170 MHz.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+System, GPIO, Input, Output, Alternate function, Push-pull, Toggle
+
+@par Directory contents 
+
+  - GPIO/GPIO_IOToggle/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - GPIO/GPIO_IOToggle/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - GPIO/GPIO_IOToggle/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - GPIO/GPIO_IOToggle/Inc/main.h                  Header for main.c module  
+  - GPIO/GPIO_IOToggle/Src/stm32g4xx_it.c          Interrupt handlers
+  - GPIO/GPIO_IOToggle/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - GPIO/GPIO_IOToggle/Src/main.c                  Main program
+  - GPIO/GPIO_IOToggle/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/.extSettings b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/.extSettings
new file mode 100644
index 000000000..76a85d8a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/.extSettings
@@ -0,0 +1,11 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/stm32g4xx_hal_timebase_tim.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
+Drivers/STM32G4xx_HAL_Driver=../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/HAL_TimeBase_TIM.ewd b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/HAL_TimeBase_TIM.ewd
new file mode 100644
index 000000000..1b638f23f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/HAL_TimeBase_TIM.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>HAL_TimeBase_TIM</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/HAL_TimeBase_TIM.ewp b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/HAL_TimeBase_TIM.ewp
new file mode 100644
index 000000000..52ab81239
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/HAL_TimeBase_TIM.ewp
@@ -0,0 +1,1152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>HAL_TimeBase_TIM</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>HAL_TimeBase_TIM/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>HAL_TimeBase_TIM/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>HAL_TimeBase_TIM/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
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+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
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+          <name>MultiLine</name>
+          <state>0</state>
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+          <name>PageLengthCheck</name>
+          <state>0</state>
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+          <name>PageLength</name>
+          <state>80</state>
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+          <name>TabSpacing</name>
+          <state>8</state>
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+          <name>AXRef</name>
+          <state>0</state>
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+          <name>AXRefDefines</name>
+          <state>0</state>
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+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
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+          <name>AXRefDual</name>
+          <state>0</state>
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+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
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+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>HAL_TimeBase_TIM.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>HAL_TimeBase_TIM.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/Project.eww
new file mode 100644
index 000000000..78adb7295
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\HAL_TimeBase_TIM.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/HAL_TimeBase_TIM.ioc b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/HAL_TimeBase_TIM.ioc
new file mode 100644
index 000000000..e8f41524b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/HAL_TimeBase_TIM.ioc
@@ -0,0 +1,121 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_tim7
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.TIM7_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.TimeBase=TIM7_DAC_IRQn
+NVIC.TimeBaseIP=TIM7
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=HAL_TimeBase_TIM.ioc
+ProjectManager.ProjectName=HAL_TimeBase_TIM
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim7.Mode=TIM7
+VP_SYS_VS_tim7.Signal=SYS_VS_tim7
+board=custom
+ProjectManager.Example=HAL_TimeBase_TIM
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/main.h
new file mode 100644
index 000000000..1442f964b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    HAL/HAL_TimeBase_TIM/Inc/main.h 
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..be2dc76f9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_it.h 
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void TIM7_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/HAL_TimeBase_TIM.uvoptx b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/HAL_TimeBase_TIM.uvoptx
new file mode 100644
index 000000000..f2a80d823
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/HAL_TimeBase_TIM.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>HAL_TimeBase_TIM</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
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+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
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+      <bShared>0</bShared>
+    </File>
+  </Group>
+
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+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/HAL_TimeBase_TIM.uvprojx b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/HAL_TimeBase_TIM.uvprojx
new file mode 100644
index 000000000..a9e3c7b88
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/HAL_TimeBase_TIM.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>HAL_TimeBase_TIM</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>HAL_TimeBase_TIM\Exe\</OutputDirectory>
+          <OutputName>HAL_TimeBase_TIM</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
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+            <UserProg1Name></UserProg1Name>
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+          <SVCSIdString></SVCSIdString>
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+          <UseCPPCompiler>0</UseCPPCompiler>
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+          <RVCTZI>0</RVCTZI>
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+          <AlwaysBuild>0</AlwaysBuild>
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+          <IncludeLibraryModules></IncludeLibraryModules>
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+          </OPTHX>
+        </DebugOption>
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+          <Flash1>
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+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
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+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
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+          <pFcArmRoot></pFcArmRoot>
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+        </Utilities>
+        <TargetArmAds>
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+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_timebase_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="HAL_TimeBase_TIM"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..ae4fcb8e8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.628832219">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.628832219" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.628832219" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.628832219." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.830440513" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1116455126" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1731021456" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.974691318" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1611035659" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.344780961" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.816050232" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.558196895" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.2033455688" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1527560625" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.645969069" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/HAL_TimeBase_TIM}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.784554767" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.520516069" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.222335457" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1308812440" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1943261663" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1506676602" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1882135041" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.661451036" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.219756160" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1450042357" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1996715474" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.409532998" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.678344172" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.445164340" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
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+							<builder buildPath="${workspace_loc:/HAL_TimeBase_TIM}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.959678275" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+									<listOptionValue builtIn="false" value="../../Inc"/>
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+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="HAL_TimeBase_TIM.null.372888689" name="HAL_TimeBase_TIM"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
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+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/.project
new file mode 100644
index 000000000..c8734986d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>HAL_TimeBase_TIM</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>HAL_TimeBase_TIM.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/HAL_TimeBase_TIM.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_timebase_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/main.c
new file mode 100644
index 000000000..6d563461d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/main.c
@@ -0,0 +1,253 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    HAL/HAL_TimeBase_TIM/Src/main.c 
+  * @author  MCD Application Team
+  * @brief   This example describes how to configure HAL time base using
+  *          the STM32G4xx HAL API.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+uint32_t uwIncrementState = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+ /* This sample code shows how to configure The HAL time base source base with a 
+    dedicated  Tick interrupt priority.
+    A general purpose timer(TIM7) is used instead of Systick  as source of  time base.  
+    Time base duration is fixed to 1ms  since PPP_TIMEOUT_VALUEs are defined and 
+    handled in milliseconds basis.
+    */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Configure timer (TIM7) to generate an interrupt each 1 msec
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+  /* Configure LED1 */
+  BSP_LED_Init(LED1);
+
+  /* Configure User push-button */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  /* Insert a Delay of 1000 ms and toggle LED1, in an infinite loop */ 
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Insert a 1s delay */
+    HAL_Delay(1000);
+    
+    /* Toggle LED1 */
+    BSP_LED_Toggle(LED1);
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief EXTI line detection callback.
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  if(GPIO_Pin == USER_BUTTON_PIN)
+  {
+    if (uwIncrementState == 0)
+    {
+      /* Suspend tick increment */
+      HAL_SuspendTick();
+      
+      /* Change the Push button state */
+      uwIncrementState = 1;
+    }
+    else
+    {
+      /* Resume tick increment */
+      HAL_ResumeTick();
+      
+      /* Change the Push button state */
+      uwIncrementState = 0;
+    }
+  }  
+}
+
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM7 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM7) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..ba3dc1af1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : stm32g4xx_hal_msp.c
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..d96d32dd2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,126 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_timebase_TIM.c 
+  * @brief   HAL time base based on the hardware TIM.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim7;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM7 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+  uint32_t              uwPrescalerValue = 0;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM7 clock */
+  __HAL_RCC_TIM7_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM7 clock */
+  uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+  /* Compute the prescaler value to have TIM7 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM7 */
+  htim7.Instance = TIM7;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM7CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim7.Init.Period = (1000000U / 1000U) - 1U;
+  htim7.Init.Prescaler = uwPrescalerValue;
+  htim7.Init.ClockDivision = 0;
+  htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+  status = HAL_TIM_Base_Init(&htim7);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim7);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM7 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM7_DAC_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM7_DAC_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM7 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM7 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim7, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM7 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM7 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim7, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..7df0d9d4a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/stm32g4xx_it.c
@@ -0,0 +1,157 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    HAL/HAL_TimeBase_TIM/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and 
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim7;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM7 global interrupt, DAC2 and DAC4 channel underrun error interrupts.
+  */
+void TIM7_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM7_DAC_IRQn 0 */
+
+   HAL_TIM_IRQHandler(&htim7);
+  /* USER CODE END TIM7_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim7);
+  /* USER CODE BEGIN TIM7_DAC_IRQn 1 */
+
+  /* USER CODE END TIM7_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief This function handles EXTI lines 10 to 15 interrupts.
+  */
+
+void EXTI15_10_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI15_10_IRQn 0 */
+
+  /* USER CODE END EXTI15_10_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+  /* USER CODE BEGIN EXTI15_10_IRQn 1 */
+
+  /* USER CODE END EXTI15_10_IRQn 1 */
+}
+
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/readme.txt b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/readme.txt
new file mode 100644
index 000000000..6cabff783
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/HAL/HAL_TimeBase_TIM/readme.txt
@@ -0,0 +1,88 @@
+/**
+  @page HAL_TimeBase_TIM HAL Time base example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    HAL/HAL_TimeBase_TIM/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the HAL time base example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+How to customize HAL using a general-purpose timer as main source of time base 
+instead of Systick.
+
+In this example the used timer is TIM7.
+
+Time base duration is kept unchanged: 1ms  since PPP_TIMEOUT_VALUEs are defined 
+and handled in milliseconds basis.
+
+The example brings, in user file, a new implementation of the following HAL weak functions:
+
+HAL_InitTick() 
+HAL_SuspendTick()
+HAL_ResumeTick()
+
+This implementation will overwrite native implementation in stm32g4xx_hal.c
+and so user functions will be invoked instead when called.
+
+The following time base functions are kept as implemented natively:
+
+HAL_IncTick()
+HAL_Delay()
+
+When user pushes the User push-button, the Tick increment is suspended if it is already
+enabled, else it will be resumed.
+In an infinite loop, LED1 toggles spaced out over 1s delay.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in TIM7 ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the TIM7 interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the TIM7 interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application needs to ensure that the TIM7 time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+System, TIM, Time base, HAL
+
+@par Directory contents  
+
+  - HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_hal_conf.h          HAL configuration file
+  - HAL/HAL_TimeBase_TIM/Inc/stm32g4xx_it.h                Interrupt handlers header file
+  - HAL/HAL_TimeBase_TIM/Inc/stm32g4xx.h                   Header for main.c module  
+  - HAL/HAL_TimeBase_TIM/Src/stm32g4xx_it.c                Interrupt handlers
+  - HAL/HAL_TimeBase_TIM/Src/main.c                              Main program
+  - HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_msp.c           HAL MSP file
+  - HAL/HAL_TimeBase_TIM/Src/stm32g4xx_hal_timebase_tim.c  HAL time base functions
+  - HAL/HAL_TimeBase_TIM/Src/system_stm32g4xx.c            STM32G4xx system source file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.      
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/.extSettings b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/.extSettings
new file mode 100644
index 000000000..1ba4c90aa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;IWDG;I2C;EXTI;SPI;OPAMP;ADC;COMP;UART
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/IWDG_Reset.ewd b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/IWDG_Reset.ewd
new file mode 100644
index 000000000..f37dc242e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/IWDG_Reset.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>IWDG_Reset</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/IWDG_Reset.ewp b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/IWDG_Reset.ewp
new file mode 100644
index 000000000..777a4f90b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/IWDG_Reset.ewp
@@ -0,0 +1,1176 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>IWDG_Reset</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>IWDG_Reset/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>IWDG_Reset/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>IWDG_Reset/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>IWDG_Reset.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>IWDG_Reset.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/Project.eww
new file mode 100644
index 000000000..f21f932a8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\IWDG_Reset.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/IWDG_Reset.ioc b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/IWDG_Reset.ioc
new file mode 100644
index 000000000..f4a0cff5d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/IWDG_Reset.ioc
@@ -0,0 +1,127 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+IWDG.IPParameters=Prescaler,Window,Reload
+IWDG.IPParametersWithoutCheck=Window,Reload
+IWDG.Prescaler=IWDG_PRESCALER_32
+IWDG.Reload=IWDG_RELOAD
+IWDG.Window=IWDG_WINDOW
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=IWDG
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_IWDG_VS_IWDG
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=IWDG_Reset.ioc
+ProjectManager.ProjectName=IWDG_Reset
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_IWDG_Init-IWDG-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_IWDG_VS_IWDG.Mode=IWDG_Activate
+VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=IWDG_Reset
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/main.h
new file mode 100644
index 000000000..0285cd2d4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    IWDG/IWDG_Reset/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..e5250771f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+#define HAL_COMP_MODULE_ENABLED
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+#define HAL_IWDG_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+#define HAL_OPAMP_MODULE_ENABLED
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..aaa89e967
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    IWDG/IWDG_Reset/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+void TIM1_UP_TIM16_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/IWDG_Reset.uvoptx b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/IWDG_Reset.uvoptx
new file mode 100644
index 000000000..3f52f4616
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/IWDG_Reset.uvoptx
@@ -0,0 +1,729 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>IWDG_Reset</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_hal_msp.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_msp.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/IWDG_Reset.uvprojx b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/IWDG_Reset.uvprojx
new file mode 100644
index 000000000..465a805f4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/IWDG_Reset.uvprojx
@@ -0,0 +1,632 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>IWDG_Reset</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="IWDG_Reset"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..20f13396a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.382231508">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.382231508" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1964517130" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1637845839" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.109339259" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.117113284" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1160109686" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1661359078" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.690446534" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.938313285" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.680000327" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.626425554" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.581659277" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.781886784" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1400171433" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="IWDG_Reset.null.820103029" name="IWDG_Reset"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.382231508;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.382231508.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.128265763;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.255078823">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1187237279;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1187237279.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1900956419;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.458145704">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/.project
new file mode 100644
index 000000000..820c383b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/.project
@@ -0,0 +1,235 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>IWDG_Reset</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>IWDG_Reset.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/IWDG_Reset.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_comp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_iwdg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/main.c
new file mode 100644
index 000000000..47ba48643
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/main.c
@@ -0,0 +1,355 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    IWDG/IWDG_Reset/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the IWDG HAL API
+  *          to update at regular period the IWDG counter and how to simulate
+  *          a software fault generating an MCU IWDG reset on expiry of a
+  *          programmed time period.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define IWDG_WINDOW IWDG_WINDOW_DISABLE
+#define IWDG_RELOAD (uwLsiFreq / 32)
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+IWDG_HandleTypeDef hiwdg;
+
+/* USER CODE BEGIN PV */
+uint32_t IwdgStatus = 0;
+TIM_HandleTypeDef    htim16;
+
+uint16_t tmpCC4[2];
+uint32_t uwLsiFreq;
+__IO uint32_t uwCaptureNumber = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_IWDG_Init(void);
+/* USER CODE BEGIN PFP */
+static void GetLSIFrequency(void);
+void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Configure LED1, LED2, LED3, LED4  */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  BSP_LED_Init(LED3);
+  BSP_LED_Init(LED4);
+
+  /*##-1- Check if the system has resumed from IWDG reset ####################*/
+  if (__HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST) != 0x00u)
+  {
+    /* IWDGRST flag set: Turn LED1 on and set IwdgStatus */
+    IwdgStatus = 1;
+    BSP_LED_On(LED1);
+
+    /* Insert 4s delay */
+    HAL_Delay(4000);
+
+    /* Notification done: Turn LED1 off */
+    BSP_LED_Off(LED1);
+  }
+
+  /* Clear reset flags in any cases */
+  __HAL_RCC_CLEAR_RESET_FLAGS();
+  IwdgStatus = 0;
+
+  /*##-2- Get the LSI frequency: TIM16 is used to measure the LSI frequency ###*/
+  GetLSIFrequency();
+
+  /*##-3- Configure & Start the IWDG peripheral #########################################*/
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_IWDG_Init();
+  /* USER CODE BEGIN 2 */
+   /* Configure User push-button */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Toggle LED3 */
+    BSP_LED_Toggle(LED3);
+
+    /* Insert 990 ms delay */
+    HAL_Delay(990);
+
+    /* Refresh IWDG: reload counter */
+    if(HAL_IWDG_Refresh(&hiwdg) != HAL_OK)
+    {
+      /* Refresh Error */
+      Error_Handler();
+    }
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief IWDG Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_IWDG_Init(void)
+{
+
+  /* USER CODE BEGIN IWDG_Init 0 */
+
+  /* USER CODE END IWDG_Init 0 */
+
+  /* USER CODE BEGIN IWDG_Init 1 */
+
+  /* USER CODE END IWDG_Init 1 */
+  hiwdg.Instance = IWDG;
+  hiwdg.Init.Prescaler = IWDG_PRESCALER_32;
+  hiwdg.Init.Window = IWDG_WINDOW;
+  hiwdg.Init.Reload = IWDG_RELOAD;
+  if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN IWDG_Init 2 */
+
+  /* USER CODE END IWDG_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Configures IWDG to measure the LSI oscillator frequency.
+  * @param  None
+  * @retval LSI Frequency
+  */
+static void GetLSIFrequency(void)
+{
+  TIM_IC_InitTypeDef    TIMInput_Config;
+
+
+  /* Configure the TIM peripheral *********************************************/
+  /* Set TIMx instance */
+  htim16.Instance = TIM16;
+
+  /* TIM16 configuration: Input Capture mode ---------------------
+     The LSI oscillator is connected to TIM16 CH1.
+     The Rising edge is used as active edge.
+     The TIM16 CCR1 is used to compute the frequency value.
+  ------------------------------------------------------------ */
+  htim16.Init.Prescaler         = 0;
+  htim16.Init.CounterMode       = TIM_COUNTERMODE_UP;
+  htim16.Init.Period            = 0xFFFF;
+  htim16.Init.ClockDivision     = 0;
+  if(HAL_TIM_IC_Init(&htim16) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /* Connect internally the IWDG_CH1 Input Capture to the LSI clock output */
+  HAL_TIMEx_TISelection(&htim16, TIM_TIM16_TI1_LSI, TIM_CHANNEL_1 );
+
+  /* Connect internally the MCO to LSI */
+  HAL_RCC_MCOConfig(RCC_MCO, RCC_MCO1SOURCE_LSI, RCC_MCODIV_1);
+
+  /* Configure the Input Capture of channel 1 */
+  TIMInput_Config.ICPolarity  = TIM_ICPOLARITY_RISING;
+  TIMInput_Config.ICSelection = TIM_ICSELECTION_DIRECTTI;
+  TIMInput_Config.ICPrescaler = TIM_ICPSC_DIV8;
+  TIMInput_Config.ICFilter    = 0;
+  if(HAL_TIM_IC_ConfigChannel(&htim16, &TIMInput_Config,TIM_CHANNEL_1) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /* Start the TIM Input Capture measurement in interrupt mode */
+  if(HAL_TIM_IC_Start_IT(&htim16, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Wait until the IWDG get 2 LSI edges */
+  while(uwCaptureNumber != 2)
+  {
+  }
+
+  /* Disable IWDG CC1 Interrupt Request */
+  HAL_TIM_IC_Stop_IT(&htim16, TIM_CHANNEL_1);
+
+  /* Deinitialize the IWDG peripheral registers to their default reset values */
+  HAL_TIM_IC_DeInit(&htim16);
+}
+
+/**
+  * @brief  Input Capture callback in non blocking mode
+  * @param  htim : TIM IC handle
+  * @retval None
+*/
+void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+  uint32_t lsiperiod = 0;
+
+  /* Get the Input Capture value */
+  tmpCC4[uwCaptureNumber++] = HAL_TIM_ReadCapturedValue(&htim16, TIM_CHANNEL_1);
+
+  if (uwCaptureNumber >= 2)
+  {
+    /* Compute the period length */
+    lsiperiod = (uint16_t)(0xFFFF - tmpCC4[0] + tmpCC4[1] + 1);
+
+    /* Frequency computation */
+    uwLsiFreq = (uint32_t) SystemCoreClock / lsiperiod;
+    uwLsiFreq *= 8;
+  }
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+
+  IwdgStatus = 1;
+  /* Infinite loop */
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..5882f8adc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,120 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    IWDG/IWDG_Reset/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/**
+  * @brief TIM MSP Initialization 
+  *        This function configures the hardware resources used in this example: 
+  *           - Peripheral's clock enable
+  *           - Peripheral's GPIO Configuration  
+  * @param htim: TIM handle pointer
+  * @retval None
+  */
+void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
+{
+
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  
+  /*## Enable peripherals and GPIO Clocks ####################################*/
+  /* RCC LSI clock enable */
+  RCC_OscInitStruct.OscillatorType =  RCC_OSCILLATORTYPE_LSI;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+  if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+
+  /* TIM16 Peripheral clock enable */
+  __HAL_RCC_TIM16_CLK_ENABLE();
+  
+  /*## Configure the NVIC for TIM16 ###########################################*/
+  HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn,0,0);
+  
+  /* Enable the TIM16 global Interrupt */
+  HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
+}
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..e94f89702
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/stm32g4xx_it.c
@@ -0,0 +1,232 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    IWDG/IWDG_Reset/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+extern TIM_HandleTypeDef htim16;
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles External lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  /* Failure is generated by user, turn LED1 off */
+  BSP_LED_Off(LED1);
+
+  /* As the following address is invalid (not mapped), a Hardfault exception
+  will be generated with an infinite loop and when the IWDG counter falls to 0
+  the IWDG reset occurs */
+  *(__IO uint32_t *) 0x00040001 = 0xFF;
+}
+
+/**
+  * @brief  This function handles TIM16 global interrupt request.
+  * @param  None
+  * @retval None
+  */
+void TIM1_UP_TIM16_IRQHandler(void)
+{ 
+  HAL_TIM_IRQHandler(&htim16);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/readme.txt b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/readme.txt
new file mode 100644
index 000000000..dca373789
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/IWDG/IWDG_Reset/readme.txt
@@ -0,0 +1,114 @@
+/**
+  @page IWDG_Reset Independent Watchdog Reset Example
+  
+  @verbatim
+  ********************* COPYRIGHT(c) 2019 STMicroelectronics *******************
+  * @file    IWDG/IWDG_Reset/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the IWDG Reset.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+How to handle the IWDG reload counter and simulate a software fault that generates 
+an MCU IWDG reset after a preset laps of time.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 150 MHz.
+
+The IWDG timeout is set to 1 second.
+
+First, the TIM16 timer is configured to measure the LSI frequency as the 
+LSI is internally connected to TIM16 CH1, in order to adjust the IWDG clock.
+
+The LSI measurement using the TIM16 is described below:
+  - Configure the TIM16 to remap internally the TIM16 CH1 Input Capture to the LSI
+    clock output.
+  - Enable the TIM16 Input Capture interrupt: after one cycle of LSI clock, the
+    period value is stored in a variable and compared to the HCLK clock to get
+    its real value. 
+
+Then, the IWDG reload counter is configured as below to obtain 1 second according 
+to the measured LSI frequency after setting the prescaler value:
+  
+    IWDG counter clock Frequency = LSI Frequency / Prescaler value
+
+The IWDG reload counter is refreshed each 990 ms in the main program infinite 
+loop to prevent a IWDG reset.
+  
+LED3 is also toggling each 990 ms indicating that the program is running.
+
+An EXTI Line is connected to a GPIO pin, configured to generate an interrupt
+when the User push-button (PC.13) is pressed.
+
+The EXTI Line is used to simulate a software failure: once the EXTI Line event 
+occurs by pressing the User push-button (PC.13), the corresponding interrupt is served.
+
+In the ISR, a write to invalid address generates a Hardfault exception 
+containing an infinite loop and preventing to return to main program (the IWDG 
+reload counter is not refreshed).
+As a result, when the IWDG counter reaches 0, the IWDG reset occurs.
+
+If the IWDG reset is generated, after the system resumes from reset, LED1 turns on for 4 seconds.
+If the EXTI Line event does not occur, the IWDG counter is indefinitely refreshed in the main 
+program infinite loop, and there is no IWDG reset.
+
+LED3 will turn on if any error occurs.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then 
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+System, IWDG, reload counter, MCU Reset, Timeout, Software fault
+
+@par Directory contents 
+
+  - IWDG/IWDG_Reset/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - IWDG/IWDG_Reset/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - IWDG/IWDG_Reset/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - IWDG/IWDG_Reset/Inc/main.h                  Header for main.c module  
+  - IWDG/IWDG_Reset/Src/stm32g4xx_it.c          Interrupt handlers
+  - IWDG/IWDG_Reset/Src/main.c                  Main program
+  - IWDG/IWDG_Reset/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - IWDG/IWDG_Reset/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+ 
+ 
+ */
+ 
\ No newline at end of file
diff --git a/Projects/STM32G474E-EVAL1/Examples/LICENSE.md b/Projects/STM32G474E-EVAL1/Examples/LICENSE.md
new file mode 100644
index 000000000..9226612ae
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LICENSE.md
@@ -0,0 +1,27 @@
+Copyright 2021 STMicroelectronics.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+this list of conditions and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its contributors
+may be used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/.extSettings b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/LPTIM_PWMExternalClock.ewd b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/LPTIM_PWMExternalClock.ewd
new file mode 100644
index 000000000..56e1a40df
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/LPTIM_PWMExternalClock.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>LPTIM_PWMExternalClock</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/LPTIM_PWMExternalClock.ewp b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/LPTIM_PWMExternalClock.ewp
new file mode 100644
index 000000000..f31f4bc70
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/LPTIM_PWMExternalClock.ewp
@@ -0,0 +1,1152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>LPTIM_PWMExternalClock</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>LPTIM_PWMExternalClock/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>LPTIM_PWMExternalClock/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>LPTIM_PWMExternalClock/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
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+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
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+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
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+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
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+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
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+          <name>CCEncSource</name>
+          <state>0</state>
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+          <name>CCEncOutput</name>
+          <state>0</state>
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+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
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+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
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+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
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+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
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+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
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+          <name>AEndian</name>
+          <state>1</state>
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+          <name>ACaseSensitivity</name>
+          <state>1</state>
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+          <name>MacroChars</name>
+          <version>0</version>
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+          <name>AWarnEnable</name>
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+          <name>AWarnWhat</name>
+          <state>0</state>
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+          <name>AWarnOne</name>
+          <state></state>
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+          <name>AWarnRange1</name>
+          <state></state>
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+          <name>AWarnRange2</name>
+          <state></state>
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+          <name>ADebug</name>
+          <state>1</state>
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+          <name>AltRegisterNames</name>
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+          <name>AXRefDefines</name>
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+        <option>
+          <name>AProcessor</name>
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+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
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+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+        <option>
+          <name>ALimitErrorsCheck</name>
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+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
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+          <name>AIgnoreStdInclude</name>
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+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
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+          <name>AExtraOptionsCheckV2</name>
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+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
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+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
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+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
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+          <state>1</state>
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+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>LPTIM_PWMExternalClock.hex</state>
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+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
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+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
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+    </settings>
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+      <archiveVersion>0</archiveVersion>
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+      <archiveVersion>1</archiveVersion>
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+        <prebuild></prebuild>
+        <postbuild></postbuild>
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+      <archiveVersion>0</archiveVersion>
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+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <state>1</state>
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+          <name>XLinkMisraHandler</name>
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+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkOutputFile</name>
+          <state>LPTIM_PWMExternalClock.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/Project.eww
new file mode 100644
index 000000000..4eabf5565
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\LPTIM_PWMExternalClock.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/main.h
new file mode 100644
index 000000000..e688947e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/main.h
@@ -0,0 +1,73 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    LPTIM/LPTIM_PWMExternalClock/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Set the Maximum value of the counter (Auto-Reload) that defines the Period */
+#define PeriodValue             (uint32_t) (100 -1)
+
+/* Set the Compare value that defines the duty cycle */
+#define PulseValue              (uint32_t) (50 -1)
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..c47fa1f28
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+#define HAL_LPTIM_MODULE_ENABLED
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..20c250a8b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/LPTIM_PWMExternalClock.ioc b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/LPTIM_PWMExternalClock.ioc
new file mode 100644
index 000000000..4b9f85c4e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/LPTIM_PWMExternalClock.ioc
@@ -0,0 +1,136 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+LPTIM1.ClockPrescaler=LPTIM_PRESCALER_DIV1
+LPTIM1.IPParameters=ClockPrescaler,ULPClockPolarity,ULPClockSampleTime,UpdateMode,TriggerSource,OutputPolarity
+LPTIM1.OutputPolarity=LPTIM_OUTPUTPOLARITY_HIGH
+LPTIM1.TriggerSource=LPTIM_TRIGSOURCE_SOFTWARE
+LPTIM1.ULPClockPolarity=LPTIM_CLOCKPOLARITY_RISING
+LPTIM1.ULPClockSampleTime=LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
+LPTIM1.UpdateMode=LPTIM_UPDATE_IMMEDIATE
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=LPTIM1
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=PB2
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+PB2.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PB2.GPIO_PuPd=GPIO_PULLUP
+PB2.GPIO_Speed=GPIO_SPEED_FREQ_LOW
+PB2.Locked=true
+PB2.Mode=WaveformGeneration
+PB2.Signal=LPTIM1_OUT
+PC0.Mode=Counts_external_clock_standalone_1X_occur1
+PC0.Signal=LPTIM1_IN1
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=LPTIM_PWMExternalClock.ioc
+ProjectManager.ProjectName=LPTIM_PWMExternalClock
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LPTIM1_Init-LPTIM1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=LPTIM_PWMExternalClock
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/LPTIM_PWMExternalClock.uvoptx b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/LPTIM_PWMExternalClock.uvoptx
new file mode 100644
index 000000000..9418b035b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/LPTIM_PWMExternalClock.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>LPTIM_PWMExternalClock</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <viewmode>1</viewmode>
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+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
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+
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+  </Group>
+
+  <Group>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/LPTIM_PWMExternalClock.uvprojx b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/LPTIM_PWMExternalClock.uvprojx
new file mode 100644
index 000000000..3187ea3e0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/LPTIM_PWMExternalClock.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>LPTIM_PWMExternalClock</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
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+          <Vendor>STMicroelectronics</Vendor>
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+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
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+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
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+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <DBRegisterFilePath></DBRegisterFilePath>
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+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>LPTIM_PWMExternalClock\</OutputDirectory>
+          <OutputName>LPTIM_PWMExternalClock</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
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+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
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+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
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+            <UserProg1Name></UserProg1Name>
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+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
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+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_lptim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="LPTIM_PWMExternalClock"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..79f974a4c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2019900394">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2019900394" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2019900394" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2019900394." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.49805952" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1991815628" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.559720134" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1034572787" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.626476343" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1850954079" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1037817617" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1603430432" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1781851595" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.781410620" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1471349688" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/LPTIM_PWMExternalClock}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1693073517" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1957746888" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1025065773" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1199982844" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1709446218" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.324275223" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.332274031" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.876507166" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.2036761994" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.583476503" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.384066129" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1067057529" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.2050897362" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1684138968" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1961361767" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.627249291" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.368310986" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.20679544" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.28226097" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.444214341" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/LPTIM_PWMExternalClock}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.698397688" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.36415556" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1186570155" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1395743377" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1388447630" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.461759026" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.2027840712" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.847803338" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1190190858" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+							</tool>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.298249919" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1537814527" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.461676361" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1956044314" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1519256864" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.32053999" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.148113487" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="LPTIM_PWMExternalClock.null.1852621876" name="LPTIM_PWMExternalClock"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.253805443;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.253805443.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1186570155;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.549043993">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2019900394;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2019900394.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1709446218;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.583476503">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/.project
new file mode 100644
index 000000000..b4c0959b0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>LPTIM_PWMExternalClock</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>LPTIM_PWMExternalClock.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/LPTIM_PWMExternalClock.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_lptim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/main.c
new file mode 100644
index 000000000..cd39bb8c1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/main.c
@@ -0,0 +1,287 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    LPTIM/LPTIM_PWMExternalClock/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example describes how to configure and use LPTIM to generate a
+  *          PWM at the lowest power consumption, using an external counter
+  *          clock, through the STM32G4xx HAL API.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+LPTIM_HandleTypeDef hlptim1;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_LPTIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_LPTIM1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* User push-button (External line 13) will be used to wakeup the system from STOP mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+
+ /* ### Start generating the PWM signal ############################## */
+  /*
+   *  Period = 99
+   *  Pulse  = 49
+   *  According to this configuration, the duty cycle will be equal to 50% and
+   *  the output frequency will be equal to the input frequency divided by 100 
+   *  since the LPTIM have to count 100 external clock edges each period.
+   */
+  if (HAL_LPTIM_PWM_Start(&hlptim1, PeriodValue, PulseValue) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  
+  /* ### Enter in Stop mode ########################################### */
+  HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); 
+
+  /* ### Stop counting when leaving Stop mode ########################## */
+  if (HAL_LPTIM_PWM_Stop(&hlptim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief LPTIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LPTIM1_Init(void)
+{
+
+  /* USER CODE BEGIN LPTIM1_Init 0 */
+
+  /* USER CODE END LPTIM1_Init 0 */
+
+  /* USER CODE BEGIN LPTIM1_Init 1 */
+
+  /* USER CODE END LPTIM1_Init 1 */
+  hlptim1.Instance = LPTIM1;
+  hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_ULPTIM;
+  hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
+  hlptim1.Init.UltraLowPowerClock.Polarity = LPTIM_CLOCKPOLARITY_RISING;
+  hlptim1.Init.UltraLowPowerClock.SampleTime = LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION;
+  hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
+  hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
+  hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
+  hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_EXTERNAL;
+  hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
+  hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
+  if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN LPTIM1_Init 2 */
+
+  /* USER CODE END LPTIM1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..107b5273f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,173 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_hal_msp.c
+  * @author            : MCD Application Team
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief LPTIM MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hlptim: LPTIM handle pointer
+* @retval None
+*/
+void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hlptim->Instance==LPTIM1)
+  {
+  /* USER CODE BEGIN LPTIM1_MspInit 0 */
+
+  /* USER CODE END LPTIM1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
+    PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_LPTIM1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**LPTIM1 GPIO Configuration
+    PC0     ------> LPTIM1_IN1
+    PB2     ------> LPTIM1_OUT
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF1_LPTIM1;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF1_LPTIM1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN LPTIM1_MspInit 1 */
+
+  /* USER CODE END LPTIM1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief LPTIM MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hlptim: LPTIM handle pointer
+* @retval None
+*/
+void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim)
+{
+  if(hlptim->Instance==LPTIM1)
+  {
+  /* USER CODE BEGIN LPTIM1_MspDeInit 0 */
+
+  /* USER CODE END LPTIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_LPTIM1_CLK_DISABLE();
+
+    /**LPTIM1 GPIO Configuration
+    PC0     ------> LPTIM1_IN1
+    PB2     ------> LPTIM1_OUT
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2);
+
+  /* USER CODE BEGIN LPTIM1_MspDeInit 1 */
+
+  /* USER CODE END LPTIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..6780b2b18
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_it.c
@@ -0,0 +1,214 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/readme.txt b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/readme.txt
new file mode 100644
index 000000000..97a16b9d7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/LPTIM/LPTIM_PWMExternalClock/readme.txt
@@ -0,0 +1,101 @@
+/**
+  @page LPTIM_PWMExternalClock LPTIM PWM External clock example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    LPTIM/LPTIM_PWMExternalClock/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the LPTIM PWM with an External clock example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+How to configure and use, through the HAL LPTIM API, the LPTIM peripheral using an external counter clock, 
+to generate a PWM signal at the lowest power consumption.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+The SystemClock_Config() function is used to configure the system clock for STM32G474QETx Devices :
+The CPU at 170 MHz  
+
+The Autorelaod equal to 99 so the output frequency (OutputFrequency) will
+be equal to the external counter clock (InputFrequency) divided by (99+1).
+
+  OutputFrequency = InputFrequency / (Autoreload + 1)
+                  = InputFrequency / 100
+
+Pulse value equal to 49 and the duty cycle (DutyCycle) is computed as follow:
+
+  DutyCycle = 1 - [(PulseValue + 1)/ (Autoreload + 1)]
+  DutyCycle = 50%
+
+To minimize the power consumption, after starting generating the PWM signal,
+the MCU enters in STOP mode. Note that GPIOs are configured in Low Speed to
+lower the consumption.
+
+User push-button pin (PC.13)is configured as input with external interrupt (External line 13),
+falling edge. When User push-button is pressed, wakeup event is generated and PWM signal
+generation is stopped.
+
+@note This example can not be used in DEBUG mode, this is due to the fact
+      that the Cortex-M4 core is no longer clocked during low power mode
+      so debugging features are disabled.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then 
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note This example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+
+@par Keywords
+
+Timer, Low Power, PWM, Stop mode, Interrupt, External Clock, Output, Duty Cycle
+
+@par Directory contents
+
+  - LPTIM/LPTIM_PWMExternalClock/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - LPTIM/LPTIM_PWMExternalClock/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - LPTIM/LPTIM_PWMExternalClock/Inc/main.h                  Header for main.c module  
+  - LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_it.c          Interrupt handlers
+  - LPTIM/LPTIM_PWMExternalClock/Src/main.c                  Main program
+  - LPTIM/LPTIM_PWMExternalClock/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - LPTIM/LPTIM_PWMExternalClock/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device
+    and development board.   
+	
+  - Connect a clock signal to PC0 (pin 46 in CN5 connector).
+  - Connect PB2 (pin 32 in CN6 connector) to an oscilloscope 
+    to monitor the LPTIM output waveform.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred tool chain 
+ - Rebuild all files and load your image into target memory
+ - Run the example 
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/.extSettings b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/OPAMP_TimerControlMux.ewd b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/OPAMP_TimerControlMux.ewd
new file mode 100644
index 000000000..58a70f067
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/OPAMP_TimerControlMux.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>OPAMP_TimerControlMux</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/OPAMP_TimerControlMux.ewp b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/OPAMP_TimerControlMux.ewp
new file mode 100644
index 000000000..adb0b7df8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/OPAMP_TimerControlMux.ewp
@@ -0,0 +1,1159 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>OPAMP_TimerControlMux</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>OPAMP_TimerControlMux/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>OPAMP_TimerControlMux/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>OPAMP_TimerControlMux/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
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+          <name>IlinkEncInput</name>
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+          <state>1</state>
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+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
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+      </data>
+    </settings>
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+      <name>IARCHIVE</name>
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+        <version>0</version>
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+          <name>IarchiveOverride</name>
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+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
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+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
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+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/Project.eww
new file mode 100644
index 000000000..26f2ea355
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\OPAMP_TimerControlMux.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/main.h
new file mode 100644
index 000000000..904e3ffab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/OPAMP/OPAMP_TimerControlMux/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..57ab0524f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_DAC_MODULE_ENABLED
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+#define HAL_OPAMP_MODULE_ENABLED
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..75d87832b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/OPAMP_TimerControlMux.uvoptx b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/OPAMP_TimerControlMux.uvoptx
new file mode 100644
index 000000000..7460a235e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/OPAMP_TimerControlMux.uvoptx
@@ -0,0 +1,681 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>OPAMP_TimerControlMux</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>150000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/OPAMP_TimerControlMux.uvprojx b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/OPAMP_TimerControlMux.uvprojx
new file mode 100644
index 000000000..90723adf5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/OPAMP_TimerControlMux.uvprojx
@@ -0,0 +1,612 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>OPAMP_TimerControlMux</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>OPAMP_TimerControlMux\</OutputDirectory>
+          <OutputName>OPAMP_TimerControlMux</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
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+          <SimDlgDll>DCM.DLL</SimDlgDll>
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+          <TargetDllName>SARMCM3.DLL</TargetDllName>
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+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
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+            <AdsLven>1</AdsLven>
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+            <RvctClst>0</RvctClst>
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+            <RvctDeviceName></RvctDeviceName>
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+            <hadIRAM>1</hadIRAM>
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+            <uocXRam>0</uocXRam>
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+            <hadIROM2>0</hadIROM2>
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+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="OPAMP_TimerControlMux"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/OPAMP_TimerControlMux.ioc b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/OPAMP_TimerControlMux.ioc
new file mode 100644
index 000000000..8f8991c85
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/OPAMP_TimerControlMux.ioc
@@ -0,0 +1,205 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+DAC4.DAC_OutputBuffer-DAC_OUT1_Int=DAC_OUTPUTBUFFER_DISABLE
+DAC4.DAC_Trigger-DAC_OUT1_ExtAndInt=DAC_TRIGGER_T2_TRGO
+DAC4.DAC_Trigger_OUT1-DAC_OUT1_Int=DAC_TRIGGER_T2_TRGO
+DAC4.IPParameters=DAC_OutputBuffer-DAC_OUT1_Int,DAC_Trigger_OUT1-DAC_OUT1_Int,WaveGeneration_OUT1-DAC_OUT1_Int,TriangleAmplitude_OUT1-DAC_OUT1_Int,DAC_Trigger-DAC_OUT1_ExtAndInt
+DAC4.TriangleAmplitude_OUT1-DAC_OUT1_Int=DAC_TRIANGLEAMPLITUDE_4095
+DAC4.WaveGeneration_OUT1-DAC_OUT1_Int=TriangleWaveGeneration
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DAC4
+Mcu.IP1=NVIC
+Mcu.IP2=OPAMP4
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM1
+Mcu.IP6=TIM2
+Mcu.IPNb=7
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PB12
+Mcu.Pin1=PB13
+Mcu.Pin2=VP_DAC4_VS_DACI1
+Mcu.Pin3=VP_OPAMP4_VIN_MUX
+Mcu.Pin4=VP_SYS_VS_Systick
+Mcu.Pin5=VP_SYS_VS_DBSignals
+Mcu.Pin6=VP_TIM1_VS_ClockSourceINT
+Mcu.Pin7=VP_TIM1_VS_no_output6
+Mcu.Pin8=VP_TIM2_VS_ClockSourceINT
+Mcu.PinsNb=9
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+OPAMP4.IPParameters=PowerMode
+OPAMP4.PowerMode=OPAMP_POWERMODE_NORMAL
+PB12.Locked=true
+PB12.Mode=Follower-DAC_OUT2-INP
+PB12.Signal=OPAMP4_VOUT
+PB13.Locked=true
+PB13.Mode=Switching On Non Inverting Inputs Using Different Pins
+PB13.Signal=OPAMP4_VINP_SEC
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=OPAMP_TimerControlMux.ioc
+ProjectManager.ProjectName=OPAMP_TimerControlMux
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DAC4_Init-DAC4-false-HAL-true,4-MX_OPAMP4_Init-OPAMP4-false-HAL-true,5-MX_TIM1_Init-TIM1-false-HAL-true,6-MX_TIM2_Init-TIM2-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.AutomaticOutput=TIM_AUTOMATICOUTPUT_DISABLE
+TIM1.Break2Filter=0
+TIM1.Break2Polarity=TIM_BREAK2POLARITY_HIGH
+TIM1.Break2State=TIM_BREAK2_DISABLE
+TIM1.BreakFilter=0
+TIM1.BreakPolarity=TIM_BREAKPOLARITY_HIGH
+TIM1.BreakState=TIM_BREAK_DISABLE
+TIM1.Channel-Output\ Compare6\ No\ Output=TIM_CHANNEL_6
+TIM1.ClearInputSource=TIM_CLEARINPUTSOURCE_NONE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.Dithering=Disable
+TIM1.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2,BreakState,BreakPolarity,BreakFilter,SourceBRKDigInput,SourceBRKCOMP1,SourceBRKCOMP2,SourceBRKCOMP3,SourceBRKCOMP4,SourceBRKCOMP5,SourceBRKCOMP6,SourceBRKCOMP7,Break2State,Break2Polarity,Break2Filter,SourceBRK2DigInput,SourceBRK2COMP1,SourceBRK2COMP2,SourceBRK2COMP3,SourceBRK2COMP4,SourceBRK2COMP5,SourceBRK2COMP6,SourceBRK2COMP7,AutomaticOutput,OffStateIDLEMode,LockLevel,ClearInputSource,OCMode_6,PulseNoDither_6,OCPolarity_6,OCIdleState_6,Channel-Output Compare6 No Output
+TIM1.IPParametersWithoutCheck=Prescaler
+TIM1.LockLevel=TIM_LOCKLEVEL_OFF
+TIM1.OCIdleState_6=TIM_OCIDLESTATE_RESET
+TIM1.OCMode_6=TIM_OCMODE_TOGGLE
+TIM1.OCPolarity_6=TIM_OCPOLARITY_HIGH
+TIM1.OffStateIDLEMode=TIM_OSSI_DISABLE
+TIM1.PeriodNoDither=150
+TIM1.Prescaler=4096*4
+TIM1.PulseNoDither_6=100
+TIM1.RepetitionCounter=0
+TIM1.SourceBRK2COMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP3=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP4=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP5=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP6=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP7=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2DigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP3=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP4=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP5=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP6=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP7=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKDigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+TIM2.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM2.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM2.CounterMode=TIM_COUNTERMODE_UP
+TIM2.Dithering=Disable
+TIM2.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger
+TIM2.PeriodNoDither=150
+TIM2.Prescaler=0
+TIM2.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM2.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_DAC4_VS_DACI1.Mode=DAC_OUT1_Int
+VP_DAC4_VS_DACI1.Signal=DAC4_VS_DACI1
+VP_OPAMP4_VIN_MUX.Mode=Timer Controlled Mux Mode
+VP_OPAMP4_VIN_MUX.Signal=OPAMP4_VIN_MUX
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ClockSourceINT.Mode=Internal
+VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
+VP_TIM1_VS_no_output6.Mode=Output Compare6 No Output
+VP_TIM1_VS_no_output6.Signal=TIM1_VS_no_output6
+VP_TIM2_VS_ClockSourceINT.Mode=Internal
+VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=OPAMP_TimerControlMux
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..087dbffe4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.684285277" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.2016970269" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.200366042" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1104741555" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1774656233" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.225373840" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1366717706" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.482398939" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.827836321" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1316106005" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1064474959" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.617284581" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1947331681" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2054537849" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1254413498" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1367979523" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.351121533" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1691264058" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1606323969" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.539091342" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.469164275" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="OPAMP_TimerControlMux.null.1083503780" name="OPAMP_TimerControlMux"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1857605891;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1857605891.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.669729914;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.283111302">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.525946441;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.525946441.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1216523446;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1774656233">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/.project
new file mode 100644
index 000000000..ae518c7c9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/.project
@@ -0,0 +1,210 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>OPAMP_TimerControlMux</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>OPAMP_TimerControlMux.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/OPAMP_TimerControlMux.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/main.c
new file mode 100644
index 000000000..23bbe32a8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/main.c
@@ -0,0 +1,458 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/OPAMP/OPAMP_TimerControlMux/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example shows how to use the timer controlled multiplexer mode
+  *          of the OPAMP
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+DAC_HandleTypeDef hdac4;
+
+OPAMP_HandleTypeDef hopamp4;
+
+TIM_HandleTypeDef htim1;
+TIM_HandleTypeDef htim2;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DAC4_Init(void);
+static void MX_OPAMP4_Init(void);
+static void MX_TIM1_Init(void);
+static void MX_TIM2_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DAC4_Init();
+  MX_OPAMP4_Init();
+  MX_TIM1_Init();
+  MX_TIM2_Init();
+  /* USER CODE BEGIN 2 */
+  /* Initialize LED on board */
+  BSP_LED_Init(LED1);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  /*##- Enable DAC Channel and wave generation #############################*/
+  if(HAL_OK != HAL_DAC_Start(&hdac4, DAC_CHANNEL_1))
+  {
+    /* Start DMA Error */
+    Error_Handler();
+  }
+  /*##- Enable TIM trigger for wave generation #############################*/
+  if(HAL_OK != HAL_TIM_Base_Start(&htim2))
+  {
+    Error_Handler();
+  }
+  
+  /*##- Start OPAMP    #####################################################*/
+  /* Enable OPAMP */
+  if(HAL_OK != HAL_OPAMP_Start(&hopamp4))
+  {
+    Error_Handler();
+  }  
+  
+  /*##- Enable TIM trigger for OPAMP multiplexer ###########################*/
+  if(HAL_OK != HAL_TIM_OC_Start(&htim1, TIM_CHANNEL_6))
+  {
+    Error_Handler();
+  }
+  
+  BSP_LED_On(LED1);
+  while (1)
+  {
+  }
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief DAC4 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DAC4_Init(void)
+{
+
+  /* USER CODE BEGIN DAC4_Init 0 */
+
+  /* USER CODE END DAC4_Init 0 */
+
+  DAC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN DAC4_Init 1 */
+
+  /* USER CODE END DAC4_Init 1 */
+
+  /** DAC Initialization
+  */
+  hdac4.Instance = DAC4;
+  if (HAL_DAC_Init(&hdac4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** DAC channel OUT1 config
+  */
+  sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
+  sConfig.DAC_DMADoubleDataMode = DISABLE;
+  sConfig.DAC_SignedFormat = DISABLE;
+  sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
+  sConfig.DAC_Trigger = DAC_TRIGGER_T2_TRGO;
+  sConfig.DAC_Trigger2 = DAC_TRIGGER_NONE;
+  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE;
+  sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_INTERNAL;
+  sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
+  if (HAL_DAC_ConfigChannel(&hdac4, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Triangle wave generation on DAC OUT1
+  */
+  if (HAL_DACEx_TriangleWaveGenerate(&hdac4, DAC_CHANNEL_1, DAC_TRIANGLEAMPLITUDE_4095) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DAC4_Init 2 */
+
+  /* USER CODE END DAC4_Init 2 */
+
+}
+
+/**
+  * @brief OPAMP4 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_OPAMP4_Init(void)
+{
+
+  /* USER CODE BEGIN OPAMP4_Init 0 */
+
+  /* USER CODE END OPAMP4_Init 0 */
+
+  /* USER CODE BEGIN OPAMP4_Init 1 */
+
+  /* USER CODE END OPAMP4_Init 1 */
+  hopamp4.Instance = OPAMP4;
+  hopamp4.Init.PowerMode = OPAMP_POWERMODE_NORMAL;
+  hopamp4.Init.Mode = OPAMP_FOLLOWER_MODE;
+  hopamp4.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_DAC;
+  hopamp4.Init.InternalOutput = DISABLE;
+  hopamp4.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6;
+  hopamp4.Init.NonInvertingInputSecondary = OPAMP_SEC_NONINVERTINGINPUT_IO0;
+  hopamp4.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
+  if (HAL_OPAMP_Init(&hopamp4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN OPAMP4_Init 2 */
+
+  /* USER CODE END OPAMP4_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 4096*4;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 150;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_OC_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_TOGGLE;
+  sConfigOC.Pulse = 100;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
+  if (HAL_TIM_OC_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_6) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+  sBreakDeadTimeConfig.DeadTime = 0;
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+  sBreakDeadTimeConfig.BreakFilter = 0;
+  sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+  sBreakDeadTimeConfig.Break2Filter = 0;
+  sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief TIM2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM2_Init(void)
+{
+
+  /* USER CODE BEGIN TIM2_Init 0 */
+
+  /* USER CODE END TIM2_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM2_Init 1 */
+
+  /* USER CODE END TIM2_Init 1 */
+  htim2.Instance = TIM2;
+  htim2.Init.Prescaler = 0;
+  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim2.Init.Period = 150;
+  htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM2_Init 2 */
+
+  /* USER CODE END TIM2_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  while(1) 
+  {
+    /* Toggle LED1 */
+    BSP_LED_Toggle(LED1);
+    HAL_Delay(1000);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  Error_Handler();
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..de044ad8a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,255 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief DAC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
+{
+  if(hdac->Instance==DAC4)
+  {
+  /* USER CODE BEGIN DAC4_MspInit 0 */
+
+  /* USER CODE END DAC4_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DAC4_CLK_ENABLE();
+  /* USER CODE BEGIN DAC4_MspInit 1 */
+
+  /* USER CODE END DAC4_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief DAC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
+{
+  if(hdac->Instance==DAC4)
+  {
+  /* USER CODE BEGIN DAC4_MspDeInit 0 */
+
+  /* USER CODE END DAC4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DAC4_CLK_DISABLE();
+  /* USER CODE BEGIN DAC4_MspDeInit 1 */
+
+  /* USER CODE END DAC4_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief OPAMP MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hopamp: OPAMP handle pointer
+* @retval None
+*/
+void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hopamp->Instance==OPAMP4)
+  {
+  /* USER CODE BEGIN OPAMP4_MspInit 0 */
+
+  /* USER CODE END OPAMP4_MspInit 0 */
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**OPAMP4 GPIO Configuration
+    PB12     ------> OPAMP4_VOUT
+    PB13     ------> OPAMP4_VINP_SEC
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN OPAMP4_MspInit 1 */
+
+  /* USER CODE END OPAMP4_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief OPAMP MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hopamp: OPAMP handle pointer
+* @retval None
+*/
+void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
+{
+  if(hopamp->Instance==OPAMP4)
+  {
+  /* USER CODE BEGIN OPAMP4_MspDeInit 0 */
+
+  /* USER CODE END OPAMP4_MspDeInit 0 */
+
+    /**OPAMP4 GPIO Configuration
+    PB12     ------> OPAMP4_VOUT
+    PB13     ------> OPAMP4_VINP_SEC
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13);
+
+  /* USER CODE BEGIN OPAMP4_MspDeInit 1 */
+
+  /* USER CODE END OPAMP4_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+  else if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspInit 0 */
+
+  /* USER CODE END TIM2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM2_CLK_ENABLE();
+  /* USER CODE BEGIN TIM2_MspInit 1 */
+
+  /* USER CODE END TIM2_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+  else if(htim_base->Instance==TIM2)
+  {
+  /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+  /* USER CODE END TIM2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM2_CLK_DISABLE();
+  /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+  /* USER CODE END TIM2_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..03c3739b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_it.c
@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Examples/OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/readme.txt b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/readme.txt
new file mode 100644
index 000000000..5e2eaa74a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/OPAMP/OPAMP_TimerControlMux/readme.txt
@@ -0,0 +1,91 @@
+/**
+  @page OPAMP_TimerControlMux OPAMP example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Examples/OPAMP/OPAMP_TimerControlMux/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the OPAMP_TimerControlMux example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Brief 
+
+This example shows how to use the timer controlled multiplexer mode of the OPAMP.
+
+@par Example Description
+
+This mode allows upon a timer trigger to change OPAMP configuration from a primary
+one to a secondary one. Possibilities are as follow:
+
+Primary configuration is standalone:
+- Secondary is standalone with possibility to change either one or both inputs
+
+Primary configuration is follower or PGA:
+- Secondary can be follower with same or different non inverting input
+- Secondary can be PGA with same or different non inverting input
+
+This example is configuring OPAMP4 as follow:
+- Primary configuration is follower with non inverting input on DAC4
+generating a triangle wave.
+- Secondary configuration is follower with non inverting input on PB13
+connected to potentiometer RV2
+- TIM1 is used to trig the timer controlled multiplexer mode
+
+The OPAMP output (PB12 - pin 16 on connector CN6) should replicate alternatively
+both input signals (triangle wave and potentiometer value).
+
+- Connection needed:
+ - Connect a scope on OPAMP output (PB12 - pin 16 on connector CN6) to observe
+ timer controlled multiplexer effects.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PB13 (pin 13 on connector CN6)
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, OPAMP, Timer controlled multiplexer
+
+@par Directory contents 
+
+  - OPAMP/OPAMP_TimerControlMux/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - OPAMP/OPAMP_TimerControlMux/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - OPAMP/OPAMP_TimerControlMux/Inc/main.h                  Header for main.c module  
+  - OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_it.c          Interrupt handlers
+  - OPAMP/OPAMP_TimerControlMux/Src/main.c                  Main program
+  - OPAMP/OPAMP_TimerControlMux/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - OPAMP/OPAMP_TimerControlMux/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+@par Hardware and Software environment  
+  
+  - This example runs on STM32G474xx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+- Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PB13 (pin 13 on connector CN6)
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+  
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/.extSettings b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/PWR_LPRUN_SRAM1.ewd b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/PWR_LPRUN_SRAM1.ewd
new file mode 100644
index 000000000..025655329
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/PWR_LPRUN_SRAM1.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>PWR_LPRUN_SRAM1</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/PWR_LPRUN_SRAM1.ewp b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/PWR_LPRUN_SRAM1.ewp
new file mode 100644
index 000000000..5fd8ef9b7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/PWR_LPRUN_SRAM1.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>PWR_LPRUN_SRAM1</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>PWR_LPRUN_SRAM1/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>PWR_LPRUN_SRAM1/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>PWR_LPRUN_SRAM1/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
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+          <version>0</version>
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+          <name>AWarnOne</name>
+          <state></state>
+        </option>
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+          <name>AWarnRange1</name>
+          <state></state>
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+          <name>AWarnRange2</name>
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+          <state>80</state>
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+          <state>8</state>
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+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>PWR_LPRUN_SRAM1.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>PWR_LPRUN_SRAM1.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_sram.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/Project.eww
new file mode 100644
index 000000000..aeda97e66
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\PWR_LPRUN_SRAM1.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/stm32g474xx_sram.icf b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/stm32g474xx_sram.icf
new file mode 100644
index 000000000..b38ecb364
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/EWARM/stm32g474xx_sram.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x20000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x20009FFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x2000A000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/main.h
new file mode 100644
index 000000000..110e3e8de
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_LPRUN/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..7c526d782
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_LPRUN/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/PWR_LPRUN_SRAM1.uvoptx b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/PWR_LPRUN_SRAM1.uvoptx
new file mode 100644
index 000000000..53ddd6e3d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/PWR_LPRUN_SRAM1.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>PWR_LPRUN_SRAM1</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
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+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/PWR_LPRUN_SRAM1.uvprojx b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/PWR_LPRUN_SRAM1.uvprojx
new file mode 100644
index 000000000..4d08de28b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/PWR_LPRUN_SRAM1.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>PWR_LPRUN_SRAM1</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>PWR_LPRUN_SRAM1\</OutputDirectory>
+          <OutputName>PWR_LPRUN_SRAM1</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
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+          <PublicsOnly>0</PublicsOnly>
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+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
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+        <DllOption>
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+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
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+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
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+            <RvctDeviceName></RvctDeviceName>
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+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="PWR_LPRUN_SRAM1"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/PWR_LPRUN_SRAM1.ioc b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/PWR_LPRUN_SRAM1.ioc
new file mode 100644
index 000000000..d275e3709
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/PWR_LPRUN_SRAM1.ioc
@@ -0,0 +1,118 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=PWR_LPRUN_SRAM1.ioc
+ProjectManager.ProjectName=PWR_LPRUN_SRAM1
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=PWR_LPRUN_SRAM1
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..be7134af2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1608698738">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1608698738" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1608698738" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1608698738." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2080810799" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.2124177169" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.191387061" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1614536905" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1725125938" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1582446394" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1997329521" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1296923646" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.743324603" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.665422767" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1345966591" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/PWR_LPRUN_SRAM1}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1617111113" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1185298936" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1344866887" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.863992595" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.871314213" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.680495284" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.635590810" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+							</tool>
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+							</tool>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1326863529" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.812206666" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1820477829" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1273513140" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1631640570" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.687396246" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1845724037" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
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+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.541136926." name="/" resourcePath="">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.770125038" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1623423323" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.605816015" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1383524213" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.363870599" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.482507806" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1926015939" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/PWR_LPRUN_SRAM1}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.103317738" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1345014392" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.560966371" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.619589693" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.706315236" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1682019432" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.304577201" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1550234020" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1231043646" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.102112567" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1051192035" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.2115419795" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1004939904" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1564041075" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1664566835" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1826458143" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1599773652" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1282362677" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1047963043" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1112694125" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1553496821" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.2103609167" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1097769921" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.791415636" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="PWR_LPRUN_SRAM1.null.1441295189" name="PWR_LPRUN_SRAM1"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.541136926;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.541136926.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.619589693;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1425424441">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1608698738;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1608698738.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.871314213;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1247055921">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/.project
new file mode 100644
index 000000000..d456e4bbe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>PWR_LPRUN_SRAM1</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>PWR_LPRUN_SRAM1.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/PWR_LPRUN_SRAM1.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/main.c
new file mode 100644
index 000000000..5e5de1522
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/main.c
@@ -0,0 +1,332 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_LPRUN/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx PWR HAL API to enter
+  *          and exit the Low Power Run mode.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define LED_TOGGLE_DELAY         100
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+static uint32_t TimingDelay;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+void SystemPower_Config(void);
+void SystemClock_Decrease(void);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+  /* Configure LED1 */
+  BSP_LED_Init(LED1);
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+
+  /* Configure the system Power */
+  SystemPower_Config();
+
+  /* Enable Power Clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  
+    /* Re-init LED1 to toggle during Run mode */
+    BSP_LED_Init(LED1);
+ 
+  /* User push-button will be used to exit from Low Power Run mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_GPIO);
+
+  /* Enable the FLASH power down during Low Power Run mode */
+  __HAL_FLASH_POWER_DOWN_ENABLE();
+  /* this command provides system to restart (led does not blink anymore after delay) */
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Insert 5 seconds delay. LED1 is toggled in systick callback */
+     HAL_Delay(5000);
+    /* Reduce the System clock */
+    SystemClock_Decrease();
+    
+    /* Set regulator voltage to scale 2 */
+    HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2);    
+
+    /* De-init LED1 */
+    BSP_LED_DeInit(LED1);
+
+    /* Enter LP RUN Mode */
+    HAL_PWREx_EnableLowPowerRunMode();
+
+    /* Wait until User push-button pressed */
+    while(BSP_PB_GetState(BUTTON_USER) != GPIO_PIN_RESET)
+    {
+    }
+
+    /* Wait until User push-button released */
+    while(BSP_PB_GetState(BUTTON_USER) != GPIO_PIN_SET)
+    {
+    }
+
+    /* Disable low power run mode and reset the clock to initialization configuration */
+    HAL_PWREx_DisableLowPowerRunMode();
+
+    /* Re-init LED1 to toggle during Run mode */
+    BSP_LED_Init(LED1);
+
+    /* Configure the system clock for the RUN mode */
+    SystemClock_Config();
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  System Power Configuration
+  * @param  None
+  * @retval None
+  */
+void SystemPower_Config(void)
+{
+  GPIO_InitTypeDef GPIO_InitStructure;
+
+      /* Set all GPIO in analog state to reduce power consumption */
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+
+    GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStructure.Pull = GPIO_NOPULL;
+    GPIO_InitStructure.Pin = GPIO_PIN_All;
+
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
+	
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStructure);
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
+
+    __HAL_RCC_GPIOA_CLK_DISABLE();
+    __HAL_RCC_GPIOB_CLK_DISABLE();
+	
+    __HAL_RCC_GPIOD_CLK_DISABLE();
+    __HAL_RCC_GPIOE_CLK_DISABLE();
+    __HAL_RCC_GPIOF_CLK_DISABLE();
+    __HAL_RCC_GPIOG_CLK_DISABLE();
+}
+
+/**
+  * @brief  System Clock Speed decrease
+  *         The system Clock source is shifted from PLL to HSI
+  * @param  None
+  * @retval None
+  */
+void SystemClock_Decrease(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+  /* Select HSI as system clock source a */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+  if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /* Modify HSI to HSI DIV8 */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief SYSTICK callback
+  * @param None
+  * @retval None
+  */
+void HAL_SYSTICK_Callback(void)
+{
+  if (TimingDelay != 0)
+  {
+    TimingDelay--;
+  }
+  else
+  {
+    /* Toggle LED1 */
+    BSP_LED_Toggle(LED1);
+    TimingDelay = LED_TOGGLE_DELAY;
+  }
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn on the LED1 */
+  BSP_LED_On(LED1);
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..ba3dc1af1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : stm32g4xx_hal_msp.c
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..b3b5c07d8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/stm32g4xx_it.c
@@ -0,0 +1,205 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_LPRUN/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+  HAL_SYSTICK_IRQHandler();
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..192a115db
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+#define VECT_TAB_SRAM
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/readme.txt b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/readme.txt
new file mode 100644
index 000000000..5bedf1c95
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_LPRUN_SRAM1/readme.txt
@@ -0,0 +1,91 @@
+/**
+  @page PWR_LPRUN_SRAM1 Low Power Run Mode Example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    PWR/PWR_LPRUN_SRAM1/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the Low Power Run Mode example executed from SRAM1
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+ 
+This example shows how to enter and exit the Low Power Run mode.
+
+In the associated software, the system clock is set to 170 MHz.
+The SysTick is programmed to generate an interrupt each 1 ms.
+
+5 seconds after start-up, the system automatically enters LP RUN mode
+and LED1 stops toggling.
+The User push-button can be pressed at any time to exit from Low Power Run. 
+The software then comes back in RUN mode for 5 sec. before automatically 
+entering LP RUN mode again. 
+
+LED1 is used to monitor the system state as follows:
+ - LED1 toggling : system in RUN mode
+ - LED1 off : system in LP RUN mode
+
+These steps are repeated in an infinite loop.
+
+@note To measure the current consumption in LP RUN mode, remove JP6 jumper 
+      and connect an amperemeter to JP6 to measure IDD current.     
+
+@note This example can not be used in DEBUG mode due to the fact 
+      that the Cortex-M4 core is no longer clocked during low power mode 
+      so debugging features are disabled.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+      
+@par Keywords
+
+Power, PWR, Low Power, Run mode, Interrupt, Wakeup, External reset, SRAM
+
+@par Directory contents 
+
+  - PWR/PWR_LPRUN_SRAM1/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_conf.h         HAL Configuration file
+  - PWR/PWR_LPRUN_SRAM1/Inc/stm32g4xx_it.h           Header for stm32g4xx_it.c
+  - PWR/PWR_LPRUN_SRAM1/Inc/main.h                   Header file for main.c
+  - PWR/PWR_LPRUN_SRAM1/Src/system_stm32g4xx.c       STM32G4xx system clock configuration file
+  - PWR/PWR_LPRUN_SRAM1/Src/stm32g4xx_it.c           Interrupt handlers
+  - PWR/PWR_LPRUN_SRAM1/Src/main.c                   Main program
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G4xx devices
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device 
+    and development board.
+
+  - STM32G474E-EVAL1 Rev B set-up:
+    - LED1 connected to PG.09 pin
+    - Use the User push-button connected to pin PC.13.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/.extSettings b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/PWR_PVD.ewd b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/PWR_PVD.ewd
new file mode 100644
index 000000000..cf9c395a0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/PWR_PVD.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>PWR_PVD</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/PWR_PVD.ewp b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/PWR_PVD.ewp
new file mode 100644
index 000000000..e8e354bd6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/PWR_PVD.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>PWR_PVD</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>PWR_PVD/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>PWR_PVD/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>PWR_PVD/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
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+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
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+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/Project.eww
new file mode 100644
index 000000000..37719c791
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\PWR_PVD.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/main.h
new file mode 100644
index 000000000..0c4e3d471
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_PVD/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+  
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..e591be0fb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_PVD/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+void PVD_PVM_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/PWR_PVD.uvoptx b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/PWR_PVD.uvoptx
new file mode 100644
index 000000000..e0d27fbe5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/PWR_PVD.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>PWR_PVD</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
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+      <bDave2>0</bDave2>
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+      <bShared>0</bShared>
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+  </Group>
+
+  <Group>
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+    </File>
+  </Group>
+
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diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/PWR_PVD.uvprojx b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/PWR_PVD.uvprojx
new file mode 100644
index 000000000..3eae2188c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/PWR_PVD.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>PWR_PVD</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>PWR_PVD\Exe\</OutputDirectory>
+          <OutputName>PWR_PVD</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
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+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
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+            <RvdsVP>2</RvdsVP>
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+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
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+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
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+            <Ra3Chk>0</Ra3Chk>
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+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="PWR_PVD"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/PWR_PVD.ioc b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/PWR_PVD.ioc
new file mode 100644
index 000000000..ab6b95c33
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/PWR_PVD.ioc
@@ -0,0 +1,118 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.PinsNb=2
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=PWR_PVD.ioc
+ProjectManager.ProjectName=PWR_PVD
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=PWR_PVD
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..acca6d237
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1364983464">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1364983464" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1364983464" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1364983464." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1799125429" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1729158649" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.2042844165" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1263319869" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.666588697" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1113130099" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1565936605" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.941977667" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.49282332" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.630530978" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1979111801" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/PWR_PVD}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1860187229" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.926548755" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.159343019" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/.project
new file mode 100644
index 000000000..001ddb3fb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>PWR_PVD</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>PWR_PVD.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/PWR_PVD.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/main.c
new file mode 100644
index 000000000..9b59c64a0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/main.c
@@ -0,0 +1,243 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_PVD/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx PWR HAL API to manage the
+  *          Programmable Voltage Detector (PVD).
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+PWR_PVDTypeDef sConfigPVD;
+__IO uint32_t uwToggleOn = 1;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+static void PVD_Config(void);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  /* USER CODE BEGIN 2 */
+   /* Configure LEDs */
+   BSP_LED_Init(LED1);
+
+  /* Configure the PVD */
+  PVD_Config();
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* LED1 toggles when the voltage is above the target threshold */
+    if (uwToggleOn)
+    {
+      BSP_LED_Toggle(LED1);
+      HAL_Delay(200);
+    }
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Configures the PVD resources.
+  * @param  None
+  * @retval None
+  */
+static void PVD_Config(void)
+{
+  /*##-1- Enable Power Clock #################################################*/
+  /* Enable Power Clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  
+  /*##-2- Configure the NVIC for PVD #########################################*/
+  HAL_NVIC_SetPriority(PVD_PVM_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(PVD_PVM_IRQn);
+
+  /* Configure the PVD Level to 3 and generate an interrupt on rising and falling
+     edges(PVD detection level set to 2.5V, refer to the electrical characteristics
+     of you device datasheet for more details) */
+  sConfigPVD.PVDLevel = PWR_PVDLEVEL_3;
+  sConfigPVD.Mode = PWR_PVD_MODE_IT_RISING_FALLING;
+  HAL_PWR_ConfigPVD(&sConfigPVD);
+
+  /* Enable the PVD Output */
+  HAL_PWR_EnablePVD();
+}
+
+
+/**
+  * @brief  PWR PVD interrupt callback
+  * @param  none 
+  * @retval none
+  */
+void HAL_PWR_PVDCallback(void)
+{
+  /* Set LED1 on */  
+  BSP_LED_On(LED1); 
+  /* update uwToggleOn global variable so that LED1 blinks when the
+     voltage is above the target threshold */
+  uwToggleOn = (uwToggleOn+1) % 2;
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..3a08aa2f3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_PVD/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..474eb8fba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/stm32g4xx_it.c
@@ -0,0 +1,213 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_PVD/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+  HAL_SYSTICK_IRQHandler();
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles the PVD Output interrupt request.
+  * @param  None
+  * @retval None
+  */
+void PVD_PVM_IRQHandler(void)
+{
+  HAL_PWREx_PVD_PVM_IRQHandler();
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/readme.txt b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/readme.txt
new file mode 100644
index 000000000..2598c56c1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_PVD/readme.txt
@@ -0,0 +1,80 @@
+/**
+  @page PWR_PVD PWR Programmable Voltage Detector (PVD) example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    PWR/PWR_PVD/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the PWR Programmable Voltage Detector (PVD) example
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+How to configure the programmable voltage detector by using an external interrupt 
+line. External DC supply must be used to supply Vdd.
+
+In this example, EXTI line 15 is configured to generate an interrupt on each rising
+or falling edge of the PVD output signal (which indicates that the Vdd voltage is
+moving below or above the PVD threshold). As long as the voltage is above the 
+target threshold (2.5V), LED1 is blinking with a 200 ms-period; when the voltage drops
+below the threshold, LED1 stops blinking and remains constantly on (or appears
+to be turned off if the voltage is getting really low); when the voltage moves back
+above the target threshold, LED1 starts blinking again.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Power, PWR, EXTI, PVD, Interrupt, Wakeup, External reset
+
+@par Directory contents 
+
+  - PWR/PWR_PVD/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - PWR/PWR_PVD/Inc/stm32g4xx_hal_conf.h     HAL Configuration file
+  - PWR/PWR_PVD/Inc/stm32g4xx_it.h           Header for stm32g4xx_it.c
+  - PWR/PWR_PVD/Inc/main.h                         Header file for main.c
+  - PWR/PWR_PVD/Src/system_stm32g4xx.c       STM32G4xx system clock configuration file
+  - PWR/PWR_PVD/Src/stm32g4xx_it.c           Interrupt handlers
+  - PWR/PWR_PVD/Src/stm32g4xx_hal_msp.c      HAL MSP module
+  - PWR/PWR_PVD/Src/main.c                         Main program
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474xx devices
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device
+    and development board.
+
+  - STM32G474E-EVAL1 Rev B Set-up :
+    - Jumper JP11 has to be in position 2-3 ( VDD_ADJ),
+    - Power Supply can be adjusted thanks to the potentiometer VDD_ADJ/RV3 [1.62V to 3.61V]
+    - LED1 (GREEN) connected to PG.09 pin indicates the behavior of
+      the test software as explained above.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/.extSettings b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/PWR_STOP0_RTC.ewd b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/PWR_STOP0_RTC.ewd
new file mode 100644
index 000000000..a36feb7f5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/PWR_STOP0_RTC.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>PWR_STOP0_RTC</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/PWR_STOP0_RTC.ewp b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/PWR_STOP0_RTC.ewp
new file mode 100644
index 000000000..f8a0f73c2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/PWR_STOP0_RTC.ewp
@@ -0,0 +1,1155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>PWR_STOP0_RTC</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>PWR_STOP0_RTC/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>PWR_STOP0_RTC/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>PWR_STOP0_RTC/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
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+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
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+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
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+        </option>
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+        </option>
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+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
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+        <option>
+          <name>PageLength</name>
+          <state>80</state>
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+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
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+          <name>AXRef</name>
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+          <name>AXRefDefines</name>
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+          <name>AXRefDual</name>
+          <state>0</state>
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+          <name>AProcessor</name>
+          <state>1</state>
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+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
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+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>PWR_STOP0_RTC.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>PWR_STOP0_RTC.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/Project.eww
new file mode 100644
index 000000000..0020cd93d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\PWR_STOP0_RTC.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/main.h
new file mode 100644
index 000000000..604235744
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/main.h
@@ -0,0 +1,72 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_STOP1_RTC/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+#define RTC_ASYNCH_PREDIV    0x7F
+#define RTC_SYNCH_PREDIV     0xF9  /* 32Khz/128 - 1 */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..17cbb0bf6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..0e8a225c5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_STOP1_RTC/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+void RTC_WKUP_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/PWR_STOP0_RTC.uvoptx b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/PWR_STOP0_RTC.uvoptx
new file mode 100644
index 000000000..0ffd0e518
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/PWR_STOP0_RTC.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>PWR_STOP0_RTC</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
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+      <bShared>0</bShared>
+    </File>
+  </Group>
+
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+    <GroupName>Application/User</GroupName>
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+      <PathWithFileName>../Src/main.c</PathWithFileName>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/PWR_STOP0_RTC.uvprojx b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/PWR_STOP0_RTC.uvprojx
new file mode 100644
index 000000000..2b39630d9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/PWR_STOP0_RTC.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>PWR_STOP0_RTC</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>PWR_STOP0_RTC\Exe\</OutputDirectory>
+          <OutputName>PWR_STOP0_RTC</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
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+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
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+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
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+          <SimDlgDll>DCM.DLL</SimDlgDll>
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+          <TargetDllName>SARMCM3.DLL</TargetDllName>
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+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+          <OPTHX>
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+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
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+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
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+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
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+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="PWR_STOP0_RTC"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/PWR_STOP0_RTC.ioc b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/PWR_STOP0_RTC.ioc
new file mode 100644
index 000000000..8cd710e45
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/PWR_STOP0_RTC.ioc
@@ -0,0 +1,129 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=RTC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_RTC_VS_RTC_Activate
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=PWR_STOP0_RTC.ioc
+ProjectManager.ProjectName=PWR_STOP0_RTC
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_RTC_Init-RTC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+RTC.AsynchPrediv=RTC_ASYNCH_PREDIV
+RTC.HourFormat=RTC_HOURFORMAT_24
+RTC.IPParameters=HourFormat,AsynchPrediv,SynchPrediv,WakeUpClock-WakeUp,WakeUpCounter-WakeUp
+RTC.IPParametersWithoutCheck=AsynchPrediv,SynchPrediv
+RTC.SynchPrediv=RTC_SYNCH_PREDIV
+RTC.WakeUpClock-WakeUp=RTC_WAKEUPCLOCK_RTCCLK_DIV16
+RTC.WakeUpCounter-WakeUp=0
+VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
+VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=PWR_STOP0_RTC
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..10928e476
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2034015866">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2034015866" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2034015866" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2034015866." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1136778162" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.312027391" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1731839897" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.934606774" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1932989902" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.468229" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1678583741" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.590815068" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.111942311" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.522337014" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.782229612" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
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+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2034015866;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2034015866.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.104772568;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1875942439">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.251737033;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.251737033.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.159777990;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.265722819">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/.project
new file mode 100644
index 000000000..d145d1d56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>PWR_STOP0_RTC</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>PWR_STOP0_RTC.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/PWR_STOP0_RTC.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/main.c
new file mode 100644
index 000000000..8b6be82c9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/main.c
@@ -0,0 +1,450 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_STOP0_RTC/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx PWR HAL API to enter
+  *          and exit the stop 0 mode using RTC.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+RTC_HandleTypeDef hrtc;
+
+/* USER CODE BEGIN PV */
+#define LED_TOGGLE_DELAY         100
+static __IO uint32_t TimingDelay;
+  GPIO_InitTypeDef GPIO_InitStructure;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_RTC_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+static void SystemPower_Config(void);
+static void SYSCLKConfig_STOP(void);
+static void RTC_Config(void);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* Configure LED1, LED2 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_RTC_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure RTC */
+  RTC_Config();
+  
+  /* Enable Power Clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  
+
+  /* Configure the system Power */
+  SystemPower_Config();
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Insert 5 second delay */
+    HAL_Delay(5000);
+
+    /* Enable GPIOs clock */
+          __HAL_RCC_GPIOA_CLK_ENABLE();
+          __HAL_RCC_GPIOB_CLK_ENABLE();
+          __HAL_RCC_GPIOC_CLK_ENABLE();
+          __HAL_RCC_GPIOD_CLK_ENABLE();
+          __HAL_RCC_GPIOE_CLK_ENABLE();
+          __HAL_RCC_GPIOF_CLK_ENABLE();
+          __HAL_RCC_GPIOG_CLK_ENABLE();
+
+          /* Set all GPIO in analog state to reduce power consumption,                */
+          /*   except GPIOC to keep user button interrupt enabled                     */
+          /* Note: Debug using ST-Link is not possible during the execution of this   */
+          /*       example because communication between ST-link and the device       */
+          /*       under test is done through UART. All GPIO pins are disabled (set   */
+          /*       to analog input mode) including  UART I/O pins.                    */
+          GPIO_InitStructure.Pin = GPIO_PIN_All;
+          GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
+          GPIO_InitStructure.Pull = GPIO_NOPULL;
+
+          HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); 
+          HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
+          HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
+          HAL_GPIO_Init(GPIOD, &GPIO_InitStructure); 
+          HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
+          HAL_GPIO_Init(GPIOF, &GPIO_InitStructure); 
+          HAL_GPIO_Init(GPIOG, &GPIO_InitStructure); 
+
+          /* Disable GPIOs clock */
+          __HAL_RCC_GPIOA_CLK_DISABLE();
+          __HAL_RCC_GPIOB_CLK_DISABLE();
+          __HAL_RCC_GPIOC_CLK_DISABLE();
+          __HAL_RCC_GPIOD_CLK_DISABLE();
+          __HAL_RCC_GPIOE_CLK_DISABLE();
+          __HAL_RCC_GPIOF_CLK_DISABLE();  
+          __HAL_RCC_GPIOG_CLK_DISABLE(); 
+        
+  
+    /* Disable all used wakeup source */
+    HAL_RTCEx_DeactivateWakeUpTimer(&hrtc);
+  
+  
+    /* Re-enable wakeup source */
+    /* ## Setting the Wake up time ############################################*/
+    /* RTC Wakeup Interrupt Generation: 
+      the wake-up counter is set to its maximum value to yield the longest
+      stop time to let the current reach its lowest operating point.
+      The maximum value is 0xFFFF, corresponding to about 33 sec. when 
+      RTC_WAKEUPCLOCK_RTCCLK_DIV = RTCCLK_Div16 = 16
+
+      Wakeup Time Base = (RTC_WAKEUPCLOCK_RTCCLK_DIV /(LSI))
+      Wakeup Time = Wakeup Time Base * WakeUpCounter 
+        = (RTC_WAKEUPCLOCK_RTCCLK_DIV /(LSI)) * WakeUpCounter
+        ==> WakeUpCounter = Wakeup Time / Wakeup Time Base
+  
+      To configure the wake up timer to 60s the WakeUpCounter is set to 0xFFFF:
+      Wakeup Time Base = 16 /(~32.000KHz) = ~0.5 ms
+      Wakeup Time = 0.5 ms  * WakeUpCounter
+      Therefore, with wake-up counter =  0xFFFF  = 65,535 
+         Wakeup Time =  0,5 ms *  65,535 = 32,7675 s ~ 33 sec. */
+    HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, 0x0FFFF, RTC_WAKEUPCLOCK_RTCCLK_DIV16);
+
+    /* Enter stop 0 mode */
+    HAL_PWREx_EnterSTOP0Mode(PWR_STOPENTRY_WFI);
+
+    /* ... Stop 0 mode ... */
+
+    /* Configure system clock after wake-up from stop: enable HSE, PLL and select
+    PLL as system clock source (HSE and PLL are disabled in stop mode) */
+    SYSCLKConfig_STOP();
+    
+    /* Re-configure and turn on LED1  */
+    BSP_LED_Init(LED1 );
+    BSP_LED_On(LED1 );
+  
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief RTC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RTC_Init(void)
+{
+
+  /* USER CODE BEGIN RTC_Init 0 */
+
+  /* USER CODE END RTC_Init 0 */
+
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = RTC_ASYNCH_PREDIV;
+  hrtc.Init.SynchPrediv = RTC_SYNCH_PREDIV;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  hrtc.Init.OutPutPullUp = RTC_OUTPUT_PULLUP_NONE;
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+  
+  /* USER CODE END RTC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/**
+  * @brief  RTC Configuration
+  *         RTC Clocked by LSI (see HAL_RTC_MspInit)
+  * @param  None
+  * @retval None
+  */
+static void RTC_Config(void)
+{
+  /* Configure RTC */
+  /* after MX_RTC_Init : this not done in the MX_RTC_Init*/
+  
+  /*##-2- Enable the RTC peripheral Clock ####################################*/
+  /* Enable RTC Clock */
+  __HAL_RCC_RTC_ENABLE();
+  
+  /*##-3- Configure the NVIC for RTC Alarm ###################################*/
+  HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 0x0, 0);
+  HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
+}
+
+/**
+  * @brief  Configures system clock after wake-up from stop: enable HSE, PLL
+  *         and select PLL as system clock source.
+  * @param  None
+  * @retval None
+  */
+static void SYSCLKConfig_STOP(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  uint32_t pFLatency = 0;
+
+  /* Enable Power Control clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* Get the Oscillators configuration according to the internal RCC registers */
+  HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
+
+  /* After wake-up from stop reconfigure the system clock: Enable HSE and PLL */
+  RCC_OscInitStruct.OscillatorType  = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState        = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState    = RCC_PLL_ON;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Get the Clocks configuration according to the internal RCC registers */
+  HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency);
+
+  /* Select PLL as system clock source and keep HCLK, PCLK1 and PCLK2 clocks dividers as before */
+  RCC_ClkInitStruct.ClockType     = RCC_CLOCKTYPE_SYSCLK;
+  RCC_ClkInitStruct.SYSCLKSource  = RCC_SYSCLKSOURCE_PLLCLK;
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, pFLatency) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief  System Power Configuration
+  *         The system Power is configured as follow :
+  *            + RTC Clocked by LSI
+  *            + VREFINT OFF, with fast wakeup enabled
+  *            + No IWDG
+  *            + Automatic Wakeup using RTC clocked by LSI (after ~4s)
+  * @param  None
+  * @retval None
+  */
+static void SystemPower_Config(void)
+{
+
+  /* Configure RTC */
+  hrtc.Instance = RTC;
+  /* Set the RTC time base to 1s */
+  /* Configure RTC prescaler and RTC data registers as follow:
+    - Hour Format = Format 24
+    - Asynch Prediv = Value according to source clock
+    - Synch Prediv = Value according to source clock
+    - OutPut = Output Disable
+    - OutPutPolarity = High Polarity
+    - OutPutType = Open Drain */
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = RTC_ASYNCH_PREDIV;
+  hrtc.Init.SynchPrediv = RTC_SYNCH_PREDIV;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  if(HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler(); 
+  }
+}
+
+/**
+  * @brief SYSTICK callback
+  * @param None
+  * @retval None
+  */
+void HAL_SYSTICK_Callback(void)
+{
+  if (TimingDelay != 0)
+  {
+    TimingDelay--;
+  }
+  else
+  {
+    /* Toggle LED1 */
+    BSP_LED_Toggle(LED1);
+    TimingDelay = LED_TOGGLE_DELAY;
+  }
+}
+
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn on the LED2 */
+  BSP_LED_On(LED2);
+  /* User can add his own implementation to report the HAL error return state */
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..f304c9987
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_STOP1_RTC/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief RTC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+
+  /* USER CODE END RTC_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+    PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+    __HAL_RCC_RTCAPB_CLK_ENABLE();
+  /* USER CODE BEGIN RTC_MspInit 1 */
+
+  /* USER CODE END RTC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief RTC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspDeInit 0 */
+
+  /* USER CODE END RTC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RTC_DISABLE();
+    __HAL_RCC_RTCAPB_CLK_DISABLE();
+  /* USER CODE BEGIN RTC_MspDeInit 1 */
+
+  /* USER CODE END RTC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..53829e89d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/stm32g4xx_it.c
@@ -0,0 +1,218 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    PWR/PWR_STOP1_RTC/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+extern RTC_HandleTypeDef hrtc;
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+ HAL_SYSTICK_IRQHandler();
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/**
+* @brief This function handles RTC wake-up interrupt through EXTI line 20.
+*/
+void RTC_WKUP_IRQHandler(void)
+{
+  /* USER CODE BEGIN RTC_WKUP_IRQn 0 */
+
+  /* USER CODE END RTC_WKUP_IRQn 0 */
+  HAL_RTCEx_WakeUpTimerIRQHandler(&hrtc);
+  /* USER CODE BEGIN RTC_WKUP_IRQn 1 */
+
+  /* USER CODE END RTC_WKUP_IRQn 1 */
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/readme.txt b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/readme.txt
new file mode 100644
index 000000000..cacb17b0b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/PWR/PWR_STOP0_RTC/readme.txt
@@ -0,0 +1,99 @@
+/**
+  @page PWR_STOP0_RTC  Power Stop 0 RTC Mode example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    PWR/PWR_STOP0_RTC/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the PWR STOP1 RTC example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+This example shows how to enter Stop 0 mode and wake up from this mode using 
+an interrupt from RTC Wake-up Timer. 
+It allows to measure the current consumption in STOP 0 mode with RTC enabled.
+
+In the associated software, the system clock is set to 170 MHz and the SysTick is 
+programmed to generate an interrupt each 1 ms.
+The Low Speed Internal (LSI) clock is used as RTC clock source by default.
+EXTI_Line20 is internally connected to the RTC Wakeup event.
+
+
+The system automatically enters STOP 0 mode 5 sec. after start-up.
+The RTC wake-up is configured to generate an interrupt on rising edge about 33 sec. afterwards.
+Current consumption in STOP 0 mode with RTC feature enabled can be measured during that time.
+More than half a minute is chosen to ensure current convergence to its lowest operating point.
+
+After wake-up from STOP 0 mode, program execution is resumed.
+
+Two leds LED1 and LED2 are used to monitor the system state as following:
+ - LED2 ON: configuration failed (system will go to an infinite loop)
+ - LED1 toggling: system in RUN mode
+ - LED1 off : system in STOP 0 mode
+
+These steps are repeated in an infinite loop.
+ 
+@note To measure the current consumption in STOP 0 mode, remove JP13 jumper 
+      and connect an amperemeter to JP13 to measure IDD current.     
+
+@note This example can not be used in DEBUG mode due to the fact 
+      that the Cortex-M4 core is no longer clocked during low power mode 
+       so debugging features are disabled.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+      
+@par Keywords
+
+Power, PWR, Stop 1 mode, Interrupt, EXTI, Wakeup, Low Power, RTC, External reset
+
+@par Directory contents 
+
+  - PWR/PWR_STOP0_RTC/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - PWR/PWR_STOP1_RTC/Inc/stm32g4xx_conf.h         HAL Configuration file
+  - PWR/PWR_STOP1_RTC/Inc/stm32g4xx_it.h           Header for stm32g4xx_it.c
+  - PWR/PWR_STOP1_RTC/Inc/main.h                   Header file for main.c
+  - PWR/PWR_STOP1_RTC/Src/system_stm32g4xx.c       STM32G4xx system clock configuration file
+  - PWR/PWR_STOP1_RTC/Src/stm32g4xx_it.c           Interrupt handlers
+  - PWR/PWR_STOP1_RTC/Src/main.c                   Main program
+  - PWR/PWR_STOP1_RTC/Src/stm32g4xx_hal_msp.c      HAL MSP module
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G4xx devices
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device 
+    and development board.
+
+  - STM32G474E-EVAL1 Rev B Set-up
+    - Use LED1 and LED2 connected respectively to PG.09 and MFX6 pins
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/.extSettings b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/Project.eww
new file mode 100644
index 000000000..ff615dbad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\RCC_CRS_Synchronization_Polling.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/RCC_CRS_Synchronization_Polling.ewd b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/RCC_CRS_Synchronization_Polling.ewd
new file mode 100644
index 000000000..e7b2560b3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/RCC_CRS_Synchronization_Polling.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>RCC_CRS_Synchronization_Polling</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/RCC_CRS_Synchronization_Polling.ewp b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/RCC_CRS_Synchronization_Polling.ewp
new file mode 100644
index 000000000..baef8f491
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/RCC_CRS_Synchronization_Polling.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>RCC_CRS_Synchronization_Polling</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>RCC_CRS_Synchronization_Polling/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>RCC_CRS_Synchronization_Polling/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>RCC_CRS_Synchronization_Polling/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
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+          <state></state>
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+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
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+          <state>1</state>
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+          <state>$FILE_BNAME$.o</state>
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+          <state>1</state>
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+          <name>PreInclude</name>
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+          <name>CompilerMisraOverride</name>
+          <state>0</state>
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+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
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+          <state>0</state>
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+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
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+          <name>CCOptStrategy</name>
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+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>CCPosIndRwpi</name>
+          <state>0</state>
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+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
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+          <state>0</state>
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+          <name>IccCDialect</name>
+          <state>1</state>
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+          <name>IccAllowVLA</name>
+          <state>0</state>
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+          <name>IccStaticDestr</name>
+          <state>0</state>
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+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
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+          <name>IccCmsis</name>
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+          <name>CCEncOutputBom</name>
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+        <option>
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+          <name>IccRTTI2</name>
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+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/main.h
new file mode 100644
index 000000000..0b6d31102
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RCC/RCC_CRS_Synchronization_Polling/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..53f1a4c53
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..0e3a9e427
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/RCC_CRS_Synchronization_Polling.uvoptx b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/RCC_CRS_Synchronization_Polling.uvoptx
new file mode 100644
index 000000000..b1fa24ea2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/RCC_CRS_Synchronization_Polling.uvoptx
@@ -0,0 +1,133 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+  <Target>
+    <TargetName>RCC_CRS_Synchronization_Polling</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath />
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll />
+        <sDllPa />
+        <sDlgDll />
+        <sDlgPa />
+        <sIfile />
+        <tDll />
+        <tDllPa />
+        <tDlgDll />
+        <tDlgPa />
+        <tIfile />
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+	    <TargetDriverDllRegistry>
+        <SetRegEntry>
+		        <Number>0</Number>
+		        <Key>ST-LINKIII-KEIL_SWO</Key>
+		        <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+		</SetRegEntry>
+       <SetRegEntry>
+		        <Number>0</Number>
+		        <Key />
+		        <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+		</SetRegEntry>
+ </TargetDriverDllRegistry>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
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+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable />
+      <LintConfigFile />
+    </TargetOption>
+  </Target>
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/RCC_CRS_Synchronization_Polling.uvprojx b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/RCC_CRS_Synchronization_Polling.uvprojx
new file mode 100644
index 000000000..9bd59f993
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/RCC_CRS_Synchronization_Polling.uvprojx
@@ -0,0 +1,606 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+  <Target> 
+      <TargetName>RCC_CRS_Synchronization_Polling</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec/>
+          <StartupFile/>
+          <FlashDriverDll/>
+          <DeviceId/>
+          <RegisterFile/>
+          <MemoryEnv/>
+          <Cmp/>
+          <Asm/>
+          <Linker/>
+          <OHString/>
+          <InfinionOptionDll/>
+          <SLE66CMisc/>
+          <SLE66AMisc/>
+          <SLE66LinkerMisc/>
+          <SFDFile/>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath/>
+          <IncludePath/>
+          <LibPath/>
+          <RegisterFilePath/>
+          <DBRegisterFilePath/>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>RCC_CRS_Synchronization_Polling\Exe\</OutputDirectory>
+          <OutputName>RCC_CRS_Synchronization_Polling</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>RCC_CRS_Synchronization_Polling/List</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name/>
+            <UserProg2Name/>
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+          <SVCSIdString/>
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+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+          <SimDlls>
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+            <CpuDll/>
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+            <Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
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+            <RvctDeviceName/>
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+            <hadIROM>1</hadIROM>
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+        
+		<Group>
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+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    	
+    </Target>
+  </Targets>
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="RCC_CRS_Synchronization_Polling"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/RCC_CRS_Synchronization_Polling.ioc b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/RCC_CRS_Synchronization_Polling.ioc
new file mode 100644
index 000000000..361668277
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/RCC_CRS_Synchronization_Polling.ioc
@@ -0,0 +1,121 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IPNb=3
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA8
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA8.Mode=Clock-out
+PA8.Signal=RCC_MCO
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=RCC_CRS_Synchronization_Polling.ioc
+ProjectManager.ProjectName=RCC_CRS_Synchronization_Polling
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=RCC_CRS_Synchronization_Polling
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..6187cfaa3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1983582737">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1983582737" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1983582737" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1983582737." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2049458545" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.898757495" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1000141314" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1917492934" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.121747924" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.775562669" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/RCC_CRS_Synchronization_Polling}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1518825880" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.2082347509" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.990537544" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1712669640" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1344488449" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1987582416" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.136249990" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.965662043" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1878959776" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.788927563" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1095152310" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1467467841" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1111228074" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.638316593" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1216066814" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.80773026" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.500151756" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+					</folderInfo>
+				</configuration>
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+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="RCC_CRS_Synchronization_Polling.null.67469534" name="RCC_CRS_Synchronization_Polling"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/.project
new file mode 100644
index 000000000..6f3d7360b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>RCC_CRS_Synchronization_Polling</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>RCC_CRS_Synchronization_Polling.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/RCC_CRS_Synchronization_Polling.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
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+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
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+		</link>
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+		</link>
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+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/main.c
new file mode 100644
index 000000000..c8df48107
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/main.c
@@ -0,0 +1,295 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RCC/RCC_CRS_Synchronization_Polling/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example describes how to use the RCC HAL API to configure the
+  *          system clock (SYSCLK) and modify the clock settings on run time.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+static void CRS_Init(void);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  uint32_t status = RCC_CRS_TIMEOUT;
+  RCC_CRSSynchroInfoTypeDef syncinfo = {0};
+  RCC_CRSInitTypeDef crsinitstruct = {0};
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+
+  /* CRS initialization (enable HSI48 and LSE oscillators and then enable CRS clock */
+  CRS_Init();
+
+  /* HSI48 Synchronization with LSE frequency */
+  crsinitstruct.Prescaler             = RCC_CRS_SYNC_DIV1;
+  crsinitstruct.Source                = RCC_CRS_SYNC_SOURCE_LSE;
+  crsinitstruct.Polarity              = RCC_CRS_SYNC_POLARITY_FALLING;
+  /* F(LSE)=32.768kHz then Reload=(f(Target)/f(LSE))-1= 0x5B7*/
+  crsinitstruct.ReloadValue           = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(HSI48_VALUE, LSE_VALUE);
+  /* Felim value calculated like this FELIM = (fTARGET / fSYNC) * STEP[%] / 100% / 2 with STEP=0.14% then FELIM = 2 */
+  crsinitstruct.ErrorLimitValue       = 2;
+  /* Change the HSI trimming value to see the automatic calibration performed by CRS */
+  crsinitstruct.HSI48CalibrationValue = 0x00;
+
+  /* Start automatic synchronization using polling mode */
+  HAL_RCCEx_CRSConfig(&crsinitstruct);
+
+  /* Wait for synchronization OK event */
+  do
+  {
+    /* Check status of CRS synchronization */
+    /* Timeout is based on F(LSE) then less than 1 ms*/
+    status = HAL_RCCEx_CRSWaitSynchronization(1);
+
+    if ((status & RCC_CRS_TIMEOUT) == RCC_CRS_TIMEOUT)
+    {
+      /* Timeout issue. May have a problem with synchronization frequency */
+      Error_Handler();
+    }
+
+    /* Adapt synchronization input parameters in case of SYNC error or SYNC miss event */
+    if (((status & RCC_CRS_SYNCERR) == RCC_CRS_SYNCERR) || ((status & RCC_CRS_SYNCMISS) == RCC_CRS_SYNCMISS))
+    {
+      HAL_RCCEx_CRSGetSynchronizationInfo(&syncinfo);
+
+      /* User can check different parameters returned in synchronization info structure*/
+      /* and restart a new synchronization in changing input parameters */
+
+      HAL_RCCEx_CRSConfig(&crsinitstruct);
+    }
+  }
+  while ((status & RCC_CRS_SYNCOK) != RCC_CRS_SYNCOK);
+
+  /* Power on LED1 */
+  BSP_LED_On(LED1);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1);
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+  /*Configure GPIO pin : PA8 */
+  GPIO_InitStruct.Pin = GPIO_PIN_8;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  This function initializes the clock configuration for CRS.
+  * @param  None
+  * @retval None
+  */
+static void CRS_Init(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct =  {0};
+
+  HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
+
+  if (RCC_OscInitStruct.HSI48State != RCC_HSI48_ON)
+  {
+    /* Enable HSI48 and LSE Oscillator*/
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE;
+    RCC_OscInitStruct.HSI48State     = RCC_HSI48_ON;
+    RCC_OscInitStruct.LSEState       = RCC_LSE_ON;
+    RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+  }
+
+  /* Enable CRS clock*/
+  __HAL_RCC_CRS_CLK_ENABLE();
+
+  /* Output HSI48 MCO pin(PA8) */
+  HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI48, RCC_MCODIV_1);
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..6f110a195
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,86 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..7cbd51130
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_it.c
@@ -0,0 +1,119 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RCC/RCC_CRS_Synchronization_Polling/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/readme.txt b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/readme.txt
new file mode 100644
index 000000000..2658f5054
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RCC/RCC_CRS_Synchronization_Polling/readme.txt
@@ -0,0 +1,78 @@
+/**
+  @page RCC_CRS_Synchronization_Polling RCC Clock Recovery Service example
+
+  @verbatim
+  ******************************************************************************
+  * @file    RCC/RCC_CRS_Synchronization_Polling/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the RCC Clock Recovery Service example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+Configuration of the clock recovery service (CRS) in Polling mode, using the RCC HAL API.
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+
+Then, HSI48 and LSE oscillators are enabled. In this example CRS will use LSE
+oscillator to calibrate HSI48 frequency.
+When HSI48 and LSE are started, automatic calibration starts and program call the
+polling function to wait for synchronization status.
+
+In this test, there are results which could occur:
+ - few loops occurs up to SYNC OK event (if SYNC WARN, HSI48 trimming value will be
+ automatically modified)
+ - in case of SYNC MISS or SYNC ERROR, there is an issue with synchronization input
+ parameters. In this case, user need to apply new parameters after checking synchronization
+ information and restart the synchronization.
+ - LED3 power on means that a timeout occurred during polling procedure. It may
+ due to an issue with LSE synchronization frequency.
+ - LED1 will finally power on if SYNC OK is returned by CRS.
+
+Note: HSI48 frequency can be checked with oscilloscope using MCO PIN PA.08
+
+@par Keywords
+
+RCC, System, Clock Configuration, CRS, System clock, HSI48, LSE, Oscillator, PLL, Polling
+
+@par Directory contents
+
+  - RCC/RCC_CRS_Synchronization_Polling/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - RCC/RCC_CRS_Synchonization_Polling/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - RCC/RCC_CRS_Synchonization_Polling/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - RCC/RCC_CRS_Synchonization_Polling/Inc/main.h                  Header for main.c module
+  - RCC/RCC_CRS_Synchonization_Polling/Src/stm32g4xx_it.c          Interrupt handlers
+  - RCC/RCC_CRS_Synchonization_Polling/Src/main.c                  Main program
+  - RCC/RCC_CRS_Synchonization_Polling/Src/system_stm32g4xx.c      STM32G4xx system source file
+  - RCC/RCC_CRS_Synchonization_Polling/Src/stm32g4xx_hal_msp.c     HAL MSP module
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx Devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/.extSettings b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/.extSettings
new file mode 100644
index 000000000..db9061393
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI;OPAMP;ADC
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/Project.eww
new file mode 100644
index 000000000..21727f757
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\RNG_MultiRNG.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/RNG_MultiRNG.ewd b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/RNG_MultiRNG.ewd
new file mode 100644
index 000000000..7799d1a5f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/RNG_MultiRNG.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>RNG_MultiRNG</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/RNG_MultiRNG.ewp b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/RNG_MultiRNG.ewp
new file mode 100644
index 000000000..9375edb54
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/RNG_MultiRNG.ewp
@@ -0,0 +1,1167 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>RNG_MultiRNG</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>RNG_MultiRNG/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>RNG_MultiRNG/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>RNG_MultiRNG/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
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+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/main.h
new file mode 100644
index 000000000..6e22eecbb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..339c7cd0e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+#define HAL_OPAMP_MODULE_ENABLED
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+#define HAL_RNG_MODULE_ENABLED
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..e0070b02f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Inc/stm32g4xx_it.h
@@ -0,0 +1,63 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+void EXTI15_10_IRQHandler(void);
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/RNG_MultiRNG.uvoptx b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/RNG_MultiRNG.uvoptx
new file mode 100644
index 000000000..9d9681bc1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/RNG_MultiRNG.uvoptx
@@ -0,0 +1,133 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+  <Target>
+    <TargetName>RNG_MultiRNG</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath />
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll />
+        <sDllPa />
+        <sDlgDll />
+        <sDlgPa />
+        <sIfile />
+        <tDll />
+        <tDllPa />
+        <tDlgDll />
+        <tDlgPa />
+        <tIfile />
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+	    <TargetDriverDllRegistry>
+        <SetRegEntry>
+		        <Number>0</Number>
+		        <Key>ST-LINKIII-KEIL_SWO</Key>
+		        <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+		</SetRegEntry>
+       <SetRegEntry>
+		        <Number>0</Number>
+		        <Key />
+		        <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+		</SetRegEntry>
+ </TargetDriverDllRegistry>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable />
+      <LintConfigFile />
+    </TargetOption>
+  </Target>
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/RNG_MultiRNG.uvprojx b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/RNG_MultiRNG.uvprojx
new file mode 100644
index 000000000..e86acdb02
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/RNG_MultiRNG.uvprojx
@@ -0,0 +1,636 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+  <Target> 
+      <TargetName>RNG_MultiRNG</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec/>
+          <StartupFile/>
+          <FlashDriverDll/>
+          <DeviceId/>
+          <RegisterFile/>
+          <MemoryEnv/>
+          <Cmp/>
+          <Asm/>
+          <Linker/>
+          <OHString/>
+          <InfinionOptionDll/>
+          <SLE66CMisc/>
+          <SLE66AMisc/>
+          <SLE66LinkerMisc/>
+          <SFDFile/>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath/>
+          <IncludePath/>
+          <LibPath/>
+          <RegisterFilePath/>
+          <DBRegisterFilePath/>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>RNG_MultiRNG\Exe\</OutputDirectory>
+          <OutputName>RNG_MultiRNG</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>RNG_MultiRNG/List</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name/>
+            <UserProg2Name/>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name/>
+            <UserProg2Name/>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name/>
+            <UserProg2Name/>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString/>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument/>
+          <IncludeLibraryModules/>
+          <ComprImg/>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+            <RestoreSysVw>1</RestoreSysVw>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>1</RestoreTracepoints> 
+            <RestoreSysVw>1</RestoreSysVw>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>13</TargetSelection>
+          <SimDlls>
+            <CpuDll/>
+            <CpuDllArguments/>
+            <PeripheralDll/>
+            <PeripheralDllArguments/>
+            <InitializationFile/>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll/>
+            <CpuDllArguments/>
+            <PeripheralDll/>
+            <PeripheralDllArguments/>
+            <InitializationFile/>
+            <Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3/>
+          <Flash4/>
+          <pFcarmOut/>
+          <pFcarmGrp/>
+          <pFcArmRoot/>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
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+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
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+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName/>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
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+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
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+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
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+              </Ocm1>
+              <Ocm2>
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+              </Ocm2>
+              <Ocm3>
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+                <StartAddress>0x0</StartAddress>
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+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
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+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress/>
+                <Size/>
+              </IRAM>
+              <IROM>
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+                <StartAddress/>
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+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+                <StartAddress>0x0</StartAddress>
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+                <Size>0x0</Size>
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+                <StartAddress/>
+                <Size/>
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+                <StartAddress>0x0</StartAddress>
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+              </OCR_RVCT10>
+            </OnChipMemories>
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+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
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+            <LinkerInputFile/>
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+        </TargetArmAds>
+      </TargetOption>     
+      <Groups>
+        
+		<Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+ <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+        <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
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+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
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+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
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+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
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+              <FilePath>../readme.txt</FilePath>
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+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
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+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
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+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</FilePath>
+            </File>
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+              <FileName>stm32g4xx_hal_opamp_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</FilePath>
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+              <FileName>stm32g4xx_hal_adc_ex.c</FileName>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c</FilePath>
+            </File>
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+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    	
+    </Target>
+  </Targets>
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="RNG_MultiRNG"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/RNG_MultiRNG.ioc b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/RNG_MultiRNG.ioc
new file mode 100644
index 000000000..de89482f3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/RNG_MultiRNG.ioc
@@ -0,0 +1,122 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=RNG
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_RNG_VS_RNG
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=RNG_MultiRNG.ioc
+ProjectManager.ProjectName=RNG_MultiRNG
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_RNG_Init-RNG-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_RNG_VS_RNG.Mode=RNG_Activate
+VP_RNG_VS_RNG.Signal=RNG_VS_RNG
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=RNG_MultiRNG
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..037b96dfd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.353997079">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.353997079" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.353997079" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.353997079." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.492656388" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1965728982" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.73509982" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1803827943" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.111774587" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1169662059" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1716224495" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.558948007" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1745628888" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.2112337108" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1377083118" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/RNG_MultiRNG}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1736879510" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.324304237" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1667377757" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1593477871" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.317673807" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.543920136" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.605668739" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.249164683" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.600043780" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2058320173" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1153707733" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.981798427" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1776311552" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1555259848" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1505898257" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1627828583" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.840280164" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.445963406" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1462072741" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.386226043" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.269448077" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.510686743" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.462775521" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1758042956" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1672022323" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1072740939" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.548276051">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.548276051" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.548276051" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.548276051." name="/" resourcePath="">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1594971694" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.597629907" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.139207608" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/RNG_MultiRNG}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.314333732" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1028503038" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2107746768" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1103045501" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1777265918" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1335792349" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.2106281997" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
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+							</tool>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.556044644" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.896220021" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.709631389" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.90902069" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1094594244" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.2130201517" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.865273380" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.594521092" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1454467527" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1895085962" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
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+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="RNG_MultiRNG.null.605226304" name="RNG_MultiRNG"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.548276051;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.548276051.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2107746768;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.197757127">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.353997079;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.353997079.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.317673807;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2058320173">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/.project
new file mode 100644
index 000000000..7f3bc1871
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/.project
@@ -0,0 +1,220 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>RNG_MultiRNG</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>RNG_MultiRNG.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/RNG_MultiRNG.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rng.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/main.c
new file mode 100644
index 000000000..9255e5129
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/main.c
@@ -0,0 +1,270 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the RNG HAL API
+  *          to generate 32-bit long random numbers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+RNG_HandleTypeDef hrng;
+
+/* USER CODE BEGIN PV */
+
+/* Used for storing 8 Random 32bit Numbers */
+uint32_t aRandom32bit[8];
+__IO uint8_t    ubUserButtonClickEvent = RESET;  /* Event detection: Set after User Button interrupt */
+__IO uint32_t    RNGStatus = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_RNG_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  uint32_t counter = 0;
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* Initialize LED Error on board */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_RNG_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Configure User push-button in Interrupt mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+
+  while (1)
+  {
+
+    /* Wait for event on push button to perform following actions */
+    while ((ubUserButtonClickEvent) == RESET)
+    {
+      __NOP();
+    }
+    /* Reset variable for next loop iteration */
+    ubUserButtonClickEvent = RESET;
+
+    /* Generate eight 32-bit long random numbers */
+    for (counter = 0; counter < 8; counter++)
+    {
+      if (HAL_RNG_GenerateRandomNumber(&hrng, &aRandom32bit[counter]) != HAL_OK)
+      {
+        /* Random number generation error */
+        Error_Handler();      
+      }
+    }
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief RNG Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RNG_Init(void)
+{
+
+  /* USER CODE BEGIN RNG_Init 0 */
+
+  /* USER CODE END RNG_Init 0 */
+
+  /* USER CODE BEGIN RNG_Init 1 */
+
+  /* USER CODE END RNG_Init 1 */
+  hrng.Instance = RNG;
+  hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
+  if (HAL_RNG_Init(&hrng) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RNG_Init 2 */
+
+  /* USER CODE END RNG_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief EXTI line detection callbacks
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  if (GPIO_Pin == USER_BUTTON_PIN)
+  {
+    /* Set variable to report push button event to main program */
+    ubUserButtonClickEvent = SET;
+    RNGStatus = 1;
+  }
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  RNGStatus = 0xE;
+  while(1)
+  {
+    /* Toggle LED3 */
+    BSP_LED_Toggle(LED3);
+    HAL_Delay(500);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..662cd9d05
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief RNG MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrng: RNG handle pointer
+* @retval None
+*/
+void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hrng->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspInit 0 */
+
+
+  /* USER CODE END RNG_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RNG;
+    PeriphClkInit.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_RNG_CLK_ENABLE();
+  /* USER CODE BEGIN RNG_MspInit 1 */
+
+  /* USER CODE END RNG_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief RNG MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrng: RNG handle pointer
+* @retval None
+*/
+void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng)
+{
+  if(hrng->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspDeInit 0 */
+
+  /* USER CODE END RNG_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RNG_CLK_DISABLE();
+  /* USER CODE BEGIN RNG_MspDeInit 1 */
+
+    /* Enable RNG reset state */
+    __HAL_RCC_RNG_FORCE_RESET();
+
+    /* Release RNG from reset state */
+    __HAL_RCC_RNG_RELEASE_RESET();
+
+  /* USER CODE END RNG_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..9156dd70d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/stm32g4xx_it.c
@@ -0,0 +1,127 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/readme.txt b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/readme.txt
new file mode 100644
index 000000000..01668975e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG/readme.txt
@@ -0,0 +1,76 @@
+/**
+  @page RNG_MultiRNG Multiple Random Numbers Generator example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of multiple random numbers generation example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+Configuration of the RNG using the HAL API. This example uses the RNG to generate 32-bit long random numbers.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 150 MHz.
+
+The RNG peripheral configuration is ensured by the HAL_RNG_Init() function.
+The latter is calling the HAL_RNG_MspInit() function which implements
+the configuration of the needed RNG resources according to the used hardware (CLOCK, 
+GPIO, DMA and NVIC). You may update this function to change RNG configuration.
+
+After startup, user is asked to press User push-button.
+The 8-entry array aRandom32bit[] is filled up by 32-bit long random numbers 
+at each User push-button press.
+
+ 
+The random numbers can be displayed on the debugger in aRandom32bit variable.
+
+In case of error, LED3 is toggling at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, RNG, Random, FIPS PUB 140-2, Analog Random number generator, Entropy, Period
+
+@par Directory contents 
+
+  - RNG/RNG_MultiRNG/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - RNG/RNG_MultiRNG/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - RNG/RNG_MultiRNG/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - RNG/RNG_MultiRNG/Inc/main.h                  Header for main.c module
+  - RNG/RNG_MultiRNG/Src/stm32g4xx_it.c          Interrupt handlers
+  - RNG/RNG_MultiRNG/Src/main.c                  Main program
+  - RNG/RNG_MultiRNG/Src/stm32g4xx_hal_msp.c     HAL MSP module 
+  - RNG/RNG_MultiRNG/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+     
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+ 
+ */
+ 
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/.extSettings b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/.extSettings
new file mode 100644
index 000000000..db9061393
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI;OPAMP;ADC
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/Project.eww
new file mode 100644
index 000000000..68567f374
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\RNG_MultiRNG_IT.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/RNG_MultiRNG_IT.ewd b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/RNG_MultiRNG_IT.ewd
new file mode 100644
index 000000000..d9c41d942
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/RNG_MultiRNG_IT.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>RNG_MultiRNG_IT</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
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+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/RNG_MultiRNG_IT.ewp b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/RNG_MultiRNG_IT.ewp
new file mode 100644
index 000000000..75fb9f926
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/RNG_MultiRNG_IT.ewp
@@ -0,0 +1,1167 @@
+<?xml version="1.0" encoding="UTF-8"?>
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+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>RNG_MultiRNG_IT.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/main.h
new file mode 100644
index 000000000..29f7efc4b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/main.h
@@ -0,0 +1,72 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG_IT/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+
+#include "stm32g474e_eval.h"
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..339c7cd0e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+#define HAL_OPAMP_MODULE_ENABLED
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+#define HAL_RNG_MODULE_ENABLED
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..0cab23382
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void RNG_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+
+void RNG_IRQHandler(void);
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/RNG_MultiRNG_IT.uvoptx b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/RNG_MultiRNG_IT.uvoptx
new file mode 100644
index 000000000..a17e84608
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/RNG_MultiRNG_IT.uvoptx
@@ -0,0 +1,133 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+  <Target>
+    <TargetName>RNG_MultiRNG_IT</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath />
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll />
+        <sDllPa />
+        <sDlgDll />
+        <sDlgPa />
+        <sIfile />
+        <tDll />
+        <tDllPa />
+        <tDlgDll />
+        <tDlgPa />
+        <tIfile />
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+	    <TargetDriverDllRegistry>
+        <SetRegEntry>
+		        <Number>0</Number>
+		        <Key>ST-LINKIII-KEIL_SWO</Key>
+		        <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+		</SetRegEntry>
+       <SetRegEntry>
+		        <Number>0</Number>
+		        <Key />
+		        <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+		</SetRegEntry>
+ </TargetDriverDllRegistry>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable />
+      <LintConfigFile />
+    </TargetOption>
+  </Target>
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/RNG_MultiRNG_IT.uvprojx b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/RNG_MultiRNG_IT.uvprojx
new file mode 100644
index 000000000..11132160e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/RNG_MultiRNG_IT.uvprojx
@@ -0,0 +1,636 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+  <Target> 
+      <TargetName>RNG_MultiRNG_IT</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec/>
+          <StartupFile/>
+          <FlashDriverDll/>
+          <DeviceId/>
+          <RegisterFile/>
+          <MemoryEnv/>
+          <Cmp/>
+          <Asm/>
+          <Linker/>
+          <OHString/>
+          <InfinionOptionDll/>
+          <SLE66CMisc/>
+          <SLE66AMisc/>
+          <SLE66LinkerMisc/>
+          <SFDFile/>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath/>
+          <IncludePath/>
+          <LibPath/>
+          <RegisterFilePath/>
+          <DBRegisterFilePath/>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>RNG_MultiRNG_IT\Exe\</OutputDirectory>
+          <OutputName>RNG_MultiRNG_IT</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>RNG_MultiRNG_IT/List</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name/>
+            <UserProg2Name/>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name/>
+            <UserProg2Name/>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name/>
+            <UserProg2Name/>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString/>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument/>
+          <IncludeLibraryModules/>
+          <ComprImg/>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+            <RestoreSysVw>1</RestoreSysVw>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>1</RestoreTracepoints> 
+            <RestoreSysVw>1</RestoreSysVw>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>13</TargetSelection>
+          <SimDlls>
+            <CpuDll/>
+            <CpuDllArguments/>
+            <PeripheralDll/>
+            <PeripheralDllArguments/>
+            <InitializationFile/>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll/>
+            <CpuDllArguments/>
+            <PeripheralDll/>
+            <PeripheralDllArguments/>
+            <InitializationFile/>
+            <Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3/>
+          <Flash4/>
+          <pFcarmOut/>
+          <pFcarmGrp/>
+          <pFcArmRoot/>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
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+            <AdsLszi>1</AdsLszi>
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+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName/>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
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+            <Ro2Chk>0</Ro2Chk>
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+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
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+              <Ocm1>
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+                <StartAddress/>
+                <Size/>
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+                <StartAddress/>
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+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
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+              <OCR_RVCT1>
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+                <StartAddress>0x0</StartAddress>
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+                <StartAddress/>
+                <Size/>
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+                <StartAddress>0x0</StartAddress>
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+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector/>
+          </ArmAdsMisc>
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+            <VariousControls>
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+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine/>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
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+          <Aads>
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+            <VariousControls>
+              <MiscControls/>
+              <Define/>
+              <Undefine/>
+              <IncludePath/>
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+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase/>
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+            <IncludeLibs/>
+            <IncludeLibsPath/>
+            <Misc/>
+            <LinkerInputFile/>
+            <DisabledWarnings/>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>     
+      <Groups>
+        
+		<Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+ <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+        <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rng.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    	
+    </Target>
+  </Targets>
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="RNG_MultiRNG_IT"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/RNG_MultiRNG_IT.ioc b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/RNG_MultiRNG_IT.ioc
new file mode 100644
index 000000000..940d1552b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/RNG_MultiRNG_IT.ioc
@@ -0,0 +1,123 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=RNG
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_RNG_VS_RNG
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.RNG_IRQn=true\:15\:0\:true\:false\:true\:true\:true\:true
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=RNG_MultiRNG_IT.ioc
+ProjectManager.ProjectName=RNG_MultiRNG_IT
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_RNG_Init-RNG-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_RNG_VS_RNG.Mode=RNG_Activate
+VP_RNG_VS_RNG.Signal=RNG_VS_RNG
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=RNG_MultiRNG_IT
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..f534b362a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1947522968">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1947522968" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1947522968" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1947522968." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.269141294" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1188907186" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1106497468" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.700448407" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.997001832" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1849622208" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.715431592" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.877691961" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1053040004" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.251774591" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1959300039" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/RNG_MultiRNG_IT}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1962673673" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.888447222" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.504559687" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.387839365" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1961008329" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.930955626" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.2113850019" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1056750612" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.46095606" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2073021291" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1513131015" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.869563812" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1225088066" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.554104500" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.853236289" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1545284864" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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+	<storageModule moduleId="scannerConfiguration">
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+	<storageModule moduleId="refreshScope"/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/.project
new file mode 100644
index 000000000..49d59c1da
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/.project
@@ -0,0 +1,220 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>RNG_MultiRNG_IT</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>RNG_MultiRNG_IT.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/RNG_MultiRNG_IT.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rng.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/main.c
new file mode 100644
index 000000000..99357b48a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/main.c
@@ -0,0 +1,311 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG_IT/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the RNG HAL API
+  *          to generate 32-bit long random numbers in interruption mode.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* Length of array of 32-bit long random numbers to be filled up */
+#define N  8
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+RNG_HandleTypeDef hrng;
+
+/* USER CODE BEGIN PV */
+
+/* Used for storing 8 Random 32bit Numbers */
+__IO uint32_t aRandom32bit[N];
+
+/* Used to counter the random numbers */
+uint32_t counter = 0;
+
+__IO uint8_t    ubUserButtonClickEvent = RESET;  /* Event detection: Set after User Button interrupt */
+__IO uint32_t    RNGStatus = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_RNG_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+  
+  /* Initialize LED Error on board */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_RNG_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Configure User push-button in Interrupt mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+
+    /* Wait for event on push button to perform following actions */
+    while ((ubUserButtonClickEvent) == RESET)
+    {
+      __NOP();
+    }
+    /* Reset variable for next loop iteration */
+    ubUserButtonClickEvent = RESET;
+
+    /* Generate eight 32-bit long random numbers */
+    counter = 0;
+    /* Enable RNG peripheral IT */
+    if (HAL_RNG_GenerateRandomNumber_IT(&hrng) != HAL_OK)
+    {
+      /* RNG peripheral start-up error */
+      Error_Handler();
+    }
+  
+    /* HAL_RNG_ReadyCallback() API retrieves the random numbers,
+      stores them in aRandom32bit[] array and 
+      accordingly increases counter variable. */
+      while (counter != N);
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+    
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief RNG Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RNG_Init(void)
+{
+
+  /* USER CODE BEGIN RNG_Init 0 */
+
+  /* USER CODE END RNG_Init 0 */
+
+  /* USER CODE BEGIN RNG_Init 1 */
+
+  /* USER CODE END RNG_Init 1 */
+  hrng.Instance = RNG;
+  hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
+  if (HAL_RNG_Init(&hrng) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RNG_Init 2 */
+
+  /* USER CODE END RNG_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief EXTI line detection callbacks
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  if (GPIO_Pin == USER_BUTTON_PIN)
+  {
+    /* Set variable to report push button event to main program */
+    ubUserButtonClickEvent = SET;
+    RNGStatus = 1;
+  }
+}
+
+
+/**
+  * @brief  Data Ready callback in non-blocking mode. 
+  * @param  hrng: pointer to RNG_HandleTypeDef structure.  
+  * @retval None
+  */
+void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit)
+{
+
+  /* Straight random number retrieval */
+  aRandom32bit[counter] = random32bit;
+  counter++;
+
+  /* HAL_RNG_IRQHandler() disables IT at each interruption,
+     so, need to re-enable IT in callback to get several random numbers in a row */
+  if (counter != N)
+  {
+    HAL_RNG_GenerateRandomNumber_IT(hrng);
+  } 
+  
+}
+
+/**
+  * @brief  RNG error callback.
+  * @param  hrng: pointer to RNG_HandleTypeDef structure. 
+  * @retval None
+  */
+void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng)
+{
+  Error_Handler();
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  RNGStatus = 0XE;
+  while(1) 
+  {
+    /* Toggle LED3 */
+    BSP_LED_Toggle(LED3);
+    HAL_Delay(500);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..6529c8e9f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,146 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG_IT/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief RNG MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrng: RNG handle pointer
+* @retval None
+*/
+void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hrng->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspInit 0 */
+  /* USER CODE END RNG_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RNG;
+    PeriphClkInit.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_RNG_CLK_ENABLE();
+    /* RNG interrupt Init */
+    HAL_NVIC_SetPriority(RNG_IRQn, 15, 0);
+    HAL_NVIC_EnableIRQ(RNG_IRQn);
+  /* USER CODE BEGIN RNG_MspInit 1 */
+
+  /* USER CODE END RNG_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief RNG MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrng: RNG handle pointer
+* @retval None
+*/
+void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng)
+{
+  if(hrng->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspDeInit 0 */
+
+  /* USER CODE END RNG_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RNG_CLK_DISABLE();
+
+    /* RNG interrupt DeInit */
+    HAL_NVIC_DisableIRQ(RNG_IRQn);
+  /* USER CODE BEGIN RNG_MspDeInit 1 */
+
+  /* USER CODE END RNG_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..7ad44bb8a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/stm32g4xx_it.c
@@ -0,0 +1,140 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG_IT/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern RNG_HandleTypeDef hrng;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles RNG global interrupt.
+  */
+void RNG_IRQHandler(void)
+{
+  /* USER CODE BEGIN RNG_IRQn 0 */
+
+  /* USER CODE END RNG_IRQn 0 */
+  HAL_RNG_IRQHandler(&hrng);
+  /* USER CODE BEGIN RNG_IRQn 1 */
+
+  /* USER CODE END RNG_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/readme.txt b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/readme.txt
new file mode 100644
index 000000000..5b06c9a9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RNG/RNG_MultiRNG_IT/readme.txt
@@ -0,0 +1,78 @@
+/**
+  @page RNG_MultiRNG_IT Multiple Random Numbers Generator under interruption example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    RNG/RNG_MultiRNG_IT/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of multiple random numbers generation under interruption example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+Configuration of the RNG using the HAL API. This example uses RNG interrupts to generate 32-bit long random numbers.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 150 MHz.
+
+The RNG peripheral configuration is ensured by the HAL_RNG_Init() function.
+The latter is calling the HAL_RNG_MspInit() function which implements
+the configuration of the needed RNG resources according to the used hardware (CLOCK, 
+GPIO, DMA and NVIC). You may update this function to change RNG configuration.
+
+After startup, user is asked to press User push-button.
+The 8-entry array aRandom32bit[] is filled up by 32-bit long random numbers 
+at each User push-button press.
+
+Each random number generation triggers an interruption which is handled by 
+HAL_RNG_ReadyDataCallback() API to retrieve and store the random number.
+ 
+The random numbers can be displayed on the debugger in aRandom32bit variable.
+
+In case of error, LED3 is toggling at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, RNG, Random, FIPS PUB 140-2, Analog Random number generator, Entropy, Period, interrupt
+
+@par Directory contents 
+
+  - RNG/RNG_MultiRNG_IT/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - RNG/RNG_MultiRNG_IT/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - RNG/RNG_MultiRNG_IT/Inc/main.h                  Header for main.c module
+  - RNG/RNG_MultiRNG_IT/Src/stm32g4xx_it.c          Interrupt handlers
+  - RNG/RNG_MultiRNG_IT/Src/main.c                  Main program
+  - RNG/RNG_MultiRNG_IT/Src/stm32g4xx_hal_msp.c     HAL MSP module 
+  - RNG/RNG_MultiRNG_IT/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+     
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+ 
+ */
+ 
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/.extSettings b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/Project.eww
new file mode 100644
index 000000000..aa4c4e04d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\RTC_Alarm.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/RTC_Alarm.ewd b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/RTC_Alarm.ewd
new file mode 100644
index 000000000..968ccd984
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/RTC_Alarm.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>RTC_Alarm</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/RTC_Alarm.ewp b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/RTC_Alarm.ewp
new file mode 100644
index 000000000..04fe20f2d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/RTC_Alarm.ewp
@@ -0,0 +1,1155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>RTC_Alarm</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>RTC_Alarm/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>RTC_Alarm/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>RTC_Alarm/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
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+        <version>1</version>
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+          <name>OCOutputOverride</name>
+          <state>1</state>
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+          <state>RTC_Alarm.hex</state>
+        </option>
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+        </option>
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+      </data>
+    </settings>
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+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
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+    </settings>
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+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
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+    </settings>
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+      <data>
+        <version>20</version>
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+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
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+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
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+          <name>IlinkProgramEntryLabel</name>
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+          <name>FillerEnd</name>
+          <state>0x0</state>
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+          <version>0</version>
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+          <name>CrcAlign</name>
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+          <name>CrcPoly</name>
+          <state>0x11021</state>
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+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
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+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkCmsis</name>
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+          <state>1</state>
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+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
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+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
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+          <version>0</version>
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+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
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+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
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+          <name>IarchiveOverride</name>
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+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/main.h
new file mode 100644
index 000000000..0a8a0ce9f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/main.h
@@ -0,0 +1,84 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include <stdio.h>
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* Defines related to Clock configuration */
+/* Uncomment to enable the adequate Clock Source */
+#define RTC_CLOCK_SOURCE_LSI
+/*#define RTC_CLOCK_SOURCE_LSE*/
+
+#ifdef RTC_CLOCK_SOURCE_LSI
+#define RTC_ASYNCH_PREDIV    0x7F
+#define RTC_SYNCH_PREDIV     0xF9
+#endif
+
+#ifdef RTC_CLOCK_SOURCE_LSE
+#define RTC_ASYNCH_PREDIV  0x7F
+#define RTC_SYNCH_PREDIV   0x00FF
+#endif
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..17cbb0bf6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..054ea6313
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void RTC_Alarm_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/RTC_Alarm.uvoptx b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/RTC_Alarm.uvoptx
new file mode 100644
index 000000000..0d52f452c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/RTC_Alarm.uvoptx
@@ -0,0 +1,652 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>RTC_Alarm</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <WatchWindow1>
+        <Ww>
+          <count>0</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>aShowTime,0x0A</ItemText>
+        </Ww>
+      </WatchWindow1>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
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+      <bShared>0</bShared>
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+  </Group>
+
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diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/RTC_Alarm.uvprojx b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/RTC_Alarm.uvprojx
new file mode 100644
index 000000000..a7f409b2f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/RTC_Alarm.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>RTC_Alarm</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>RTC_Alarm\Exe\</OutputDirectory>
+          <OutputName>RTC_Alarm</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
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+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
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+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
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+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
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+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="RTC_Alarm"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/RTC_Alarm.ioc b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/RTC_Alarm.ioc
new file mode 100644
index 000000000..ccf5db0d6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/RTC_Alarm.ioc
@@ -0,0 +1,161 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=RTC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_RTC_VS_RTC_Activate
+Mcu.Pin1=VP_RTC_VS_RTC_Calendar
+Mcu.Pin2=VP_RTC_VS_RTC_Alarm_A_Intern
+Mcu.Pin3=VP_SYS_VS_Systick
+Mcu.Pin4=VP_SYS_VS_DBSignals
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.RTC_Alarm_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=RTC_Alarm.ioc
+ProjectManager.ProjectName=RTC_Alarm
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_RTC_Init-RTC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+RTC.Alarm-Alarm\ A=RTC_ALARM_A
+RTC.AlarmDateWeekDay=RTC_WEEKDAY_MONDAY
+RTC.AlarmDateWeekDay-Alarm\ A=RTC_WEEKDAY_MONDAY
+RTC.AlarmDateWeekDaySel=RTC_ALARMDATEWEEKDAYSEL_WEEKDAY
+RTC.AlarmDateWeekDaySel-Alarm\ A=RTC_ALARMDATEWEEKDAYSEL_WEEKDAY
+RTC.AlarmSubSecondMask=RTC_ALARMSUBSECONDMASK_NONE
+RTC.AlarmSubSecondMask-Alarm\ A=RTC_ALARMSUBSECONDMASK_ALL
+RTC.AsynchPrediv=RTC_ASYNCH_PREDIV
+RTC.Date=18
+RTC.DayLightSaving=RTC_DAYLIGHTSAVING_NONE
+RTC.Format=RTC_FORMAT_BCD
+RTC.HourFormat=RTC_HOURFORMAT_24
+RTC.Hours=2
+RTC.Hours_A=2
+RTC.Hours_A-Alarm\ A=0
+RTC.IPParameters=HourFormat,AsynchPrediv,SynchPrediv,Format,Hours,Minutes,Seconds,DayLightSaving,StoreOperation,WeekDay,Month,Date,Year,Hours_A-Alarm A,Minutes_A-Alarm A,Seconds_A-Alarm A,SubSeconds_A-Alarm A,AlarmSubSecondMask-Alarm A,AlarmDateWeekDaySel-Alarm A,AlarmDateWeekDay-Alarm A,Alarm-Alarm A,Weekday,Hours_A,Minutes_A,Seconds_A,SubSeconds_A,AlarmSubSecondMask,AlarmDateWeekDaySel,AlarmDateWeekDay
+RTC.IPParametersWithoutCheck=AsynchPrediv,SynchPrediv
+RTC.Minutes=20
+RTC.Minutes_A=20
+RTC.Minutes_A-Alarm\ A=0
+RTC.Month=RTC_MONTH_FEBRUARY
+RTC.Seconds=0
+RTC.Seconds_A=30
+RTC.Seconds_A-Alarm\ A=0
+RTC.StoreOperation=RTC_STOREOPERATION_RESET
+RTC.SubSeconds_A=56
+RTC.SubSeconds_A-Alarm\ A=0
+RTC.SynchPrediv=RTC_SYNCH_PREDIV
+RTC.WeekDay=RTC_WEEKDAY_MONDAY
+RTC.Weekday=RTC_WEEKDAY_TUESDAY
+RTC.Year=14
+VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
+VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
+VP_RTC_VS_RTC_Alarm_A_Intern.Mode=Alarm A
+VP_RTC_VS_RTC_Alarm_A_Intern.Signal=RTC_VS_RTC_Alarm_A_Intern
+VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar
+VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=RTC_Alarm
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..a62ed1735
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1101240328">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1101240328" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1101240328" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1101240328." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1995979952" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.229567710" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.713451482" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.2113664843" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.765029036" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.738159034" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.985033292" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1443544059" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.258702508" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
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+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="RTC_Alarm.null.389990786" name="RTC_Alarm"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.433771798;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.433771798.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.339124135;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.961230916">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1101240328;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1101240328.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2049511844;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2033246448">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/.project
new file mode 100644
index 000000000..0a36bf3c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>RTC_Alarm</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>RTC_Alarm.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/RTC_Alarm.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/main.c
new file mode 100644
index 000000000..eacb99513
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/main.c
@@ -0,0 +1,318 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx RTC HAL API to configure
+  *          Time and Date.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+RTC_HandleTypeDef hrtc;
+
+/* USER CODE BEGIN PV */
+/* Buffer used for displaying Time */
+uint8_t aShowTime[16] = "hh:ms:ss";
+__IO uint32_t RTCStatus = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_RTC_Init(void);
+/* USER CODE BEGIN PFP */
+static void RTC_TimeShow(uint8_t *showtime);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_RTC_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  RTCStatus = 1;
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Display the updated Time */
+    RTC_TimeShow(aShowTime);
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = 64;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief RTC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RTC_Init(void)
+{
+
+  /* USER CODE BEGIN RTC_Init 0 */
+
+  /* USER CODE END RTC_Init 0 */
+
+  RTC_TimeTypeDef sTime = {0};
+  RTC_DateTypeDef sDate = {0};
+  RTC_AlarmTypeDef sAlarm = {0};
+
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = RTC_ASYNCH_PREDIV;
+  hrtc.Init.SynchPrediv = RTC_SYNCH_PREDIV;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  hrtc.Init.OutPutPullUp = RTC_OUTPUT_PULLUP_NONE;
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* USER CODE BEGIN Check_RTC_BKUP */
+
+  /* USER CODE END Check_RTC_BKUP */
+
+  /** Initialize RTC and set the Time and Date
+  */
+  sTime.Hours = 0x2;
+  sTime.Minutes = 0x20;
+  sTime.Seconds = 0x0;
+  sTime.SubSeconds = 0x0;
+  sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
+  sTime.StoreOperation = RTC_STOREOPERATION_RESET;
+  if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sDate.WeekDay = RTC_WEEKDAY_MONDAY;
+  sDate.Month = RTC_MONTH_FEBRUARY;
+  sDate.Date = 0x18;
+  sDate.Year = 0x14;
+  if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Enable the Alarm A
+  */
+  sAlarm.AlarmTime.Hours = 0x2;
+  sAlarm.AlarmTime.Minutes = 0x20;
+  sAlarm.AlarmTime.Seconds = 0x30;
+  sAlarm.AlarmTime.SubSeconds = 0x56;
+  sAlarm.AlarmMask = RTC_ALARMMASK_NONE;
+  sAlarm.AlarmSubSecondMask = RTC_ALARMSUBSECONDMASK_ALL;
+  sAlarm.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_WEEKDAY;
+  sAlarm.AlarmDateWeekDay = RTC_WEEKDAY_MONDAY;
+  sAlarm.Alarm = RTC_ALARM_A;
+  if (HAL_RTC_SetAlarm_IT(&hrtc, &sAlarm, RTC_FORMAT_BCD) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+
+  /* USER CODE END RTC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Alarm callback
+  * @param  hrtc : RTC handle
+  * @retval None
+  */
+void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
+{
+
+  /* Turn LED1 on: Alarm generation */
+  BSP_LED_On(LED1);
+
+
+}
+
+/**
+  * @brief  Display the current time.
+  * @param  showtime : pointer to buffer
+  * @retval None
+  */
+static void RTC_TimeShow(uint8_t *showtime)
+{
+  RTC_DateTypeDef sdatestructureget;
+  RTC_TimeTypeDef stimestructureget;
+
+  /* Get the RTC current Time */
+  HAL_RTC_GetTime(&hrtc, &stimestructureget, RTC_FORMAT_BIN);
+  /* Get the RTC current Date */
+  HAL_RTC_GetDate(&hrtc, &sdatestructureget, RTC_FORMAT_BIN);
+  /* Display time Format : hh:mm:ss */
+  sprintf((char *)showtime, "%02d:%02d:%02d", stimestructureget.Hours, stimestructureget.Minutes, stimestructureget.Seconds);
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  RTCStatus = 0xE;
+  while (1)
+  {
+    /* Toggle LED3 with a period of one second */
+    BSP_LED_Toggle(LED3);
+    HAL_Delay(1000);
+
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..267c7d761
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,197 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+#ifdef RTC_CLOCK_SOURCE_LSE
+static uint32_t RtcClockSource = RCC_RTCCLKSOURCE_LSE;
+#elif defined (RTC_CLOCK_SOURCE_LSI)
+static uint32_t RtcClockSource = RCC_RTCCLKSOURCE_LSI;
+#endif
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief RTC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+    RCC_OscInitTypeDef        RCC_OscInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct = {0};
+
+    /* Enables the PWR Clock and Enables access to the backup domain */
+    /* To enable access on RTC registers */
+    __HAL_RCC_PWR_CLK_ENABLE();
+    HAL_PWR_EnableBkUpAccess();
+    /* Get RTC clock configuration */
+    HAL_RCCEx_GetPeriphCLKConfig(&PeriphClkInitStruct);
+
+    /*In case of RTC clock already enable, make sure it's the good one */
+    if (PeriphClkInitStruct.RTCClockSelection == RtcClockSource)
+    {
+      /* Do nothing */
+    }
+    else
+    {
+      PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+
+      /* If selected source was previously the opposite source clock, first select none*/
+      if (PeriphClkInitStruct.RTCClockSelection != RCC_RTCCLKSOURCE_NONE)
+      {
+        PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_NONE;
+        if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+        {
+          Error_Handler();
+        }
+      }
+      /* Configure LSE/LSI as RTC clock source */
+#ifdef RTC_CLOCK_SOURCE_LSE
+      RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+      RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+      RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+      RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
+#elif defined (RTC_CLOCK_SOURCE_LSI)
+      RCC_OscInitStruct.OscillatorType =  RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+      RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+      RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+      RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+#else
+#error Please select the RTC Clock source inside the main.h file
+#endif /*RTC_CLOCK_SOURCE_LSE*/
+
+      if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+      {
+        Error_Handler();
+      }
+
+      PeriphClkInitStruct.RTCClockSelection = RtcClockSource;
+      if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+      {
+        Error_Handler();
+      }
+    }
+
+  /* USER CODE END RTC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+    __HAL_RCC_RTCAPB_CLK_ENABLE();
+    /* RTC interrupt Init */
+    HAL_NVIC_SetPriority(RTC_Alarm_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
+  /* USER CODE BEGIN RTC_MspInit 1 */
+
+
+  /* USER CODE END RTC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief RTC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspDeInit 0 */
+
+  /* USER CODE END RTC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RTC_DISABLE();
+    __HAL_RCC_RTCAPB_CLK_DISABLE();
+
+    /* RTC interrupt DeInit */
+    HAL_NVIC_DisableIRQ(RTC_Alarm_IRQn);
+  /* USER CODE BEGIN RTC_MspDeInit 1 */
+
+  /* USER CODE END RTC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..b0e2306de
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/stm32g4xx_it.c
@@ -0,0 +1,133 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern RTC_HandleTypeDef hrtc;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles RTC alarm interrupt through EXTI line 17.
+  */
+void RTC_Alarm_IRQHandler(void)
+{
+  /* USER CODE BEGIN RTC_Alarm_IRQn 0 */
+
+  /* USER CODE END RTC_Alarm_IRQn 0 */
+  HAL_RTC_AlarmIRQHandler(&hrtc);
+  /* USER CODE BEGIN RTC_Alarm_IRQn 1 */
+
+  /* USER CODE END RTC_Alarm_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/readme.txt b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/readme.txt
new file mode 100644
index 000000000..4b8c38551
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Alarm/readme.txt
@@ -0,0 +1,98 @@
+/**
+  @page RTC_Alarm RTC Alarm Example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the RTC Alarm example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+Configuration and generation of an RTC alarm using the RTC HAL API.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+The RTC peripheral configuration is ensured by the HAL_RTC_Init() function.
+This later is calling the HAL_RTC_MspInit()function which core is implementing
+the configuration of the needed RTC resources according to the used hardware (CLOCK, 
+PWR, RTC clock source and BackUp). You may update this function to change RTC configuration.
+
+@note LSI oscillator clock is used as RTC clock source by default.
+      The user can use also LSE as RTC clock source. The user uncomment the adequate 
+      line on the main.h file.
+      @code
+        #define RTC_CLOCK_SOURCE_LSI  
+        /* #define RTC_CLOCK_SOURCE_LSE */
+      @endcode
+      LSI oscillator clock is delivered by a 32 kHz RC.
+      LSE (when available on board) is delivered by a 32.768 kHz crystal.
+
+HAL_RTC_SetDate() and HAL_RTC_SetTime() functions are called to initialize the 
+time and the date.
+HAL_RTC_SetAlarm_IT() function is then called to initialize the Alarm feature with 
+interrupt mode.
+
+In this example, the Time is set to 02:20:00 and the Alarm must be generated after 
+30 seconds on 02:20:30.
+
+LED1 is turned ON when the RTC Alarm is generated correctly.
+The current time is updated and displayed on the debugger in aShowTime variable.
+In case of error, LED3 is toggled with a period of one second.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+System, RTC, Alarm, wakeup timer, Backup domain, Counter, LSE, LSI
+
+@par Directory contents 
+
+  - RTC/RTC_Alarm/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - RTC/RTC_Alarm/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - RTC/RTC_Alarm/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - RTC/RTC_Alarm/Inc/main.h                        Header for main.c module  
+  - RTC/RTC_Alarm/Src/stm32g4xx_it.c          Interrupt handlers
+  - RTC/RTC_Alarm/Src/main.c                        Main program
+  - RTC/RTC_Alarm/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - RTC/RTC_Alarm/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B 
+    board and can be easily tailored to any other supported device 
+    and development board.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
+ 
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/.extSettings b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/Project.eww
new file mode 100644
index 000000000..735101554
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\RTC_Calendar.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/RTC_Calendar.ewd b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/RTC_Calendar.ewd
new file mode 100644
index 000000000..a836240a1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/RTC_Calendar.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>RTC_Calendar</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/RTC_Calendar.ewp b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/RTC_Calendar.ewp
new file mode 100644
index 000000000..cf364de19
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/RTC_Calendar.ewp
@@ -0,0 +1,1155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>RTC_Calendar</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>RTC_Calendar/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>RTC_Calendar/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>RTC_Calendar/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
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+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
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+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
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+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
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+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
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+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>RTC_Calendar.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>RTC_Calendar.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
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+          <name>FillerStart</name>
+          <state>0x0</state>
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+          <name>FillerEnd</name>
+          <state>0x0</state>
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+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
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+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
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+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
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+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/main.h
new file mode 100644
index 000000000..e6aaedbc5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/main.h
@@ -0,0 +1,83 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Calendar/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include <stdio.h>
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Defines related to Clock configuration */
+/* Uncomment to enable the adequate Clock Source */
+#define RTC_CLOCK_SOURCE_LSI
+/*#define RTC_CLOCK_SOURCE_LSE*/
+
+#ifdef RTC_CLOCK_SOURCE_LSI
+#define RTC_ASYNCH_PREDIV    0x7C
+#define RTC_SYNCH_PREDIV     0xF9
+#endif
+#ifdef RTC_CLOCK_SOURCE_LSE
+#define RTC_ASYNCH_PREDIV  0x7F
+#define RTC_SYNCH_PREDIV   0xFF
+#endif
+
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..17cbb0bf6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..1fa237a1d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Calendar/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/RTC_Calendar.uvoptx b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/RTC_Calendar.uvoptx
new file mode 100644
index 000000000..1a8d8ce62
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/RTC_Calendar.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>RTC_Calendar</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/RTC_Calendar.uvprojx b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/RTC_Calendar.uvprojx
new file mode 100644
index 000000000..94f640d91
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/RTC_Calendar.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>RTC_Calendar</TargetName>
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+      <ToolsetName>ARM-ADS</ToolsetName>
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+          <Vendor>STMicroelectronics</Vendor>
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+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <DeviceId></DeviceId>
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+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
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+          <OutputName>RTC_Calendar</OutputName>
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+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="RTC_Calendar"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/RTC_Calendar.ioc b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/RTC_Calendar.ioc
new file mode 100644
index 000000000..bf7429885
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/RTC_Calendar.ioc
@@ -0,0 +1,141 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=RTC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_RTC_VS_RTC_Activate
+Mcu.Pin1=VP_RTC_VS_RTC_Calendar
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=RTC_Calendar.ioc
+ProjectManager.ProjectName=RTC_Calendar
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_RTC_Init-RTC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+RTC.AsynchPrediv=RTC_ASYNCH_PREDIV
+RTC.Date=16
+RTC.DayLightSaving=RTC_DAYLIGHTSAVING_NONE
+RTC.Format=RTC_FORMAT_BCD
+RTC.HourFormat=RTC_HOURFORMAT_24
+RTC.Hours=2
+RTC.IPParameters=HourFormat,AsynchPrediv,SynchPrediv,Format,Hours,Minutes,Seconds,DayLightSaving,StoreOperation,WeekDay,Month,Date,Year
+RTC.IPParametersWithoutCheck=AsynchPrediv,SynchPrediv
+RTC.Minutes=0
+RTC.Month=RTC_MONTH_APRIL
+RTC.Seconds=0
+RTC.StoreOperation=RTC_STOREOPERATION_RESET
+RTC.SynchPrediv=RTC_SYNCH_PREDIV
+RTC.WeekDay=RTC_WEEKDAY_MONDAY
+RTC.Year=18
+VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
+VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
+VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar
+VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=RTC_Calendar
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..db83998e6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.843564547" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1379833391" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.972722879" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1206048213" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1755993384" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1265280245" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1026679622" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1067920297" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.212358305" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.879373575" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.889603171" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.143922736" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.812313713" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.143570488" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="RTC_Calendar.null.1229832607" name="RTC_Calendar"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1363749713;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1363749713.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2066512903;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.957307190">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2096916694;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.2096916694.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1079575644;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.624515982">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/.project
new file mode 100644
index 000000000..eb371d294
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>RTC_Calendar</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>RTC_Calendar.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/RTC_Calendar.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/main.c
new file mode 100644
index 000000000..77e9aefd8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/main.c
@@ -0,0 +1,302 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Calendar/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx RTC HAL API to configure
+  *          Time and Date.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+RTC_HandleTypeDef hrtc;
+
+/* USER CODE BEGIN PV */
+/* Buffers used for displaying Time and Date */
+uint8_t aShowTime[16] = "hh:ms:ss";
+uint8_t aShowDate[16] = "dd-mm-yyyy";
+__IO uint32_t RTCStatus = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_RTC_Init(void);
+/* USER CODE BEGIN PFP */
+static void RTC_CalendarShow(uint8_t *showtime, uint8_t *showdate);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* Configure LED1 */
+  BSP_LED_Init(LED1);
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_RTC_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Turn on LED1*/
+  BSP_LED_On(LED1);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  RTCStatus = 1;
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Display the updated Time and Date */
+    RTC_CalendarShow(aShowTime, aShowDate);
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = 64;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief RTC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RTC_Init(void)
+{
+
+  /* USER CODE BEGIN RTC_Init 0 */
+
+  /* USER CODE END RTC_Init 0 */
+
+  RTC_TimeTypeDef sTime = {0};
+  RTC_DateTypeDef sDate = {0};
+
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = RTC_ASYNCH_PREDIV;
+  hrtc.Init.SynchPrediv = RTC_SYNCH_PREDIV;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  hrtc.Init.OutPutPullUp = RTC_OUTPUT_PULLUP_NONE;
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* USER CODE BEGIN Check_RTC_BKUP */
+
+  /* Set Date and Time (if not already done before)*/
+  /* Read the Back Up Register 0 Data */
+  if (HAL_RTCEx_BKUPRead(&hrtc, RTC_BKP_DR0) != 0x32F2)
+  {
+    /* Configure RTC Calendar */
+  /* USER CODE END Check_RTC_BKUP */
+
+  /** Initialize RTC and set the Time and Date
+  */
+  sTime.Hours = 0x2;
+  sTime.Minutes = 0x0;
+  sTime.Seconds = 0x0;
+  sTime.SubSeconds = 0x0;
+  sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
+  sTime.StoreOperation = RTC_STOREOPERATION_RESET;
+  if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sDate.WeekDay = RTC_WEEKDAY_MONDAY;
+  sDate.Month = RTC_MONTH_APRIL;
+  sDate.Date = 0x16;
+  sDate.Year = 0x18;
+
+  if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+
+  /* Writes a data in a RTC Backup data Register0 */
+  HAL_RTCEx_BKUPWrite(&hrtc, RTC_BKP_DR0, 0x32F2);
+  }
+  /* USER CODE END RTC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Display the current time and date.
+  * @param  showtime : pointer to buffer
+  * @param  showdate : pointer to buffer
+  * @retval None
+  */
+static void RTC_CalendarShow(uint8_t *showtime, uint8_t *showdate)
+{
+  RTC_DateTypeDef sdatestructureget;
+  RTC_TimeTypeDef stimestructureget;
+
+  /* Get the RTC current Time */
+  HAL_RTC_GetTime(&hrtc, &stimestructureget, RTC_FORMAT_BIN);
+  /* Get the RTC current Date */
+  HAL_RTC_GetDate(&hrtc, &sdatestructureget, RTC_FORMAT_BIN);
+  /* Display time Format : hh:mm:ss */
+  sprintf((char *)showtime, "%2d:%2d:%2d", stimestructureget.Hours, stimestructureget.Minutes, stimestructureget.Seconds);
+  /* Display date Format : mm-dd-yy */
+  sprintf((char *)showdate, "%2d-%2d-%2d", sdatestructureget.Month, sdatestructureget.Date, 2000 + sdatestructureget.Year);
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  RTCStatus = 0xE;
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..dca03bfdb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,165 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Calendar/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief RTC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+    RCC_OscInitTypeDef        RCC_OscInitStruct;
+    RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct;
+
+    /* Enables the PWR Clock and Enables access to the backup domain */
+    /* To change the source clock of the RTC feature (LSE, LSI), You have to:
+       - Enable the power clock using __HAL_RCC_PWR_CLK_ENABLE()
+       - Enable write access using HAL_PWR_EnableBkUpAccess() function before to
+         configure the RTC clock source (to be done once after reset).
+       - Reset the Back up Domain using __HAL_RCC_BACKUPRESET_FORCE() and
+         __HAL_RCC_BACKUPRESET_RELEASE().
+       - Configure the needed RTc clock source */
+    __HAL_RCC_PWR_CLK_ENABLE();
+    HAL_PWR_EnableBkUpAccess();
+
+
+    /* Configure LSE as RTC clock */
+    RCC_OscInitStruct.OscillatorType =  RCC_OSCILLATORTYPE_LSI;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+  /* USER CODE END RTC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+    __HAL_RCC_RTCAPB_CLK_ENABLE();
+  /* USER CODE BEGIN RTC_MspInit 1 */
+
+
+  /* USER CODE END RTC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief RTC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspDeInit 0 */
+
+  /* USER CODE END RTC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RTC_DISABLE();
+    __HAL_RCC_RTCAPB_CLK_DISABLE();
+  /* USER CODE BEGIN RTC_MspDeInit 1 */
+    /* Disables the PWR Clock and Disables access to the backup domain */
+    HAL_PWR_DisableBkUpAccess();
+    __HAL_RCC_PWR_CLK_DISABLE();
+  /* USER CODE END RTC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..ed3dc40c4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/stm32g4xx_it.c
@@ -0,0 +1,130 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Calendar/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+
+
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/readme.txt b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/readme.txt
new file mode 100644
index 000000000..1713af21b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_Calendar/readme.txt
@@ -0,0 +1,111 @@
+/**
+  @page RTC_Calendar RTC Calendar Example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    RTC/RTC_Calendar/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the RTC Calendar example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+Configuration of the calendar using the RTC HAL API.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+
+The RTC peripheral configuration is ensured by the HAL_RTC_Init() function.
+This later is calling the HAL_RTC_MspInit()function which core is implementing
+the configuration of the needed RTC resources according to the used hardware (CLOCK, 
+PWR, RTC clock source and BackUp). You may update this function to change RTC configuration.
+
+LSI oscillator clock is used as RTC clock source. 
+
+HAL_RTC_SetTime()and HAL_RTC_SetDate() functions are then called to initialize the 
+time and the date.
+
+A key value is written in backup data register 1 to indicate if the RTC is already configured.  
+The RTC is in the backup (BKP) domain, still powered by VBAT when VDD is switched off,
+so the RTC configuration is not lost if a battery is connected to the VBAT pin. 
+The program behaves as follows:
+
+1. After startup the program checks the backup data register 0 value:
+    - BKP_DR0 value not correct: (RTC_BKP_DR0 value is not correct or has not yet
+      been programmed when the program is executed for the first time) the RTC is
+      configured and internal time stamp is enabled.
+    
+    - BKP_DR0 value correct: this means that the RTC is configured and the time
+      and date are displayed on Debugger.
+
+2. When a reset (except power on reset) occurs the BKP domain is not reset and the RTC 
+   configuration is not lost.
+   
+3. When power on reset occurs:
+    - If a battery is connected to the VBAT pin: the BKP domain is not reset and
+      the RTC configuration is not lost. LED3 is ON.
+
+    - If no battery is connected to the VBAT pin: the BKP domain is reset and the
+      RTC configuration is lost.
+
+LED1 is turned ON when the RTC configuration is done correctly.
+
+
+The current time and date are updated and displayed on the debugger in aShowTime 
+and aShowDate variables.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+System, RTC, Calendar, Backup Domain, Reset
+
+@par Directory contents 
+
+  - RTC/RTC_Calendar/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - RTC/RTC_Calendar/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - RTC/RTC_Calendar/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - RTC/RTC_Calendar/Inc/main.h                  Header for main.c module  
+  - RTC/RTC_Calendar/Src/stm32g4xx_it.c          Interrupt handlers
+  - RTC/RTC_Calendar/Src/main.c                  Main program
+  - RTC/RTC_Calendar/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - RTC/RTC_Calendar/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx Devices.
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device and 
+    development board. 
+  - STM32G474E-EVAL1 Rev B Set-up
+  - Make sure that  is in position  to connect 3V battery to VBAT pin.
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/.extSettings b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/.extSettings
new file mode 100644
index 000000000..25b8b6355
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/Project.eww
new file mode 100644
index 000000000..4c0d1be13
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\RTC_LSI.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/RTC_LSI.ewd b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/RTC_LSI.ewd
new file mode 100644
index 000000000..9e2c675ef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/RTC_LSI.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>RTC_LSI</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/RTC_LSI.ewp b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/RTC_LSI.ewp
new file mode 100644
index 000000000..48803e22b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/RTC_LSI.ewp
@@ -0,0 +1,1158 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>RTC_LSI</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>RTC_LSI/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>RTC_LSI/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>RTC_LSI/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
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+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/main.h
new file mode 100644
index 000000000..d02f069dc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/main.h
@@ -0,0 +1,73 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include <stdio.h>
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+#define RTC_ASYNCH_PREDIV    0x7C
+#define RTC_SYNCH_PREDIV     0xFF
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..35003d406
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..299e7f338
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Inc/stm32g4xx_it.h
@@ -0,0 +1,63 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void RTC_WKUP_IRQHandler(void);
+void TIM1_UP_TIM16_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/RTC_LSI.uvoptx b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/RTC_LSI.uvoptx
new file mode 100644
index 000000000..cc74744ad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/RTC_LSI.uvoptx
@@ -0,0 +1,657 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>RTC_LSI</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/RTC_LSI.uvprojx b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/RTC_LSI.uvprojx
new file mode 100644
index 000000000..833d918fb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/RTC_LSI.uvprojx
@@ -0,0 +1,602 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>RTC_LSI</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
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+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="RTC_LSI"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/RTC_LSI.ioc b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/RTC_LSI.ioc
new file mode 100644
index 000000000..e3952480d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/RTC_LSI.ioc
@@ -0,0 +1,149 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=RTC
+Mcu.IP3=SYS
+Mcu.IP4=TIM16
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA6
+Mcu.Pin1=VP_RTC_VS_RTC_Activate
+Mcu.Pin2=VP_RTC_VS_RTC_WakeUp_intern
+Mcu.Pin3=VP_SYS_VS_Systick
+Mcu.Pin4=VP_SYS_VS_DBSignals
+Mcu.Pin5=VP_TIM16_VS_ClockSourceINT
+Mcu.PinsNb=6
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.RTC_WKUP_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.TIM1_UP_TIM16_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA6.Signal=S_TIM16_CH1
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=RTC_LSI.ioc
+ProjectManager.ProjectName=RTC_LSI
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_RTC_Init-RTC-false-HAL-true,4-MX_TIM16_Init-TIM16-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+RTC.AsynchPrediv=RTC_ASYNCH_PREDIV
+RTC.HourFormat=RTC_HOURFORMAT_24
+RTC.IPParameters=HourFormat,AsynchPrediv,SynchPrediv,WakeUpClock-WakeUp,WakeUpCounter-WakeUp
+RTC.IPParametersWithoutCheck=AsynchPrediv,SynchPrediv
+RTC.SynchPrediv=RTC_SYNCH_PREDIV
+RTC.WakeUpClock-WakeUp=RTC_WAKEUPCLOCK_RTCCLK_DIV16
+RTC.WakeUpCounter-WakeUp=0
+SH.S_TIM16_CH1.0=TIM16_CH1,Input_Capture1_from_TI1
+SH.S_TIM16_CH1.ConfNb=1
+TIM16.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM16.Channel=TIM_CHANNEL_1
+TIM16.ICFilter_CH1=0
+TIM16.IPParameters=Period,RepetitionCounter,AutoReloadPreload,ICFilter_CH1,Channel
+TIM16.Period=0xFFFF
+TIM16.RepetitionCounter=0
+VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
+VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
+VP_RTC_VS_RTC_WakeUp_intern.Mode=WakeUp
+VP_RTC_VS_RTC_WakeUp_intern.Signal=RTC_VS_RTC_WakeUp_intern
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer
+VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=RTC_LSI
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..35af9e787
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718910008">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718910008" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718910008" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718910008." name="/" resourcePath="">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.150288412" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.623172856" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1411702435" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1961989406" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
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+							<builder buildPath="${workspace_loc:/RTC_LSI}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1005370690" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1606760402" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1187924254" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.37367293" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1818472056" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1889204459" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.921782195" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/RTC_LSI}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1121506586" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1719038838" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1331399751" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.944408020" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.581335747" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1044952921" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1394972908" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1540661803" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1853017673" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1954408414" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.466353917" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.272624150" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1418933859" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1709105528" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1854594831" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1115436445" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1821760450" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1755059398" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1133972325" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.638721130" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1833480672" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1488359142" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.809176732" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1659705556" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.126376166" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="RTC_LSI.null.862380812" name="RTC_LSI"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718910008;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1718910008.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1187924254;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.247000786">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.982433890;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.982433890.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.944408020;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1853017673">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/.project
new file mode 100644
index 000000000..d266e6f1c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>RTC_LSI</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>RTC_LSI.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/RTC_LSI.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/main.c
new file mode 100644
index 000000000..3e8288aba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/main.c
@@ -0,0 +1,471 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_LSI/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx RTC HAL API to configure
+  *          Time and Date.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define WAKEUP_TIMER_ENABLE 0x32F2
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+RTC_HandleTypeDef hrtc;
+
+TIM_HandleTypeDef htim16;
+
+/* USER CODE BEGIN PV */
+/* Buffer used for displaying Time */
+__IO uint32_t uwLsiFreq = 0;
+__IO uint32_t RTCStatus = 0;
+
+uint16_t tmpCCTIM_CHANNEL[2] = {0, 0};
+__IO uint32_t uwCaptureNumber = 0;
+__IO uint32_t uwPeriodValue = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_RTC_Init(void);
+static void MX_TIM16_Init(void);
+/* USER CODE BEGIN PFP */
+static uint32_t GetLSIFrequency(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+  /* Configure LED1 */
+  BSP_LED_Init(LED1);
+
+  /* Configure Wkup/Tamper push-button button */
+  BSP_PB_Init(BUTTON_USER,BUTTON_MODE_GPIO);
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_RTC_Init();
+  MX_TIM16_Init();
+  /* USER CODE BEGIN 2 */
+  /*##-2- Check if data stored in BackUp register1: Wakeup timer enable #######*/
+  /* Read the Back Up Register 1 Data */
+  if (HAL_RTCEx_BKUPRead(&hrtc, RTC_BKP_DR1) == WAKEUP_TIMER_ENABLE)
+  {
+    /* if the wakeup timer is enabled then deactivate it to disable the wakeup timer interrupt */
+    if (HAL_RTCEx_DeactivateWakeUpTimer(&hrtc) != HAL_OK)
+    {
+      /* Initialization Error */
+      Error_Handler();
+    }
+  }
+
+  /*##-3- Configure the RTC Wakeup peripheral #################################*/
+  /* Setting the Wakeup time to 1 s
+       If RTC_WAKEUPCLOCK_CK_SPRE_16BITS is selected, the frequency is 1Hz,
+       this allows to get a wakeup time equal to 1 s if the counter is 0x0 */
+  HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, 0x0, RTC_WAKEUPCLOCK_CK_SPRE_16BITS);
+
+  /*##-4- Write 'wakeup timer enabled' tag in RTC Backup data Register 1 #######*/
+  HAL_RTCEx_BKUPWrite(&hrtc, RTC_BKP_DR1, WAKEUP_TIMER_ENABLE);
+
+  /* Wait Until push-button pressed */
+  while(BSP_PB_GetState(BUTTON_USER) != GPIO_PIN_SET)
+  {
+  }
+
+  /* Wait Until push-button released */
+  while(BSP_PB_GetState(BUTTON_USER) != GPIO_PIN_RESET)
+  {
+  }
+  
+  /* Get the LSI frequency:  TIM16 is used to measure the LSI frequency */
+  uwLsiFreq = GetLSIFrequency();
+  
+  /* Update the Calendar Configuration with the LSI exact value */
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = 0x7F;
+  hrtc.Init.SynchPrediv = (uwLsiFreq/128) - 1;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  
+  if(HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  RTCStatus = 1;
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = 64;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief RTC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RTC_Init(void)
+{
+
+  /* USER CODE BEGIN RTC_Init 0 */
+
+  /* USER CODE END RTC_Init 0 */
+
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = RTC_ASYNCH_PREDIV;
+  hrtc.Init.SynchPrediv = RTC_SYNCH_PREDIV;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  hrtc.Init.OutPutPullUp = RTC_OUTPUT_PULLUP_NONE;
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Enable the WakeUp
+  */
+  if (HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, 0, RTC_WAKEUPCLOCK_RTCCLK_DIV16) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+
+  /* USER CODE END RTC_Init 2 */
+
+}
+
+/**
+  * @brief TIM16 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM16_Init(void)
+{
+
+  /* USER CODE BEGIN TIM16_Init 0 */
+
+  /* USER CODE END TIM16_Init 0 */
+
+  TIM_IC_InitTypeDef sConfigIC = {0};
+
+  /* USER CODE BEGIN TIM16_Init 1 */
+
+  /* USER CODE END TIM16_Init 1 */
+  htim16.Instance = TIM16;
+  htim16.Init.Prescaler = 0;
+  htim16.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim16.Init.Period = 0xFFFF;
+  htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim16.Init.RepetitionCounter = 0;
+  htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim16) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_IC_Init(&htim16) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
+  sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
+  sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
+  sConfigIC.ICFilter = 0;
+  if (HAL_TIM_IC_ConfigChannel(&htim16, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM16_Init 2 */
+
+  /* USER CODE END TIM16_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Input Capture callback in non blocking mode 
+  * @param  htim : TIM IC handle
+  * @retval None
+*/
+void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+  /* Get the Input Capture value */
+  tmpCCTIM_CHANNEL[uwCaptureNumber++] = HAL_TIM_ReadCapturedValue(&htim16, TIM_CHANNEL_1);
+  
+  if (uwCaptureNumber >= 2)
+  {
+    if ( tmpCCTIM_CHANNEL[0] > tmpCCTIM_CHANNEL[1] )
+    {
+      /* Compute the period length */
+      uwPeriodValue = (uint16_t)(0xFFFF - tmpCCTIM_CHANNEL[0] + tmpCCTIM_CHANNEL[1] + 1);
+    }
+    else
+    {
+      /* Compute the period length */
+      uwPeriodValue = (uint16_t)(tmpCCTIM_CHANNEL[1] - tmpCCTIM_CHANNEL[0]);
+    }
+    /* Frequency computation */ 
+    uwLsiFreq = (uint32_t) SystemCoreClock / uwPeriodValue;
+    uwLsiFreq *= 8;
+  }
+}
+
+/**
+  * @brief  WakeUp timer callback
+  * @param  hrtc : RTC handle
+  * @retval None
+  */
+void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
+{    
+  /* Toggle LED1 */
+  BSP_LED_Toggle(LED1);
+}
+
+/**
+  * @brief  Configures TIM16 to measure the LSI oscillator frequency. 
+  * @param  None
+  * @retval LSI Frequency
+  */
+static uint32_t GetLSIFrequency(void)
+{
+  TIM_IC_InitTypeDef    TIMInput_Config;
+
+  /* Configure the TIM peripheral *********************************************/ 
+  /* Set TIMx instance */  
+  htim16.Instance = TIM16;
+  
+  /* TIM16 configuration: Input Capture mode ---------------------
+     The LSI oscillator is connected to TIM16 TIM_CHANNEL_1.
+     The Rising edge is used as active edge.
+     The TIM16 Capture/Compare register associated to TIM_CHANNEL_1 
+     is used to compute the frequency value. 
+  ------------------------------------------------------------ */
+  htim16.Init.Prescaler         = 0; 
+  htim16.Init.CounterMode       = TIM_COUNTERMODE_UP;  
+  htim16.Init.Period            = 0xFFFF; 
+  htim16.Init.ClockDivision     = 0;     
+  if(HAL_TIM_IC_Init(&htim16) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+  
+  HAL_TIMEx_TISelection(&htim16, TIM_TIM16_TI1_LSI, TIM_CHANNEL_1);
+  
+  /* Configure the Input Capture of TIM_CHANNEL_1 */
+  TIMInput_Config.ICPolarity  = TIM_ICPOLARITY_RISING;
+  TIMInput_Config.ICSelection = TIM_ICSELECTION_DIRECTTI;
+  TIMInput_Config.ICPrescaler = TIM_ICPSC_DIV8;
+  TIMInput_Config.ICFilter    = 0;
+  if(HAL_TIM_IC_ConfigChannel(&htim16, &TIMInput_Config, TIM_CHANNEL_1) != HAL_OK)
+  {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /* Start the TIM Input Capture measurement in interrupt mode */
+  if(HAL_TIM_IC_Start_IT(&htim16, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Wait until the TIM16 gets 2 LSI edges */
+  while(uwCaptureNumber != 2)
+  {
+  }
+
+  /* Disable TIM16 Capture/Compare channel Interrupt Request */
+  HAL_TIM_IC_Stop_IT(&htim16, TIM_CHANNEL_1);
+  
+  /* Deinitialize the TIM16 peripheral registers to their default reset values */
+  HAL_TIM_IC_DeInit(&htim16);
+
+  return uwLsiFreq;
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  RTCStatus = 0xE;
+  while (1)
+  {
+    /* Toggle LED3 with a period of one second */
+    BSP_LED_Toggle(LED3);
+    HAL_Delay(1000);
+
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..ab3dafd5f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,252 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_LSI/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief RTC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+    RCC_OscInitTypeDef        RCC_OscInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct = {0};
+
+    /* Enables the PWR Clock and Enables access to the backup domain */
+    /* To enable access on RTC registers */
+    __HAL_RCC_PWR_CLK_ENABLE();
+    HAL_PWR_EnableBkUpAccess();
+    /* Get RTC clock configuration */
+    HAL_RCCEx_GetPeriphCLKConfig(&PeriphClkInitStruct);
+
+    /*In case of RTC clock already enable, make sure it's the good one */
+    if (PeriphClkInitStruct.RTCClockSelection == RCC_OSCILLATORTYPE_LSI)
+    {
+      /* Do nothing */
+    }
+    else
+    {
+      PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+
+      /* If selected source was previously the opposite source clock, first select none*/
+      if (PeriphClkInitStruct.RTCClockSelection != RCC_RTCCLKSOURCE_NONE)
+      {
+        PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_NONE;
+        if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+        {
+          Error_Handler();
+        }
+      }
+      /* Configure LSI as RTC clock source */
+      RCC_OscInitStruct.OscillatorType =  RCC_OSCILLATORTYPE_LSI;
+      RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+      RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+      RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+
+      if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+      {
+        Error_Handler();
+      }
+
+      PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
+      if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+      {
+        Error_Handler();
+      }
+    }
+
+  /* USER CODE END RTC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+    __HAL_RCC_RTCAPB_CLK_ENABLE();
+    /* RTC interrupt Init */
+    HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
+  /* USER CODE BEGIN RTC_MspInit 1 */
+
+
+  /* USER CODE END RTC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief RTC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspDeInit 0 */
+
+  /* USER CODE END RTC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RTC_DISABLE();
+    __HAL_RCC_RTCAPB_CLK_DISABLE();
+
+    /* RTC interrupt DeInit */
+    HAL_NVIC_DisableIRQ(RTC_WKUP_IRQn);
+  /* USER CODE BEGIN RTC_MspDeInit 1 */
+
+  /* USER CODE END RTC_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim_base->Instance==TIM16)
+  {
+  /* USER CODE BEGIN TIM16_MspInit 0 */
+
+  /* USER CODE END TIM16_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM16_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM16 GPIO Configuration
+    PA6     ------> TIM16_CH1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF1_TIM16;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* TIM16 interrupt Init */
+    HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
+  /* USER CODE BEGIN TIM16_MspInit 1 */
+
+  /* USER CODE END TIM16_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM16)
+  {
+  /* USER CODE BEGIN TIM16_MspDeInit 0 */
+
+  /* USER CODE END TIM16_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM16_CLK_DISABLE();
+
+    /**TIM16 GPIO Configuration
+    PA6     ------> TIM16_CH1
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_6);
+
+    /* TIM16 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(TIM1_UP_TIM16_IRQn);
+  /* USER CODE BEGIN TIM16_MspDeInit 1 */
+
+  /* USER CODE END TIM16_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..75e9566d9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/stm32g4xx_it.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    RTC/RTC_Alarm/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern RTC_HandleTypeDef hrtc;
+extern TIM_HandleTypeDef htim16;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles RTC wake-up interrupt through EXTI line 20.
+  */
+void RTC_WKUP_IRQHandler(void)
+{
+  /* USER CODE BEGIN RTC_WKUP_IRQn 0 */
+
+  /* USER CODE END RTC_WKUP_IRQn 0 */
+  HAL_RTCEx_WakeUpTimerIRQHandler(&hrtc);
+  /* USER CODE BEGIN RTC_WKUP_IRQn 1 */
+
+  /* USER CODE END RTC_WKUP_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
+  */
+void TIM1_UP_TIM16_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
+
+  /* USER CODE END TIM1_UP_TIM16_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim16);
+  /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
+
+  /* USER CODE END TIM1_UP_TIM16_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/readme.txt b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/readme.txt
new file mode 100644
index 000000000..2c4a58e89
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/RTC/RTC_LSI/readme.txt
@@ -0,0 +1,102 @@
+/**
+  @page RTC_LSI RTC prescaler adjustment with LSI Measurements example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    RTC/RTC_LSI/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the RTC prescaler adjustment with LSI Measurements example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+Use of the LSI clock source autocalibration to get a precise RTC clock. 
+In the associated software, the system clock is set to 170 MHz.
+As an application example, it demonstrates how to configure the TIM16 timer
+internally connected to LSI clock output, in order to adjust the RTC prescaler. 
+
+The Low Speed Internal (LSI) clock is used as RTC clock source.
+After reset, the RTC prescaler is set with the default LSI frequency (). 
+The RTC WakeUp is configured to generate an interrupt each 1s.
+
+A key value is written in backup data register 1 to indicate if the wakeup timer has
+already been enabled. If so the wakeup timer is disabled prior configuring the RTC 
+automatic wakeup.
+
+LED1 is toggled inside the RTC WakeUp interrupt each 1s.
+
+The inaccuracy of the LSI clock causes the RTC WakeUp Interrupt to be inaccurate.
+The RTC CK_SPRE signal can be monitored by LED1 which is toggled into the RTC 
+Wakeup interrupt service routine.
+
+The program waits until User push-button is pressed to begin the auto calibration.
+
+Procedure:
+ - Configure the TIM16 to remap internally the TIM16 TIM_CHANNEL_1
+   Input Capture to the LSI clock output.
+ - Enable the TIM16 Input Capture interrupt: after one cycle of LSI clock, the
+   period value is stored in a variable and compared to the HCLK clock to get
+   its real value.
+ - The RTC prescaler is adjusted with this LSI frequency value so that the RTC
+   CK_SPRE value become more accurate.
+ - When calibration is done the variable uwLsiFreq is visualized into the debugger
+   to indicate the end of this operation.
+ - The LSI value is updated and displayed on the debugger in uwLsiFreq variable.
+
+- LED1 is Off: This indicates that the system generates an error.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then 
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+System, RTC, LSI, Internal time stamp, Wake up, interrupt
+
+@par Directory contents
+
+  - RTC/RTC_LSI/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - RTC/RTC_LSI/Inc/stm32g4xx_hal_conf.h     HAL configuration file
+  - RTC/RTC_LSI/Inc/main.h                   Header file for main.c
+  - RTC/RTC_LSI/Inc/stm32g4xx_it.h           Header for stm32g4xx_it.c
+  - RTC/RTC_LSI/Src/system_stm32g4xx.c       STM32G4xx system clock configuration file
+  - RTC/RTC_LSI/Src/stm32g4xx_it.c           Interrupt handlers
+  - RTC/RTC_LSI/Src/main.c                   Main program
+  - RTC/RTC_LSI/Src/stm32g4xx_hal_msp.c      HAL MSP module
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 Rev B  board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Rev B Set-up
+    - Use LED1 connected to PG.09 pin (PG.09).
+    - Use the User push-button connected to pin PC.13 (External line 13)
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/.extSettings b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/.extSettings
new file mode 100644
index 000000000..234a88c54
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152;..\..\..\..\..\..\Drivers\BSP\Components\Common;..\..\..\..\..\..\Drivers\BSP\Components\wm8994
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/wm8994/wm8994_reg.c;../../../../../../Drivers/BSP/Components/wm8994/wm8994.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/AudioFile/audio.bin b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/AudioFile/audio.bin
new file mode 100644
index 000000000..a8c2aa30f
Binary files /dev/null and b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/AudioFile/audio.bin differ
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/Project.eww
new file mode 100644
index 000000000..ebe70954e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\SAI_AudioPlay.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/SAI_AudioPlay.ewd b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/SAI_AudioPlay.ewd
new file mode 100644
index 000000000..50afd0a00
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/SAI_AudioPlay.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>SAI_AudioPlay</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>45.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/SAI_AudioPlay.ewp b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/SAI_AudioPlay.ewp
new file mode 100644
index 000000000..347e9542d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/SAI_AudioPlay.ewp
@@ -0,0 +1,1163 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>SAI_AudioPlay</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>SAI_AudioPlay/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>SAI_AudioPlay/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>SAI_AudioPlay/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/Common</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/wm8994</state>
+        </option>
+        <option>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/main.h
new file mode 100644
index 000000000..eee908605
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SAI/SAI_AudioPlay/Inc/stm32g4xx_main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..77baf1433
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+#define HAL_SAI_MODULE_ENABLED
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..658a41ea5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SAI/SAI_AudioPlay/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/SAI_AudioPlay.uvoptx b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/SAI_AudioPlay.uvoptx
new file mode 100644
index 000000000..61ff8b6ee
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/SAI_AudioPlay.uvoptx
@@ -0,0 +1,669 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>SAI_AudioPlay</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
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+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
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+      <PathWithFileName>../Src/stm32g4xx_hal_msp.c</PathWithFileName>
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+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+  </Group>
+
+  <Group>
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+    </File>
+  </Group>
+
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diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/SAI_AudioPlay.uvprojx b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/SAI_AudioPlay.uvprojx
new file mode 100644
index 000000000..fd2a77e56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/SAI_AudioPlay.uvprojx
@@ -0,0 +1,607 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>SAI_AudioPlay</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>SAI_AudioPlay\Exe\</OutputDirectory>
+          <OutputName>SAI_AudioPlay</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
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+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152;../../../../../../Drivers/BSP/Components/Common;../../../../../../Drivers/BSP/Components/wm8994</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>wm8994_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/wm8994/wm8994_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>wm8994.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/wm8994/wm8994.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sai.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sai_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="SAI_AudioPlay"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/SAI_AudioPlay.ioc b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/SAI_AudioPlay.ioc
new file mode 100644
index 000000000..35f260965
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/SAI_AudioPlay.ioc
@@ -0,0 +1,200 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.Request0=SAI1_A
+Dma.RequestsNb=1
+Dma.SAI1_A.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.SAI1_A.0.EventEnable=DISABLE
+Dma.SAI1_A.0.Instance=DMA1_Channel1
+Dma.SAI1_A.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.SAI1_A.0.MemInc=DMA_MINC_ENABLE
+Dma.SAI1_A.0.Mode=DMA_CIRCULAR
+Dma.SAI1_A.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.SAI1_A.0.PeriphInc=DMA_PINC_DISABLE
+Dma.SAI1_A.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.SAI1_A.0.Priority=DMA_PRIORITY_HIGH
+Dma.SAI1_A.0.RequestNumber=1
+Dma.SAI1_A.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.SAI1_A.0.SignalID=NONE
+Dma.SAI1_A.0.SyncEnable=DISABLE
+Dma.SAI1_A.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.SAI1_A.0.SyncRequestNumber=1
+Dma.SAI1_A.0.SyncSignalID=NONE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DMA
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SAI1
+Mcu.IP4=SYS
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PE2
+Mcu.Pin1=PE4
+Mcu.Pin2=PF0-OSC_IN
+Mcu.Pin3=PF1-OSC_OUT
+Mcu.Pin4=PA8
+Mcu.Pin5=PD6
+Mcu.Pin6=VP_SYS_VS_Systick
+Mcu.Pin7=VP_SYS_VS_DBSignals
+Mcu.PinsNb=8
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA8.GPIOParameters=GPIO_Speed
+PA8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA8.Mode=SAI_A_MasterWithClock
+PA8.Signal=SAI1_SCK_A
+PD6.GPIOParameters=GPIO_Speed
+PD6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PD6.Mode=SAI_A_MasterWithClock
+PD6.Signal=SAI1_SD_A
+PE2.GPIOParameters=GPIO_Speed
+PE2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PE2.Mode=SAI_A_MasterWithClock
+PE2.Signal=SAI1_MCLK_A
+PE4.GPIOParameters=GPIO_Speed
+PE4.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PE4.Mode=SAI_A_MasterWithClock
+PE4.Signal=SAI1_FS_A
+PF0-OSC_IN.Mode=HSE-External-Oscillator
+PF0-OSC_IN.Signal=RCC_OSC_IN
+PF1-OSC_OUT.Mode=HSE-External-Oscillator
+PF1-OSC_OUT.Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=SAI_AudioPlay.ioc
+ProjectManager.ProjectName=SAI_AudioPlay
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_SAI1_Init-SAI1-false-HAL-true
+RCC.ADC12Freq_Value=45000000
+RCC.ADC345Freq_Value=45000000
+RCC.AHBFreq_Value=45000000
+RCC.APB1Freq_Value=45000000
+RCC.APB1TimFreq_Value=45000000
+RCC.APB2Freq_Value=45000000
+RCC.APB2TimFreq_Value=45000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=45000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=45000000
+RCC.FDCANFreq_Value=45000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=45000000
+RCC.HRTIM1Freq_Value=45000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=45000000
+RCC.I2C2Freq_Value=45000000
+RCC.I2C3Freq_Value=45000000
+RCC.I2C4Freq_Value=45000000
+RCC.I2SFreq_Value=45000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQ,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1CLockSelection,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=45000000
+RCC.LPUART1Freq_Value=45000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=15
+RCC.PLLPoutputFreq_Value=45000000
+RCC.PLLQ=RCC_PLLQ_DIV8
+RCC.PLLQoutputFreq_Value=11250000
+RCC.PLLRCLKFreq_Value=45000000
+RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
+RCC.PWRFreq_Value=45000000
+RCC.QSPIFreq_Value=45000000
+RCC.RNGFreq_Value=11250000
+RCC.SAI1CLockSelection=RCC_SAI1CLKSOURCE_PLL
+RCC.SAI1Freq_Value=11250000
+RCC.SYSCLKFreq_VALUE=45000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=45000000
+RCC.UART5Freq_Value=45000000
+RCC.USART1Freq_Value=45000000
+RCC.USART2Freq_Value=45000000
+RCC.USART3Freq_Value=45000000
+RCC.USBFreq_Value=11250000
+RCC.VCOInputFreq_Value=6000000
+RCC.VCOOutputFreq_Value=90000000
+SAI1.ActiveFrameLength-SAI_A_MasterWithClock=16
+SAI1.AudioFrequency-SAI_A_MasterWithClock=SAI_AUDIO_FREQUENCY_22K
+SAI1.AudioMode-SAI_A_MasterWithClock=SAI_MODEMASTER_TX
+SAI1.ClockStrobing-SAI_A_MasterWithClock=SAI_CLOCKSTROBING_FALLINGEDGE
+SAI1.CompandingMode-SAI_A_MasterWithClock=SAI_NOCOMPANDING
+SAI1.DataSize-SAI_A_MasterWithClock=SAI_DATASIZE_16
+SAI1.ErrorAudioFreq-SAI_A_MasterWithClock=-0.12 %
+SAI1.FIFOThreshold-SAI_A_MasterWithClock=SAI_FIFOTHRESHOLD_1QF
+SAI1.FSDefinition-SAI_A_MasterWithClock=SAI_FS_CHANNEL_IDENTIFICATION
+SAI1.FSOffset-SAI_A_MasterWithClock=SAI_FS_BEFOREFIRSTBIT
+SAI1.FSPolarity-SAI_A_MasterWithClock=SAI_FS_ACTIVE_LOW
+SAI1.FirstBit-SAI_A_MasterWithClock=SAI_FIRSTBIT_MSB
+SAI1.FirstBitOffset-SAI_A_MasterWithClock=0
+SAI1.FrameLength-SAI_A_MasterWithClock=32
+SAI1.IPParameters=Synchro_A,Protocol-SAI_A_MasterWithClock,AudioMode-SAI_A_MasterWithClock,FrameLength-SAI_A_MasterWithClock,DataSize-SAI_A_MasterWithClock,SlotSize-SAI_A_MasterWithClock,MonoStereoMode-SAI_A_MasterWithClock,CompandingMode-SAI_A_MasterWithClock,TriState-SAI_A_MasterWithClock,FirstBit-SAI_A_MasterWithClock,ActiveFrameLength-SAI_A_MasterWithClock,FSDefinition-SAI_A_MasterWithClock,FSPolarity-SAI_A_MasterWithClock,FSOffset-SAI_A_MasterWithClock,FirstBitOffset-SAI_A_MasterWithClock,SlotNumber-SAI_A_MasterWithClock,VirtualSlotActive-SAI_A_MasterWithClock,VirtualSlotActive0-SAI_A_MasterWithClock,VirtualSlotActive1-SAI_A_MasterWithClock,NoDivider-SAI_A_MasterWithClock,AudioFrequency-SAI_A_MasterWithClock,ClockStrobing-SAI_A_MasterWithClock,FIFOThreshold-SAI_A_MasterWithClock,OutputDrive-SAI_A_MasterWithClock,Instance-SAI_A_MasterWithClock,VirtualMode-SAI_A_MasterWithClock,MckOutput-SAI_A_MasterWithClock,SlotActive-SAI_A_MasterWithClock,RealAudioFreq-SAI_A_MasterWithClock,ErrorAudioFreq-SAI_A_MasterWithClock
+SAI1.Instance-SAI_A_MasterWithClock=SAI$Index_Block_A
+SAI1.MckOutput-SAI_A_MasterWithClock=SAI_MCK_OUTPUT_ENABLE
+SAI1.MonoStereoMode-SAI_A_MasterWithClock=SAI_STEREOMODE
+SAI1.NoDivider-SAI_A_MasterWithClock=SAI_MASTERDIVIDER_ENABLE
+SAI1.OutputDrive-SAI_A_MasterWithClock=SAI_OUTPUTDRIVE_ENABLE
+SAI1.Protocol-SAI_A_MasterWithClock=SAI_FREE_PROTOCOL
+SAI1.RealAudioFreq-SAI_A_MasterWithClock=21.972 KHz
+SAI1.SlotActive-SAI_A_MasterWithClock=0x00000003
+SAI1.SlotNumber-SAI_A_MasterWithClock=2
+SAI1.SlotSize-SAI_A_MasterWithClock=SAI_SLOTSIZE_DATASIZE
+SAI1.Synchro_A=SAI_ASYNCHRONOUS
+SAI1.TriState-SAI_A_MasterWithClock=SAI_OUTPUT_NOTRELEASED
+SAI1.VirtualMode-SAI_A_MasterWithClock=VM_MASTER
+SAI1.VirtualSlotActive-SAI_A_MasterWithClock=SAI_SLOT_USERSETTING
+SAI1.VirtualSlotActive0-SAI_A_MasterWithClock=true
+SAI1.VirtualSlotActive1-SAI_A_MasterWithClock=true
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=SAI_AudioPlay
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..f71546d87
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.119968570">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.119968570" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.119968570" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.119968570." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1421227384" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.320348585" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.806501642" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1200809878" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/Components/wm8994 | ../../../../../../../Drivers/BSP/Components/Common | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.244187135" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/SAI_AudioPlay}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1010929570" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.700951420" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1474533206" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.746251723" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.800823554" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/Components/wm8994 | ../../../../../../../Drivers/BSP/Components/Common | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1756040503" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/SAI_AudioPlay}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.461126201" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.301937146" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1451850840" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.529923827" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1840051036" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.119076785" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1816685403" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/wm8994"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/Common"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1948479270" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.84121224" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1649205648" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1300485774" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.2133578538" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.290566145" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1230955027" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1510264425" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.734736354" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.89227398" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.2111852843" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1705846759" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.2055853962" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.75705735" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.709970229" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1228641420" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="SAI_AudioPlay.null.537009914" name="SAI_AudioPlay"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.119968570;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.119968570.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1474533206;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.966518963">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1536047694;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1536047694.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1451850840;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1631638477">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/.project
new file mode 100644
index 000000000..8a4885624
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/.project
@@ -0,0 +1,210 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>SAI_AudioPlay</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>SAI_AudioPlay.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/SAI_AudioPlay.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sai.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sai_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/wm8994.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/wm8994/wm8994.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/wm8994_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/wm8994/wm8994_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/main.c
new file mode 100644
index 000000000..e233b0d95
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/main.c
@@ -0,0 +1,428 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SAI/SAI_AudioPlay/Src/stm32g4xx_main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use SAI HAL API (SAI instance)
+  *          to play an audio file using the DMA circular mode and a
+  *          continuous buffer update.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include "stm32g474e_eval_bus.h"
+#include "audio.h"
+#include "../Components/wm8994/wm8994.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define AUDIO_I2C_ADDRESS    0x34U
+#define AUDIO_FREQUENCY_22K 22050U  /* Audio sample rate */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+SAI_HandleTypeDef hsai_BlockA1;
+DMA_HandleTypeDef hdma_sai1_a;
+
+/* USER CODE BEGIN PV */
+#define AUDIO_FILE_ADDRESS   0x08040000
+#define AUDIO_FILE_SIZE      (180*1024)
+#define PLAY_HEADER          0x2C
+#define PLAY_BUFF_SIZE       4096
+
+static void *comp_out_obj= {0};
+AUDIO_Drv_t *audio_drv;
+WM8994_IO_t IOCtx;
+uint32_t wm8994_id;
+static WM8994_Object_t WM8994Obj;
+WM8994_Init_t codec_init;
+uint16_t PlayBuff[PLAY_BUFF_SIZE];
+__IO int16_t UpdatePointer = -1;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_SAI1_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  uint32_t PlaybackPosition = PLAY_BUFF_SIZE + PLAY_HEADER;
+
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED1 */
+  BSP_LED_Init(LED1);
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_SAI1_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure the audio driver */
+  IOCtx.Address     = AUDIO_I2C_ADDRESS;
+  IOCtx.Init        = BSP_I2C3_Init;
+  IOCtx.DeInit      = BSP_I2C3_DeInit;
+  IOCtx.ReadReg     = BSP_I2C3_ReadReg16;
+  IOCtx.WriteReg    = BSP_I2C3_WriteReg16;
+  IOCtx.GetTick     = BSP_GetTick;
+  if (WM8994_RegisterBusIO(&WM8994Obj, &IOCtx) != WM8994_OK)
+  {
+    Error_Handler();
+  }
+  else
+  {
+    if(WM8994_ReadID(&WM8994Obj, &wm8994_id) != WM8994_OK)
+    {
+      Error_Handler();
+    }
+    else if ((wm8994_id & 0xFFFFU) != WM8994_ID)
+    {
+      Error_Handler();
+    }
+    /* Reset the Codec Registers */
+    else if (WM8994_Reset(&WM8994Obj) != WM8994_OK)
+    {
+      Error_Handler();
+    }
+  }
+
+  audio_drv               = (AUDIO_Drv_t *)&WM8994_Driver;
+  comp_out_obj            = &WM8994Obj;
+  codec_init.Resolution   = WM8994_RESOLUTION_16b;
+  codec_init.Frequency    = AUDIO_FREQUENCY_22K;
+  codec_init.InputDevice  = WM8994_IN_NONE;
+  codec_init.OutputDevice = WM8994_OUT_HEADPHONE;
+  codec_init.Volume       = 30;
+  if(0 != audio_drv->Init(comp_out_obj, &codec_init))
+  {
+    Error_Handler();
+  }
+
+  /* Check if the buffer has been loaded in flash */
+  if(*((uint64_t *)AUDIO_FILE_ADDRESS) != 0x017EFE2446464952 ) Error_Handler();
+
+  /* Initialize the data buffer */
+  for(int i=0; i < PLAY_BUFF_SIZE; i+=2)
+  {
+    PlayBuff[i]=*((__IO uint16_t *)(AUDIO_FILE_ADDRESS + PLAY_HEADER + i));
+  }
+
+  /* Start the playback */
+  if(0 != audio_drv->Play(&WM8994Obj))
+  {
+    Error_Handler();
+  }
+
+  if(HAL_OK != HAL_SAI_Transmit_DMA(&hsai_BlockA1, (uint8_t *)PlayBuff, PLAY_BUFF_SIZE))
+  {
+    Error_Handler();
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    BSP_LED_Toggle(LED1);
+
+    /* Wait a callback event */
+    while(UpdatePointer==-1);
+
+    int position = UpdatePointer;
+    UpdatePointer = -1;
+
+    /* Update the first or the second part of the buffer */
+    for(int i = 0; i < PLAY_BUFF_SIZE/2; i++)
+    {
+      PlayBuff[i+position] = *(uint16_t *)(AUDIO_FILE_ADDRESS + PlaybackPosition);
+      PlaybackPosition+=2;
+    }
+
+    /* check the end of the file */
+    if((PlaybackPosition+PLAY_BUFF_SIZE/2) > AUDIO_FILE_SIZE)
+    {
+      PlaybackPosition = PLAY_HEADER;
+    }
+
+    if(UpdatePointer != -1)
+    {
+      /* Buffer update time is too long compare to the data transfer time */
+      Error_Handler();
+    }
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 15;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV8;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief SAI1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SAI1_Init(void)
+{
+
+  /* USER CODE BEGIN SAI1_Init 0 */
+
+  /* USER CODE END SAI1_Init 0 */
+
+  /* USER CODE BEGIN SAI1_Init 1 */
+
+  /* USER CODE END SAI1_Init 1 */
+  hsai_BlockA1.Instance = SAI1_Block_A;
+  hsai_BlockA1.Init.Protocol = SAI_FREE_PROTOCOL;
+  hsai_BlockA1.Init.AudioMode = SAI_MODEMASTER_TX;
+  hsai_BlockA1.Init.DataSize = SAI_DATASIZE_16;
+  hsai_BlockA1.Init.FirstBit = SAI_FIRSTBIT_MSB;
+  hsai_BlockA1.Init.ClockStrobing = SAI_CLOCKSTROBING_FALLINGEDGE;
+  hsai_BlockA1.Init.Synchro = SAI_ASYNCHRONOUS;
+  hsai_BlockA1.Init.OutputDrive = SAI_OUTPUTDRIVE_ENABLE;
+  hsai_BlockA1.Init.NoDivider = SAI_MASTERDIVIDER_ENABLE;
+  hsai_BlockA1.Init.MckOverSampling = SAI_MCK_OVERSAMPLING_DISABLE;
+  hsai_BlockA1.Init.FIFOThreshold = SAI_FIFOTHRESHOLD_1QF;
+  hsai_BlockA1.Init.AudioFrequency = SAI_AUDIO_FREQUENCY_22K;
+  hsai_BlockA1.Init.MckOutput = SAI_MCK_OUTPUT_ENABLE;
+  hsai_BlockA1.Init.SynchroExt = SAI_SYNCEXT_DISABLE;
+  hsai_BlockA1.Init.MonoStereoMode = SAI_STEREOMODE;
+  hsai_BlockA1.Init.CompandingMode = SAI_NOCOMPANDING;
+  hsai_BlockA1.Init.TriState = SAI_OUTPUT_NOTRELEASED;
+  hsai_BlockA1.Init.PdmInit.Activation = DISABLE;
+  hsai_BlockA1.Init.PdmInit.MicPairsNbr = 0;
+  hsai_BlockA1.Init.PdmInit.ClockEnable = SAI_PDM_CLOCK1_ENABLE;
+  hsai_BlockA1.FrameInit.FrameLength = 32;
+  hsai_BlockA1.FrameInit.ActiveFrameLength = 16;
+  hsai_BlockA1.FrameInit.FSDefinition = SAI_FS_CHANNEL_IDENTIFICATION;
+  hsai_BlockA1.FrameInit.FSPolarity = SAI_FS_ACTIVE_LOW;
+  hsai_BlockA1.FrameInit.FSOffset = SAI_FS_BEFOREFIRSTBIT;
+  hsai_BlockA1.SlotInit.FirstBitOffset = 0;
+  hsai_BlockA1.SlotInit.SlotSize = SAI_SLOTSIZE_DATASIZE;
+  hsai_BlockA1.SlotInit.SlotNumber = 2;
+  hsai_BlockA1.SlotInit.SlotActive = 0x00000003;
+  if (HAL_SAI_Init(&hsai_BlockA1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN SAI1_Init 2 */
+
+  /* USER CODE END SAI1_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief Tx Transfer completed callbacks.
+  * @param  hsai : pointer to a SAI_HandleTypeDef structure that contains
+  *                the configuration information for SAI module.
+  * @retval None
+  */
+void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai)
+{
+  /* NOTE : This function Should not be modified, when the callback is needed,
+            the HAL_SAI_TxCpltCallback could be implemented in the user file
+   */
+  UpdatePointer = PLAY_BUFF_SIZE/2;
+}
+
+/**
+  * @brief Tx Transfer Half completed callbacks
+  * @param  hsai : pointer to a SAI_HandleTypeDef structure that contains
+  *                the configuration information for SAI module.
+  * @retval None
+  */
+void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai)
+{
+  /* NOTE : This function Should not be modified, when the callback is needed,
+            the HAL_SAI_TxHalfCpltCallback could be implenetd in the user file
+   */
+  UpdatePointer = 0;
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* LED3 On in error case */
+  BSP_LED_On(LED3);
+  while(1)
+  {
+  }
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..cbc700af4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,197 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SAI/SAI_AudioPlay/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+extern DMA_HandleTypeDef hdma_sai1_a;
+
+static uint32_t SAI1_client =0;
+
+void HAL_SAI_MspInit(SAI_HandleTypeDef* hsai)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct;
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+/* SAI1 */
+    if(hsai->Instance==SAI1_Block_A)
+    {
+    /* Peripheral clock enable */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SAI1;
+    PeriphClkInit.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLL;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (SAI1_client == 0)
+    {
+       __HAL_RCC_SAI1_CLK_ENABLE();
+    }
+    SAI1_client ++;
+
+    /**SAI1_A_Block_A GPIO Configuration
+    PE2     ------> SAI1_MCLK_A
+    PE4     ------> SAI1_FS_A
+    PA8     ------> SAI1_SCK_A
+    PD6     ------> SAI1_SD_A
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_4;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF13_SAI1;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_8;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF14_SAI1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF13_SAI1;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+      /* Peripheral DMA init*/
+
+    hdma_sai1_a.Instance = DMA1_Channel1;
+    hdma_sai1_a.Init.Request = DMA_REQUEST_SAI1_A;
+    hdma_sai1_a.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_sai1_a.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_sai1_a.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_sai1_a.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+    hdma_sai1_a.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_sai1_a.Init.Mode = DMA_CIRCULAR;
+    hdma_sai1_a.Init.Priority = DMA_PRIORITY_HIGH;
+    if (HAL_DMA_Init(&hdma_sai1_a) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Several peripheral DMA handle pointers point to the same DMA handle.
+     Be aware that there is only one channel to perform all the requested DMAs. */
+    __HAL_LINKDMA(hsai,hdmarx,hdma_sai1_a);
+
+    __HAL_LINKDMA(hsai,hdmatx,hdma_sai1_a);
+
+    }
+}
+
+void HAL_SAI_MspDeInit(SAI_HandleTypeDef* hsai)
+{
+/* SAI1 */
+    if(hsai->Instance==SAI1_Block_A)
+    {
+    SAI1_client --;
+    if (SAI1_client == 0)
+      {
+      /* Peripheral clock disable */
+       __HAL_RCC_SAI1_CLK_DISABLE();
+      }
+
+    /**SAI1_A_Block_A GPIO Configuration
+    PE2     ------> SAI1_MCLK_A
+    PE4     ------> SAI1_FS_A
+    PA8     ------> SAI1_SCK_A
+    PD6     ------> SAI1_SD_A
+    */
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2|GPIO_PIN_4);
+
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_8);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6);
+
+    /* SAI1 DMA Deinit */
+    HAL_DMA_DeInit(hsai->hdmarx);
+    HAL_DMA_DeInit(hsai->hdmatx);
+    }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a19695302
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/stm32g4xx_it.c
@@ -0,0 +1,132 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SAI/SAI_AudioPlay/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_sai1_a;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_sai1_a);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/readme.txt b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/readme.txt
new file mode 100644
index 000000000..04080c3b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SAI/SAI_AudioPlay/readme.txt
@@ -0,0 +1,77 @@
+/**
+  @page SAI_AudioPlay  Description of the SAI audio play example
+
+  @verbatim
+  ******************************************************************************
+  * @file    SAI/SAI_AudioPlay/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the SAI audio play example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This example shows how to use the SAI HAL API to play an audio file using the DMA
+circular mode and how to handle the buffer update.
+
+      Plug a headphone to ear the sound  /!\ Take care of yours ears.
+      Default volume is 30%.
+      The audio file is played in loop
+      @Note: Copy file 'audio.bin' (available in AudioFile) directly in the flash
+      at @0x08040000 using ST-Link utility or STM32CubeProgrammer
+Once started, LED1 is toggling on STM32G474E-EVAL1 Rev B.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Audio, SAI, DMA, Buffer Update, Play, Headphone, Audio protocol.
+
+@par Directory contents
+
+  - SAI/SAI_AudioPlay/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - SAI/SAI_AudioPlay/Src/main.c                  Main program
+  - SAI/SAI_AudioPlay/Src/system_stm32g4xx.c      STM32G4xx system source file
+  - SAI/SAI_AudioPlay/Src/stm32g4xx_it.c          Interrupt handlers
+  - SAI/SAI_AudioPlay/Inc/main.h                  Main program header file
+  - SAI/SAI_AudioPlay/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - SAI/SAI_AudioPlay/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - SAI/SAI_AudioPlay/AudioFile/audio.bin         Audio wave extract.
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+    board and can be easily tailored to any other supported device
+    and development board.
+
+  - STM32G474E-EVAL1 Rev B Set-up :
+    - Plug headset on Audio_Out JACK connector (CN26).
+
+@par How to use it?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/.extSettings b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/.extSettings
new file mode 100644
index 000000000..e1b35db79
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/.extSettings
@@ -0,0 +1,12 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152;..\..\..\..\..\..\Drivers\BSP\Components\Common;..\..\..\..\..\..\Utilities\LCD
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/stm32g4xx_tsensor.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c;../../../../../../Drivers/BSP/Components/hx8347d/hx8347d.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
+Drivers/STM32G4xx_HAL_Driver=../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c;../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c;
+Drivers/Utilities/LCD=../../../../../../Utilities/LCD/stm32_lcd.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/Project.eww
new file mode 100644
index 000000000..e33b4dc34
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\SMBUS_TSENSOR.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/SMBUS_TSENSOR.ewd b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/SMBUS_TSENSOR.ewd
new file mode 100644
index 000000000..ce8daa63e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/SMBUS_TSENSOR.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>SMBUS_TSENSOR</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>150.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/SMBUS_TSENSOR.ewp b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/SMBUS_TSENSOR.ewp
new file mode 100644
index 000000000..dc3050ee0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/SMBUS_TSENSOR.ewp
@@ -0,0 +1,1178 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>SMBUS_TSENSOR</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>SMBUS_TSENSOR/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>SMBUS_TSENSOR/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>SMBUS_TSENSOR/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/Common</state>
+          <state>$PROJ_DIR$/../../../../../../Utilities/LCD</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
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+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_tsensor.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
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+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
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+  <group>
+    <name>Drivers</name>
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+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
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+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c</name>
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+        <file>
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+        <file>
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+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
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+      <name>Utilities</name>
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+        <name>LCD</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Utilities/LCD/stm32_lcd.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
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+      <file>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
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+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..65bffb533
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/main.h
new file mode 100644
index 000000000..098d0cc4c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/main.h
@@ -0,0 +1,72 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/Inc/main.h 
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g4xx_tsensor.h"
+#include "stm32g474e_eval.h"
+#include "stm32g474e_eval_lcd.h"
+#include "stm32_lcd.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stlogo.h b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stlogo.h
new file mode 100644
index 000000000..f6dd5ad87
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stlogo.h
@@ -0,0 +1,577 @@
+const unsigned char stlogo[9174]=
+{
+0x42,0x4d,0xd6,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x36,0x00,0x00,0x00,0x28,0x00,
+0x00,0x00,0x50,0x00,0x00,0x00,0x39,0x00,0x00,0x00,0x01,0x00,0x10,0x00,0x03,0x00,
+0x00,0x00,0xa0,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x98,0xb5,0xa9,0x08,
+0x4b,0x29,0x27,0x00,0xd2,0x7b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x7f,0xd7,0x5f,0xc7,0x1e,0xb7,0x9f,0xdf,0x3f,0xc7,0x5f,0xc7,0x3e,0xc7,0x3f,0xc7,
+0x5f,0xc7,0xff,0xff,0xdf,0xf7,0xbe,0x9e,0xbe,0xa6,0xff,0xff,0xff,0xff,0xff,0xf7,
+0x9e,0x96,0xff,0xff,0xff,0xff,0xff,0xff,0xd6,0x9c,0x14,0x84,0xdc,0xde,0xfa,0xc5,
+0xff,0xff,0xff,0xff,0xb5,0x9c,0x34,0x8c,0x3a,0xce,0x3d,0xef,0xa9,0x08,0x34,0x8c,
+0xd6,0x9c,0x1a,0xce,0x04,0x00,0xff,0xff,0xb8,0xbd,0xff,0xff,0xff,0xff,0xf9,0xc5,
+0xff,0xff,0xff,0xff,0x98,0xb5,0xbf,0xff,0xff,0xff,0x37,0xad,0xf3,0x7b,0xfd,0xe6,
+0xff,0xff,0xdc,0xde,0xdc,0xde,0xff,0xff,0xff,0xff,0x99,0xb5,0xff,0xff,0x9c,0xd6,
+0xdc,0xde,0xff,0xff,0xff,0xff,0x57,0xad,0xf3,0x7b,0xdc,0xde,0xff,0xff,0xff,0xff,
+0xdf,0xff,0x14,0x84,0x95,0x94,0xfd,0xe6,0x1a,0xc6,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xde,0xae,0xdb,0x14,0xdd,0x5d,0x1e,0xbf,0xfb,0x1c,0x5d,0x7e,0x9e,0x96,0xdb,0x14,
+0x9e,0x96,0xdf,0xf7,0xbb,0x04,0x7d,0x8e,0x3d,0x76,0xbb,0x04,0xff,0xff,0x3d,0x7e,
+0xbb,0x04,0x3d,0x7e,0xff,0xff,0xc9,0x10,0xcd,0x31,0xf3,0x73,0x07,0x00,0x06,0x00,
+0xff,0xff,0xc9,0x10,0x2d,0x3a,0x51,0x63,0x04,0x00,0x54,0x84,0x13,0x84,0x89,0x00,
+0xf3,0x7b,0x0a,0x11,0x06,0x00,0xd8,0xbd,0x06,0x00,0xff,0xff,0xff,0xff,0x06,0x00,
+0xff,0xff,0xff,0xff,0x05,0x00,0xbc,0xde,0x0d,0x3a,0x2a,0x19,0xd3,0x73,0x05,0x00,
+0x78,0xb5,0xb2,0x6b,0x51,0x6b,0xff,0xff,0xff,0xff,0x03,0x00,0xdf,0xff,0x0e,0x3a,
+0xb2,0x73,0xff,0xff,0x0d,0x3a,0x0a,0x11,0x14,0x7c,0x05,0x00,0x77,0xad,0xff,0xff,
+0x06,0x00,0x10,0x5b,0xf0,0x5a,0x04,0x00,0x4b,0x21,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x1c,0x25,0x5f,0xdf,0xff,0xff,0x3a,0x2d,0xdf,0xff,0xff,0xff,0x1c,0x25,
+0xff,0xff,0x1d,0x76,0x9e,0x96,0xff,0xff,0xff,0xff,0xff,0xae,0x5f,0xd7,0xff,0xff,
+0x7e,0x86,0xff,0xff,0x98,0xb5,0x88,0x08,0xff,0xff,0xff,0xff,0x5d,0xef,0x07,0x00,
+0x7e,0xef,0x06,0x00,0xff,0xff,0xff,0xff,0x11,0x5b,0x51,0x6b,0x06,0x00,0xff,0xff,
+0xff,0xff,0xff,0xff,0x05,0x00,0x1a,0xc6,0x27,0x00,0xff,0xff,0xff,0xff,0x69,0x08,
+0xff,0xff,0xff,0xff,0x27,0x00,0x37,0xa5,0x07,0x00,0xff,0xff,0xdf,0xff,0x3a,0xce,
+0xab,0x31,0x14,0x84,0xb2,0x73,0xff,0xff,0xff,0xff,0x06,0x00,0xff,0xff,0xaf,0x52,
+0x34,0x84,0x3a,0xce,0x06,0x00,0xff,0xff,0xdf,0xff,0xf9,0xc5,0x8b,0x31,0x12,0x5b,
+0x10,0x5b,0xff,0xff,0xff,0xff,0x95,0x94,0x4b,0x21,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
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+0xff,0xff,0xdc,0xce,0xb6,0x64,0x93,0x33,0x93,0x2b,0xb4,0x33,0xb4,0x33,0xd5,0x33,
+0xd4,0x33,0xf5,0x33,0xf5,0x33,0x16,0x34,0x16,0x34,0x36,0x3c,0x16,0x3c,0x36,0x3c,
+0x36,0x3c,0x56,0x44,0x56,0x44,0x77,0x4c,0x76,0x4c,0x97,0x4c,0x96,0x4c,0x97,0x54,
+0x97,0x54,0xb7,0x54,0xb7,0x54,0xd8,0x5c,0xb7,0x54,0xd7,0x5c,0xb7,0x54,0xb8,0x54,
+0x97,0x54,0x97,0x54,0x97,0x4c,0x97,0x4c,0x77,0x4c,0x97,0x4c,0x77,0x44,0x77,0x44,
+0x56,0x44,0x77,0x44,0x56,0x3c,0x57,0x3c,0x36,0x3c,0x36,0x3c,0x16,0x3c,0x36,0x3c,
+0x15,0x3c,0x15,0x3c,0xd4,0x33,0x18,0x6d,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0xef,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xe7,0x3d,0xdf,0x5d,0xdf,0x3d,0xdf,0x3e,0xe7,0x3d,0xdf,0x3d,0xdf,0x3d,0xdf,
+0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xe7,0x5d,0xdf,0x5e,0xe7,0x5e,0xdf,0x5e,0xe7,0x5d,0xdf,0x5e,0xe7,0x5e,0xdf,
+0x7e,0xe7,0x5e,0xdf,0x7e,0xe7,0x5e,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,
+0x7f,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff
+};
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..b0f21ecd8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+#define HAL_SMBUS_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..a9799b3a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_it.h
@@ -0,0 +1,63 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void I2C3_EV_IRQHandler(void);
+void I2C3_ER_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_tsensor.h b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_tsensor.h
new file mode 100644
index 000000000..60613e873
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_tsensor.h
@@ -0,0 +1,204 @@
+/**
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_tsensor.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for
+  *          the stm32g4xx_tsensor.c temperature sensor driver.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+  
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TSENSOR_H
+#define __TSENSOR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+   
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup Components
+  * @{
+  */
+
+/** @addtogroup TSENSOR
+  * @{
+  */
+
+/** @defgroup TSENSOR_Exported_Types
+  * @{
+  */ 
+/** 
+  * @brief  Temperature Sensor driver structure definition  
+  */
+typedef struct
+{
+  uint8_t AlertMode;            /* Alert Mode Temperature out of range*/
+  uint8_t ConversionMode;       /* Continuous/One Shot Mode */
+  uint8_t ConversionResolution; /* Temperature Resolution */
+  uint8_t ConversionRate;       /* Number of measure per second */
+  uint8_t TemperatureLimitHigh; /* High Temperature Limit Range */
+  uint8_t TemperatureLimitLow;  /* Low Temperature Limit Range */
+}TSENSOR_InitTypeDef;
+
+/** 
+  * @brief  TSENSOR Status structures definition  
+  */  
+typedef enum 
+{
+  TSENSOR_OK       = 0x00,
+  TSENSOR_ERROR    = 0x01,
+  TSENSOR_ALERT    = 0x02
+} TSENSOR_StatusTypeDef;
+
+/** @defgroup TSENSOR_Exported_Constants
+  * @{
+  */
+/******************************************************************************/
+/*************************** START REGISTER MAPPING  **************************/
+/******************************************************************************/
+/***************************** Read Access Only *******************************/
+#define TSENSOR_STATUS                          0x01  /*!< Status Register */
+#define TSENSOR_TEMP_VALUE_HIGH_BYTE            0x00  /*!< Temperature value high byte Register */
+#define TSENSOR_TEMP_VALUE_LOW_BYTE             0x02  /*!< Temperature value low byte Register */
+
+#define TSENSOR_PRODUCT_ID                      0xFD  /*!< Product Identifier Register */
+#define TSENSOR_MANUFACTURER_ID                 0xFE  /*!< Manufacturer Identifier Register */
+#define TSENSOR_REVISION_ID                     0xFF  /*!< Revision Number Identifier Register */
+
+   /***************************** Write Access Only ******************************/
+#define TSENSOR_ONE_SHOT                        0x0F  /*!< Single Conversion Request Register */
+
+   
+/***************************** Read/Write Access ******************************/
+#define TSENSOR_CONFIGURATION                   0x03  /*!< Configuration Register */
+#define TSENSOR_CONVERSION_RATE                 0x04  /*!< Conversion Rate Register */
+#define TSENSOR_TEMP_HIGH_LIMIT_HIGH_BYTE       0x05  /*!< High Temperature Limit high byte Register */
+#define TSENSOR_TEMP_HIGH_LIMIT_LOW_BYTE        0x06  /*!< High Temperature Limit low byte Register */
+#define TSENSOR_TEMP_LOW_LIMIT_HIGH_BYTE        0x07  /*!< Low Temperature Limit high byte Register */
+#define TSENSOR_TEMP_LOW_LIMIT_LOW_BYTE         0x08  /*!< Low Temperature Limit low byte Register */
+
+
+#define TSENSOR_THERM_LIMIT                     0x20  /*!< THERM Limit Register */
+#define TSENSOR_THERM_HYSTERISIS                0x21  /*!< THERM Hysteris Register */
+#define TSENSOR_SMBUS_TIMEOUT                   0x22  /*!< SMBUS Timeout Enabling Register */
+
+
+/******************************************************************************/
+/**************************** END REGISTER MAPPING  ***************************/
+/******************************************************************************/
+/** @defgroup Status_Value
+  * @{
+  */
+#define TSENSOR_TEMP_CROSS_THERM_LIMIT          ((uint8_t)0x01) /* Temperature measured has crossed the Therm limit */
+#define TSENSOR_TEMP_IS_OR_BELOW_LOW_LIMIT      ((uint8_t)0x20) /* Temperature is at or below the Low Limit         */
+#define TSENSOR_TEMP_EXCEED_HIGH_LIMIT          ((uint8_t)0x40) /* Temperature Limit High has been exceeded         */
+#define TSENSOR_BUSY                            ((uint8_t)0x80) /* Temperature Conversion is in progress            */
+/**
+  * @}
+  */
+
+/** @defgroup EVENT_Pin_selection 
+  * @{
+  */
+#define TSENSOR_ALERT_ENABLE                    ((uint8_t)0x00)
+#define TSENSOR_ALERT_DISABLE                   ((uint8_t)0x80)
+/**
+  * @}
+  */
+
+/** @defgroup Conversion_Mode_Selection 
+  * @{
+  */
+#define TSENSOR_CONTINUOUS_MODE                 ((uint8_t)0x00)
+#define TSENSOR_ONE_SHOT_MODE                   ((uint8_t)0x40)
+/**
+  * @}
+  */
+
+/** @defgroup Conversion_Bits_Resolution_Selection
+  * @{
+  */
+#define TSENSOR_CONV_9BITS                      ((uint8_t)0x08)
+#define TSENSOR_CONV_10BITS                     ((uint8_t)0x00)
+#define TSENSOR_CONV_11BITS                     ((uint8_t)0x04)
+#define TSENSOR_CONV_12BITS                     ((uint8_t)0x0C)
+/**
+  * @}
+  */
+
+/** @defgroup Conversion_Rate_Per_Second_Selection
+  * @{
+  */
+#define TSENSOR_ONE_SIXTEENTH_PER_SECOND        ((uint8_t)0x00) /* 0.0625 conversion/Second     */
+#define TSENSOR_ONE_EIGHTH_PER_SECOND           ((uint8_t)0x01) /* 0.125 conversion/Second      */
+#define TSENSOR_ONE_QUATER_PER_SECOND           ((uint8_t)0x02) /* 0.25 conversion/Second       */
+#define TSENSOR_HALF_PER_SECOND                 ((uint8_t)0x03) /* 0.5 conversion/Second        */
+#define TSENSOR_ONE_PER_SECOND                  ((uint8_t)0x04) /* 1 conversion/Second          */
+#define TSENSOR_TWO_PER_SECOND                  ((uint8_t)0x05) /* 2 conversions/Second         */
+#define TSENSOR_FOUR_PER_SECOND                 ((uint8_t)0x05) /* 4 conversions/Second         */
+#define TSENSOR_HEIGH_PER_SECOND                ((uint8_t)0x07) /* 8 conversions/Second         */
+#define TSENSOR_SIXTEEN_PER_SECOND              ((uint8_t)0x08) /* 16 conversions/Second        */
+#define TSENSOR_THIRTY_TWO_PER_SECOND           ((uint8_t)0x09) /* 32 conversions/Second        */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+ 
+/** @defgroup TSENSOR_Exported_Functions
+  * @{
+  */
+/* Sensor Configuration Functions */ 
+TSENSOR_StatusTypeDef   TSENSOR_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct);
+TSENSOR_StatusTypeDef   TSENSOR_IsReady(uint16_t DeviceAddr, uint32_t Trials);
+
+/* Sensor Request Functions */
+uint8_t                 TSENSOR_ReadStatus(uint16_t DeviceAddr);
+uint16_t                TSENSOR_ReadTemp(uint16_t DeviceAddr);
+uint8_t                 TSENSOR_AlerteResponseAddressRead(void);
+
+/* Sensor Callbacks */
+void                    TSENSOR_ErrorCallback(uint16_t Error);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+ }
+#endif
+  
+#endif /* __TSENSOR_H */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/SMBUS_TSENSOR.uvoptx b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/SMBUS_TSENSOR.uvoptx
new file mode 100644
index 000000000..d76a41446
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/SMBUS_TSENSOR.uvoptx
@@ -0,0 +1,701 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>SMBUS_TSENSOR</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr.c</FilenameWithoutPath>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/CMSIS</GroupName>
+    <tvExp>0</tvExp>
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+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
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+      <bShared>0</bShared>
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+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/SMBUS_TSENSOR.uvprojx b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/SMBUS_TSENSOR.uvprojx
new file mode 100644
index 000000000..4eb98ad47
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/SMBUS_TSENSOR.uvprojx
@@ -0,0 +1,622 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>SMBUS_TSENSOR</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>SMBUS_TSENSOR\Exe\</OutputDirectory>
+          <OutputName>SMBUS_TSENSOR</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
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+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
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+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
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+            <useUlib>1</useUlib>
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+            <RwSelD>3</RwSelD>
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+            <OptFeed>0</OptFeed>
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+                <Size>0x0</Size>
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+            <Misc></Misc>
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+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
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+          <GroupName>Application/User</GroupName>
+          <Files>
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+              <FilePath>../Src/stm32g4xx_tsensor.c</FilePath>
+            </File>
+            <File>
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+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
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+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
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+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
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+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
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+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
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+              <FileName>stm32g474e_eval_io.c</FileName>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
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+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
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+          <GroupName>Drivers/BSP/Components</GroupName>
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+            <File>
+              <FileName>hx8347d_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c</FilePath>
+            </File>
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+              <FileName>hx8347d.c</FileName>
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+              <FilePath>../../../../../../Drivers/BSP/Components/hx8347d/hx8347d.c</FilePath>
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+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
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+              <FileName>mfxstm32l152.c</FileName>
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+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
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+          <GroupName>Drivers/Utilities/LCD</GroupName>
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+              <FileName>stm32_lcd.c</FileName>
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+              <FilePath>../../../../../../Utilities/LCD/stm32_lcd.c</FilePath>
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+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_smbus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="SMBUS_TSENSOR"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..63c3bd75f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x1000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/SMBUS_TSENSOR.ioc b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/SMBUS_TSENSOR.ioc
new file mode 100644
index 000000000..626cea727
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/SMBUS_TSENSOR.ioc
@@ -0,0 +1,153 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+I2C3.I2C_Coeff_DF=0
+I2C3.I2C_Fall_Time=20
+I2C3.I2C_Rise_Time=640
+I2C3.I2C_Speed_Mode=I2C_Standard
+I2C3.IPParameters=I2C_Speed_Mode,Speed,I2C_Rise_Time,I2C_Fall_Time,I2C_Coeff_DF,SMBusAnalogFilter,SMBusPacketErrorCheckMode,SMBusPeripheralMode,SMBusNoStretchMode,SMBusGeneralCallMode,SMBusAddressingMode,SMBusDualAddressMode,SMBusOwnAddress,TEXTEN,TIDLE,TIMEOUT_time
+I2C3.SMBusAddressingMode=SMBUS_ADDRESSINGMODE_7BIT
+I2C3.SMBusAnalogFilter=SMBUS_ANALOGFILTER_ENABLE
+I2C3.SMBusDualAddressMode=SMBUS_DUALADDRESS_DISABLE
+I2C3.SMBusGeneralCallMode=SMBUS_GENERALCALL_DISABLE
+I2C3.SMBusNoStretchMode=SMBUS_NOSTRETCH_DISABLE
+I2C3.SMBusOwnAddress=1
+I2C3.SMBusPacketErrorCheckMode=SMBUS_PEC_DISABLE
+I2C3.SMBusPeripheralMode=SMBUS_PERIPHERAL_MODE_SMBUS_HOST
+I2C3.Speed=100
+I2C3.TEXTEN=SMBUS_TEXTEN_DISABLED
+I2C3.TIDLE=SMBUS_TIDLE_DISABLED
+I2C3.TIMEOUT_time=25000000
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=I2C3
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PG6
+Mcu.Pin1=PG7
+Mcu.Pin2=PG8
+Mcu.Pin3=VP_SYS_VS_Systick
+Mcu.Pin4=VP_SYS_VS_DBSignals
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.I2C3_ER_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.I2C3_EV_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PG6.GPIOParameters=GPIO_Pu
+PG6.GPIO_Pu=GPIO_PULLUP
+PG6.Mode=SMBus-Alert-mode
+PG6.Signal=I2C3_SMBA
+PG7.GPIOParameters=GPIO_Pu
+PG7.GPIO_Pu=GPIO_PULLUP
+PG7.Mode=SMBus-Alert-mode
+PG7.Signal=I2C3_SCL
+PG8.GPIOParameters=GPIO_Pu
+PG8.GPIO_Pu=GPIO_PULLUP
+PG8.Mode=SMBus-Alert-mode
+PG8.Signal=I2C3_SDA
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=SMBUS_TSENSOR.ioc
+ProjectManager.ProjectName=SMBUS_TSENSOR
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x1000
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_I2C3_SMBUS_Init-I2C3-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=SMBUS_TSENSOR
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..2783da816
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/.cproject
@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.951084261">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.951084261" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.951084261" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.951084261." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.970142766" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1196806883" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.80427102" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.406336555" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.705280210" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.195966301" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1376658755" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.2109814530" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.977402292" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.50181583" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../../../../../../Utilities/LCD | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/Components/Common | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.208729647" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/SMBUS_TSENSOR}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1923474313" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1374022823" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.416498562" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.266275244" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1494171963" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.262747416" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1707121196" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.34364242" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.734234427" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Utilities/LCD"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/Common"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1705510438" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1761198942" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1255797818" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.806445909" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1809442506" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.699822790" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.11595924" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.432714853" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.33622383" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1382531140" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.577497981" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.627001589" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.230016260" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../../../../../../Utilities/LCD | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/Components/Common | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1630489601" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/SMBUS_TSENSOR}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.844207181" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1960851545" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1756683573" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.994254244" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1328747726" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1896876559" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1109919928" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Utilities/LCD"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/Common"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1243768897" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.452782477" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.450311884" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.508317329" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.197620088" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1905770310" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1707545982" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.348842925" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1381686333" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.120331529" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1606172448" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1206685287" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1346940087" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.83892153" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="SMBUS_TSENSOR.null.1625163765" name="SMBUS_TSENSOR"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.759109941;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.759109941.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1756683573;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1072444263">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.951084261;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.951084261.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1494171963;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1705510438">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/.project
new file mode 100644
index 000000000..661832060
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/.project
@@ -0,0 +1,220 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>SMBUS_TSENSOR</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>SMBUS_TSENSOR.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/SMBUS_TSENSOR.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_tsensor.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_tsensor.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_smbus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/hx8347d.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/hx8347d_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/Utilities/LCD/stm32_lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Utilities/LCD/stm32_lcd.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..76966f58a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x1000;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/main.c
new file mode 100644
index 000000000..5a8697a55
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/main.c
@@ -0,0 +1,570 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/Src/main.c 
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx SMBUS HAL API.
+  *          The communication is done using an Temperature Sensor STTS751
+  *          on STM32G474E-EVAL1 Eval board.
+  *          =================================================================== 
+  *          Notes:
+  *           - The Temperature Sensor (STTS751) is compatible
+  *             with the SMBUS protocol.
+  *          ===================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stlogo.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+SMBUS_HandleTypeDef hsmbus3;
+
+/* USER CODE BEGIN PV */
+/* Private define ------------------------------------------------------------*/
+#define TSENSOR_ADDR            0x90    /* STTS751 Address  */
+#define TEMPERATURE_LOW         23      /* 23°C             */
+#define TEMPERATURE_HIGH        27      /* 27°C             */
+
+/* Private variables ---------------------------------------------------------*/
+TSENSOR_InitTypeDef TSENSOR_InitStructure;
+
+/* Useful variables */
+uint16_t temperaturevalue = 0;
+uint8_t  alertoccurs = 0;
+uint8_t  requestsample = 0;
+uint32_t tick = 0;
+uint8_t  addressalert = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_I2C3_SMBUS_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+static void Display_ExampleDescription(void);
+static void TSENSOR_SetHint(void);
+static void TSENSOR_Display_Temperature(uint16_t Temperature);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /*##-1- Initialize the LCD #################################################*/
+  BSP_LCD_Init(0, LCD_ORIENTATION_LANDSCAPE);
+  UTIL_LCD_SetFuncDriver(&LCD_Driver); /* SetFunc before setting device */
+  UTIL_LCD_SetDevice(0);            /* SetDevice after funcDriver is set */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_I2C3_SMBUS_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Configure User push-button */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_GPIO);
+   
+  /*##-2- Display welcome messages on LCD ####################################*/  
+  Display_ExampleDescription();
+
+  /* Wait for User push-button press before starting the Example */
+  while (BSP_PB_GetState(BUTTON_USER) != GPIO_PIN_RESET)
+  {
+  }
+  
+  /* Wait for User push-button release before starting the Example */
+  while (BSP_PB_GetState(BUTTON_USER) != GPIO_PIN_SET)
+  {
+  }
+
+  /*##-3- Display Example Template ###########################################*/  
+  TSENSOR_SetHint();
+
+  /*##-4- Configure the Temperature Sensor ###################################*/
+  /* Conversion 12 bits in continuous mode at one conversion per second */
+  /* Alert outside range Limit Temperature */
+  TSENSOR_InitStructure.AlertMode             = TSENSOR_ALERT_ENABLE;
+  TSENSOR_InitStructure.ConversionMode        = TSENSOR_CONTINUOUS_MODE;
+  TSENSOR_InitStructure.ConversionResolution  = TSENSOR_CONV_12BITS;
+  TSENSOR_InitStructure.ConversionRate        = TSENSOR_ONE_PER_SECOND;           
+  TSENSOR_InitStructure.TemperatureLimitHigh  = TEMPERATURE_HIGH;
+  TSENSOR_InitStructure.TemperatureLimitLow   = TEMPERATURE_LOW;
+
+  if (TSENSOR_Init(TSENSOR_ADDR, &TSENSOR_InitStructure) != TSENSOR_OK)
+  {
+    /* Initialization Error */
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+    UTIL_LCD_DisplayStringAt(0, 115, (uint8_t*)"Initialization problem", CENTER_MODE); 
+    Error_Handler();
+  }
+
+  /* Initialize tick counter */
+  tick = HAL_GetTick();
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  /*##-5- Main loop to manage Alert and display Temperature Measured #########*/
+  while (1)
+  {
+    /* Check if a new temperature read is requested to display                */
+    if (requestsample == 1)
+    {
+      /* Read and Display the current temperature                             */
+      temperaturevalue = TSENSOR_ReadTemp(TSENSOR_ADDR);
+
+      /* Clear previous warning message */
+      UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);    
+      UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)"                       ", CENTER_MODE);
+      UTIL_LCD_DisplayStringAt(0, 175, (uint8_t *)"                       ", CENTER_MODE);
+
+      TSENSOR_Display_Temperature(temperaturevalue);
+      
+      /* Reset the sampling request                                           */
+      tick = HAL_GetTick();
+      requestsample = 0;
+    }
+    else
+    {
+      /* Request a Temperature sampling each 1s <-> 1000 ms                   */
+      if (HAL_GetTick() >= tick + 1000)
+      {
+        /* Set the sampling request                                           */
+        requestsample = 1;
+      }
+    }
+    
+    /* Check if an alert occurs                                               */
+    if (alertoccurs == 1)
+    {
+      /* Get the Address of temperature sensor in Alert Mode                  */
+      addressalert = TSENSOR_AlerteResponseAddressRead();
+      
+      /* Display warning message depends on Limit value                       */
+      if ((TSENSOR_ReadStatus(addressalert) & TSENSOR_TEMP_EXCEED_HIGH_LIMIT) == TSENSOR_TEMP_EXCEED_HIGH_LIMIT)
+      {
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+        /* Display warning message Temperature high limit exceeded            */
+        UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)"Temperature Limit High", CENTER_MODE);
+        UTIL_LCD_DisplayStringAt(0, 175, (uint8_t *)"has been exceeded", CENTER_MODE);
+      }
+      else
+      {
+        UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_ST_BLUE);
+        /* Display warning message Temperature is at or blow low limit        */
+        UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)" Temperature is at or ", CENTER_MODE);
+        UTIL_LCD_DisplayStringAt(0, 175, (uint8_t *)"below the Low Limit", CENTER_MODE);
+      }
+      alertoccurs = 0;
+    }
+        
+    HAL_Delay(5);
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief I2C3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C3_SMBUS_Init(void)
+{
+
+  /* USER CODE BEGIN I2C3_Init 0 */
+
+  /* USER CODE END I2C3_Init 0 */
+
+  /* USER CODE BEGIN I2C3_Init 1 */
+
+  /* USER CODE END I2C3_Init 1 */
+  hsmbus3.Instance = I2C3;
+  hsmbus3.Init.Timing = 0x00303D5B;
+  hsmbus3.Init.AnalogFilter = SMBUS_ANALOGFILTER_ENABLE;
+  hsmbus3.Init.OwnAddress1 = 2;
+  hsmbus3.Init.AddressingMode = SMBUS_ADDRESSINGMODE_7BIT;
+  hsmbus3.Init.DualAddressMode = SMBUS_DUALADDRESS_DISABLE;
+  hsmbus3.Init.OwnAddress2 = 0;
+  hsmbus3.Init.OwnAddress2Masks = SMBUS_OA2_NOMASK;
+  hsmbus3.Init.GeneralCallMode = SMBUS_GENERALCALL_DISABLE;
+  hsmbus3.Init.NoStretchMode = SMBUS_NOSTRETCH_DISABLE;
+  hsmbus3.Init.PacketErrorCheckMode = SMBUS_PEC_DISABLE;
+  hsmbus3.Init.PeripheralMode = SMBUS_PERIPHERAL_MODE_SMBUS_HOST;
+  hsmbus3.Init.SMBusTimeout = 0x000080C3;
+  if (HAL_SMBUS_Init(&hsmbus3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** configuration Alert Mode
+  */
+  if (HAL_SMBUS_EnableAlert_IT(&hsmbus3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN I2C3_Init 2 */
+
+  /* USER CODE END I2C3_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Display main example message
+  * @param  None
+  * @retval None
+  */
+static void Display_ExampleDescription(void)
+{
+  uint32_t x_size;
+  uint32_t y_size;
+  
+  /* Clear the LCD */ 
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE); 
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+  BSP_LCD_DisplayOn(0);
+  
+  /* Set GUI font */
+  UTIL_LCD_SetFont(&UTIL_LCD_DEFAULT_FONT);
+
+  /* Set the LCD Text Color */
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_ST_BLUE_DARK);
+
+  /* Display LCD messages */
+  UTIL_LCD_DisplayStringAt(0, 10, (uint8_t *)"STM32G474QETx", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 35, (uint8_t *)"Example", CENTER_MODE);
+  
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+  
+  /* Draw Bitmap */
+  UTIL_LCD_DrawBitmap((x_size - 80)/2, 65, (uint8_t *)stlogo);
+  
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, y_size- 20, (uint8_t *)"Copyright (c) STMicroelectronics 2019", CENTER_MODE);
+  
+  UTIL_LCD_SetFont(&Font16);
+  UTIL_LCD_FillRect(0, y_size/2 + 15, x_size, 60, UTIL_LCD_COLOR_ST_BLUE_DARK);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_ST_BLUE_DARK); 
+  UTIL_LCD_DisplayStringAt(0, y_size/2 + 15, (uint8_t *)"Press User push-button", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, y_size/2 + 30, (uint8_t *)"to start :", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)" TEMPERATURE SENSOR Example", CENTER_MODE);
+}
+
+/**
+  * @brief  Display TSENSOR Demo Hint
+  * @param  None
+  * @retval None
+  */
+static void TSENSOR_SetHint(void)
+{
+  uint32_t x_size;
+  uint32_t y_size;
+  
+  /* Clear the LCD */ 
+  UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+  
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+  
+  /* Set LCD Demo description */
+  UTIL_LCD_FillRect(0, 0, x_size, 80, UTIL_LCD_COLOR_ST_BLUE_DARK);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_ST_BLUE_DARK);
+  UTIL_LCD_SetFont(&Font24);
+  UTIL_LCD_DisplayStringAt(0, 0, (uint8_t*)"TEMPERATURE SENSOR", CENTER_MODE);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 30, (uint8_t*)"This example shows how to", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 45, (uint8_t*)"read a Temperature", CENTER_MODE); 
+  UTIL_LCD_DisplayStringAt(0, 60, (uint8_t*)"and manage temperature limit alert", CENTER_MODE);
+
+  UTIL_LCD_DrawRect(10, 90, x_size - 20, y_size - 100, UTIL_LCD_COLOR_ST_BLUE_DARK);
+  UTIL_LCD_DrawRect(11, 91, x_size - 22, y_size - 102, UTIL_LCD_COLOR_ST_BLUE_DARK);
+
+  /* Prepare LCD to display */
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_FillRect(12, 92, x_size - 24, y_size - 104, UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+}
+
+  /**
+  * @brief  Display temperature
+  * @param  temperature : temperature value
+  * @retval None
+  */
+static void TSENSOR_Display_Temperature(uint16_t Temperature)
+{
+  uint8_t tempcelsiusdisplay[] = "+abc.dddd C";
+  uint16_t temperaturevalue = Temperature;
+  uint16_t temperaturevaluecelsius = 0;
+  uint32_t tempcelsius = 0;
+
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+  UTIL_LCD_SetFont(&Font12);
+  UTIL_LCD_DisplayStringAt(0, 115, (uint8_t*)"Measured Temperature : ", CENTER_MODE);
+
+  /* Change Font size to display Temperature Value */
+  UTIL_LCD_SetFont(&Font16);
+
+  /* Verify the sign of the temperature */
+  if (temperaturevalue <= 2048)
+  {
+    /* Positive temperature measured */
+    tempcelsiusdisplay[0] = '+';
+    /* Initialize the temperature sensor value*/
+    temperaturevaluecelsius = temperaturevalue;
+    /* Set Text color to Green */
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_ST_GREEN_DARK);
+  }
+  else
+  {
+    /* Negative temperature measured */
+    tempcelsiusdisplay[0] = '-';
+    /* Remove temperature value sign */
+    temperaturevaluecelsius = 0x1000 - temperaturevalue;
+    /* Set Text color to Blue */
+    UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_ST_BLUE_DARK);
+  }
+
+  tempcelsius = 0;
+  /* Calculate temperature digits in °C */
+  if (temperaturevaluecelsius & 0x01)
+  {
+    tempcelsius += 625;     
+  }
+  if (temperaturevaluecelsius & 0x02)
+  {
+    tempcelsius += 1250;
+  }
+  if (temperaturevaluecelsius & 0x04)
+  {
+    tempcelsius += 2500;
+  }
+  if (temperaturevaluecelsius & 0x08)
+  {
+    tempcelsius += 5000;
+  }
+  
+  tempcelsiusdisplay[5] = (tempcelsius / 1000) + 0x30;
+  tempcelsiusdisplay[6] = ((tempcelsius % 1000) / 100) + 0x30;
+  tempcelsiusdisplay[7] = (((tempcelsius % 1000) % 100) / 10)+ 0x30;
+  tempcelsiusdisplay[8] = (((tempcelsius % 1000) % 100) % 10) + 0x30;
+    
+  temperaturevaluecelsius >>= 4;
+
+  tempcelsiusdisplay[1] = (temperaturevaluecelsius / 100) + 0x30;
+  tempcelsiusdisplay[2] = ((temperaturevaluecelsius % 100) / 10) + 0x30;
+  tempcelsiusdisplay[3] = ((temperaturevaluecelsius % 100) % 10) + 0x30;
+
+  /* Display Temperature value on LCD */
+  UTIL_LCD_DisplayStringAt(0, 145, tempcelsiusdisplay, CENTER_MODE); 
+}
+
+/**
+  * @brief  TSENSOR error callbacks.
+  * @param  Error : Temperature Sensor Error status.
+  * @retval None
+  */
+void TSENSOR_ErrorCallback(uint16_t Error)
+{
+  if (Error == TSENSOR_ALERT)
+  {
+    alertoccurs = 1;
+  }
+  else
+  {
+    Error_Handler();
+  }
+  
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Clear Previous message on the LCD */
+  uint32_t x_size;
+  uint32_t y_size;
+  
+  BSP_LCD_GetXSize(0, &x_size);
+  BSP_LCD_GetYSize(0, &y_size);
+  
+  UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+  UTIL_LCD_FillRect(12, 92, x_size - 24, y_size- 104, UTIL_LCD_COLOR_WHITE);
+
+  /* Display Communication error message */
+  UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+  UTIL_LCD_DisplayStringAt(0, 115, (uint8_t*)"An error occurs during", CENTER_MODE); 
+  UTIL_LCD_DisplayStringAt(0, 130, (uint8_t*)"communication with", CENTER_MODE);
+  UTIL_LCD_DisplayStringAt(0, 145, (uint8_t*)"the temperature sensor", CENTER_MODE);
+
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..3c6446d4d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,175 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief SMBUS MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hsmbus: SMBUS handle pointer
+* @retval None
+*/
+void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef* hsmbus)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hsmbus->Instance==I2C3)
+  {
+  /* USER CODE BEGIN I2C3_MspInit 0 */
+
+  /* USER CODE END I2C3_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C3;
+    PeriphClkInit.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    /**I2C3 GPIO Configuration
+    PG6     ------> I2C3_SMBA
+    PG7     ------> I2C3_SCL
+    PG8     ------> I2C3_SDA
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    /* Peripheral clock enable */
+    __HAL_RCC_I2C3_CLK_ENABLE();
+    /* I2C3 interrupt Init */
+    HAL_NVIC_SetPriority(I2C3_EV_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(I2C3_EV_IRQn);
+    HAL_NVIC_SetPriority(I2C3_ER_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(I2C3_ER_IRQn);
+  /* USER CODE BEGIN I2C3_MspInit 1 */
+
+  /* USER CODE END I2C3_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief SMBUS MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hsmbus: SMBUS handle pointer
+* @retval None
+*/
+void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef* hsmbus)
+{
+  if(hsmbus->Instance==I2C3)
+  {
+  /* USER CODE BEGIN I2C3_MspDeInit 0 */
+
+  /* USER CODE END I2C3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_I2C3_CLK_DISABLE();
+
+    /**I2C3 GPIO Configuration
+    PG6     ------> I2C3_SMBA
+    PG7     ------> I2C3_SCL
+    PG8     ------> I2C3_SDA
+    */
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_7);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_8);
+
+    /* I2C3 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(I2C3_EV_IRQn);
+    HAL_NVIC_DisableIRQ(I2C3_ER_IRQn);
+  /* USER CODE BEGIN I2C3_MspDeInit 1 */
+
+  /* USER CODE END I2C3_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..50994f260
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_it.c
@@ -0,0 +1,147 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern SMBUS_HandleTypeDef hsmbus3;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles I2C3 event interrupt / I2C3 wake-up interrupt through EXTI line 27.
+  */
+void I2C3_EV_IRQHandler(void)
+{
+  /* USER CODE BEGIN I2C3_EV_IRQn 0 */
+
+  /* USER CODE END I2C3_EV_IRQn 0 */
+  HAL_SMBUS_EV_IRQHandler(&hsmbus3);
+  /* USER CODE BEGIN I2C3_EV_IRQn 1 */
+
+  /* USER CODE END I2C3_EV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles I2C3 error interrupt.
+  */
+void I2C3_ER_IRQHandler(void)
+{
+  /* USER CODE BEGIN I2C3_ER_IRQn 0 */
+
+  /* USER CODE END I2C3_ER_IRQn 0 */
+  HAL_SMBUS_ER_IRQHandler(&hsmbus3);
+  /* USER CODE BEGIN I2C3_ER_IRQn 1 */
+
+  /* USER CODE END I2C3_ER_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_tsensor.c b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_tsensor.c
new file mode 100644
index 000000000..dcc719fef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_tsensor.c
@@ -0,0 +1,327 @@
+/**
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_tsensor.c
+  * @author  MCD Application Team
+  * @brief   This file provides a set of functions needed to manage the SMBUS  
+  *          temperature sensor (STTS751) mounted on STM32G474E-EVAL1 board . 
+  *          It implements a high level communication layer for initialized,
+  *          read temperature or get the status of the temperature sensor.
+  *          This driver implements too the SMBUS ALERT protocol.
+  *     +--------------------------------------------------------------------+
+  *     |                        Pin assignment                              |                 
+  *     +----------------------------------------+--------------+------------+
+  *     |  STM32G4xx SMBUS Pins                  |   STTS751    |   Pin      |
+  *     +----------------------------------------+--------------+------------+
+  *     | .                                      |   Addr/Therm |    1       |
+  *     | .                                      |   GND        |    2 (0V)  |
+  *     | .                                      |   VDD        |    3 (3.3V)|
+  *     | TSENSOR_SMBUS_SCL_PIN/ SCL             |   SCL        |    4       |
+  *     | TSENSOR_SMBUS_ALERT_PIN/ SMBUS ALERT   |   EVENT      |    5       |
+  *     | TSENSOR_SMBUS_SDA_PIN/ SDA             |   SDA        |    6       |
+  *     +----------------------------------------+--------------+------------+
+  *      =================================================================== 
+  *     Notes:
+  *         - The Temperature Sensor (STTS751) is compatible
+  *           with the SMBUS protocol.
+  *         - Jumper JP5 and JP6 needs to be set in I2C2 position.
+  *         - Jumper JP1 (SMB) needs to be set.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_tsensor.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup SMBUS_TSENSOR
+  * @{
+  */ 
+
+/** @defgroup TSENSOR
+  * @brief     This file provides a set of functions needed to drive the 
+  *            Temperature Sensor STTS751.
+  * @{
+  */
+
+/** @defgroup TSENSOR_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup TSENSOR_Private_Defines
+  * @{
+  */
+#define TSENSOR_SMBUS               I2C3
+#define TSENSOR_TIMEOUT             1000
+/**
+  * @}
+  */
+
+/** @defgroup TSENSOR_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup TSENSOR_Private_Variables
+  * @{
+  */ 
+/* SMBUS handler declaration */
+extern SMBUS_HandleTypeDef hsmbus3;
+/**
+  * @}
+  */
+
+/** @defgroup TSENSOR_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup TSENSOR_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Set TSENSOR Initialization.
+  * @param  DeviceAddr : Device ID address.
+  * @param  pInitStruct: pointer to a TSENSOR_InitTypeDef structure 
+  *         that contains the configuration setting for the TSENSOR.
+  * @retval TSENSOR status
+  */
+TSENSOR_StatusTypeDef TSENSOR_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct)
+{  
+  uint8_t buffertx[2] = {0,0};
+
+  /*##-1- Verify that Temperature Sensor is ready ############################*/
+  if (TSENSOR_IsReady(DeviceAddr, 20) != TSENSOR_OK )
+  {
+    return TSENSOR_ERROR;
+  }
+
+  /*##-2- Set the Configuration Register #####################################*/
+  buffertx[0] = TSENSOR_CONFIGURATION;
+  buffertx[1] = (uint8_t)(pInitStruct->AlertMode | pInitStruct->ConversionMode | pInitStruct->ConversionResolution);
+  if (HAL_SMBUS_Master_Transmit_IT(&hsmbus3, DeviceAddr, &buffertx[0], sizeof(buffertx), SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) != HAL_OK)
+  {
+    return TSENSOR_ERROR;
+  }
+  while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+  
+  /*##-3- Set the Conversion Rate ############################################*/
+  buffertx[0] = TSENSOR_CONVERSION_RATE;
+  buffertx[1] = (uint8_t)(pInitStruct->ConversionRate);
+  if (HAL_SMBUS_Master_Transmit_IT(&hsmbus3, DeviceAddr ,&buffertx[0], sizeof(buffertx), SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) != HAL_OK)
+  {
+    return TSENSOR_ERROR;
+  }
+  while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+
+  /*##-4- Set the HIGH Limit Temperature #####################################*/
+  buffertx[0] = TSENSOR_TEMP_HIGH_LIMIT_HIGH_BYTE;
+  buffertx[1] = (uint8_t)(pInitStruct->TemperatureLimitHigh);
+  if (HAL_SMBUS_Master_Transmit_IT(&hsmbus3, DeviceAddr, &buffertx[0], sizeof(buffertx), SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) != HAL_OK)
+  {
+    return TSENSOR_ERROR;
+  }
+  while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+
+  /*##-5- Set the low Limit Temperature ######################################*/
+  buffertx[0] = TSENSOR_TEMP_LOW_LIMIT_HIGH_BYTE;
+  buffertx[1] = (uint8_t)(pInitStruct->TemperatureLimitLow);
+  if (HAL_SMBUS_Master_Transmit_IT(&hsmbus3, DeviceAddr, &buffertx[0], sizeof(buffertx), SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) != HAL_OK)
+  {
+    return TSENSOR_ERROR;
+  }
+  while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+  
+  
+  /*##-6- Manage Alert Mode setting ##########################################*/
+  /* Clear an old alert if limit status is set */
+  /* To clear an alert, need to perform an Alert Response command */
+  if(((TSENSOR_ReadStatus(DeviceAddr) & TSENSOR_TEMP_EXCEED_HIGH_LIMIT) == TSENSOR_TEMP_EXCEED_HIGH_LIMIT)
+     || ((TSENSOR_ReadStatus(DeviceAddr) & TSENSOR_TEMP_IS_OR_BELOW_LOW_LIMIT) == TSENSOR_TEMP_IS_OR_BELOW_LOW_LIMIT))
+  {
+    TSENSOR_AlerteResponseAddressRead();
+  }
+
+  /* Check Alert Mode requested */
+  if(pInitStruct->AlertMode == TSENSOR_ALERT_ENABLE)
+  {
+    /* Enable SMBUS Alert */
+    HAL_SMBUS_EnableAlert_IT(&hsmbus3);
+  }
+  
+  /* Return status OK*/
+  return TSENSOR_OK;
+}
+
+/**
+  * @brief  Checks if temperature sensor is ready for communication
+  * @param  DeviceAddr : Device ID address.
+  * @param  Trials: Number of trials
+  * @retval TSENSOR status
+  */
+TSENSOR_StatusTypeDef TSENSOR_IsReady(uint16_t DeviceAddr, uint32_t Trials)
+{
+  /*##-1- Check is Temperature Sensor is Ready to use ########################*/
+  if (HAL_SMBUS_IsDeviceReady(&hsmbus3, DeviceAddr, Trials, TSENSOR_TIMEOUT) != HAL_OK)
+  {
+    return TSENSOR_ERROR;
+  }
+  
+  /* Return status OK*/
+  return TSENSOR_OK;
+}
+
+/**
+  * @brief  Read The Temperature Sensor Status
+  * @param  DeviceAddr : Device ID address.
+  * @retval Temperature Sensor Status
+  */
+uint8_t TSENSOR_ReadStatus(uint16_t DeviceAddr)
+{
+  uint8_t bufferrx[1] = {0};
+  uint8_t buffertx[1] = {0};
+
+  /*##-1- Send Status Command ################################################*/
+  buffertx[0] = TSENSOR_STATUS;
+  if (HAL_SMBUS_Master_Transmit_IT(&hsmbus3, DeviceAddr, &buffertx[0], sizeof(buffertx), SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) != HAL_OK)
+  {
+    return TSENSOR_ERROR;
+  }
+  while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+  
+  /*##-2- Retrieve Status Data Byte ##########################################*/
+  if (HAL_SMBUS_Master_Receive_IT(&hsmbus3, DeviceAddr, &bufferrx[0], sizeof(buffertx), SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) != HAL_OK)
+  {
+    return TSENSOR_ERROR;
+  }
+  while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+
+  /* Return Temperature Sensor Status */
+  return (uint8_t)(bufferrx[0]);
+}
+
+/**
+  * @brief  Read temperature value of the Temperature Sensor.
+  * @param  DeviceAddr : Device ID address.
+  * @retval Temperature measured
+  */
+uint16_t TSENSOR_ReadTemp(uint16_t DeviceAddr)
+{
+  uint8_t bufferrx[2] = {0, 0};
+  uint8_t buffertx[2] = {TSENSOR_TEMP_VALUE_HIGH_BYTE, TSENSOR_TEMP_VALUE_LOW_BYTE};
+  uint16_t tmp = 0;
+  uint8_t count = 0;
+
+  for(count = 0; count < 2; count++)
+  {
+    /*##-1- Send Temperature Read Command ####################################*/
+    if (HAL_SMBUS_Master_Transmit_IT(&hsmbus3, DeviceAddr, &buffertx[count], 1, SMBUS_FIRST_FRAME) != HAL_OK)
+    {
+      return TSENSOR_ERROR;
+    }
+    while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+    
+    /*##-2- Retrieve Temperature Data Byte ###################################*/
+    if (HAL_SMBUS_Master_Receive_IT(&hsmbus3, DeviceAddr, &bufferrx[count], 1, SMBUS_LAST_FRAME_NO_PEC) != HAL_OK)
+    {
+      return TSENSOR_ERROR;
+    }
+    while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+  }  
+
+  tmp = (uint16_t)(bufferrx[0] << 8);
+  tmp |= bufferrx[1];
+  
+  /* Return Temperature value */
+  return (uint16_t)(tmp >> 4);
+}
+
+/**
+  * @brief  Get the address of the Temperature Sensor in alert mode.
+  * @param  None
+  * @retval Temperature Sensor Address.
+  */
+uint8_t TSENSOR_AlerteResponseAddressRead(void)
+{
+  uint8_t bufferrx[1] = {0};
+
+  /*##-1- Retrieve Alert Temperature Sensor Address ##########################*/
+  HAL_SMBUS_Master_Receive_IT(&hsmbus3, 0x18, &bufferrx[0], 1, SMBUS_FIRST_AND_LAST_FRAME_NO_PEC);  
+  while(HAL_SMBUS_GetState(&hsmbus3) != HAL_SMBUS_STATE_READY);
+  
+  /* Return Temperature Sensor Address */
+  return bufferrx[0];
+}
+
+/**
+  * @brief  SMBUS error callbacks.
+  * @param  hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
+  *                the configuration information for the specified SMBUS.
+  * @retval None
+  */
+void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
+{
+  if(HAL_SMBUS_GetError(hsmbus) == HAL_SMBUS_ERROR_ALERT)
+  {
+    /* Inform upper layer of an alert occurs */
+    TSENSOR_ErrorCallback(TSENSOR_ALERT);
+  }
+  else
+  {
+    /* Inform upper layer of an error occurs */
+    TSENSOR_ErrorCallback(TSENSOR_ERROR);
+  }
+  
+}
+
+/**
+  * @brief  TSENSOR error callbacks.
+  * @param  Error : Temperature Sensor Error status.
+  * @retval None
+  */
+__weak void TSENSOR_ErrorCallback(uint16_t Error)
+{
+  /* NOTE : This function Should not be modified, when the callback is needed,
+            the TSENSOR_ErrorCallback could be implemented in the user file
+   */ 
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/readme.txt b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/readme.txt
new file mode 100644
index 000000000..d5dcc8300
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/SMBUS/SMBUS_TSENSOR/readme.txt
@@ -0,0 +1,133 @@
+/**
+  @page SMBUS_TSENSOR SMBUS Temperature Sensor example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    SMBUS/SMBUS_TSENSOR/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the SMBUS Temperature Sensor example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+This example shows how to ensure SMBUS Data buffer transmission and reception with 
+IT. The communication is done with a SMBUS temperature sensor.
+
+Board: STM32G474E-EVAL1
+SCL Pin: PG7
+SDA Pin: PG8
+SMB alert Pin: PG6
+   __________________________________________________________________________                        
+  |           ______________                        ______________           |
+  |          | I2C3         |                      |   TSENSOR    |          |
+  |          |              |                      |              |          |
+  |          |          SCL |______________________|CLOCK         |          |
+  |          |              |                      |              |          |
+  |          |              |                      |              |          |
+  |          |              |                      |              |          |
+  |          |          SDA |______________________|DATA          |          |
+  |          |              |                      |              |          |
+  |          |    SMB alert |______________________|EVENT         |          |
+  |          |______________|                      |______________|          |
+  |      __                                                                  |
+  |     |__|                                                                 |
+  |     User push-button                                                      |
+  |                                                                          |
+  |__________________________________________________________________________|
+      STM32G474E-EVAL1
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 150 MHz.
+
+The temperature sensor configuration is ensured by TSENSOR_Init() which verify that
+temperature sensor is ready to communicate by calling TSENSOR_IsReady(), then
+set the configuration using HAL_SMBUS_Master_Transmit_IT() and HAL_SMBUS_EnableAlert_IT()
+
+The SMBUS peripheral configuration is ensured by the HAL_SMBUS_Init()
+and HAL_SMBUS_IsDeviceReady() called respectively in TSENSOR_Init() function.
+This later is calling the HAL_SMBUS_MspInit()function which core is implementing
+the configuration of the needed SMBUS resources according to the used hardware (CLOCK, 
+GPIO and NVIC). You may update this function to change SMBUS configuration.
+
+The SMBUS/Temperature Sensor communication is then initiated.
+
+Then at each loop in main program a read and a display on LCD of the current temperature
+is done each second.
+An specific warning message is display on LCD in case of an alert from temperature sensor
+is detected.
+
+This management is perform using the TSENSOR_ReadTemp(), TSENSOR_AlerteResponseAddressRead()
+and TSENSOR_ReadStatus() functions allow respectively the read of the current temperature,
+ get the address of temperature sensor 
+in alert and get the temperature sensor status.
+
+STM32G474E-EVAL1's Messages and LEDs can be used to monitor the temperature sensor status:
+ - LED3 is ON when there is an error during communication with the temperature sensor.
+ - In case of the Temperature high limit exceeded, this blink warning message is displayed on the LCD
+ until alert limit disappear :
+                                    Temperature Limit High
+                                       has been exceeded
+
+ - In case of the Temperature is at or blow low limit,a blink warning message is displayed on the LCD
+ until alert limit disappear :
+                                      Temperature is at or
+                                       below the Low Limit
+
+@note TSENSOR_SMBUS instance used and associated resources can be updated in "stm32g4xx_tsensor.c"
+and "main.h" files depending hardware configuration used.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+SMBUS, Temperature, Sensor, I2C, Communication, Transmission, Reception, Interrupt, LCD.
+
+@par Directory contents 
+
+  - SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - SMBUS/SMBUS_TSENSOR/Inc/main.h                  Header for main.c module  
+  - SMBUS/SMBUS_TSENSOR/Inc/stm32g4xx_tsensor.h     Temperature Sensor driver header file
+  - SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_it.c          Interrupt handlers
+  - SMBUS/SMBUS_TSENSOR/Src/main.c                  Main program
+  - SMBUS/SMBUS_TSENSOR/Src/system_stm32g4xx.c      STM32G4xx system source file
+  - SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_hal_msp.c     HAL MSP file    
+  - SMBUS/SMBUS_TSENSOR/Src/stm32g4xx_tsensor.c     Temperature Sensor driver file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 board and can be
+    easily tailored to any other supported device and development board.    
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files: Project->Rebuild all
+ - Load project image: Project->Download and Debug
+ - Run program: Debug->Go(F5) 
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/.extSettings b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/Project.eww
new file mode 100644
index 000000000..f0c3e6001
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\TIM_ComplementarySignals.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/TIM_ComplementarySignals.ewd b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/TIM_ComplementarySignals.ewd
new file mode 100644
index 000000000..52e71cd38
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/TIM_ComplementarySignals.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>TIM_ComplementarySignals</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/TIM_ComplementarySignals.ewp b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/TIM_ComplementarySignals.ewp
new file mode 100644
index 000000000..fef63d7fb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/TIM_ComplementarySignals.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>TIM_ComplementarySignals</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>TIM_ComplementarySignals/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>TIM_ComplementarySignals/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>TIM_ComplementarySignals/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/main.h
new file mode 100644
index 000000000..88b39bde3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/main.h
@@ -0,0 +1,101 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/*
+    Generate 3 complementary PWM signals with 3 different duty cycles:
+    TIM1 input clock (TIM1CLK) is set to APB2 clock (PCLK2), since APB2
+    prescaler is 1.
+    TIM1CLK = PCLK2
+    PCLK2 = HCLK
+    => TIM1CLK = HCLK = SystemCoreClock
+  
+    TIM1CLK is fixed to SystemCoreClock, the TIM1 Prescaler is set to have
+    TIM1 counter clock = 10MHz.
+
+    The objective is to generate PWM signal at 10 KHz:
+    - TIM1_Period = (TIM1 counter clock / 10000) - 1
+
+    The Three Duty cycles are computed as the following description: 
+    - The channel 1 duty cycle is set to 50% so channel 1N is set to 50%.
+    - The channel 2 duty cycle is set to 25% so channel 2N is set to 75%.
+    - The channel 3 duty cycle is set to 12.5% so channel 3N is set to 87.5%.
+    
+    The Timer pulse is calculated as follows:
+     - ChannelxPulse = DutyCycle * (TIM1_Period - 1) / 100
+          
+  Compute the prescaler value to have TIM1 counter clock equal to 10MHz 
+    - Prescaler = (SystemCoreClock/10000000) - 1
+  */
+#define  PRESCALER_VALUE    (uint32_t) ((SystemCoreClock  / 10000000) - 1)  
+#define  PERIOD_VALUE       (1000-1)  /* Period Value  */
+#define  PULSE1_VALUE       500         /* Capture Compare 1 Value  */
+#define  PULSE2_VALUE       250         /* Capture Compare 2 Value  */
+#define  PULSE3_VALUE       125         /* Capture Compare 3 Value  */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..d3a174afe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Inc/stm32g4xx_it.h
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/TIM_ComplementarySignals.uvoptx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/TIM_ComplementarySignals.uvoptx
new file mode 100644
index 000000000..dc1d70e68
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/TIM_ComplementarySignals.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>TIM_ComplementarySignals</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
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+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
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+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
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+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
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+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U005200303137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
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+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/TIM_ComplementarySignals.uvprojx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/TIM_ComplementarySignals.uvprojx
new file mode 100644
index 000000000..2f915a825
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/TIM_ComplementarySignals.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>TIM_ComplementarySignals</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
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+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
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+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
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+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>TIM_ComplementarySignals\</OutputDirectory>
+          <OutputName>TIM_ComplementarySignals</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
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+          <ListingPath></ListingPath>
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+            <UserProg1Name></UserProg1Name>
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+            <UserProg1Name></UserProg1Name>
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+        <CommonProperty>
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+            <RunIndependent>0</RunIndependent>
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+          <Flash3></Flash3>
+          <Flash4></Flash4>
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+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
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+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="TIM_ComplementarySignals"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..f2723008f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1205186375">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1205186375" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1205186375" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1205186375." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1933242548" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1499432971" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.78998562" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.744531237" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.461501905" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.792365381" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1940431509" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1810781692" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.361699765" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1066146877" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1204135073" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/TIM_ComplementarySignals}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.101537825" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.747331628" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.630843960" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.2001586705" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2079482030" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.501102971" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1445010805" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1818250752" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.935155062" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.738610289" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1706428170" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2115874845" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1579312299" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.575518006" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1061235707" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
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+							<builder buildPath="${workspace_loc:/TIM_ComplementarySignals}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.428553668" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1002739906" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1714827104" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.873751975" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.189468162" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.436805100" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1395257536" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
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+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TIM_ComplementarySignals.null.300030399" name="TIM_ComplementarySignals"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1205186375;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1205186375.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2079482030;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.738610289">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/.project
new file mode 100644
index 000000000..d5d47f79f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TIM_ComplementarySignals</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>TIM_ComplementarySignals.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/TIM_ComplementarySignals.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/main.c
new file mode 100644
index 000000000..53b21c221
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/main.c
@@ -0,0 +1,343 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+ /*##-3- Start PWM signals generation #######################################*/ 
+  /* Start channel 1 */
+  if(HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+  /* Start channel 1N */
+  if(HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_1) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+  
+  /* Start channel 2 */
+  if(HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+  /* Start channel 2N */
+  if(HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_2) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+  
+  /* Start channel 3 */
+  if(HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+  /* Start channel 3N */
+  if(HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_3) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIMEx_BreakInputConfigTypeDef sBreakInputConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = PRESCALER_VALUE;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = PERIOD_VALUE;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakInputConfig.Source = TIM_BREAKINPUTSOURCE_BKIN;
+  sBreakInputConfig.Enable = TIM_BREAKINPUTSOURCE_ENABLE;
+  sBreakInputConfig.Polarity = TIM_BREAKINPUTSOURCE_POLARITY_HIGH;
+  if (HAL_TIMEx_ConfigBreakInput(&htim1, TIM_BREAKINPUT_BRK, &sBreakInputConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = PULSE1_VALUE;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
+  sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.Pulse = PULSE2_VALUE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.Pulse = PULSE3_VALUE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE;
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE;
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_1;
+  sBreakDeadTimeConfig.DeadTime = 100;
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_ENABLE;
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+  sBreakDeadTimeConfig.BreakFilter = 0;
+  sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+  sBreakDeadTimeConfig.Break2Filter = 0;
+  sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_ENABLE;
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+  HAL_TIM_MspPostInit(&htim1);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..cdde2294c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,205 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : stm32g4xx_hal_msp.c
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+                    /**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_PWM MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim_pwm->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PB12     ------> TIM1_BKIN
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_12;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspPostInit 0 */
+
+  /* USER CODE END TIM1_MspPostInit 0 */
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PB13     ------> TIM1_CH1N
+    PB15     ------> TIM1_CH3N
+    PA8     ------> TIM1_CH1
+    PA9     ------> TIM1_CH2
+    PA10     ------> TIM1_CH3
+    PA12     ------> TIM1_CH2N
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_13;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_15;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF4_TIM1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_12;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspPostInit 1 */
+
+  /* USER CODE END TIM1_MspPostInit 1 */
+  }
+
+}
+/**
+* @brief TIM_PWM MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
+{
+  if(htim_pwm->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+
+    /**TIM1 GPIO Configuration
+    PB12     ------> TIM1_BKIN
+    PB13     ------> TIM1_CH1N
+    PB15     ------> TIM1_CH3N
+    PA8     ------> TIM1_CH1
+    PA9     ------> TIM1_CH2
+    PA10     ------> TIM1_CH3
+    PA12     ------> TIM1_CH2N
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_15);
+
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_12);
+
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..1a05aa530
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/stm32g4xx_it.c
@@ -0,0 +1,115 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/TIM_ComplementarySignals.ioc b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/TIM_ComplementarySignals.ioc
new file mode 100644
index 000000000..9bdaefc4c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/TIM_ComplementarySignals.ioc
@@ -0,0 +1,219 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=TIM1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PF0-OSC_IN
+Mcu.Pin1=PF1-OSC_OUT
+Mcu.Pin10=VP_SYS_VS_DBSignals
+Mcu.Pin2=PB12
+Mcu.Pin3=PB13
+Mcu.Pin4=PB15
+Mcu.Pin5=PA8
+Mcu.Pin6=PA9
+Mcu.Pin7=PA10
+Mcu.Pin8=PA12
+Mcu.Pin9=VP_SYS_VS_Systick
+Mcu.PinsNb=11
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA10.GPIO_PuPd=GPIO_PULLDOWN
+PA10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PA10.Locked=true
+PA10.Signal=S_TIM1_CH3
+PA12.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA12.GPIO_PuPd=GPIO_PULLDOWN
+PA12.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PA12.Locked=true
+PA12.Mode=PWM Generation2 CH2 CH2N
+PA12.Signal=TIM1_CH2N
+PA8.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA8.GPIO_PuPd=GPIO_PULLDOWN
+PA8.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PA8.Locked=true
+PA8.Signal=S_TIM1_CH1
+PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA9.GPIO_PuPd=GPIO_PULLDOWN
+PA9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PA9.Signal=S_TIM1_CH2
+PB12.Mode=Activate-Break-Input
+PB12.Signal=TIM1_BKIN
+PB13.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PB13.GPIO_PuPd=GPIO_PULLDOWN
+PB13.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PB13.Locked=true
+PB13.Mode=PWM Generation1 CH1 CH1N
+PB13.Signal=TIM1_CH1N
+PB15.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PB15.GPIO_PuPd=GPIO_PULLDOWN
+PB15.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PB15.Locked=true
+PB15.Mode=PWM Generation3 CH3 CH3N
+PB15.Signal=TIM1_CH3N
+PF0-OSC_IN.Mode=HSE-External-Oscillator
+PF0-OSC_IN.Signal=RCC_OSC_IN
+PF1-OSC_OUT.Mode=HSE-External-Oscillator
+PF1-OSC_OUT.Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TIM_ComplementarySignals.ioc
+ProjectManager.ProjectName=TIM_ComplementarySignals
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1 CH1N
+SH.S_TIM1_CH1.ConfNb=1
+SH.S_TIM1_CH2.0=TIM1_CH2,PWM Generation2 CH2 CH2N
+SH.S_TIM1_CH2.ConfNb=1
+SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3 CH3N
+SH.S_TIM1_CH3.ConfNb=1
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.AutomaticOutput=TIM_AUTOMATICOUTPUT_ENABLE
+TIM1.Break2Filter=0
+TIM1.Break2Polarity=TIM_BREAK2POLARITY_HIGH
+TIM1.Break2State=TIM_BREAK2_DISABLE
+TIM1.BreakFilter=0
+TIM1.BreakPolarity=TIM_BREAKPOLARITY_HIGH
+TIM1.BreakState=TIM_BREAK_ENABLE
+TIM1.Channel-PWM\ Generation1\ CH1\ CH1N=TIM_CHANNEL_1
+TIM1.Channel-PWM\ Generation2\ CH2\ CH2N=TIM_CHANNEL_2
+TIM1.Channel-PWM\ Generation3\ CH3\ CH3N=TIM_CHANNEL_3
+TIM1.ClearInputSource=TIM_CLEARINPUTSOURCE_NONE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.DeadTime=100
+TIM1.IPParameters=Prescaler,CounterMode,Period,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2,BreakState,BreakPolarity,BreakFilter,Break2State,Break2Polarity,Break2Filter,AutomaticOutput,OffStateRunMode,OffStateIDLEMode,LockLevel,DeadTime,ClearInputSource,OCMode_PWM-PWM Generation1 CH1 CH1N,OCFastMode_PWM-PWM Generation1 CH1 CH1N,OCPolarity_1,OCNPolarity_1,OCIdleState_1,OCNIdleState_1,OCMode_PWM-PWM Generation2 CH2 CH2N,OCFastMode_PWM-PWM Generation2 CH2 CH2N,OCPolarity_2,OCNPolarity_2,OCIdleState_2,OCNIdleState_2,OCMode_PWM-PWM Generation3 CH3 CH3N,OCFastMode_PWM-PWM Generation3 CH3 CH3N,OCPolarity_3,OCNPolarity_3,OCIdleState_3,OCNIdleState_3,Channel-PWM Generation1 CH1 CH1N,Channel-PWM Generation2 CH2 CH2N,Channel-PWM Generation3 CH3 CH3N,PulseNoDither_1,PulseNoDither_2,PulseNoDither_3
+TIM1.IPParametersWithoutCheck=PulseNoDither_2,PulseNoDither_1,Prescaler,PulseNoDither_3,Period
+TIM1.LockLevel=TIM_LOCKLEVEL_1
+TIM1.OCFastMode_PWM-PWM\ Generation1\ CH1\ CH1N=TIM_OCFAST_DISABLE
+TIM1.OCFastMode_PWM-PWM\ Generation2\ CH2\ CH2N=TIM_OCFAST_DISABLE
+TIM1.OCFastMode_PWM-PWM\ Generation3\ CH3\ CH3N=TIM_OCFAST_DISABLE
+TIM1.OCIdleState_1=TIM_OCIDLESTATE_RESET
+TIM1.OCIdleState_2=TIM_OCIDLESTATE_RESET
+TIM1.OCIdleState_3=TIM_OCIDLESTATE_RESET
+TIM1.OCMode_PWM-PWM\ Generation1\ CH1\ CH1N=TIM_OCMODE_PWM1
+TIM1.OCMode_PWM-PWM\ Generation2\ CH2\ CH2N=TIM_OCMODE_PWM1
+TIM1.OCMode_PWM-PWM\ Generation3\ CH3\ CH3N=TIM_OCMODE_PWM1
+TIM1.OCNIdleState_1=TIM_OCNIDLESTATE_RESET
+TIM1.OCNIdleState_2=TIM_OCNIDLESTATE_RESET
+TIM1.OCNIdleState_3=TIM_OCNIDLESTATE_RESET
+TIM1.OCNPolarity_1=TIM_OCNPOLARITY_HIGH
+TIM1.OCNPolarity_2=TIM_OCNPOLARITY_HIGH
+TIM1.OCNPolarity_3=TIM_OCNPOLARITY_HIGH
+TIM1.OCPolarity_1=TIM_OCPOLARITY_HIGH
+TIM1.OCPolarity_2=TIM_OCPOLARITY_HIGH
+TIM1.OCPolarity_3=TIM_OCPOLARITY_HIGH
+TIM1.OffStateIDLEMode=TIM_OSSI_ENABLE
+TIM1.OffStateRunMode=TIM_OSSR_ENABLE
+TIM1.Period=PERIOD_VALUE
+TIM1.Prescaler=PRESCALER_VALUE
+TIM1.PulseNoDither_1=PULSE1_VALUE
+TIM1.PulseNoDither_2=PULSE2_VALUE
+TIM1.PulseNoDither_3=PULSE3_VALUE
+TIM1.RepetitionCounter=0
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=TIM_ComplementarySignals
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/readme.txt b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/readme.txt
new file mode 100644
index 000000000..9f3c56519
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_ComplementarySignals/readme.txt
@@ -0,0 +1,117 @@
+/**
+  @page TIM_ComplementarySignals TIM Complementary Signals example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    TIM/TIM_ComplementarySignals/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the TIM Complementary Signals example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+This example shows how to configure the TIM1 peripheral to generate three 
+complementary TIM1 signals, to insert a defined dead time value, to use the break 
+feature and to lock the desired parameters.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+The SystemClock_Config() function is used to configure the system clock for STM32G474QETx Devices :
+The CPU at 170 MHz 
+
+TIM1CLK is fixed to SystemCoreClock, the TIM1 Prescaler is set to have
+TIM1 counter clock = 10MHz.
+
+The objective is to generate PWM signal at 10 KHz:
+  - TIM1_Period = (TIM1 counter clock / 10000) - 1
+               
+The Three Duty cycles are computed as the following description: 
+The channel 1 duty cycle is set to 50% so channel 1N is set to 50%.
+The channel 2 duty cycle is set to 25% so channel 2N is set to 75%.
+The channel 3 duty cycle is set to 12.5% so channel 3N is set to 87.5%.
+The Timer pulse is calculated as follows:
+  - ChannelxPulse = DutyCycle * (TIM1_Period - 1) / 100
+
+A dead time equal to 100/SystemCoreClock (around 0.66us) is inserted between 
+the different complementary signals, and the Lock level 1 is selected.
+  - The OCx output signal is the same as the reference signal except for the rising edge,
+    which is delayed relative to the reference rising edge.
+  - The OCxN output signal is the opposite of the reference signal except for the rising
+    edge, which is delayed relative to the reference falling edge
+
+Note that calculated duty cycles apply to the reference signal (OCxREF) from
+which outputs OCx and OCxN are generated. As dead time insertion is enabled the
+duty cycle measured on OCx will be slightly lower.
+  
+The break Polarity is used at High level.
+LED3 is ON when there are an error.
+
+The TIM1 waveforms can be displayed using an oscilloscope.
+
+
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Timer, PWM, Complementary signal, Duty Cycle, Waveform, Oscilloscope, Output, Signal
+
+@par Directory contents
+
+  - TIM/TIM_ComplementarySignals/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - TIM/TIM_ComplementarySignals/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - TIM/TIM_ComplementarySignals/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - TIM/TIM_ComplementarySignals/Inc/main.h                  Header for main.c module  
+  - TIM/TIM_ComplementarySignals/Src/stm32g4xx_it.c          Interrupt handlers
+  - TIM/TIM_ComplementarySignals/Src/main.c                  Main program
+  - TIM/TIM_ComplementarySignals/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - TIM/TIM_ComplementarySignals/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1
+    board and can be easily tailored to any other supported device
+    and development board.      
+
+  - STM32G474E-EVAL1 Set-up
+    - Connect the TIM1 pins to an oscilloscope to monitor the different waveforms:
+      - TIM1_CH1  pin (PA8)  
+      - TIM1_CH1N pin (PB13)  
+      - TIM1_CH2  pin (PA9)  
+      - TIM1_CH2N pin (PA12)  
+      - TIM1_CH3  pin (PA10)  
+      - TIM1_CH3N pin (PB15)
+
+    - Connect the TIM1 break pin TIM1_BKIN pin (PB12) to the GND. To generate a 
+      break event, switch this pin level from 0V to 3.3V.  
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/.extSettings b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/Project.eww
new file mode 100644
index 000000000..18323e9bc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\TIM_DMA.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/TIM_DMA.ewd b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/TIM_DMA.ewd
new file mode 100644
index 000000000..8eee107f9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/TIM_DMA.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>TIM_DMA</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/TIM_DMA.ewp b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/TIM_DMA.ewp
new file mode 100644
index 000000000..301f32d94
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/TIM_DMA.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>TIM_DMA</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>TIM_DMA/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>TIM_DMA/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>TIM_DMA/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
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+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
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+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
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+          <name>OGUseCmsisDspLib</name>
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+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
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+          <name>CoreVariant</name>
+          <version>26</version>
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+          <name>GFPUDeviceSlave</name>
+          <state></state>
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+          <version>0</version>
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+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
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+          <name>OGCMSISPackSelectDevice</name>
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+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
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+        <option>
+          <name>OGLibAdditionalLocale</name>
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+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
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+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
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+          <name>OGScanfVariant</name>
+          <version>0</version>
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+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
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+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
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+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
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+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
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+    </settings>
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+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
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+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
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+          <name>CCOptimizationNoSizeConstraints</name>
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+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
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+          <name>CCPreprocFile</name>
+          <state>0</state>
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+          <name>CCPreprocComments</name>
+          <state>0</state>
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+          <name>CCListCFile</name>
+          <state>0</state>
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+          <name>CCListCMnemonics</name>
+          <state>0</state>
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+          <state>0</state>
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+          <name>CCListAssSource</name>
+          <state>0</state>
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+          <name>CCEnableRemarks</name>
+          <state>0</state>
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+          <name>CCDiagSuppress</name>
+          <state></state>
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+          <name>CCDiagRemark</name>
+          <state></state>
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+          <name>CCDiagWarning</name>
+          <state></state>
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+          <name>CCDiagError</name>
+          <state></state>
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+          <name>CCObjPrefix</name>
+          <state>1</state>
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+          <name>CCAllowList</name>
+          <version>1</version>
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+          <name>CCDebugInfo</name>
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+          <name>IEndianMode</name>
+          <state>1</state>
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+          <name>IProcessor</name>
+          <state>1</state>
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+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
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+          <name>IExtraOptions</name>
+          <state></state>
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+          <name>CCLangConformance</name>
+          <state>0</state>
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+          <name>CCSignedPlainChar</name>
+          <state>1</state>
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+          <name>CCRequirePrototypes</name>
+          <state>0</state>
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+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
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+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
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+          <name>IFpuProcessor</name>
+          <state>1</state>
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+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+          <state>1</state>
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+          <name>PreInclude</name>
+          <state></state>
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+          <name>CompilerMisraOverride</name>
+          <state>0</state>
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+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
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+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
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+          <state>.text</state>
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+          <state>1</state>
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+          <state>3</state>
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+          <name>CCOptLevelSlave</name>
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+          <name>CompilerMisraRules98</name>
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+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
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+          <name>IccLang</name>
+          <state>0</state>
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+          <name>IccCDialect</name>
+          <state>1</state>
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+          <name>IccAllowVLA</name>
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+          <name>IccStaticDestr</name>
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+          <name>IccCmsis</name>
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+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/main.h
new file mode 100644
index 000000000..929ab959d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/main.h
@@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_DMA/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..67d9a5ba4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_DMA/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel7_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/TIM_DMA.uvoptx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/TIM_DMA.uvoptx
new file mode 100644
index 000000000..aabe8d0ef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/TIM_DMA.uvoptx
@@ -0,0 +1,133 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+	<Target>
+		<TargetName>TIM_DMA</TargetName>
+		<ToolsetNumber>0x4</ToolsetNumber>
+		<ToolsetName>ARM-ADS</ToolsetName>
+		<TargetOption>
+			<CLKADS>170000000</CLKADS>
+			<OPTTT>
+				<gFlags>1</gFlags>
+				<BeepAtEnd>1</BeepAtEnd>
+				<RunSim>0</RunSim>
+				<RunTarget>1</RunTarget>
+			</OPTTT>
+			<OPTHX>
+				<HexSelection>1</HexSelection>
+				<FlashByte>65535</FlashByte>
+				<HexRangeLowAddress>0</HexRangeLowAddress>
+				<HexRangeHighAddress>0</HexRangeHighAddress>
+				<HexOffset>0</HexOffset>
+			</OPTHX>
+			<OPTLEX>
+				<PageWidth>79</PageWidth>
+				<PageLength>66</PageLength>
+				<TabStop>8</TabStop>
+				<ListingPath />
+			</OPTLEX>
+			<ListingPage>
+				<CreateCListing>1</CreateCListing>
+				<CreateAListing>1</CreateAListing>
+				<CreateLListing>1</CreateLListing>
+				<CreateIListing>0</CreateIListing>
+				<AsmCond>1</AsmCond>
+				<AsmSymb>1</AsmSymb>
+				<AsmXref>0</AsmXref>
+				<CCond>1</CCond>
+				<CCode>0</CCode>
+				<CListInc>0</CListInc>
+				<CSymb>0</CSymb>
+				<LinkerCodeListing>0</LinkerCodeListing>
+			</ListingPage>
+			<OPTXL>
+				<LMap>1</LMap>
+				<LComments>1</LComments>
+				<LGenerateSymbols>1</LGenerateSymbols>
+				<LLibSym>1</LLibSym>
+				<LLines>1</LLines>
+				<LLocSym>1</LLocSym>
+				<LPubSym>1</LPubSym>
+				<LXref>0</LXref>
+				<LExpSel>0</LExpSel>
+			</OPTXL>
+			<OPTFL>
+				<tvExp>0</tvExp>
+				<tvExpOptDlg>0</tvExpOptDlg>
+				<IsCurrentTarget>1</IsCurrentTarget>
+			</OPTFL>
+			<CpuCode>0</CpuCode>
+			<DebugOpt>
+				<uSim>0</uSim>
+				<uTrg>1</uTrg>
+				<sLdApp>1</sLdApp>
+				<sGomain>1</sGomain>
+				<sRbreak>1</sRbreak>
+				<sRwatch>1</sRwatch>
+				<sRmem>1</sRmem>
+				<sRfunc>1</sRfunc>
+				<sRbox>1</sRbox>
+				<tLdApp>1</tLdApp>
+				<tGomain>1</tGomain>
+				<tRbreak>1</tRbreak>
+				<tRwatch>1</tRwatch>
+				<tRmem>1</tRmem>
+				<tRfunc>1</tRfunc>
+				<tRbox>1</tRbox>
+				<sRunDeb>0</sRunDeb>
+				<sLrtime>0</sLrtime>
+				<nTsel>13</nTsel>
+				<sDll />
+				<sDllPa />
+				<sDlgDll />
+				<sDlgPa />
+				<sIfile />
+				<tDll />
+				<tDllPa />
+				<tDlgDll />
+				<tDlgPa />
+				<tIfile />
+				<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+			</DebugOpt>
+			<TargetDriverDllRegistry>
+				<SetRegEntry>
+					<Number>0</Number>
+					<Key>ST-LINKIII-KEIL_SWO</Key>
+					<Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+				</SetRegEntry>
+				<SetRegEntry>
+					<Number>0</Number>
+					<Key />
+					<Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+				</SetRegEntry>
+			</TargetDriverDllRegistry>
+			<DebugFlag>
+				<trace>0</trace>
+				<periodic>1</periodic>
+				<aLwin>0</aLwin>
+				<aCover>0</aCover>
+				<aSer1>0</aSer1>
+				<aSer2>0</aSer2>
+				<aPa>0</aPa>
+				<viewmode>0</viewmode>
+				<vrSel>0</vrSel>
+				<aSym>0</aSym>
+				<aTbox>0</aTbox>
+				<AscS1>0</AscS1>
+				<AscS2>0</AscS2>
+				<AscS3>0</AscS3>
+				<aSer3>0</aSer3>
+				<eProf>0</eProf>
+				<aLa>0</aLa>
+				<aPa1>0</aPa1>
+				<AscS4>0</AscS4>
+				<aSer4>0</aSer4>
+				<StkLoc>0</StkLoc>
+				<TrcWin>0</TrcWin>
+				<newCpu>0</newCpu>
+				<uProt>0</uProt>
+			</DebugFlag>
+			<LintExecutable />
+			<LintConfigFile />
+		</TargetOption>
+	</Target>
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/TIM_DMA.uvprojx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/TIM_DMA.uvprojx
new file mode 100644
index 000000000..9f013efe3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/TIM_DMA.uvprojx
@@ -0,0 +1,611 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_proj.xsd">
+
+	<SchemaVersion>1.1</SchemaVersion>
+
+	<Header>### uVision Project, (C) Keil Software</Header>
+
+	<Targets>
+		<Target> 
+			<TargetName>TIM_DMA</TargetName>
+			<ToolsetNumber>0x4</ToolsetNumber>
+			<ToolsetName>ARM-ADS</ToolsetName>
+			<TargetOption>
+				<TargetCommonOption>
+					<Device>STM32G474QETx</Device>
+					<Vendor>STMicroelectronics</Vendor>
+					<Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+					<FlashUtilSpec/>
+					<StartupFile/>
+					<FlashDriverDll/>
+					<DeviceId/>
+					<RegisterFile/>
+					<MemoryEnv/>
+					<Cmp/>
+					<Asm/>
+					<Linker/>
+					<OHString/>
+					<InfinionOptionDll/>
+					<SLE66CMisc/>
+					<SLE66AMisc/>
+					<SLE66LinkerMisc/>
+					<SFDFile/>
+					<bCustSvd>0</bCustSvd>
+					<UseEnv>0</UseEnv>
+					<BinPath/>
+					<IncludePath/>
+					<LibPath/>
+					<RegisterFilePath/>
+					<DBRegisterFilePath/>
+					<TargetStatus>
+						<Error>0</Error>
+						<ExitCodeStop>0</ExitCodeStop>
+						<ButtonStop>0</ButtonStop>
+						<NotGenerated>0</NotGenerated>
+						<InvalidFlash>1</InvalidFlash>
+					</TargetStatus>
+					<OutputDirectory>TIM_DMA\</OutputDirectory>
+					<OutputName>TIM_DMA</OutputName>
+					<CreateExecutable>1</CreateExecutable>
+					<CreateLib>0</CreateLib>
+					<CreateHexFile>1</CreateHexFile>
+					<DebugInformation>1</DebugInformation>
+					<BrowseInformation>1</BrowseInformation>
+					<ListingPath>./TIM_DMA/</ListingPath>
+					<HexFormatSelection>1</HexFormatSelection>
+					<Merge32K>0</Merge32K>
+					<CreateBatchFile>0</CreateBatchFile>
+					<BeforeCompile>
+						<RunUserProg1>0</RunUserProg1>
+						<RunUserProg2>0</RunUserProg2>
+						<UserProg1Name/>
+						<UserProg2Name/>
+						<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+						<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+					</BeforeCompile>
+					<BeforeMake>
+						<RunUserProg1>0</RunUserProg1>
+						<RunUserProg2>0</RunUserProg2>
+						<UserProg1Name/>
+						<UserProg2Name/>
+						<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+						<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+						<nStopB1X>0</nStopB1X>
+						<nStopB2X>0</nStopB2X>
+					</BeforeMake>
+					<AfterMake>
+						<RunUserProg1>0</RunUserProg1>
+						<RunUserProg2>0</RunUserProg2>
+						<UserProg1Name/>
+						<UserProg2Name/>
+						<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+						<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+					</AfterMake>
+					<SelectedForBatchBuild>0</SelectedForBatchBuild>
+					<SVCSIdString/>
+				</TargetCommonOption>
+				<CommonProperty>
+					<UseCPPCompiler>0</UseCPPCompiler>
+					<RVCTCodeConst>0</RVCTCodeConst>
+					<RVCTZI>0</RVCTZI>
+					<RVCTOtherData>0</RVCTOtherData>
+					<ModuleSelection>0</ModuleSelection>
+					<IncludeInBuild>1</IncludeInBuild>
+					<AlwaysBuild>0</AlwaysBuild>
+					<GenerateAssemblyFile>0</GenerateAssemblyFile>
+					<AssembleAssemblyFile>0</AssembleAssemblyFile>
+					<PublicsOnly>0</PublicsOnly>
+					<StopOnExitCode>3</StopOnExitCode>
+					<CustomArgument/>
+					<IncludeLibraryModules/>
+					<ComprImg/>
+				</CommonProperty>
+				<DllOption>
+					<SimDllName>SARMCM3.DLL</SimDllName>
+					<SimDllArguments>-REMAP -MPU</SimDllArguments>
+					<SimDlgDll>DCM.DLL</SimDlgDll>
+					<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+					<TargetDllName>SARMCM3.DLL</TargetDllName>
+					<TargetDllArguments>-MPU</TargetDllArguments>
+					<TargetDlgDll>TCM.DLL</TargetDlgDll>
+					<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+				</DllOption>
+				<DebugOption>
+					<OPTHX>
+						<HexSelection>1</HexSelection>
+						<HexRangeLowAddress>0</HexRangeLowAddress>
+						<HexRangeHighAddress>0</HexRangeHighAddress>
+						<HexOffset>0</HexOffset>
+						<Oh166RecLen>16</Oh166RecLen>
+					</OPTHX>
+					<Simulator>
+						<UseSimulator>0</UseSimulator>
+						<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+						<RunToMain>1</RunToMain>
+						<RestoreBreakpoints>1</RestoreBreakpoints>
+						<RestoreWatchpoints>1</RestoreWatchpoints>
+						<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+						<RestoreFunctions>1</RestoreFunctions>
+						<RestoreToolbox>1</RestoreToolbox>
+						<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+						<RestoreSysVw>1</RestoreSysVw>
+					</Simulator>
+					<Target>
+						<UseTarget>1</UseTarget>
+						<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+						<RunToMain>1</RunToMain>
+						<RestoreBreakpoints>1</RestoreBreakpoints>
+						<RestoreWatchpoints>1</RestoreWatchpoints>
+						<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+						<RestoreFunctions>0</RestoreFunctions>
+						<RestoreToolbox>1</RestoreToolbox>
+						<RestoreTracepoints>1</RestoreTracepoints> 
+						<RestoreSysVw>1</RestoreSysVw>
+					</Target>
+					<RunDebugAfterBuild>0</RunDebugAfterBuild>
+					<TargetSelection>13</TargetSelection>
+					<SimDlls>
+						<CpuDll/>
+						<CpuDllArguments/>
+						<PeripheralDll/>
+						<PeripheralDllArguments/>
+						<InitializationFile/>
+					</SimDlls>
+					<TargetDlls>
+						<CpuDll/>
+						<CpuDllArguments/>
+						<PeripheralDll/>
+						<PeripheralDllArguments/>
+						<InitializationFile/>
+						<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
+					</TargetDlls>
+				</DebugOption>
+				<Utilities>
+					<Flash1>
+						<UseTargetDll>1</UseTargetDll>
+						<UseExternalTool>0</UseExternalTool>
+						<RunIndependent>0</RunIndependent>
+						<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+						<Capability>1</Capability>
+						<DriverSelection>4107</DriverSelection>
+					</Flash1>
+					<bUseTDR>1</bUseTDR>
+					<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+					<Flash3/>
+					<Flash4/>
+					<pFcarmOut/>
+					<pFcarmGrp/>
+					<pFcArmRoot/>
+					<FcArmLst>0</FcArmLst>
+				</Utilities>
+				<TargetArmAds>
+					<ArmAdsMisc>
+						<GenerateListings>0</GenerateListings>
+						<asHll>1</asHll>
+						<asAsm>1</asAsm>
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+						<asSyms>1</asSyms>
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+						<AdsANot>0</AdsANot>
+						<AdsLLst>1</AdsLLst>
+						<AdsLmap>1</AdsLmap>
+						<AdsLcgr>1</AdsLcgr>
+						<AdsLsym>1</AdsLsym>
+						<AdsLszi>1</AdsLszi>
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+						<AdsLsun>1</AdsLsun>
+						<AdsLven>1</AdsLven>
+						<AdsLsxf>1</AdsLsxf>
+						<RvctClst>0</RvctClst>
+						<GenPPlst>0</GenPPlst>
+						<AdsCpuType>"Cortex-M4"</AdsCpuType>
+						<RvctDeviceName/>
+						<mOS>0</mOS>
+						<uocRom>0</uocRom>
+						<uocRam>0</uocRam>
+						<hadIROM>1</hadIROM>
+						<hadIRAM>1</hadIRAM>
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+						<uocXRam>0</uocXRam>
+						<RvdsVP>2</RvdsVP>
+						<hadIRAM2>0</hadIRAM2>
+						<hadIROM2>0</hadIROM2>
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+						<useUlib>1</useUlib>
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+						<Im1Chk>1</Im1Chk>
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+								<StartAddress>0x0</StartAddress>
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+								<Size/>
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+								<StartAddress>0x0</StartAddress>
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+							</OCR_RVCT10>
+						</OnChipMemories>
+						<RvctStartVector/>
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+						<VariousControls>
+							<MiscControls/>
+							<Define>USE_HAL_DRIVER,STM32G474xx</Define>
+							<Undefine/>
+							<IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
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+							<MiscControls/>
+							<Define/>
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+							<IncludePath/>
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+						<Misc/>
+						<LinkerInputFile/>
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+				</TargetArmAds>
+			</TargetOption>     
+			<Groups>
+        <Group>
+					<GroupName>Application/MDK-ARM</GroupName>
+				<Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
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+              <FilePath>startup_stm32g474xx.s</FilePath>
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+        </Group>
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+				<Group>
+					<GroupName>::CMSIS</GroupName>
+				</Group>
+			<Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
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+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
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+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
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+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
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+          <GroupName>Drivers/BSP/Components</GroupName>
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+              <FileName>mfxstm32l152_reg.c</FileName>
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+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
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+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+
+		</Target>
+	</Targets>
+	<RTE>
+		<apis/>
+		<components>
+			<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+				<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+				<targetInfos>
+					<targetInfo name="TIM_DMA"/>
+				</targetInfos>
+			</component>
+		</components>
+		<files/>
+	</RTE>
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..3c8376d01
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
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+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.874348799" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.476387277" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.331068143" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1158958007" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1747360966" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.923618930" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1087948818" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1457569035" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.248546005" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.357583547" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1702486582" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.7988881" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.2111650694" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1866222935" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1316599279" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1205625277" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.414277410" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1247469739" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1743081207" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.715036781" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1936937152" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1454981" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1201279330" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TIM_DMA.null.1493691047" name="TIM_DMA"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.874348799;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.874348799.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.283121488;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2126968341">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.881274850;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.881274850.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.476387277;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1087948818">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/.project
new file mode 100644
index 000000000..de728a3e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TIM_DMA</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>TIM_DMA.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/TIM_DMA.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/main.c
new file mode 100644
index 000000000..0cd976bea
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/main.c
@@ -0,0 +1,369 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_DMA/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use DMA with TIM1 Update request to
+  *          transfer Data from memory to TIM1 Capture Compare Register 3 (CCR3).
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim1;
+DMA_HandleTypeDef hdma_tim1_ch3;
+
+/* USER CODE BEGIN PV */
+
+/* Capture Compare buffer */
+uint32_t aCCValue_Buffer[3] = {0, 0, 0};
+
+/* Timer Period*/
+uint32_t uwTimerPeriod  = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* ---------------------------------------------------------------------------
+  TIM1 input clock (TIM1CLK) is set to APB1 clock (PCLK1), since APB1
+  prescaler is 1.
+    TIM1CLK = PCLK1 = HCLK
+    => TIM1CLK = HCLK = SystemCoreClock
+
+  TIM1CLK = SystemCoreClock, Prescaler = 0, TIM1 counter clock = SystemCoreClock
+  SystemCoreClock is set to 170 MHz for STM32G4xx devices.
+
+  The objective is to configure TIM1 channel 3 to generate a PWM
+  signal with a frequency equal to 17.57 KHz:
+     - TIM1_Period = (SystemCoreClock / 17570) - 1
+  and a variable duty cycle that is changed by the DMA after a specific number of
+  Update DMA request.
+
+  The number of this repetitive requests is defined by the TIM1 Repetition counter,
+  each 4 Update Requests, the TIM1 Channel 3 Duty Cycle changes to the next new
+  value defined by the aCCValue_Buffer.
+
+    Note:
+     SystemCoreClock variable holds HCLK frequency and is defined in system_stm32g4xx.c file.
+     Each time the core clock (HCLK) changes, user had to update SystemCoreClock
+     variable value. Otherwise, any configuration based on this variable will be incorrect.
+     This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+  -----------------------------------------------------------------------------*/
+
+  /* Compute the value of ARR register to generate signal frequency at 17.57 Khz */
+  uwTimerPeriod = (uint32_t)((SystemCoreClock / 17570) - 1);
+  
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Compute CCR1 value to generate a duty cycle at 75% */
+  aCCValue_Buffer[0] = (uint32_t)(((uint32_t) 75 * (uwTimerPeriod - 1)) / 100);
+  /* Compute CCR2 value to generate a duty cycle at 50% */
+  aCCValue_Buffer[1] = (uint32_t)(((uint32_t) 50 * (uwTimerPeriod - 1)) / 100);
+  /* Compute CCR3 value to generate a duty cycle at 25% */
+  aCCValue_Buffer[2] = (uint32_t)(((uint32_t) 25 * (uwTimerPeriod - 1)) / 100);
+
+  /*## Start PWM signal generation in DMA mode ############################*/
+  if (HAL_TIM_PWM_Start_DMA(&htim1, TIM_CHANNEL_3, aCCValue_Buffer, 3) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = uwTimerPeriod;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 3;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = 0;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
+  sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+  sBreakDeadTimeConfig.DeadTime = 0;
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+  sBreakDeadTimeConfig.BreakFilter = 0;
+  sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+  sBreakDeadTimeConfig.Break2Filter = 0;
+  sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+  HAL_TIM_MspPostInit(&htim1);
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel7_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..3222f3ded
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,182 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : TIM/TIM_DMA/Src/stm32g4xx_hal_msp.c
+  * @author            : MCD Application Team
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_tim1_ch3;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+                    /**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_PWM MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
+{
+  if(htim_pwm->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+
+    /* TIM1 DMA Init */
+    /* TIM1_CH3 Init */
+    hdma_tim1_ch3.Instance = DMA1_Channel7;
+    hdma_tim1_ch3.Init.Request = DMA_REQUEST_TIM1_CH3;
+    hdma_tim1_ch3.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_tim1_ch3.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_tim1_ch3.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_tim1_ch3.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_tim1_ch3.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_tim1_ch3.Init.Mode = DMA_CIRCULAR;
+    hdma_tim1_ch3.Init.Priority = DMA_PRIORITY_HIGH;
+    if (HAL_DMA_Init(&hdma_tim1_ch3) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(htim_pwm,hdma[TIM_DMA_ID_CC3],hdma_tim1_ch3);
+
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspPostInit 0 */
+
+  /* USER CODE END TIM1_MspPostInit 0 */
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PA10     ------> TIM1_CH3
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspPostInit 1 */
+
+  /* USER CODE END TIM1_MspPostInit 1 */
+  }
+
+}
+/**
+* @brief TIM_PWM MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
+{
+  if(htim_pwm->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+
+    /* TIM1 DMA DeInit */
+    HAL_DMA_DeInit(htim_pwm->hdma[TIM_DMA_ID_CC3]);
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..81aa8cb7a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/stm32g4xx_it.c
@@ -0,0 +1,132 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    TIM/TIM_DMA/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_tim1_ch3;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel7 global interrupt.
+  */
+void DMA1_Channel7_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel7_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_tim1_ch3);
+  /* USER CODE BEGIN DMA1_Channel7_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel7_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/TIM_DMA.ioc b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/TIM_DMA.ioc
new file mode 100644
index 000000000..6af74f3a3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/TIM_DMA.ioc
@@ -0,0 +1,180 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.Request0=TIM1_CH3
+Dma.RequestsNb=1
+Dma.TIM1_CH3.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.TIM1_CH3.0.EventEnable=DISABLE
+Dma.TIM1_CH3.0.Instance=DMA1_Channel7
+Dma.TIM1_CH3.0.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.TIM1_CH3.0.MemInc=DMA_MINC_ENABLE
+Dma.TIM1_CH3.0.Mode=DMA_CIRCULAR
+Dma.TIM1_CH3.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.TIM1_CH3.0.PeriphInc=DMA_PINC_DISABLE
+Dma.TIM1_CH3.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.TIM1_CH3.0.Priority=DMA_PRIORITY_HIGH
+Dma.TIM1_CH3.0.RequestNumber=1
+Dma.TIM1_CH3.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.TIM1_CH3.0.SignalID=NONE
+Dma.TIM1_CH3.0.SyncEnable=DISABLE
+Dma.TIM1_CH3.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.TIM1_CH3.0.SyncRequestNumber=1
+Dma.TIM1_CH3.0.SyncSignalID=NONE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DMA
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IP4=TIM1
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA10
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA10.GPIO_PuPd=GPIO_PULLUP
+PA10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA10.Signal=S_TIM1_CH3
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TIM_DMA.ioc
+ProjectManager.ProjectName=TIM_DMA
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3
+SH.S_TIM1_CH3.ConfNb=1
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.AutomaticOutput=TIM_AUTOMATICOUTPUT_DISABLE
+TIM1.Break2Filter=0
+TIM1.Break2Polarity=TIM_BREAK2POLARITY_HIGH
+TIM1.Break2State=TIM_BREAK2_DISABLE
+TIM1.BreakFilter=0
+TIM1.BreakPolarity=TIM_BREAKPOLARITY_HIGH
+TIM1.BreakState=TIM_BREAK_DISABLE
+TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
+TIM1.ClearInputSource=TIM_CLEARINPUTSOURCE_NONE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.IPParameters=Prescaler,CounterMode,Period,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2,BreakState,BreakPolarity,BreakFilter,SourceBRKDigInput,SourceBRKCOMP1,SourceBRKCOMP2,Break2State,Break2Polarity,Break2Filter,SourceBRK2DigInput,SourceBRK2COMP1,SourceBRK2COMP2,AutomaticOutput,OffStateRunMode,OffStateIDLEMode,LockLevel,ClearInputSource,OCMode_PWM-PWM Generation3 CH3,OCFastMode_PWM-PWM Generation3 CH3,OCPolarity_3,OCIdleState_3,Channel-PWM Generation3 CH3
+TIM1.IPParametersWithoutCheck=Period
+TIM1.LockLevel=TIM_LOCKLEVEL_OFF
+TIM1.OCFastMode_PWM-PWM\ Generation3\ CH3=TIM_OCFAST_DISABLE
+TIM1.OCIdleState_3=TIM_OCIDLESTATE_RESET
+TIM1.OCMode_PWM-PWM\ Generation3\ CH3=TIM_OCMODE_PWM1
+TIM1.OCPolarity_3=TIM_OCPOLARITY_HIGH
+TIM1.OffStateIDLEMode=TIM_OSSI_DISABLE
+TIM1.OffStateRunMode=TIM_OSSR_DISABLE
+TIM1.Period=uwTimerPeriod
+TIM1.Prescaler=0
+TIM1.RepetitionCounter=3
+TIM1.SourceBRK2COMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2DigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKDigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=TIM_DMA
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/readme.txt b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/readme.txt
new file mode 100644
index 000000000..71674d16a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_DMA/readme.txt
@@ -0,0 +1,106 @@
+/**
+  @page TIM_DMA TIM DMA example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    TIM/TIM_DMA/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the TIM DMA example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+Use of the DMA with TIMER Update request 
+to transfer data from memory to TIMER Capture Compare Register 3 (TIMx_CCR3).
+
+  The following configuration values are used in this example:
+
+    - TIM1CLK = SystemCoreClock
+    - Counter repetition = 3 
+    - Prescaler = 0 
+    - TIM1 counter clock = SystemCoreClock
+    - SystemCoreClock is set to 170 MHz for STM32G4xx
+
+  The objective is to configure TIM1 channel 3 to generate complementary PWM 
+  (Pulse Width Modulation) signal with a frequency equal to 17.57 KHz, and a variable 
+  duty cycle that is changed by the DMA after a specific number of Update DMA request.
+
+  The number of this repetitive requests is defined by the TIM1 Repetition counter,
+  each 4 Update Requests, the TIM1 Channel 3 Duty Cycle changes to the next new 
+  value defined by the aCCValue_Buffer.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+The SystemClock_Config() function is used to configure the system clock for STM32G474QETx Devices :
+The CPU at 170 MHz  
+
+  The PWM waveform can be displayed using an oscilloscope.
+ 
+  In nominal mode (except at start) , it should looks like this :
+    
+       .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   
+        ___________     _______         ___             ___________    __
+      _|           |___|       |_______|   |___________|           |__|             
+       <----57us -----><----57us -----><----57us -----><----57us ----->
+
+	   
+@note PWM signal frequency value mentioned above is theoretical (obtained when the system clock frequency 
+      is exactly 170 MHz). Since the generated system clock frequency may vary from one board to another observed
+      PWM signal frequency might be slightly different.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then 
+      the SysTick interrupt must have higher priority (numerically lower)
+
+@note This example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+	  
+@par Keywords
+
+Timer, DMA, PWM, Frequency, Duty Cycle, Waveform, Oscilloscope, Output, Signal
+
+@par Directory contents
+
+  - TIM/TIM_DMA/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - TIM/TIM_DMA/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - TIM/TIM_DMA/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - TIM/TIM_DMA/Inc/main.h                  Header for main.c module  
+  - TIM/TIM_DMA/Src/stm32g4xx_it.c          Interrupt handlers
+  - TIM/TIM_DMA/Src/main.c                  Main program
+  - TIM/TIM_DMA/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - TIM/TIM_DMA/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - In this example, the clock is set to 170 MHz.
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 
+    board and can be easily tailored to any other supported device 
+    and development board.
+
+  - STM32G474E-EVAL1 Set-up
+    - Connect the TIM1 pin to an oscilloscope to monitor the different waveforms: 
+    - TIM1 CH3 (PA.10 (pin 4 in CN5 connector))
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/.extSettings b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/.extSettings
new file mode 100644
index 000000000..4bdfcb745
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../.\readme.txt;../.\readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/Project.eww
new file mode 100644
index 000000000..48d52b9ca
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\TIM_Dithering.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/TIM_Dithering.ewd b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/TIM_Dithering.ewd
new file mode 100644
index 000000000..11ae08c1f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/TIM_Dithering.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>TIM_Dithering</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/TIM_Dithering.ewp b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/TIM_Dithering.ewp
new file mode 100644
index 000000000..d3f7da1e9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/TIM_Dithering.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>TIM_Dithering</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>TIM_Dithering/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>TIM_Dithering/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>TIM_Dithering/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
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+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/main.h
new file mode 100644
index 000000000..8d25b7277
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/main.h
@@ -0,0 +1,76 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_Dithering/Src/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Compute the prescaler value to have TIM3 counter clock equal to 1500000 Hz */
+#define PRESCALER_VALUE     (uint32_t)((SystemCoreClock / 1500000) - 1)
+
+#define DELAY 50 /* 50 milliseconds */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..2908cfe65
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_Dithering/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/TIM_Dithering.uvoptx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/TIM_Dithering.uvoptx
new file mode 100644
index 000000000..65dfae053
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/TIM_Dithering.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>TIM_Dithering</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U005200303137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
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+
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+    <GroupName>Application/User</GroupName>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/TIM_Dithering.uvprojx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/TIM_Dithering.uvprojx
new file mode 100644
index 000000000..f030a68d8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/TIM_Dithering.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>TIM_Dithering</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>TIM_Dithering\</OutputDirectory>
+          <OutputName>TIM_Dithering</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopA1X>0</nStopA1X>
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+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
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+          <SimDlgDll>DCM.DLL</SimDlgDll>
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+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
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+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
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+            <hadIROM>1</hadIROM>
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+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>.././readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="TIM_Dithering"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..1033d3e65
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1358960127">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1358960127" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1358960127" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1358960127." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.739485505" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.858174780" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.2055233635" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1117867156" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1541026123" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.897075099" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.844295768" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1281599684" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.2126059997" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.857554832" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.880605538" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/TIM_Dithering}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1790717261" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.596907779" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1126980169" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1691876683" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1569559213" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.2093866079" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.223568027" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1473479864" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.859893996" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1251827482" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1319211292" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1034603520" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.615905791" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<listOptionValue builtIn="false" value="../../Inc"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1134127695" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1948198449" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+					</folderInfo>
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+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TIM_Dithering.null.2007877292" name="TIM_Dithering"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1358960127;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1358960127.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1569559213;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1251827482">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
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+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/.project
new file mode 100644
index 000000000..b9b507bf3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TIM_Dithering</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>TIM_Dithering.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/TIM_Dithering.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/main.c
new file mode 100644
index 000000000..0c3edf368
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/main.c
@@ -0,0 +1,387 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_Dithering/Src/main.c 
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to configure the FDCAN peripheral to
+  *          send and receive Classic CAN frames
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+#include "stm32g474e_eval.h"
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim3;
+
+/* USER CODE BEGIN PV */
+
+uint32_t dithering_enabled = 1;
+uint32_t Compare;  /* CCRx register value */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_TIM3_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_TIM3_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Configure User push-button in Interrupt mode */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+    if (dithering_enabled == 0)
+    {
+      HAL_Delay( DELAY * 16 );
+    }
+    else
+    {
+      /* In dithering mode, there are 16 more intermediate steps. So delay must be 16 time shorter */
+      HAL_Delay(DELAY);
+    }
+
+  /* Increment compare match */
+  Compare = __HAL_TIM_GET_COMPARE(&htim3, TIM_CHANNEL_3) + 1;
+
+  if (Compare > __HAL_TIM_GET_AUTORELOAD(&htim3))
+    {
+      /* Reset to initial value if pulse is bigger than period */
+      Compare = 0x0;
+    }
+  __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_3, Compare);
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief TIM3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM3_Init(void)
+{
+
+  /* USER CODE BEGIN TIM3_Init 0 */
+
+  /* USER CODE END TIM3_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+
+  /* USER CODE BEGIN TIM3_Init 1 */
+
+  /* USER CODE END TIM3_Init 1 */
+  htim3.Instance = TIM3;
+  htim3.Init.Prescaler = PRESCALER_VALUE;
+  htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim3.Init.Period = 4;
+  htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  HAL_TIMEx_DitheringEnable(&htim3);
+
+  /* rewrite ARR register when dither mode active */
+  __HAL_TIM_SET_AUTORELOAD(&htim3, 64);
+  HAL_TIM_GenerateEvent(&htim3, TIM_EVENTSOURCE_UPDATE);
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* rewrite ARR register when dither mode active */
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = 16;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.Pulse = 1;
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM3_Init 2 */
+
+  /* USER CODE END TIM3_Init 2 */
+  HAL_TIM_MspPostInit(&htim3);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/*   USER IRQ HANDLER TREATMENT                                               */
+/******************************************************************************/
+
+/**
+  * @brief EXTI line detection callbacks
+  * @param GPIO_Pin: Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+
+ if (GPIO_Pin == USER_BUTTON_PIN)
+ {
+    if (dithering_enabled == 0)
+    {
+      /* Enabling dithering is possible only when timer is stopped */
+     if (HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_3) != HAL_OK)
+      {
+        Error_Handler();
+      }
+
+     if (HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_4) != HAL_OK)
+      {
+        Error_Handler();
+      }
+
+      HAL_TIMEx_DitheringEnable(&htim3);
+
+     /* Need to set compare value to have integer plus fractional part */
+     __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_4, 1);
+
+     if (HAL_TIM_GenerateEvent(&htim3, TIM_EVENTSOURCE_UPDATE) != HAL_OK)
+      {
+        Error_Handler();
+      }
+
+    /* Restart PWM generation */
+     if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3) != HAL_OK)
+      {
+        Error_Handler();
+      }
+
+     if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4) != HAL_OK)
+      {
+        Error_Handler();
+      }
+      dithering_enabled = 1;
+    }
+    else
+    {
+      /* Disabling dithering is possible only when timer is stopped */
+      /* Enabling dithering is possible only when timer is stopped */
+     if (HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_3) != HAL_OK)
+      {
+        Error_Handler();
+      }
+     if (HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_4) != HAL_OK)
+      {
+        Error_Handler();
+      }
+
+      HAL_TIMEx_DitheringDisable(&htim3);
+
+    /* Restart PWM generation */
+     if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3) != HAL_OK)
+      {
+        Error_Handler();
+      }
+     if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4) != HAL_OK)
+      {
+        Error_Handler();
+      }
+      dithering_enabled = 0;
+    }
+  }
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..46aa71982
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,159 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_Dithering/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+                    /**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_PWM MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
+{
+  if(htim_pwm->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspInit 0 */
+
+  /* USER CODE END TIM3_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM3_CLK_ENABLE();
+  /* USER CODE BEGIN TIM3_MspInit 1 */
+
+  /* USER CODE END TIM3_MspInit 1 */
+  }
+
+}
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspPostInit 0 */
+
+  /* USER CODE END TIM3_MspPostInit 0 */
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**TIM3 GPIO Configuration
+    PC8     ------> TIM3_CH3
+    PC9     ------> TIM3_CH4
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM3_MspPostInit 1 */
+
+  /* USER CODE END TIM3_MspPostInit 1 */
+  }
+
+}
+/**
+* @brief TIM_PWM MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
+{
+  if(htim_pwm->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspDeInit 0 */
+
+  /* USER CODE END TIM3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM3_CLK_DISABLE();
+  /* USER CODE BEGIN TIM3_MspDeInit 1 */
+
+  /* USER CODE END TIM3_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..ed2150d11
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/stm32g4xx_it.c
@@ -0,0 +1,215 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_Dithering/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/**
+  * @brief  This function handles external lines 10 to 15 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/TIM_Dithering.ioc b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/TIM_Dithering.ioc
new file mode 100644
index 000000000..3c0252207
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/TIM_Dithering.ioc
@@ -0,0 +1,146 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=TIM3
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC8
+Mcu.Pin1=PC9
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PC8.Locked=true
+PC8.Signal=S_TIM3_CH3
+PC9.Locked=true
+PC9.Signal=S_TIM3_CH4
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TIM_Dithering.ioc
+ProjectManager.ProjectName=TIM_Dithering
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM3_Init-TIM3-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3
+SH.S_TIM3_CH3.ConfNb=1
+SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
+SH.S_TIM3_CH4.ConfNb=1
+TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
+TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
+TIM3.ClearInputSource=TIM_CLEARINPUTSOURCE_NONE
+TIM3.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM3.CounterMode=TIM_COUNTERMODE_UP
+TIM3.Dithering=Enable
+TIM3.Fractionnal_PeriodDither=0
+TIM3.Fractionnal_PulseDither_4=1
+TIM3.IPParameters=Prescaler,CounterMode,Dithering,Integer_PeriodDither,Fractionnal_PeriodDither,ClockDivision,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,ClearInputSource,Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4,Integer_PulseDither_3,Integer_PulseDither_4,Fractionnal_PulseDither_4
+TIM3.IPParametersWithoutCheck=Prescaler
+TIM3.Integer_PeriodDither=4
+TIM3.Integer_PulseDither_3=1
+TIM3.Integer_PulseDither_4=0
+TIM3.Prescaler=PRESCALER_VALUE
+TIM3.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM3.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=TIM_Dithering
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/readme.txt b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/readme.txt
new file mode 100644
index 000000000..d40364de8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_Dithering/readme.txt
@@ -0,0 +1,155 @@
+/**
+  @page TIM_Dithering TIM PWM Output with dithering example
+
+  @verbatim
+  ******************** (C) COPYRIGHT 2019 STMicroelectronics *******************
+  * @file    TIM/TIM_Dithering/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the TIM_Dithering example
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This example shows how to configure the TIM3 peripheral in PWM mode with dithering.
+
+SystemCoreClock is set to 170 MHz for STM32G4xx Devices.
+
+In this example TIM3 input clock (TIM3CLK) is set to APB1 clock (PCLK1),
+    since APB1 prescaler is different from 1.
+      TIM3CLK = PCLK1
+      PCLK1 = HCLK
+      => TIM3CLK = HCLK = SystemCoreClock
+    To get TIM3 counter clock at 1500000 Hz (so that waveforms are easily observed with oscilloscope),
+    the prescaler is computed as follows:
+       Prescaler = (TIM3CLK / TIM3 counter clock) - 1
+       Prescaler = ((SystemCoreClock) /1500000 Hz) - 1
+
+LD5 led is connected to TIM3_CH3, so that brightness represent the mean of output signal.
+
+Example execution:
+At initialization, period count (5 TIM3 ticks) and pulse count (1 TIM3 tick) are voluntarily very low,
+so that dithering effect is easily visible on oscilloscope.
+Dithering is activated but fractional part is null,
+thus there is only regular pulses with 1/5 = 20% duty cycle.
+And LD5 led brightness is quite low (about 20% of max intensity).
+PWM waveforms can be displayed using an oscilloscope.
+  TIM3_CH3
+           _     _     _     _     _     _     _     _     _     _     _     _     _     _     _     _     _
+         _| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |__
+
+Then timer compare match is incremented regularly. This add 1 more cycle to x pulse out of 16 period (x fractional part = Compare modulo 16).
+And LD5 led brightness is slightly increased.
+
+Fractional part = 1 --> 1 pulse out of 16 periods is longer (1 more cycle). Dither duty cycle = (1+1)/5 = 40%:
+
+  TIM3_CH3
+           __    _     _     _     _     _     _     _     _     _     _     _     _     _     _     _     __
+         _|  |__| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___|  |_
+          <---------------------------------------------------------------------------------------------->
+           ^                                       16 periods
+    Longer pulse
+LD5 led brightness is slightly increased.
+
+Fractional part = 2 --> 2 pulses out of 16 periods are longer (1 more cycle):
+  TIM3_CH3
+           __    _     _     _     _     _     _     _     __    _     _     _     _     _     _     _     __
+         _|  |__| |___| |___| |___| |___| |___| |___| |___|  |__| |___| |___| |___| |___| |___| |___| |___|  |_
+          <---------------------------------------------------------------------------------------------->
+           ^                                               ^                  16 periods
+       Longer pulse                                   Longer pulse
+LD5 led brightness is slightly increased.
+
+... and so on.
+
+When fractional part reach 15, 15 pulses out of 16 have 40% duty cycle,
+and only 1 out of 16 have 20% duty cycle.
+Then compare match continue to be incremented, this means that integer part is incremented and fractional part is reset.
+Thus all pulse are regular with a longer duration (40% duty cycle).
+The cycle of fractional part increment restarts.
+And LD5 led brightness continue to increased slightly.
+When Pulse becomes longer than period, pulse is reset to restart from the beginning, (LD5 led brightness very low).
+
+With dithering LD5 led brightness increases smoothly with (dither * period_count) 16 * 5 = 80 intermediate steps.
+
+@note When dithering is activated, TIM3_CHTIM3_CH4 is configured in PWM output with a pulse 1/16 so that oscilloscope can be synchronized.
+Pulse on CHTIM3_CH4 will appear every 16 periods.
+
+  TIM3_CH4
+           _                                                                                               _
+         _| |_____________________________________________________________________________________________| |_
+          <---------------------------------------------------------------------------------------------->
+                                                  16 periods
+
+If BUTTON_USER is pressed, dithering is deactivated. LD5 led brightness increases roughly with only 5 intermediate steps (= period_count).
+
+ TIM3_CH3
+           _     _     _     _     _     _     _     _     _     _     _     _     _     _     _     _     _
+         _| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |___| |__
+
+ TIM3_CH3
+           __    __    __    __    __    __    __    __    __    __    __    __    __    __    __    __    __
+         _|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |__|  |_
+
+... and so on.
+
+If BUTTON_USER is pressed again dithering is reactivated.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Timer, TIM, Dithering, PWM, Frequency, Duty Cycle, Waveform, Oscilloscope, Output, Signal.
+
+@par Directory contents
+
+  - TIM/TIM_Dithering/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - TIM/TIM_Dithering/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - TIM/TIM_Dithering/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - TIM/TIM_Dithering/Inc/main.h                  Header for main.c module
+  - TIM/TIM_Dithering/Src/stm32g4xx_it.c          Interrupt handlers
+  - TIM/TIM_Dithering/Src/main.c                  Main program
+  - TIM/TIM_Dithering/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - TIM/TIM_Dithering/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - In this example, the clock is set to 170 MHz.
+
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1
+    board and can be easily tailored to any other supported device
+    and development board.
+
+  - STM32G474E-EVAL1 Rev B Set-up
+   Connect the following pins to an oscilloscope to monitor the waveforms:
+        - TIM3_CHTIM3_CH3 : PC8 (pin 1 in CN5 connector)
+        - TIM3_CHTIM3_CH4 : PC9 (pin 11 in CN5 connector) Oscilloscope synchronization in dithering mode (1 pulse every 16 periods)
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/.extSettings b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/Project.eww
new file mode 100644
index 000000000..85d8739e8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\TIM_InputCapture.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/TIM_InputCapture.ewd b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/TIM_InputCapture.ewd
new file mode 100644
index 000000000..cb0efd4fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/TIM_InputCapture.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>TIM_InputCapture</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/TIM_InputCapture.ewp b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/TIM_InputCapture.ewp
new file mode 100644
index 000000000..d17047e18
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/TIM_InputCapture.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>TIM_InputCapture</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>TIM_InputCapture/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>TIM_InputCapture/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>TIM_InputCapture/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
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+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
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+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
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+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
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+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
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+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
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+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
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+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
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+          <name>GenLowLevelInterface</name>
+          <state>1</state>
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+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
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+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
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+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>GeneralMisraVer</name>
+          <state>0</state>
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+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
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+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
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+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
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+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
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+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
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+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
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+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
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+          <name>GFPUDeviceSlave</name>
+          <state></state>
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+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
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+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>NEON</name>
+          <state>0</state>
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+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
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+        <option>
+          <name>OGCMSISPackSelectDevice</name>
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+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
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+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
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+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
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+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
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+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
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+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
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+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
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+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
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+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
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+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
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+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
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+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
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+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
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+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
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+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
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+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
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+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
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+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
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+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
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+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
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+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
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+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
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+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
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+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
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+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
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+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
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+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
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+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
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+        <option>
+          <name>ADefines</name>
+          <state></state>
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+          <name>AList</name>
+          <state>0</state>
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+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
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+          <name>AListing</name>
+          <state>1</state>
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+          <name>MacExps</name>
+          <state>1</state>
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+          <name>PageLengthCheck</name>
+          <state>0</state>
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+          <name>PageLength</name>
+          <state>80</state>
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+          <state>8</state>
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+          <name>AXRef</name>
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+          <name>AXRefDefines</name>
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+          <name>AXRefInternal</name>
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+          <name>AXRefDual</name>
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+          <name>AProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
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+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
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+          <state>0</state>
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+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
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+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
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+          <name>AsmNoLiteralPool</name>
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+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
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+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>TIM_InputCapture.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
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+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
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+        <extensions></extensions>
+        <cmdline></cmdline>
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+      <archiveVersion>0</archiveVersion>
+      <data></data>
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+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
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+        <prebuild></prebuild>
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+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
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+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkOutputFile</name>
+          <state>TIM_InputCapture.out</state>
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+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
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+          <name>IlinkRawBinaryFile</name>
+          <state></state>
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+          <state></state>
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+          <name>IlinkRawBinaryAlign</name>
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+          <name>IlinkConfigDefines</name>
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+          <name>IlinkMapFile</name>
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+          <name>IlinkLogFile</name>
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+          <name>IlinkLogInitialization</name>
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+          <name>IlinkLogModule</name>
+          <state>0</state>
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+          <name>IlinkLogSection</name>
+          <state>0</state>
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+          <name>IlinkLogVeneer</name>
+          <state>0</state>
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+          <name>IlinkIcfOverride</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
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+          <name>IlinkIcfFileSlave</name>
+          <state></state>
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+          <name>IlinkEnableRemarks</name>
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+          <name>IlinkSuppressDiags</name>
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+          <state></state>
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+          <name>IlinkTreatAsWarn</name>
+          <state></state>
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+          <name>IlinkTreatAsErr</name>
+          <state></state>
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+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
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+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
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+          <name>IlinkExtraOptions</name>
+          <state></state>
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+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/main.h
new file mode 100644
index 000000000..9ff2c29ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_InputCapture/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..4b3836ea6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_InputCapture/Inc/stm32g0xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void TIM1_CC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/TIM_InputCapture.uvoptx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/TIM_InputCapture.uvoptx
new file mode 100644
index 000000000..9a8e72beb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/TIM_InputCapture.uvoptx
@@ -0,0 +1,640 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>TIM_InputCapture</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/TIM_InputCapture.uvprojx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/TIM_InputCapture.uvprojx
new file mode 100644
index 000000000..424bd2c5a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/TIM_InputCapture.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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+  <Header>### uVision Project, (C) Keil Software</Header>
+
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+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="TIM_InputCapture"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..03e82c24f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.739160708">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.739160708" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.428542317" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1043708322" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.913317274" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.49487462" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1100171016" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.38488397" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1565152083" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.543355186" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1416928696" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.531435537" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TIM_InputCapture.null.177727413" name="TIM_InputCapture"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.739160708;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.739160708.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1531212292;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1411675665">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1341879839;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1341879839.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.126274219;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.675273942">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/.project
new file mode 100644
index 000000000..a20a9952e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TIM_InputCapture</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>TIM_InputCapture.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/TIM_InputCapture.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/main.c
new file mode 100644
index 000000000..071b80ccb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/main.c
@@ -0,0 +1,340 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_InputCapture/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example shows how to use the TIM peripheral to measure only 
+  *          the frequency  of an external signal.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+/* Captured Values */
+uint32_t uwIC2Value1 = 0;
+uint32_t uwIC2Value2 = 0;
+uint32_t uwDiffCapture = 0;
+
+/* Capture index */
+uint16_t uhCaptureIndex = 0;
+
+/* Frequency Value */
+uint32_t uwFrequency = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+
+  /* TIM1 configuration: Input Capture mode ---------------------
+     The external signal is connected to TIM1 CH2 pin (PA9)  
+     The Rising edge is used as active edge,
+     The TIM1 CCR2 is used to compute the frequency value 
+  ------------------------------------------------------------ */
+
+  /*## Start the Input Capture in interrupt mode ##########################*/
+  if(HAL_TIM_IC_Start_IT(&htim1, TIM_CHANNEL_2) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_IC_InitTypeDef sConfigIC = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 0xFFFF;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_IC_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
+  sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
+  sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
+  sConfigIC.ICFilter = 0;
+  if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Input capture callback in non blocking mode 
+  * @param  htim : htim handle
+  * @retval None
+  */
+void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+  if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_2)
+  {
+    if(uhCaptureIndex == 0)
+    {
+      /* Get the 1st Input Capture value */
+      uwIC2Value1 = HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_2);
+      uhCaptureIndex = 1;
+    }
+    else if(uhCaptureIndex == 1)
+    {
+      /* Get the 2nd Input Capture value */
+      uwIC2Value2 = HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_2); 
+
+      /* Capture computation */
+      if (uwIC2Value2 > uwIC2Value1)
+      {
+        uwDiffCapture = (uwIC2Value2 - uwIC2Value1); 
+      }
+      else if (uwIC2Value2 < uwIC2Value1)
+      {
+        /* 0xFFFF is max TIM1_CCRx value */
+        uwDiffCapture = ((0xFFFF - uwIC2Value1) + uwIC2Value2) + 1;
+      }
+      else
+      {
+        /* If capture values are equal, we have reached the limit of frequency
+           measures */
+        Error_Handler();
+      }
+
+      /* Frequency computation: for this example TIMx (TIM1) is clocked by
+         APB2Clk */      
+      uwFrequency = HAL_RCC_GetPCLK2Freq() / uwDiffCapture;
+      uhCaptureIndex = 0;
+    }
+  }
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..2ffca7fd3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,155 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : TIM/TIM_InputCapture/Src/stm32g4xx_hal_msp.c
+  * @author            : MCD Application Team
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_IC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_ic: TIM_IC handle pointer
+* @retval None
+*/
+void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* htim_ic)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim_ic->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PA9     ------> TIM1_CH2
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* TIM1 interrupt Init */
+    HAL_NVIC_SetPriority(TIM1_CC_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM1_CC_IRQn);
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_IC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_ic: TIM_IC handle pointer
+* @retval None
+*/
+void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef* htim_ic)
+{
+  if(htim_ic->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+ 
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+
+    /**TIM1 GPIO Configuration
+    PA9     ------> TIM1_CH2
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
+
+    /* TIM1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(TIM1_CC_IRQn);
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..4e93c9b17
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/stm32g4xx_it.c
@@ -0,0 +1,132 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    TIM/TIM_InputCapture/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM1 capture compare interrupt.
+  */
+void TIM1_CC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM1_CC_IRQn 0 */
+
+  /* USER CODE END TIM1_CC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim1);
+  /* USER CODE BEGIN TIM1_CC_IRQn 1 */
+
+  /* USER CODE END TIM1_CC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/TIM_InputCapture.ioc b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/TIM_InputCapture.ioc
new file mode 100644
index 000000000..f68b5af50
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/TIM_InputCapture.ioc
@@ -0,0 +1,139 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=TIM1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA9
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.TIM1_CC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA9.Signal=S_TIM1_CH2
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TIM_InputCapture.ioc
+ProjectManager.ProjectName=TIM_InputCapture
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+SH.S_TIM1_CH2.0=TIM1_CH2,Input_Capture2_from_TI2
+SH.S_TIM1_CH2.ConfNb=1
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.Channel-Input_Capture2_from_TI2=TIM_CHANNEL_2
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.ICFilter_CH2=0
+TIM1.ICPolarity_CH2=TIM_INPUTCHANNELPOLARITY_RISING
+TIM1.ICPrescaler-Input_Capture2_from_TI2=TIM_ICPSC_DIV1
+TIM1.ICSelection-Input_Capture2_from_TI2=TIM_ICSELECTION_DIRECTTI
+TIM1.IPParameters=Prescaler,CounterMode,Period,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2,ICPolarity_CH2,ICSelection-Input_Capture2_from_TI2,ICPrescaler-Input_Capture2_from_TI2,ICFilter_CH2,Channel-Input_Capture2_from_TI2
+TIM1.Period=0xFFFF
+TIM1.Prescaler=0
+TIM1.RepetitionCounter=0
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=TIM_InputCapture
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/readme.txt b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/readme.txt
new file mode 100644
index 000000000..7dce194ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_InputCapture/readme.txt
@@ -0,0 +1,96 @@
+/**
+  @page TIM_InputCapture Input Capture example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    TIM/TIM_InputCapture/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the TIM_InputCapture example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+How to use the TIM peripheral to measure an external signal frequency.
+ 
+  At the beginning of the main program the HAL_Init() function is called to reset 
+  all the peripherals, initialize the Flash interface and the systick.
+  The SystemClock_Config() function is used to configure the system clock for STM32G474QETx Devices :
+  The CPU at 170 MHz 
+
+  The TIM1CLK frequency is set to SystemCoreClock  (Hz), the Prescaler is 0,
+  so the TIM1 counter clock is SystemCoreClock  (Hz).
+
+  SystemCoreClock is set to 170 MHz for STM32G474QETx Devices.
+
+  TIM1 is configured in Input Capture Mode: the external signal is connected to 
+  TIM1 Channel2 used as input pin.
+  To measure the frequency we use the TIM1 CC interrupt request, so in the 
+  TIM1 CC IRQHandler routine, the frequency of the external signal is computed.
+
+  The "uwFrequency" variable contains the external signal frequency:
+  uwFrequency = TIM1 counter clock / uwDiffCapture (Hz),
+  where "uwDiffCapture" is the difference between two consecutive TIM1 captures.
+
+  The minimum frequency value to measure is TIM1 counter clock / CCR MAX
+                                              = (SystemCoreClock) / 65535
+
+  Due to TIM1 CC IRQHandler processing time (around 1.66us), the maximum
+  frequency value to measure is around 600kHz.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note This example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+
+@par Keywords
+
+Timer, DMA, Frequency, Input, Capture, External Signal, Measurement
+
+@par Directory contents
+
+  - TIM/TIM_InputCapture/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - TIM/TIM_InputCapture/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - TIM/TIM_InputCapture/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - TIM/TIM_InputCapture/Inc/main.h                  Header for main.c module  
+  - TIM/TIM_InputCapture/Src/stm32g4xx_it.c          Interrupt handlers
+  - TIM/TIM_InputCapture/Src/main.c                  Main program
+  - TIM/TIM_InputCapture/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - TIM/TIM_InputCapture/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - In this example, the clock is set to 170 MHz.
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1
+    board and can be easily tailored to any other supported device 
+    and development board.      
+
+  - STM32G474E-EVAL1 Set-up
+    - Connect the external signal to measure to the TIM1 CH2 pin (PA.9 (pin 8 in CN5 connector)).
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/.extSettings b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/Project.eww
new file mode 100644
index 000000000..a0303ae8b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\TIM_OnePulse.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/TIM_OnePulse.ewd b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/TIM_OnePulse.ewd
new file mode 100644
index 000000000..8f485d3cd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/TIM_OnePulse.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>TIM_OnePulse</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/TIM_OnePulse.ewp b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/TIM_OnePulse.ewp
new file mode 100644
index 000000000..19ce10e47
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/TIM_OnePulse.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>TIM_OnePulse</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>TIM_OnePulse/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>TIM_OnePulse/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>TIM_OnePulse/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
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+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
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+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
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+          <name>OGProductVersion</name>
+          <state>4.41A</state>
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+          <state>8.20.1.14181</state>
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+        <option>
+          <name>GeneralEnableMisra</name>
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+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
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+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
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+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
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+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
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+          <name>GenStdoutInterface</name>
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+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <name>GeneralMisraVer</name>
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+          <state>1</state>
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+          <state>$PROJ_DIR$/../Inc</state>
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+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/main.h
new file mode 100644
index 000000000..04f18e7f5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/main.h
@@ -0,0 +1,84 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_OnePulse/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/*## Compute the prescaler value, to have TIM1Freq = 1000000 Hz
+ * TIM1 input clock (TIM1CLK) is set to APB1 clock (PCLK1), since APB1
+   * prescaler is 1.
+   * TIM1CLK = PCLK1
+   * PCLK1 = HCLK
+ * TIM1CLK = SystemCoreClock
+ *
+ * Prescaler = (TIM1CLK /TIM1 counter clock) - 1
+ *
+ * The prescaler value is computed in order to have TIM1 counter clock
+ * set at 1000000 Hz.
+ */
+
+ #define PRESCALER_VALUE (uint32_t)(((SystemCoreClock) / 1000000) - 1)
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..e94c070da
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_OnePulse/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/TIM_OnePulse.uvoptx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/TIM_OnePulse.uvoptx
new file mode 100644
index 000000000..8426a3709
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/TIM_OnePulse.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>TIM_OnePulse</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/TIM_OnePulse.uvprojx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/TIM_OnePulse.uvprojx
new file mode 100644
index 000000000..553d1bcea
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/TIM_OnePulse.uvprojx
@@ -0,0 +1,592 @@
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+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="TIM_OnePulse"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..e953a1c3e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1300611670">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1300611670" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1300611670" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1300611670." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.352642670" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1705057124" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1034119178" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1401640367" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1180099918" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1883646669" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.666147858" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.716885613" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/TIM_OnePulse}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.639746299" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.813464569" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.559813096" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+								</option>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1848465733" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.479918865" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1963608036" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1916976773" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.441189535" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1036363260" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1076150542" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.138204611" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1696561398" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.403237650" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1659142717" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.2010959603" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1829074578" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1672579733" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1031079099" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.753776526" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.926402537" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1223009012" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TIM_OnePulse.null.738996039" name="TIM_OnePulse"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.926503899;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.926503899.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.642778518;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.479918865">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1300611670;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1300611670.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.559813096;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.909396482">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/.project
new file mode 100644
index 000000000..86c822d3c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TIM_OnePulse</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>TIM_OnePulse.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/TIM_OnePulse.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/main.c
new file mode 100644
index 000000000..066164ac1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/main.c
@@ -0,0 +1,333 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_OnePulse/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use TIM HAL API to generate
+  *          a one pulse signal
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /*## Start the One Pulse mode #######################################
+   *
+   * * The one pulse waveform can be displayed using an oscilloscope and it looks
+   * like this.
+   *                              ____
+   *                              |   |
+   * CH2 _________________________|   |_________________________________________
+   *
+   *                                            ___________________________
+   *                                           |                           |
+   * CH1 ______________________________________|                           |____
+   *                             <---Delay-----><------Pulse--------------->
+   */
+
+  if (HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_SlaveConfigTypeDef sSlaveConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = PRESCALER_VALUE;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 0xFFFF;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_OnePulse_Init(&htim1, TIM_OPMODE_SINGLE) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;
+  sSlaveConfig.InputTrigger = TIM_TS_TI2FP2;
+  sSlaveConfig.TriggerPolarity = TIM_TRIGGERPOLARITY_RISING;
+  sSlaveConfig.TriggerFilter = 0;
+  if (HAL_TIM_SlaveConfigSynchro(&htim1, &sSlaveConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM2;
+  sConfigOC.Pulse = 16383;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
+  sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+  sBreakDeadTimeConfig.DeadTime = 0;
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+  sBreakDeadTimeConfig.BreakFilter = 0;
+  sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+  sBreakDeadTimeConfig.Break2Filter = 0;
+  sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+  HAL_TIM_MspPostInit(&htim1);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..c0fc3e835
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,179 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : TIM/TIM_OnePulse/Src/stm32g4xx_hal_msp.c
+  * @author            : MCD Application Team
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+                    /**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PA9     ------> TIM1_CH2
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspPostInit 0 */
+
+  /* USER CODE END TIM1_MspPostInit 0 */
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PA8     ------> TIM1_CH1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspPostInit 1 */
+
+  /* USER CODE END TIM1_MspPostInit 1 */
+  }
+
+}
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+
+    /**TIM1 GPIO Configuration
+    PA8     ------> TIM1_CH1
+    PA9     ------> TIM1_CH2
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_8|GPIO_PIN_9);
+
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..6467c5e80
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/stm32g4xx_it.c
@@ -0,0 +1,118 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    TIM/TIM_OnePulse/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/TIM_OnePulse.ioc b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/TIM_OnePulse.ioc
new file mode 100644
index 000000000..9e122ff25
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/TIM_OnePulse.ioc
@@ -0,0 +1,176 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=TIM1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA8
+Mcu.Pin1=PA9
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_TIM1_VS_ControllerModeTrigger
+Mcu.Pin5=VP_TIM1_VS_OPM
+Mcu.PinsNb=6
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA8.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA8.GPIO_PuPd=GPIO_PULLDOWN
+PA8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA8.Signal=S_TIM1_CH1
+PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA9.GPIO_PuPd=GPIO_PULLDOWN
+PA9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA9.Signal=S_TIM1_CH2
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TIM_OnePulse.ioc
+ProjectManager.ProjectName=TIM_OnePulse
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1
+SH.S_TIM1_CH1.ConfNb=1
+SH.S_TIM1_CH2.0=TIM1_CH2,TriggerSource_TI2FP2
+SH.S_TIM1_CH2.ConfNb=1
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.AutomaticOutput=TIM_AUTOMATICOUTPUT_DISABLE
+TIM1.Break2Filter=0
+TIM1.Break2Polarity=TIM_BREAK2POLARITY_HIGH
+TIM1.Break2State=TIM_BREAK2_DISABLE
+TIM1.BreakFilter=0
+TIM1.BreakPolarity=TIM_BREAKPOLARITY_HIGH
+TIM1.BreakState=TIM_BREAK_DISABLE
+TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
+TIM1.ClearInputSource=TIM_CLEARINPUTSOURCE_NONE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.IPParameters=Prescaler,CounterMode,Period,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2,BreakState,BreakPolarity,BreakFilter,SourceBRKDigInput,SourceBRKCOMP1,SourceBRKCOMP2,Break2State,Break2Polarity,Break2Filter,SourceBRK2DigInput,SourceBRK2COMP1,SourceBRK2COMP2,AutomaticOutput,OffStateRunMode,OffStateIDLEMode,LockLevel,ClearInputSource,Slave_TriggerPolarity,Slave_TriggerFilter,TIM_SlaveMode,OCMode_PWM-PWM Generation1 CH1,OCFastMode_PWM-PWM Generation1 CH1,OCPolarity_1,OCIdleState_1,Channel-PWM Generation1 CH1,PulseNoDither_1
+TIM1.IPParametersWithoutCheck=Prescaler
+TIM1.LockLevel=TIM_LOCKLEVEL_OFF
+TIM1.OCFastMode_PWM-PWM\ Generation1\ CH1=TIM_OCFAST_DISABLE
+TIM1.OCIdleState_1=TIM_OCIDLESTATE_RESET
+TIM1.OCMode_PWM-PWM\ Generation1\ CH1=TIM_OCMODE_PWM2
+TIM1.OCPolarity_1=TIM_OCPOLARITY_HIGH
+TIM1.OffStateIDLEMode=TIM_OSSI_DISABLE
+TIM1.OffStateRunMode=TIM_OSSR_DISABLE
+TIM1.Period=0xFFFF
+TIM1.Prescaler=PRESCALER_VALUE
+TIM1.PulseNoDither_1=16383
+TIM1.RepetitionCounter=0
+TIM1.Slave_TriggerFilter=0
+TIM1.Slave_TriggerPolarity=TIM_TRIGGERPOLARITY_RISING
+TIM1.SourceBRK2COMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2DigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKDigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+TIM1.TIM_SlaveMode=TIM_SLAVEMODE_TRIGGER
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ControllerModeTrigger.Mode=Trigger Mode
+VP_TIM1_VS_ControllerModeTrigger.Signal=TIM1_VS_ControllerModeTrigger
+VP_TIM1_VS_OPM.Mode=OPM_bit
+VP_TIM1_VS_OPM.Signal=TIM1_VS_OPM
+board=custom
+ProjectManager.Example=TIM_OnePulse
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/readme.txt b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/readme.txt
new file mode 100644
index 000000000..b6fb631e1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_OnePulse/readme.txt
@@ -0,0 +1,112 @@
+/**
+  @page TIM_OnePulse TIM One Pulse example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    TIM/TIM_OnePulse/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the TIM One Pulse example.      
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+This example shows how to use the TIMER peripheral to generate a single pulse when
+a rising edge of an external signal is received on the TIMER Input pin.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+The SystemClock_Config() function is used to configure the system clock for STM32G474QETx Devices :
+The CPU at 170 MHz 
+
+Clock setup for TIM1
+================================
+
+  TIM1CLK = SystemCoreClock = 170 MHz.
+  
+  Prescaler = (TIM1CLK /TIM1 counter clock) - 1
+  
+  The prescaler value is computed in order to have TIM1 counter clock 
+  set at 1000000 Hz.
+  
+  The Autoreload value is 65535 (TIM1->ARR), so the maximum frequency value to 
+  trigger the TIM1 input is 1000000/65535 [Hz].
+ 
+Configuration of TIM1 in One Pulse Mode
+===================================================
+ 
+  - The external signal is connected to TIM1_CH2 pin (PA9), 
+    and a rising edge on this input is used to trigger the Timer.
+  - The One Pulse signal is output on TIM1_CH1 (PA8).
+
+  The delay value is fixed to:
+   - Delay =  CCR1/TIM1 counter clock 
+           = 16383 / 1000000 [sec]
+           
+  The pulse value is fixed to : 
+   - Pulse value = (TIM_Period - TIM_Pulse)/TIM1 counter clock  
+                 = (65535 - 16383) / 1000000 [sec]
+
+  The one pulse waveform can be displayed using an oscilloscope and it looks
+  like this.
+LED3 is ON when there are an error.
+  
+                                ___
+                               |   |
+  CH2 _________________________|   |__________________________________________
+ 
+                                             ___________________________
+                                            |                           |
+  CH1 ______________________________________|                           |_____
+                               <---Delay----><------Pulse--------------->
+@note The delay and pulse values mentioned above are theoretical (obtained when the system clock frequency is exactly 170 MHz).
+      They might be slightly different depending on system clock frequency precision.
+
+@par Keywords
+
+Timer, Output, signals, One Pulse, PWM, Oscilloscope, External signal, Autoreload, Waveform
+
+@par Directory contents
+
+  - TIM/TIM_OnePulse/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - TIM/TIM_OnePulse/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - TIM/TIM_OnePulse/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - TIM/TIM_OnePulse/Inc/main.h                  Header for main.c module  
+  - TIM/TIM_OnePulse/Src/stm32g4xx_it.c          Interrupt handlers
+  - TIM/TIM_OnePulse/Src/main.c                  Main program
+  - TIM/TIM_OnePulse/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - TIM/TIM_OnePulse/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+   - This example runs on STM32G474QETx devices.
+   - In this example, the clock is set to 170 MHz.
+    
+  - This example has been tested with STM32G474E-EVAL1 board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Set-up
+   - Connect the external signal to the TIM1_CH2 pin (PA9) (pin 8 in CN5 connector)
+   - Connect the TIM1_CH1 pin(PA8) (pin 2 in CN5 connector) to an oscilloscope to monitor the waveform.  
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files: Project->Rebuild all
+ - Load project image: Project->Download and Debug
+ - Run program: Debug->Go(F5) 
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/.extSettings b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/Project.eww
new file mode 100644
index 000000000..19604344f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\TIM_PWMInput.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/TIM_PWMInput.ewd b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/TIM_PWMInput.ewd
new file mode 100644
index 000000000..f089f9822
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/TIM_PWMInput.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>TIM_PWMInput</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/TIM_PWMInput.ewp b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/TIM_PWMInput.ewp
new file mode 100644
index 000000000..6e05f1623
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/TIM_PWMInput.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>TIM_PWMInput</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>TIM_PWMInput/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>TIM_PWMInput/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>TIM_PWMInput/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
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+          <state></state>
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+    <settings>
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+      <data></data>
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+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
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+      <file>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
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+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/main.h
new file mode 100644
index 000000000..2e55b0055
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_PWMInput/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..9d353c901
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_PWMInput/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void TIM1_BRK_TIM15_IRQHandler(void);
+void TIM1_UP_TIM16_IRQHandler(void);
+void TIM1_TRG_COM_TIM17_IRQHandler(void);
+void TIM1_CC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/TIM_PWMInput.uvoptx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/TIM_PWMInput.uvoptx
new file mode 100644
index 000000000..3b2388992
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/TIM_PWMInput.uvoptx
@@ -0,0 +1,133 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+	<Target>
+		<TargetName>TIM_PWMInput</TargetName>
+		<ToolsetNumber>0x4</ToolsetNumber>
+		<ToolsetName>ARM-ADS</ToolsetName>
+		<TargetOption>
+			<CLKADS>170000000</CLKADS>
+			<OPTTT>
+				<gFlags>1</gFlags>
+				<BeepAtEnd>1</BeepAtEnd>
+				<RunSim>0</RunSim>
+				<RunTarget>1</RunTarget>
+			</OPTTT>
+			<OPTHX>
+				<HexSelection>1</HexSelection>
+				<FlashByte>65535</FlashByte>
+				<HexRangeLowAddress>0</HexRangeLowAddress>
+				<HexRangeHighAddress>0</HexRangeHighAddress>
+				<HexOffset>0</HexOffset>
+			</OPTHX>
+			<OPTLEX>
+				<PageWidth>79</PageWidth>
+				<PageLength>66</PageLength>
+				<TabStop>8</TabStop>
+				<ListingPath />
+			</OPTLEX>
+			<ListingPage>
+				<CreateCListing>1</CreateCListing>
+				<CreateAListing>1</CreateAListing>
+				<CreateLListing>1</CreateLListing>
+				<CreateIListing>0</CreateIListing>
+				<AsmCond>1</AsmCond>
+				<AsmSymb>1</AsmSymb>
+				<AsmXref>0</AsmXref>
+				<CCond>1</CCond>
+				<CCode>0</CCode>
+				<CListInc>0</CListInc>
+				<CSymb>0</CSymb>
+				<LinkerCodeListing>0</LinkerCodeListing>
+			</ListingPage>
+			<OPTXL>
+				<LMap>1</LMap>
+				<LComments>1</LComments>
+				<LGenerateSymbols>1</LGenerateSymbols>
+				<LLibSym>1</LLibSym>
+				<LLines>1</LLines>
+				<LLocSym>1</LLocSym>
+				<LPubSym>1</LPubSym>
+				<LXref>0</LXref>
+				<LExpSel>0</LExpSel>
+			</OPTXL>
+			<OPTFL>
+				<tvExp>0</tvExp>
+				<tvExpOptDlg>0</tvExpOptDlg>
+				<IsCurrentTarget>1</IsCurrentTarget>
+			</OPTFL>
+			<CpuCode>0</CpuCode>
+			<DebugOpt>
+				<uSim>0</uSim>
+				<uTrg>1</uTrg>
+				<sLdApp>1</sLdApp>
+				<sGomain>1</sGomain>
+				<sRbreak>1</sRbreak>
+				<sRwatch>1</sRwatch>
+				<sRmem>1</sRmem>
+				<sRfunc>1</sRfunc>
+				<sRbox>1</sRbox>
+				<tLdApp>1</tLdApp>
+				<tGomain>1</tGomain>
+				<tRbreak>1</tRbreak>
+				<tRwatch>1</tRwatch>
+				<tRmem>1</tRmem>
+				<tRfunc>1</tRfunc>
+				<tRbox>1</tRbox>
+				<sRunDeb>0</sRunDeb>
+				<sLrtime>0</sLrtime>
+				<nTsel>13</nTsel>
+				<sDll />
+				<sDllPa />
+				<sDlgDll />
+				<sDlgPa />
+				<sIfile />
+				<tDll />
+				<tDllPa />
+				<tDlgDll />
+				<tDlgPa />
+				<tIfile />
+				<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+			</DebugOpt>
+			<TargetDriverDllRegistry>
+				<SetRegEntry>
+					<Number>0</Number>
+					<Key>ST-LINKIII-KEIL_SWO</Key>
+					<Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+				</SetRegEntry>
+				<SetRegEntry>
+					<Number>0</Number>
+					<Key />
+					<Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)</Name>
+				</SetRegEntry>
+			</TargetDriverDllRegistry>
+			<DebugFlag>
+				<trace>0</trace>
+				<periodic>1</periodic>
+				<aLwin>0</aLwin>
+				<aCover>0</aCover>
+				<aSer1>0</aSer1>
+				<aSer2>0</aSer2>
+				<aPa>0</aPa>
+				<viewmode>0</viewmode>
+				<vrSel>0</vrSel>
+				<aSym>0</aSym>
+				<aTbox>0</aTbox>
+				<AscS1>0</AscS1>
+				<AscS2>0</AscS2>
+				<AscS3>0</AscS3>
+				<aSer3>0</aSer3>
+				<eProf>0</eProf>
+				<aLa>0</aLa>
+				<aPa1>0</aPa1>
+				<AscS4>0</AscS4>
+				<aSer4>0</aSer4>
+				<StkLoc>0</StkLoc>
+				<TrcWin>0</TrcWin>
+				<newCpu>0</newCpu>
+				<uProt>0</uProt>
+			</DebugFlag>
+			<LintExecutable />
+			<LintConfigFile />
+		</TargetOption>
+	</Target>
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/TIM_PWMInput.uvprojx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/TIM_PWMInput.uvprojx
new file mode 100644
index 000000000..762c47fbe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/TIM_PWMInput.uvprojx
@@ -0,0 +1,611 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_proj.xsd">
+
+	<SchemaVersion>1.1</SchemaVersion>
+
+	<Header>### uVision Project, (C) Keil Software</Header>
+
+	<Targets>
+		<Target> 
+			<TargetName>TIM_PWMInput</TargetName>
+			<ToolsetNumber>0x4</ToolsetNumber>
+			<ToolsetName>ARM-ADS</ToolsetName>
+			<TargetOption>
+				<TargetCommonOption>
+					<Device>STM32G474QETx</Device>
+					<Vendor>STMicroelectronics</Vendor>
+					<Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+					<FlashUtilSpec/>
+					<StartupFile/>
+					<FlashDriverDll/>
+					<DeviceId/>
+					<RegisterFile/>
+					<MemoryEnv/>
+					<Cmp/>
+					<Asm/>
+					<Linker/>
+					<OHString/>
+					<InfinionOptionDll/>
+					<SLE66CMisc/>
+					<SLE66AMisc/>
+					<SLE66LinkerMisc/>
+					<SFDFile/>
+					<bCustSvd>0</bCustSvd>
+					<UseEnv>0</UseEnv>
+					<BinPath/>
+					<IncludePath/>
+					<LibPath/>
+					<RegisterFilePath/>
+					<DBRegisterFilePath/>
+					<TargetStatus>
+						<Error>0</Error>
+						<ExitCodeStop>0</ExitCodeStop>
+						<ButtonStop>0</ButtonStop>
+						<NotGenerated>0</NotGenerated>
+						<InvalidFlash>1</InvalidFlash>
+					</TargetStatus>
+					<OutputDirectory>TIM_PWMInput\</OutputDirectory>
+					<OutputName>TIM_PWMInput</OutputName>
+					<CreateExecutable>1</CreateExecutable>
+					<CreateLib>0</CreateLib>
+					<CreateHexFile>1</CreateHexFile>
+					<DebugInformation>1</DebugInformation>
+					<BrowseInformation>1</BrowseInformation>
+					<ListingPath>./TIM_PWMInput/</ListingPath>
+					<HexFormatSelection>1</HexFormatSelection>
+					<Merge32K>0</Merge32K>
+					<CreateBatchFile>0</CreateBatchFile>
+					<BeforeCompile>
+						<RunUserProg1>0</RunUserProg1>
+						<RunUserProg2>0</RunUserProg2>
+						<UserProg1Name/>
+						<UserProg2Name/>
+						<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+						<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+					</BeforeCompile>
+					<BeforeMake>
+						<RunUserProg1>0</RunUserProg1>
+						<RunUserProg2>0</RunUserProg2>
+						<UserProg1Name/>
+						<UserProg2Name/>
+						<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+						<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+						<nStopB1X>0</nStopB1X>
+						<nStopB2X>0</nStopB2X>
+					</BeforeMake>
+					<AfterMake>
+						<RunUserProg1>0</RunUserProg1>
+						<RunUserProg2>0</RunUserProg2>
+						<UserProg1Name/>
+						<UserProg2Name/>
+						<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+						<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+					</AfterMake>
+					<SelectedForBatchBuild>0</SelectedForBatchBuild>
+					<SVCSIdString/>
+				</TargetCommonOption>
+				<CommonProperty>
+					<UseCPPCompiler>0</UseCPPCompiler>
+					<RVCTCodeConst>0</RVCTCodeConst>
+					<RVCTZI>0</RVCTZI>
+					<RVCTOtherData>0</RVCTOtherData>
+					<ModuleSelection>0</ModuleSelection>
+					<IncludeInBuild>1</IncludeInBuild>
+					<AlwaysBuild>0</AlwaysBuild>
+					<GenerateAssemblyFile>0</GenerateAssemblyFile>
+					<AssembleAssemblyFile>0</AssembleAssemblyFile>
+					<PublicsOnly>0</PublicsOnly>
+					<StopOnExitCode>3</StopOnExitCode>
+					<CustomArgument/>
+					<IncludeLibraryModules/>
+					<ComprImg/>
+				</CommonProperty>
+				<DllOption>
+					<SimDllName>SARMCM3.DLL</SimDllName>
+					<SimDllArguments>-REMAP -MPU</SimDllArguments>
+					<SimDlgDll>DCM.DLL</SimDlgDll>
+					<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+					<TargetDllName>SARMCM3.DLL</TargetDllName>
+					<TargetDllArguments>-MPU</TargetDllArguments>
+					<TargetDlgDll>TCM.DLL</TargetDlgDll>
+					<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+				</DllOption>
+				<DebugOption>
+					<OPTHX>
+						<HexSelection>1</HexSelection>
+						<HexRangeLowAddress>0</HexRangeLowAddress>
+						<HexRangeHighAddress>0</HexRangeHighAddress>
+						<HexOffset>0</HexOffset>
+						<Oh166RecLen>16</Oh166RecLen>
+					</OPTHX>
+					<Simulator>
+						<UseSimulator>0</UseSimulator>
+						<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+						<RunToMain>1</RunToMain>
+						<RestoreBreakpoints>1</RestoreBreakpoints>
+						<RestoreWatchpoints>1</RestoreWatchpoints>
+						<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+						<RestoreFunctions>1</RestoreFunctions>
+						<RestoreToolbox>1</RestoreToolbox>
+						<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+						<RestoreSysVw>1</RestoreSysVw>
+					</Simulator>
+					<Target>
+						<UseTarget>1</UseTarget>
+						<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+						<RunToMain>1</RunToMain>
+						<RestoreBreakpoints>1</RestoreBreakpoints>
+						<RestoreWatchpoints>1</RestoreWatchpoints>
+						<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+						<RestoreFunctions>0</RestoreFunctions>
+						<RestoreToolbox>1</RestoreToolbox>
+						<RestoreTracepoints>1</RestoreTracepoints> 
+						<RestoreSysVw>1</RestoreSysVw>
+					</Target>
+					<RunDebugAfterBuild>0</RunDebugAfterBuild>
+					<TargetSelection>13</TargetSelection>
+					<SimDlls>
+						<CpuDll/>
+						<CpuDllArguments/>
+						<PeripheralDll/>
+						<PeripheralDllArguments/>
+						<InitializationFile/>
+					</SimDlls>
+					<TargetDlls>
+						<CpuDll/>
+						<CpuDllArguments/>
+						<PeripheralDll/>
+						<PeripheralDllArguments/>
+						<InitializationFile/>
+						<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
+					</TargetDlls>
+				</DebugOption>
+				<Utilities>
+					<Flash1>
+						<UseTargetDll>1</UseTargetDll>
+						<UseExternalTool>0</UseExternalTool>
+						<RunIndependent>0</RunIndependent>
+						<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+						<Capability>1</Capability>
+						<DriverSelection>4107</DriverSelection>
+					</Flash1>
+					<bUseTDR>1</bUseTDR>
+					<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+					<Flash3/>
+					<Flash4/>
+					<pFcarmOut/>
+					<pFcarmGrp/>
+					<pFcArmRoot/>
+					<FcArmLst>0</FcArmLst>
+				</Utilities>
+				<TargetArmAds>
+					<ArmAdsMisc>
+						<GenerateListings>0</GenerateListings>
+						<asHll>1</asHll>
+						<asAsm>1</asAsm>
+						<asMacX>1</asMacX>
+						<asSyms>1</asSyms>
+						<asFals>1</asFals>
+						<asDbgD>1</asDbgD>
+						<asForm>1</asForm>
+						<ldLst>0</ldLst>
+						<ldmm>1</ldmm>
+						<ldXref>1</ldXref>
+						<BigEnd>0</BigEnd>
+						<AdsALst>1</AdsALst>
+						<AdsACrf>1</AdsACrf>
+						<AdsANop>0</AdsANop>
+						<AdsANot>0</AdsANot>
+						<AdsLLst>1</AdsLLst>
+						<AdsLmap>1</AdsLmap>
+						<AdsLcgr>1</AdsLcgr>
+						<AdsLsym>1</AdsLsym>
+						<AdsLszi>1</AdsLszi>
+						<AdsLtoi>1</AdsLtoi>
+						<AdsLsun>1</AdsLsun>
+						<AdsLven>1</AdsLven>
+						<AdsLsxf>1</AdsLsxf>
+						<RvctClst>0</RvctClst>
+						<GenPPlst>0</GenPPlst>
+						<AdsCpuType>"Cortex-M4"</AdsCpuType>
+						<RvctDeviceName/>
+						<mOS>0</mOS>
+						<uocRom>0</uocRom>
+						<uocRam>0</uocRam>
+						<hadIROM>1</hadIROM>
+						<hadIRAM>1</hadIRAM>
+						<hadXRAM>0</hadXRAM>
+						<uocXRam>0</uocXRam>
+						<RvdsVP>2</RvdsVP>
+						<hadIRAM2>0</hadIRAM2>
+						<hadIROM2>0</hadIROM2>
+						<StupSel>8</StupSel>
+						<useUlib>1</useUlib>
+						<EndSel>0</EndSel>
+						<uLtcg>0</uLtcg>
+						<RoSelD>3</RoSelD>
+						<RwSelD>3</RwSelD>
+						<CodeSel>0</CodeSel>
+						<OptFeed>0</OptFeed>
+						<NoZi1>0</NoZi1>
+						<NoZi2>0</NoZi2>
+						<NoZi3>0</NoZi3>
+						<NoZi4>0</NoZi4>
+						<NoZi5>0</NoZi5>
+						<Ro1Chk>0</Ro1Chk>
+						<Ro2Chk>0</Ro2Chk>
+						<Ro3Chk>0</Ro3Chk>
+						<Ir1Chk>1</Ir1Chk>
+						<Ir2Chk>0</Ir2Chk>
+						<Ra1Chk>0</Ra1Chk>
+						<Ra2Chk>0</Ra2Chk>
+						<Ra3Chk>0</Ra3Chk>
+						<Im1Chk>1</Im1Chk>
+						<Im2Chk>0</Im2Chk>
+						<OnChipMemories>
+							<Ocm1>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</Ocm1>
+							<Ocm2>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</Ocm2>
+							<Ocm3>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</Ocm3>
+							<Ocm4>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</Ocm4>
+							<Ocm5>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</Ocm5>
+							<Ocm6>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</Ocm6>
+							<IRAM>
+								<Type>0</Type>
+								<StartAddress/>
+								<Size/>
+							</IRAM>
+							<IROM>
+								<Type>1</Type>
+								<StartAddress/>
+								<Size/>
+							</IROM>
+							<XRAM>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</XRAM>
+							<OCR_RVCT1>
+								<Type>1</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT1>
+							<OCR_RVCT2>
+								<Type>1</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT2>
+							<OCR_RVCT3>
+								<Type>1</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT3>
+							<OCR_RVCT4>
+								<Type>1</Type>
+								<StartAddress/>
+								<Size/>
+							</OCR_RVCT4>
+							<OCR_RVCT5>
+								<Type>1</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT5>
+							<OCR_RVCT6>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT6>
+							<OCR_RVCT7>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT7>
+							<OCR_RVCT8>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT8>
+							<OCR_RVCT9>
+								<Type>0</Type>
+								<StartAddress/>
+								<Size/>
+							</OCR_RVCT9>
+							<OCR_RVCT10>
+								<Type>0</Type>
+								<StartAddress>0x0</StartAddress>
+								<Size>0x0</Size>
+							</OCR_RVCT10>
+						</OnChipMemories>
+						<RvctStartVector/>
+					</ArmAdsMisc>
+					<Cads>
+						<interw>1</interw>
+						<Optim>4</Optim>
+						<oTime>0</oTime>
+						<SplitLS>0</SplitLS>
+						<OneElfS>1</OneElfS>
+						<Strict>0</Strict>
+						<EnumInt>0</EnumInt>
+						<PlainCh>0</PlainCh>
+						<Ropi>0</Ropi>
+						<Rwpi>0</Rwpi>
+						<wLevel>2</wLevel>
+						<uThumb>0</uThumb>
+						<uSurpInc>0</uSurpInc>
+						<uC99>1</uC99>
+						<useXO>0</useXO>
+						<VariousControls>
+							<MiscControls/>
+							<Define>USE_HAL_DRIVER,STM32G474xx</Define>
+							<Undefine/>
+							<IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+						</VariousControls>
+					</Cads>
+					<Aads>
+						<interw>1</interw>
+						<Ropi>0</Ropi>
+						<Rwpi>0</Rwpi>
+						<thumb>0</thumb>
+						<SplitLS>0</SplitLS>
+						<SwStkChk>0</SwStkChk>
+						<NoWarn>0</NoWarn>
+						<VariousControls>
+							<MiscControls/>
+							<Define/>
+							<Undefine/>
+							<IncludePath/>
+						</VariousControls>
+					</Aads>
+					<LDads>
+						<umfTarg>1</umfTarg>
+						<Ropi>0</Ropi>
+						<Rwpi>0</Rwpi>
+						<noStLib>0</noStLib>
+						<RepFail>1</RepFail>
+						<useFile>0</useFile>
+						<TextAddressRange>0x08000000</TextAddressRange>
+						<DataAddressRange>0x20000000</DataAddressRange>
+						<pXoBase/>
+						<ScatterFile/>
+						<IncludeLibs/>
+						<IncludeLibsPath/>
+						<Misc/>
+						<LinkerInputFile/>
+						<DisabledWarnings/>
+					</LDads>
+				</TargetArmAds>
+			</TargetOption>     
+			<Groups>
+        <Group>
+					<GroupName>Application/MDK-ARM</GroupName>
+				<Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+				
+				<Group>
+					<GroupName>::CMSIS</GroupName>
+				</Group>
+			<Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+
+		</Target>
+	</Targets>
+	<RTE>
+		<apis/>
+		<components>
+			<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+				<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+				<targetInfos>
+					<targetInfo name="TIM_PWMInput"/>
+				</targetInfos>
+			</component>
+		</components>
+		<files/>
+	</RTE>
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..01485f56a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1051704517">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1051704517" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1051704517" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1051704517." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1328393843" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.590664980" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1078950543" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.624778660" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.66646324" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.762545982" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2066307001" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1157364743" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.839828304" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.354643489" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.848934274" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/TIM_PWMInput}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.381671422" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1332436261" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1891892152" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1771587836" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.761397394" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1281462701" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.784504981" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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+					</folderInfo>
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+							<builder buildPath="${workspace_loc:/TIM_PWMInput}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1238149329" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TIM_PWMInput.null.1096787449" name="TIM_PWMInput"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/.project
new file mode 100644
index 000000000..7fcaf3c9e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TIM_PWMInput</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>TIM_PWMInput.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/TIM_PWMInput.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/main.c
new file mode 100644
index 000000000..16a8ef40d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/main.c
@@ -0,0 +1,355 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_PWMInput/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example shows how to use the TIM peripheral to measure the
+  *          frequency and duty cycle of an external signal.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+/* Captured Value */
+__IO uint32_t            uwIC2Value = 0;
+/* Duty Cycle Value */
+__IO uint32_t            uwDutyCycle = 0;
+/* Frequency Value */
+__IO uint32_t            uwFrequency = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* ---------------------------------------------------------------------------
+  TIM1 configuration: PWM Input mode
+
+  In this example TIM1 input clock (TIM1CLK) is set to APB2 clock (PCLK1),
+  since APB2 prescaler is 1.
+    TIM1CLK = PCLK2
+    PCLK2 = HCLK
+    => TIM1CLK = HCLK = SystemCoreClock
+
+  External Signal Frequency = TIM1 counter clock / TIM1_CCR2 in Hz.
+
+  External Signal DutyCycle = (TIM1_CCR1*100)/(TIM1_CCR2) in %.
+
+  --------------------------------------------------------------------------- */
+
+  /*## Start the Input Capture in interrupt mode ##########################*/
+  if (HAL_TIM_IC_Start_IT(&htim1, TIM_CHANNEL_2) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+
+  /*## Start the Input Capture in interrupt mode ##########################*/
+  if (HAL_TIM_IC_Start_IT(&htim1, TIM_CHANNEL_1) != HAL_OK)
+  {
+    /* Starting Error */
+    Error_Handler();
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_SlaveConfigTypeDef sSlaveConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_IC_InitTypeDef sConfigIC = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 0xFFFF;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_IC_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET;
+  sSlaveConfig.InputTrigger = TIM_TS_TI2FP2;
+  sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
+  sSlaveConfig.TriggerFilter = 0;
+  if (HAL_TIM_SlaveConfigSynchro(&htim1, &sSlaveConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
+  sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
+  sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
+  sConfigIC.ICFilter = 0;
+  if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
+  sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
+  if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/**
+  * @brief  Input Capture callback in non blocking mode 
+  * @param  htim : TIM IC handle
+  * @retval None
+  */
+void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+  if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_2)
+  {
+    /* Get the Input Capture value */
+    uwIC2Value = HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_2);
+
+    if (uwIC2Value != 0)
+    {
+      /* Duty cycle computation */
+      uwDutyCycle = ((HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_1)) * 100) / uwIC2Value;
+
+      /* uwFrequency computation
+      TIM1 counter clock = (System Clock) */
+      uwFrequency = ( HAL_RCC_GetSysClockFreq()  ) / uwIC2Value;
+
+    }
+    else
+    {
+      uwDutyCycle = 0;
+      uwFrequency = 0;
+    }
+  }
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..316ac10a2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,164 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : TIM/TIM_PWMInput/Src/stm32g4xx_hal_msp.c
+  * @author            : MCD Application Team
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PA9     ------> TIM1_CH2
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* TIM1 interrupt Init */
+    HAL_NVIC_SetPriority(TIM1_BRK_TIM15_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM1_BRK_TIM15_IRQn);
+    HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
+    HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
+    HAL_NVIC_SetPriority(TIM1_CC_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM1_CC_IRQn);
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+
+    /**TIM1 GPIO Configuration
+    PA9     ------> TIM1_CH2
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
+
+    /* TIM1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(TIM1_BRK_TIM15_IRQn);
+    HAL_NVIC_DisableIRQ(TIM1_UP_TIM16_IRQn);
+    HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM17_IRQn);
+    HAL_NVIC_DisableIRQ(TIM1_CC_IRQn);
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..443c25374
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/stm32g4xx_it.c
@@ -0,0 +1,202 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    TIM/TIM_PWMInput/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM1 break interrupt and TIM15 global interrupt.
+  */
+void TIM1_BRK_TIM15_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM1_BRK_TIM15_IRQn 0 */
+
+  /* USER CODE END TIM1_BRK_TIM15_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim1);
+  /* USER CODE BEGIN TIM1_BRK_TIM15_IRQn 1 */
+
+  /* USER CODE END TIM1_BRK_TIM15_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
+  */
+void TIM1_UP_TIM16_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
+
+  /* USER CODE END TIM1_UP_TIM16_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim1);
+  /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
+
+  /* USER CODE END TIM1_UP_TIM16_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt.
+  */
+void TIM1_TRG_COM_TIM17_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 0 */
+
+  /* USER CODE END TIM1_TRG_COM_TIM17_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim1);
+  /* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 1 */
+
+  /* USER CODE END TIM1_TRG_COM_TIM17_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM1 capture compare interrupt.
+  */
+void TIM1_CC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM1_CC_IRQn 0 */
+
+  /* USER CODE END TIM1_CC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim1);
+  /* USER CODE BEGIN TIM1_CC_IRQn 1 */
+
+  /* USER CODE END TIM1_CC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/TIM_PWMInput.ioc b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/TIM_PWMInput.ioc
new file mode 100644
index 000000000..6246ba7e2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/TIM_PWMInput.ioc
@@ -0,0 +1,150 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=TIM1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA9
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.Pin3=VP_TIM1_VS_ControllerModeReset
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.TIM1_BRK_TIM15_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.TIM1_CC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.TIM1_TRG_COM_TIM17_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.TIM1_UP_TIM16_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA9.Signal=S_TIM1_CH2
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TIM_PWMInput.ioc
+ProjectManager.ProjectName=TIM_PWMInput
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+SH.S_TIM1_CH2.0=TIM1_CH2,TriggerSource_TI2FP2
+SH.S_TIM1_CH2.1=TIM1_CH2,Input_Capture2_from_TI2
+SH.S_TIM1_CH2.2=TIM1_CH2,Input_Capture1_from_TI2
+SH.S_TIM1_CH2.ConfNb=3
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.Channel-Input_Capture1_from_TI2=TIM_CHANNEL_1
+TIM1.Channel-Input_Capture2_from_TI2=TIM_CHANNEL_2
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.ICFilter_CH2=0
+TIM1.ICPolarity_CH1=TIM_INPUTCHANNELPOLARITY_FALLING
+TIM1.ICPolarity_CH2=TIM_INPUTCHANNELPOLARITY_RISING
+TIM1.ICPrescaler-Input_Capture1_from_TI2=TIM_ICPSC_DIV1
+TIM1.ICPrescaler-Input_Capture2_from_TI2=TIM_ICPSC_DIV1
+TIM1.ICSelection-Input_Capture1_from_TI2=TIM_ICSELECTION_INDIRECTTI
+TIM1.ICSelection-Input_Capture2_from_TI2=TIM_ICSELECTION_DIRECTTI
+TIM1.IPParameters=Prescaler,CounterMode,Period,ClockDivision,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_SlaveMode,ICPolarity_CH1,ICSelection-Input_Capture1_from_TI2,ICPrescaler-Input_Capture1_from_TI2,ICPolarity_CH2,ICSelection-Input_Capture2_from_TI2,ICPrescaler-Input_Capture2_from_TI2,ICFilter_CH2,Channel-Input_Capture1_from_TI2,Channel-Input_Capture2_from_TI2
+TIM1.Period=0xFFFF
+TIM1.Prescaler=0
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+TIM1.TIM_SlaveMode=TIM_SLAVEMODE_RESET
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ControllerModeReset.Mode=Reset Mode
+VP_TIM1_VS_ControllerModeReset.Signal=TIM1_VS_ControllerModeReset
+board=custom
+ProjectManager.Example=TIM_PWMInput
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/readme.txt b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/readme.txt
new file mode 100644
index 000000000..3b67624a2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMInput/readme.txt
@@ -0,0 +1,92 @@
+/**
+  @page TIM_PWMInput TIM PWM Input example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    TIM/TIM_PWMInput/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the TIM PWM_Input example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+How to use the TIM peripheral to measure the frequency and 
+duty cycle of an external signal.
+
+The TIM1CLK frequency is set to SystemCoreClock (Hz), the Prescaler is 0 so the 
+counter clock is SystemCoreClock (Hz).
+SystemCoreClock is set to 170 MHz for STM32G474QETx Devices.
+
+TIM1 is configured in PWM Input Mode: the external signal is connected to 
+TIM1 Channel2 used as input pin.
+To measure the frequency and the duty cycle, we use the TIM1 CC2 interrupt request,
+so in the timer IRQ routine (via call to function HAL_TIM_IC_CaptureCallback() ),
+the frequency and the duty cycle of the external signal are computed.
+
+"uwFrequency" variable contains the external signal frequency:
+TIM1 counter clock = SystemCoreClock,
+uwFrequency = TIM1 counter clock / TIM1_CCR2 in Hz, 
+
+"uwDutyCycle" variable contains the external signal duty cycle:
+uwDutyCycle = (TIM1_CCR1*100)/(TIM1_CCR2) in %.
+
+The minimum frequency value to measure is (TIM1 counter clock / CCR MAX)
+                                         = (170 MHz)/ 65535
+
+In case of error, LED3 is turned ON.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note This example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Timer, Input, signals, PWM, External signal, Frequency, Duty cycle, Measure
+
+@par Directory contents
+
+  - TIM/TIM_PWMInput/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - TIM/TIM_PWMInput/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - TIM/TIM_PWMInput/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - TIM/TIM_PWMInput/Inc/main.h                  Header for main.c module  
+  - TIM/TIM_PWMInput/Src/stm32g4xx_it.c          Interrupt handlers
+  - TIM/TIM_PWMInput/Src/main.c                  Main program
+  - TIM/TIM_PWMInput/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - TIM/TIM_PWMInput/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 
+    board and can be easily tailored to any other supported device 
+    and development board.
+
+  - STM32G474E-EVAL1 Set-up
+    - Connect the external signal to measure to the TIM1 CH2 pin (PA9) (pin 8 in CN5 connector).
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/.extSettings b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/Project.eww
new file mode 100644
index 000000000..124800a6f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\TIM_PWMOutput.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/TIM_PWMOutput.ewd b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/TIM_PWMOutput.ewd
new file mode 100644
index 000000000..b4c7f8fb4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/TIM_PWMOutput.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>TIM_PWMOutput</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/TIM_PWMOutput.ewp b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/TIM_PWMOutput.ewp
new file mode 100644
index 000000000..387a0f71d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/TIM_PWMOutput.ewp
@@ -0,0 +1,1149 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>TIM_PWMOutput</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>TIM_PWMOutput/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>TIM_PWMOutput/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>TIM_PWMOutput/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
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+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/main.h
new file mode 100644
index 000000000..132f49900
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/main.h
@@ -0,0 +1,118 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_PWMOutput/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Compute the prescaler value to have TIM1 counter clock equal to 85000000 Hz */
+
+#define PRESCALER_VALUE     (uint32_t)(((SystemCoreClock) / 85000000) - 1)
+
+/* -----------------------------------------------------------------------
+TIM1 Configuration: generate 4 PWM signals with 4 different duty cycles.
+
+    In this example TIM1 input clock (TIM1CLK) is set to APB2 clock (PCLK2),
+    since APB2 prescaler is equal to 1.
+      TIM1CLK = PCLK2
+      PCLK1 = HCLK
+      => TIM1CLK = HCLK = SystemCoreClock
+
+    To get TIM1 counter clock at 85 MHz, the prescaler is computed as follows:
+       Prescaler = (TIM1CLK / TIM1 counter clock) - 1
+       Prescaler = ((SystemCoreClock) /85 MHz) - 1
+
+    To get TIM1 output clock at 85 KHz, the period (ARR)) is computed as follows:
+       ARR = (TIM1 counter clock / TIM1 output clock) - 1
+           = 999
+
+    TIM1 Channel1 duty cycle = (TIM1_CCR1/ TIM1_ARR + 1)* 100 = 50%
+    TIM1 Channel2 duty cycle = (TIM1_CCR2/ TIM1_ARR + 1)* 100 = 37.5%
+    TIM1 Channel3 duty cycle = (TIM1_CCR3/ TIM1_ARR + 1)* 100 = 25%
+    TIM1 Channel4 duty cycle = (TIM1_CCR4/ TIM1_ARR + 1)* 100 = 12.5%
+
+    Note:
+     SystemCoreClock variable holds HCLK frequency and is defined in system_stm32g4xx.c file.
+     Each time the core clock (HCLK) changes, user had to update SystemCoreClock
+     variable value. Otherwise, any configuration based on this variable will be incorrect.
+     This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+  ----------------------------------------------------------------------- */
+
+/* Initialize TIMx peripheral as follows:
+   + Prescaler = (SystemCoreClock / 85000000) - 1
+   + Period = (1000 - 1)
+   + ClockDivision = 0
+   + Counter direction = Up
+*/
+#define  PERIOD_VALUE       (uint32_t)(1000 - 1)              /* Period Value  */
+#define  PULSE1_VALUE       (uint32_t)(1000 / 2)              /* Capture Compare 1 Value  */
+#define  PULSE2_VALUE       (uint32_t)(1000 * 37.5 / 100)     /* Capture Compare 2 Value  */
+#define  PULSE3_VALUE       (uint32_t)(1000 / 4)              /* Capture Compare 3 Value  */
+#define  PULSE4_VALUE       (uint32_t)(1000 * 12.5 /100)      /* Capture Compare 4 Value  */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b83efd63b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Inc/stm32g4xx_it.h
@@ -0,0 +1,63 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_PWMOutput/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/TIM_PWMOutput.uvoptx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/TIM_PWMOutput.uvoptx
new file mode 100644
index 000000000..0118ded88
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/TIM_PWMOutput.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>TIM_PWMOutput</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>170000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U005200303137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/TIM_PWMOutput.uvprojx b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/TIM_PWMOutput.uvprojx
new file mode 100644
index 000000000..8a9ceb886
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/TIM_PWMOutput.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>TIM_PWMOutput</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
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+          <SLE66AMisc></SLE66AMisc>
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+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
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+          <TargetStatus>
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+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>TIM_PWMOutput\</OutputDirectory>
+          <OutputName>TIM_PWMOutput</OutputName>
+          <CreateExecutable>1</CreateExecutable>
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+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
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+            <VariousControls>
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+              <Define>USE_HAL_DRIVER,STM32G474xx</Define>
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+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
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+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
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+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
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+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
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+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
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+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
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+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
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+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
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+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
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+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="TIM_PWMOutput"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..583bab830
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277789138">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277789138" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277789138" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277789138." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1438444567" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1583258454" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.260210511" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1999863313" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1090865303" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2021930236" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1679331296" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.651792669" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.263695561" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
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+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="TIM_PWMOutput.null.995961054" name="TIM_PWMOutput"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277789138;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1277789138.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1300637193;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.345223302">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1997548112;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1997548112.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.93541312;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.180425216">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/.project
new file mode 100644
index 000000000..fae098be8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/.project
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>TIM_PWMOutput</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>TIM_PWMOutput.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/TIM_PWMOutput.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/main.c
new file mode 100644
index 000000000..28eb6b358
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/main.c
@@ -0,0 +1,337 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    TIM/TIM_PWMOutput/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use STM32G4xx TIM HAL API to generate
+  *          4 signals in PWM.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* Configure LED3 */
+  BSP_LED_Init(LED3);
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+
+/*## Start PWM signals generation #######################################*/
+  /* Start channel 1 */
+  if (HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1) != HAL_OK)
+  {
+    /* PWM Generation Error */
+    Error_Handler();
+  }
+  /* Start channel 2 */
+  if (HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2) != HAL_OK)
+  {
+    /* PWM Generation Error */
+    Error_Handler();
+  }
+  /* Start channel 3 */
+  if (HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3) != HAL_OK)
+  {
+    /* PWM generation Error */
+    Error_Handler();
+  }
+  /* Start channel 4 */
+  if (HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_4) != HAL_OK)
+  {
+    /* PWM generation Error */
+    Error_Handler();
+  }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = PRESCALER_VALUE;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = PERIOD_VALUE;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = PULSE1_VALUE;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
+  sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.Pulse = PULSE2_VALUE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.Pulse = PULSE3_VALUE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.Pulse = PULSE4_VALUE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+  sBreakDeadTimeConfig.DeadTime = 0;
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+  sBreakDeadTimeConfig.BreakFilter = 0;
+  sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+  sBreakDeadTimeConfig.Break2Filter = 0;
+  sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+  HAL_TIM_MspPostInit(&htim1);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1) 
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* Infinite loop */
+  while (1)
+  {
+  }
+
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..a538bc07e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,169 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : TIM/TIM_PWMOutput/Src/stm32g4xx_hal_msp.c
+  * @author            : MCD Application Team
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+                    /**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_PWM MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
+{
+  if(htim_pwm->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+
+}
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspPostInit 0 */
+
+  /* USER CODE END TIM1_MspPostInit 0 */
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PA8     ------> TIM1_CH1
+    PA9     ------> TIM1_CH2
+    PA10     ------> TIM1_CH3
+    PA11     ------> TIM1_CH4
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspPostInit 1 */
+
+  /* USER CODE END TIM1_MspPostInit 1 */
+  }
+
+}
+/**
+* @brief TIM_PWM MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_pwm: TIM_PWM handle pointer
+* @retval None
+*/
+void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
+{
+  if(htim_pwm->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..45e5a819d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/stm32g4xx_it.c
@@ -0,0 +1,146 @@
+/* USER CODE BEGIN Header */
+/** 
+  ******************************************************************************
+  * @file    TIM/TIM_PWMOutput/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/TIM_PWMOutput.ioc b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/TIM_PWMOutput.ioc
new file mode 100644
index 000000000..e73af7ff0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/TIM_PWMOutput.ioc
@@ -0,0 +1,199 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=TIM1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA8
+Mcu.Pin1=PA9
+Mcu.Pin2=PA10
+Mcu.Pin3=PA11
+Mcu.Pin4=VP_SYS_VS_Systick
+Mcu.Pin5=VP_SYS_VS_DBSignals
+Mcu.PinsNb=6
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA10.GPIO_PuPd=GPIO_PULLUP
+PA10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA10.Signal=S_TIM1_CH3
+PA11.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA11.GPIO_PuPd=GPIO_PULLUP
+PA11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA11.Signal=S_TIM1_CH4
+PA8.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA8.GPIO_PuPd=GPIO_PULLUP
+PA8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA8.Signal=S_TIM1_CH1
+PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA9.GPIO_PuPd=GPIO_PULLUP
+PA9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PA9.Signal=S_TIM1_CH2
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TIM_PWMOutput.ioc
+ProjectManager.ProjectName=TIM_PWMOutput
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1
+SH.S_TIM1_CH1.ConfNb=1
+SH.S_TIM1_CH2.0=TIM1_CH2,PWM Generation2 CH2
+SH.S_TIM1_CH2.ConfNb=1
+SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3
+SH.S_TIM1_CH3.ConfNb=1
+SH.S_TIM1_CH4.0=TIM1_CH4,PWM Generation4 CH4
+SH.S_TIM1_CH4.ConfNb=1
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.AutomaticOutput=TIM_AUTOMATICOUTPUT_DISABLE
+TIM1.Break2Filter=0
+TIM1.Break2Polarity=TIM_BREAK2POLARITY_HIGH
+TIM1.Break2State=TIM_BREAK2_DISABLE
+TIM1.BreakFilter=0
+TIM1.BreakPolarity=TIM_BREAKPOLARITY_HIGH
+TIM1.BreakState=TIM_BREAK_DISABLE
+TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
+TIM1.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
+TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
+TIM1.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
+TIM1.ClearInputSource=TIM_CLEARINPUTSOURCE_NONE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.IPParameters=Prescaler,CounterMode,Period,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2,BreakState,BreakPolarity,BreakFilter,SourceBRKDigInput,SourceBRKCOMP1,SourceBRKCOMP2,Break2State,Break2Polarity,Break2Filter,SourceBRK2DigInput,SourceBRK2COMP1,SourceBRK2COMP2,AutomaticOutput,OffStateRunMode,OffStateIDLEMode,LockLevel,ClearInputSource,OCMode_PWM-PWM Generation1 CH1,OCFastMode_PWM-PWM Generation1 CH1,OCPolarity_1,OCIdleState_1,OCMode_PWM-PWM Generation2 CH2,OCFastMode_PWM-PWM Generation2 CH2,OCPolarity_2,OCIdleState_2,OCMode_PWM-PWM Generation3 CH3,OCFastMode_PWM-PWM Generation3 CH3,OCPolarity_3,OCIdleState_3,OCMode_PWM-PWM Generation4 CH4,OCFastMode_PWM-PWM Generation4 CH4,OCPolarity_4,OCIdleState_4,Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4,PulseNoDither_1,PulseNoDither_2,PulseNoDither_3,PulseNoDither_4
+TIM1.IPParametersWithoutCheck=PulseNoDither_2,PulseNoDither_1,PulseNoDither_4,Prescaler,PulseNoDither_3,Period
+TIM1.LockLevel=TIM_LOCKLEVEL_OFF
+TIM1.OCFastMode_PWM-PWM\ Generation1\ CH1=TIM_OCFAST_DISABLE
+TIM1.OCFastMode_PWM-PWM\ Generation2\ CH2=TIM_OCFAST_DISABLE
+TIM1.OCFastMode_PWM-PWM\ Generation3\ CH3=TIM_OCFAST_DISABLE
+TIM1.OCFastMode_PWM-PWM\ Generation4\ CH4=TIM_OCFAST_DISABLE
+TIM1.OCIdleState_1=TIM_OCIDLESTATE_RESET
+TIM1.OCIdleState_2=TIM_OCIDLESTATE_RESET
+TIM1.OCIdleState_3=TIM_OCIDLESTATE_RESET
+TIM1.OCIdleState_4=TIM_OCIDLESTATE_RESET
+TIM1.OCMode_PWM-PWM\ Generation1\ CH1=TIM_OCMODE_PWM1
+TIM1.OCMode_PWM-PWM\ Generation2\ CH2=TIM_OCMODE_PWM1
+TIM1.OCMode_PWM-PWM\ Generation3\ CH3=TIM_OCMODE_PWM1
+TIM1.OCMode_PWM-PWM\ Generation4\ CH4=TIM_OCMODE_PWM1
+TIM1.OCPolarity_1=TIM_OCPOLARITY_HIGH
+TIM1.OCPolarity_2=TIM_OCPOLARITY_HIGH
+TIM1.OCPolarity_3=TIM_OCPOLARITY_HIGH
+TIM1.OCPolarity_4=TIM_OCPOLARITY_HIGH
+TIM1.OffStateIDLEMode=TIM_OSSI_DISABLE
+TIM1.OffStateRunMode=TIM_OSSR_DISABLE
+TIM1.Period=PERIOD_VALUE
+TIM1.Prescaler=PRESCALER_VALUE
+TIM1.PulseNoDither_1=PULSE1_VALUE
+TIM1.PulseNoDither_2=PULSE2_VALUE
+TIM1.PulseNoDither_3=PULSE3_VALUE
+TIM1.PulseNoDither_4=PULSE4_VALUE
+TIM1.RepetitionCounter=0
+TIM1.SourceBRK2COMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2COMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRK2DigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP1=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKCOMP2=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.SourceBRKDigInput=TIM_BREAKINPUTSOURCE_DISABLE
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_RESET
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=TIM_PWMOutput
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/readme.txt b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/readme.txt
new file mode 100644
index 000000000..7a9e4e25d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/TIM/TIM_PWMOutput/readme.txt
@@ -0,0 +1,110 @@
+/**
+  @page TIM_PWMOutput TIM PWM Output example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    TIM/TIM_PWMOutput/readme.txt 
+  * @author  MCD Application Team
+  * @brief   Description of the PWM signals generation using TIM1
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description 
+
+This example shows how to configure the TIM peripheral in PWM (Pulse Width Modulation) 
+mode.
+
+At the beginning of the main program the HAL_Init() function is called to reset 
+all the peripherals, initialize the Flash interface and the systick.
+The SystemClock_Config() function is used to configure the system clock for STM32G474QETx Devices :
+The CPU at 170 MHz 
+
+SystemCoreClock is set to 170 MHz for STM32G4xx Devices.
+
+    In this example TIM1 input clock (TIM1CLK) is set to APB2 clock (PCLK2),
+    since APB2 prescaler is equal to 1.
+      TIM1CLK = PCLK2
+      PCLK1 = HCLK
+      => TIM1CLK = HCLK = SystemCoreClock
+
+    To get TIM1 counter clock at 85 MHz, the prescaler is computed as follows:
+       Prescaler = (TIM1CLK / TIM1 counter clock) - 1
+       Prescaler = ((SystemCoreClock) /85 MHz) - 1
+
+    To get TIM1 output clock at 85 KHz, the period (ARR)) is computed as follows:
+       ARR = (TIM1 counter clock / TIM1 output clock) - 1
+           = 999
+
+    TIM1 Channel1 duty cycle = (TIM1_CCR1/ TIM1_ARR + 1)* 100 = 50%
+    TIM1 Channel2 duty cycle = (TIM1_CCR2/ TIM1_ARR + 1)* 100 = 37.5%
+    TIM1 Channel3 duty cycle = (TIM1_CCR3/ TIM1_ARR + 1)* 100 = 25%
+    TIM1 Channel4 duty cycle = (TIM1_CCR4/ TIM1_ARR + 1)* 100 = 12.5%
+
+LED3 is ON when there are an error.
+
+The PWM waveforms can be displayed using an oscilloscope.
+
+@note The duty cycles values mentioned above are theoretical (obtained when the system clock frequency is exactly 170 MHz).
+      They might be slightly different depending on system clock frequency precision.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note This example needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+	  
+
+@par Keywords
+
+Timer, Output, signal, PWM, Oscilloscope, Frequency, Duty cycle, Waveform
+
+@par Directory contents
+
+  - TIM/TIM_PWMOutput/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - TIM/TIM_PWMOutput/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - TIM/TIM_PWMOutput/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - TIM/TIM_PWMOutput/Inc/main.h                  Header for main.c module  
+  - TIM/TIM_PWMOutput/Src/stm32g4xx_it.c          Interrupt handlers
+  - TIM/TIM_PWMOutput/Src/main.c                  Main program
+  - TIM/TIM_PWMOutput/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - TIM/TIM_PWMOutput/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+  - In this example, the clock is set to 170 MHz.
+    
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 
+    board and can be easily tailored to any other supported device 
+    and development board.      
+
+  - STM32G474E-EVAL1 Rev B Set-up
+   Connect the following pins to an oscilloscope to monitor the different waveforms:
+        - TIM1_CH1 : PA.08 (pin 2 in CN5 connector)
+        - TIM1_CH2 : PA.09 (pin 8 in CN5 connector)
+        - TIM1_CH3 : PA.10 (pin 4 in CN5 connector)
+        - TIM1_CH4 : PA.11 (pin 3 in CN5 connector)
+
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/.extSettings b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/Project.eww
new file mode 100644
index 000000000..f8b9eb150
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\UART_HyperTerminal_DMA.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/UART_HyperTerminal_DMA.ewd b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/UART_HyperTerminal_DMA.ewd
new file mode 100644
index 000000000..3a740a349
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/UART_HyperTerminal_DMA.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>UART_HyperTerminal_DMA</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/UART_HyperTerminal_DMA.ewp b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/UART_HyperTerminal_DMA.ewp
new file mode 100644
index 000000000..31e6a3997
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/UART_HyperTerminal_DMA.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>UART_HyperTerminal_DMA</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>UART_HyperTerminal_DMA/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>UART_HyperTerminal_DMA/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>UART_HyperTerminal_DMA/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
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+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
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+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
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+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
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+          <state>80</state>
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+          <state>8</state>
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+          <name>AXRef</name>
+          <state>0</state>
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+          <name>AXRefDefines</name>
+          <state>0</state>
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+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
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+      </data>
+    </settings>
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+      <name>OBJCOPY</name>
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+      <data>
+        <version>1</version>
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+          <name>OCOutputOverride</name>
+          <state>1</state>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>UART_HyperTerminal_DMA.hex</state>
+        </option>
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+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
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+      <name>BICOMP</name>
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+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
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+        <version>20</version>
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+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
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+        </option>
+        <option>
+          <name>IlinkLogModule</name>
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+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkSuppressDiags</name>
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+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
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+          <state></state>
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+          <state>0x11021</state>
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+          <name>CrcCompl</name>
+          <version>0</version>
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+        </option>
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+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
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+          <name>IlinkOptInline</name>
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+        <option>
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+          <state>0</state>
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+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
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+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
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+          <name>CrcUnitSize</name>
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+          <name>IlinkThreadsSlave</name>
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+          <state>1</state>
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+          <state>1</state>
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+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
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+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
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+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
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+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/main.h
new file mode 100644
index 000000000..217c1885f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/main.h
@@ -0,0 +1,75 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_DMA/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+#define COUNTOF(__BUFFER__)   (sizeof(__BUFFER__) / sizeof(*(__BUFFER__)))
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Size of Transmission buffer */
+#define TXSTARTMESSAGESIZE               (COUNTOF(aTxStartMessage) - 1)
+#define TXENDMESSAGESIZE                 (COUNTOF(aTxEndMessage) - 1)
+
+/* Size of Reception buffer */
+#define RXBUFFERSIZE                      10
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..aaa5d35e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..17a175aa9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_it.h
@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
+void USART1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/UART_HyperTerminal_DMA.uvoptx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/UART_HyperTerminal_DMA.uvoptx
new file mode 100644
index 000000000..5d26fc66d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/UART_HyperTerminal_DMA.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>UART_HyperTerminal_DMA</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
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+        <LXref>0</LXref>
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+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
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+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/UART_HyperTerminal_DMA.uvprojx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/UART_HyperTerminal_DMA.uvprojx
new file mode 100644
index 000000000..a8c287f8a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/UART_HyperTerminal_DMA.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>UART_HyperTerminal_DMA</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>UART_HyperTerminal_DMA\Exe\</OutputDirectory>
+          <OutputName>UART_HyperTerminal_DMA</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
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+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
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+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
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+          <RVCTZI>0</RVCTZI>
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+          <ModuleSelection>0</ModuleSelection>
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+        </DebugOption>
+        <Utilities>
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+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
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+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
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+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
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+            <RvctClst>0</RvctClst>
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+            <RvctDeviceName></RvctDeviceName>
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+            <hadIROM>1</hadIROM>
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+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="UART_HyperTerminal_DMA"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..cf9127682
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.596653130">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.596653130" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.596653130" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.596653130." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.30901322" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
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+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1103244827" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.194183740" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.81070660" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.880054518" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1306281898" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1411893787" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1591382623" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.2043595043" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/UART_HyperTerminal_DMA}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.27189456" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.987207631" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1761305035" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.879871858" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1543437490" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1778532930" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.37065613" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1237849151" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+		<project id="UART_HyperTerminal_DMA.null.212901839" name="UART_HyperTerminal_DMA"/>
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+	<storageModule moduleId="scannerConfiguration">
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diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/.project
new file mode 100644
index 000000000..2c772fc2c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>UART_HyperTerminal_DMA</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>UART_HyperTerminal_DMA.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/UART_HyperTerminal_DMA.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
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+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
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+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
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+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
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+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/main.c
new file mode 100644
index 000000000..46f39ad30
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/main.c
@@ -0,0 +1,394 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_DMA/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use UART HAL API to transmit
+  *          and receive a data buffer with a communication process based on
+  *          DMA transfer.
+  *          The communication is done with the Hyperterminal PC application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_usart1_rx;
+DMA_HandleTypeDef hdma_usart1_tx;
+
+/* USER CODE BEGIN PV */
+/* Buffer used for transmission */
+uint8_t aTxStartMessage[] = "\n\r ****UART-Hyperterminal communication based on DMA****\n\r Enter 10 characters using keyboard :\n\r";
+uint8_t aTxEndMessage[] = "\n\r Example Finished\n\r";
+
+/* Buffer used for reception */
+uint8_t aRxBuffer[RXBUFFERSIZE];
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_USART1_UART_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /*##-1- Start the transmission process #####################################*/
+  /* User start transmission data through "TxBuffer" buffer */
+  if(HAL_UART_Transmit_DMA(&huart1, (uint8_t*)aTxStartMessage, TXSTARTMESSAGESIZE)!= HAL_OK)
+  {
+    /* Transfer error in transmission process */
+    Error_Handler();
+  }
+
+  /*##-2- Put UART peripheral in reception process ###########################*/
+  /* Any data received will be stored in "aRxBuffer" buffer : the number max of
+     data received is 10 */
+  if (HAL_UART_Receive_DMA(&huart1, (uint8_t *)aRxBuffer, RXBUFFERSIZE) != HAL_OK)
+  {
+    /* Transfer error in reception process */
+    Error_Handler();
+  }
+
+  /*##-3- Wait for the end of the transfer ###################################*/
+  /*  Before starting a new communication transfer, you need to check the current
+      state of the peripheral; if it's busy you need to wait for the end of current
+      transfer before starting a new one.
+      For simplicity reasons, this example is just waiting till the end of the
+      transfer, but application may perform other tasks while transfer operation
+      is ongoing. */
+  while (HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /*##-4- Send the received Buffer ###########################################*/
+  if (HAL_UART_Transmit_DMA(&huart1, (uint8_t *)aRxBuffer, RXBUFFERSIZE) != HAL_OK)
+  {
+    /* Transfer error in transmission process */
+    Error_Handler();
+  }
+
+  /*##-5- Wait for the end of the transfer ###################################*/
+  /*  Before starting a new communication transfer, you need to check the current
+      state of the peripheral; if it's busy you need to wait for the end of current
+      transfer before starting a new one.
+      For simplicity reasons, this example is just waiting till the end of the
+      transfer, but application may perform other tasks while transfer operation
+      is ongoing. */
+  while (HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /*##-6- Send the End Message ###############################################*/
+  if(HAL_UART_Transmit_DMA(&huart1, (uint8_t*)aTxEndMessage, TXENDMESSAGESIZE)!= HAL_OK)
+  {
+    /* Transfer error in transmission process */
+    Error_Handler();
+  }
+
+  /*##-7- Wait for the end of the transfer ###################################*/
+  while (HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /* Turn on LED1 if test passes then enter infinite loop */
+  BSP_LED_On(LED1);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 9600;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_ODD;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+  /* DMA1_Channel2_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/**
+  * @brief  Tx Transfer completed callback
+  * @param  huart: UART handle.
+  * @note   This example shows a simple way to report end of DMA Tx transfer, and
+  *         you can add your own implementation.
+  * @retval None
+  */
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+}
+
+/**
+  * @brief  Rx Transfer completed callback
+  * @param  huart: UART handle
+  * @note   This example shows a simple way to report end of DMA Rx transfer, and
+  *         you can add your own implementation.
+  * @retval None
+  */
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+}
+
+/**
+  * @brief  UART error callbacks
+  * @param  huart: UART handle
+  * @note   This example shows a simple way to report transfer error, and you can
+  *         add your own implementation.
+  * @retval None
+  */
+void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
+{
+  /* Turn LED3 off: Transfer error in reception/transmission process */
+  BSP_LED_Off(LED3);
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1);
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..c601e5e17
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,210 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_DMA/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_usart1_rx;
+
+extern DMA_HandleTypeDef hdma_usart1_tx;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* USART1 DMA Init */
+    /* USART1_RX Init */
+    hdma_usart1_rx.Instance = DMA1_Channel2;
+    hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX;
+    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
+    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_HIGH;
+    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
+
+    /* USART1_TX Init */
+    hdma_usart1_tx.Instance = DMA1_Channel1;
+    hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
+    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
+    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
+
+    /* USART1 interrupt Init */
+    HAL_NVIC_SetPriority(USART1_IRQn, 1, 0);
+    HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+    __HAL_RCC_USART1_FORCE_RESET();
+    __HAL_RCC_USART1_RELEASE_RESET();
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+    /* USART1 DMA DeInit */
+    HAL_DMA_DeInit(huart->hdmarx);
+    HAL_DMA_DeInit(huart->hdmatx);
+
+    /* USART1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..c5a836780
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/stm32g4xx_it.c
@@ -0,0 +1,191 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_DMA/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_usart1_rx;
+extern DMA_HandleTypeDef hdma_usart1_tx;
+extern UART_HandleTypeDef huart1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_usart1_tx);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 channel2 global interrupt.
+  */
+void DMA1_Channel2_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_usart1_rx);
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
+  */
+void USART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART1_IRQn 0 */
+
+  /* USER CODE END USART1_IRQn 0 */
+  HAL_UART_IRQHandler(&huart1);
+  /* USER CODE BEGIN USART1_IRQn 1 */
+
+  /* USER CODE END USART1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/UART_HyperTerminal_DMA.ioc b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/UART_HyperTerminal_DMA.ioc
new file mode 100644
index 000000000..2f48474c0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/UART_HyperTerminal_DMA.ioc
@@ -0,0 +1,187 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.Request0=USART1_RX
+Dma.Request1=USART1_TX
+Dma.RequestsNb=2
+Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART1_RX.0.EventEnable=DISABLE
+Dma.USART1_RX.0.Instance=DMA1_Channel2
+Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE
+Dma.USART1_RX.0.Mode=DMA_NORMAL
+Dma.USART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART1_RX.0.PeriphInc=DMA_PINC_DISABLE
+Dma.USART1_RX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.USART1_RX.0.Priority=DMA_PRIORITY_HIGH
+Dma.USART1_RX.0.RequestNumber=1
+Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.USART1_RX.0.SignalID=NONE
+Dma.USART1_RX.0.SyncEnable=DISABLE
+Dma.USART1_RX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.USART1_RX.0.SyncRequestNumber=1
+Dma.USART1_RX.0.SyncSignalID=NONE
+Dma.USART1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART1_TX.1.EventEnable=DISABLE
+Dma.USART1_TX.1.Instance=DMA1_Channel1
+Dma.USART1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART1_TX.1.MemInc=DMA_MINC_ENABLE
+Dma.USART1_TX.1.Mode=DMA_NORMAL
+Dma.USART1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE
+Dma.USART1_TX.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW
+Dma.USART1_TX.1.RequestNumber=1
+Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.USART1_TX.1.SignalID=NONE
+Dma.USART1_TX.1.SyncEnable=DISABLE
+Dma.USART1_TX.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.USART1_TX.1.SyncRequestNumber=1
+Dma.USART1_TX.1.SyncSignalID=NONE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=DMA
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IP4=USART1
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA9
+Mcu.Pin1=PA10
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.USART1_IRQn=true\:1\:0\:true\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA10.GPIOParameters=GPIO_PuPd
+PA10.GPIO_PuPd=GPIO_PULLUP
+PA10.Mode=Asynchronous
+PA10.Signal=USART1_RX
+PA9.GPIOParameters=GPIO_PuPd
+PA9.GPIO_PuPd=GPIO_PULLUP
+PA9.Mode=Asynchronous
+PA9.Signal=USART1_TX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=UART_HyperTerminal_DMA.ioc
+ProjectManager.ProjectName=UART_HyperTerminal_DMA
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_USART1_UART_Init-USART1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+USART1.AutoBaudRateEnableParam=UART_ADVFEATURE_AUTOBAUDRATE_DISABLE
+USART1.BaudRate=9600
+USART1.DMADisableonRxErrorParam=ADVFEATURE_DMA_ENABLEONRXERROR
+USART1.DataInvertParam=ADVFEATURE_DATAINV_DISABLE
+USART1.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,OneBitSampling,AutoBaudRateEnableParam,TxPinLevelInvertParam,RxPinLevelInvertParam,DataInvertParam,SwapParam,OverrunDisableParam,DMADisableonRxErrorParam,MSBFirstParam,VirtualMode-Asynchronous
+USART1.MSBFirstParam=ADVFEATURE_MSBFIRST_DISABLE
+USART1.Mode=MODE_TX_RX
+USART1.OneBitSampling=UART_ONE_BIT_SAMPLE_DISABLE
+USART1.OverSampling=UART_OVERSAMPLING_16
+USART1.OverrunDisableParam=ADVFEATURE_OVERRUN_ENABLE
+USART1.Parity=PARITY_ODD
+USART1.RxPinLevelInvertParam=ADVFEATURE_RXINV_DISABLE
+USART1.StopBits=STOPBITS_1
+USART1.SwapParam=ADVFEATURE_SWAP_DISABLE
+USART1.TxPinLevelInvertParam=ADVFEATURE_TXINV_DISABLE
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USART1.WordLength=WORDLENGTH_8B
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=UART_HyperTerminal_DMA
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/readme.txt b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/readme.txt
new file mode 100644
index 000000000..2fb7eea7b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_DMA/readme.txt
@@ -0,0 +1,142 @@
+/**
+  @page UART_HyperTerminal_DMA UART Hyperterminal DMA Example
+
+  @verbatim
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_DMA/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the UART Hyperterminal example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+UART transmission (transmit/receive) in DMA mode
+between a board and an HyperTerminal PC application.
+
+Board: STM32G474E-EVAL1 (embeds a STM32G474QET6 device)
+Tx Pin: PA9
+Rx Pin: PA10
+   _________________________
+  |           ______________|                       _______________
+  |          |USART         |                      | HyperTerminal |
+  |          |              |                      |               |
+  |          |           TX |______________________|RX             |
+  |          |              |                      |               |
+  |          |              |     RS232 Cable      |               |
+  |          |              |                      |               |
+  |          |           RX |______________________|TX             |
+  |          |              |                      |               |
+  |          |______________|                      |_______________|
+  |                         |
+  |                         |
+  |                         |
+  |                         |
+  |_STM32_Board_____________|
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz for STM32G4xx Devices.
+
+The UART peripheral configuration is ensured by the HAL_UART_Init() function.
+This later is calling the HAL_UART_MspInit() function which core is implementing
+the configuration of the needed UART resources according to the used hardware (CLOCK,
+GPIO, DMA and NVIC). You may update this function to change UART configuration.
+
+The UART/Hyperterminal communication is then initiated.
+The HAL_UART_Receive_DMA() and the HAL_UART_Transmit_DMA() functions allow respectively
+the reception of Data from Hyperterminal and the transmission of a predefined data
+buffer.
+
+The Asynchronous communication aspect of the UART is clearly highlighted as the
+data buffers transmission/reception to/from Hyperterminal are done simultaneously.
+
+For this example the TxBuffer (aTxStartMessage) is predefined and the RxBuffer (aRxBuffer)
+size is limited to 10 data by the mean of the RXBUFFERSIZE define in the main.c file.
+
+In a first step the TxBuffer buffer content will be displayed in the Hyperterminal
+interface and the received data will be stored in the RxBuffer buffer.
+In a second step the received data in the RxBuffer buffer will be sent back to
+Hyperterminal and displayed.
+The end of this two steps are monitored through the HAL_UART_GetState() function
+result.
+
+STM32G474E-EVAL1 Rev B board LEDs are used to monitor the transfer status:
+ - LED1 turns ON if transmission/reception is complete and OK.
+ - LED3 turns ON when when there is an error in transmission/reception process.
+
+The UART is configured as follows:
+    - BaudRate = 9600 baud
+    - Word Length = 8 Bits (7 data bit + 1 parity bit)
+    - One Stop Bit
+    - Odd parity
+    - Hardware flow control disabled (RTS and CTS signals)
+    - Reception and transmission are enabled in the time
+
+@note When the parity is enabled, the computed parity is inserted at the MSB
+position of the transmitted data.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Connectivity, UART, Printf, Baud rate, RS-232, HyperTerminal, full-duplex, HyperTerminal, DMA,
+Transmission, Reception, Asynchronous
+
+@par Directory contents
+
+  - UART/UART_HyperTerminal_DMA/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - UART/UART_HyperTerminal_DMA/Inc/stm32g4xx_it.h          DMA interrupt handlers header file
+  - UART/UART_HyperTerminal_DMA/Inc/main.h                  Header for main.c module
+  - UART/UART_HyperTerminal_DMA/Src/stm32g4xx_it.c          DMA interrupt handlers
+  - UART/UART_HyperTerminal_DMA/Src/main.c                  Main program
+  - UART/UART_HyperTerminal_DMA/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - UART/UART_HyperTerminal_DMA/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Set-up
+     - Connect a null-modem female/female RS232 cable between the DB9 connector
+       CN11 (USART1) and PC serial port to display data on the HyperTerminal (JP9 on RS232, JP10 OFF).
+     
+
+  - Hyperterminal configuration:
+    - Data Length = 7 Bits
+    - One Stop Bit
+    - Odd parity
+    - BaudRate = 9600 baud
+    - Flow control: None
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/.extSettings b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/Project.eww
new file mode 100644
index 000000000..79e40fb7a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\UART_HyperTerminal_IT.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/UART_HyperTerminal_IT.ewd b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/UART_HyperTerminal_IT.ewd
new file mode 100644
index 000000000..b93592560
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/UART_HyperTerminal_IT.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>UART_HyperTerminal_IT</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/UART_HyperTerminal_IT.ewp b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/UART_HyperTerminal_IT.ewp
new file mode 100644
index 000000000..450b3d07e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/UART_HyperTerminal_IT.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>UART_HyperTerminal_IT</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
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+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>UART_HyperTerminal_IT/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>UART_HyperTerminal_IT/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>UART_HyperTerminal_IT/List</state>
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+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
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+          <name>OGCoreOrChip</name>
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+          <state>4.41A</state>
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+          <name>GeneralMisraVerbose</name>
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+          <name>GenLowLevelInterface</name>
+          <state>1</state>
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+          <name>GEndianModeBE</name>
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+          <version>0</version>
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+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/main.h
new file mode 100644
index 000000000..cd60bfd9e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/main.h
@@ -0,0 +1,75 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_IT/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+#define COUNTOF(__BUFFER__)   (sizeof(__BUFFER__) / sizeof(*(__BUFFER__)))
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Size of Transmission buffer */
+#define TXSTARTMESSAGESIZE                   (COUNTOF(aTxStartMessage) - 1)
+#define TXENDMESSAGESIZE                     (COUNTOF(aTxEndMessage) - 1)
+
+/* Size of Reception buffer */
+#define RXBUFFERSIZE                      10
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..aaa5d35e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..278bb8e3f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_IT/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USART1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/UART_HyperTerminal_IT.uvoptx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/UART_HyperTerminal_IT.uvoptx
new file mode 100644
index 000000000..2d8c184c5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/UART_HyperTerminal_IT.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>UART_HyperTerminal_IT</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
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+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr.c</FilenameWithoutPath>
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+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
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+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/system_stm32g4xx.c</PathWithFileName>
+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
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+    <cbSel>0</cbSel>
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+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/UART_HyperTerminal_IT.uvprojx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/UART_HyperTerminal_IT.uvprojx
new file mode 100644
index 000000000..d94947dbe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/UART_HyperTerminal_IT.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>UART_HyperTerminal_IT</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>UART_HyperTerminal_IT\Exe\</OutputDirectory>
+          <OutputName>UART_HyperTerminal_IT</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
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+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
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+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
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+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
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+            <RwSelD>3</RwSelD>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
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+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
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+          <GroupName>Drivers/BSP/Components</GroupName>
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+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
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+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
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+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
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+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="UART_HyperTerminal_IT"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..5559a2d46
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1956645534">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1956645534" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1956645534" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1956645534." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1524373881" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1068980349" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.182179749" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1330399953" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1267810367" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1436369031" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1007789192" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1824128120" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1576582287" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1901155999" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.2004289287" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/UART_HyperTerminal_IT}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.222362186" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1061142435" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.430634781" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1644212699" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1569010736" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.11812664" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.2135463419" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+				</configuration>
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+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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+							<builder buildPath="${workspace_loc:/UART_HyperTerminal_IT}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1562271434" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.27249702" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.276796814" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.2014184693" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.582928814" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.676454587" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.348008845" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.255100594" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.111406266" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.716266088" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.415074283" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1431189974" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1141260047" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1362802384" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.529617887" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1945293263" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.655223587" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1120540128" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.2038427200" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="UART_HyperTerminal_IT.null.268332608" name="UART_HyperTerminal_IT"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1729504820;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1729504820.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.140868384;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.276796814">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1956645534;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1956645534.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.430634781;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1192345562">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/.project
new file mode 100644
index 000000000..e36368157
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>UART_HyperTerminal_IT</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>UART_HyperTerminal_IT.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/UART_HyperTerminal_IT.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/main.c
new file mode 100644
index 000000000..714bf5e27
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/main.c
@@ -0,0 +1,374 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_IT/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use UART HAL API to transmit
+  *          and receive a data buffer with a communication process based on
+  *          Interrupt transfer.
+  *          The communication is done with the Hyperterminal PC application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+UART_HandleTypeDef huart1;
+
+/* USER CODE BEGIN PV */
+/* Buffer used for transmission */
+uint8_t aTxStartMessage[] = "\n\r ****UART-Hyperterminal communication based on IT ****\n\r Enter 10 characters using keyboard :\n\r";
+uint8_t aTxEndMessage[] = "\n\r Example Finished\n\r";
+
+/* Buffer used for reception */
+uint8_t aRxBuffer[RXBUFFERSIZE];
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_USART1_UART_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Configure leds */
+  /* Configure LED1 and LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /*##-1- Start the transmission process #####################################*/
+  /* While the UART in reception process, user can transmit data through
+     "aTxBuffer" buffer */
+  if(HAL_UART_Transmit_IT(&huart1, (uint8_t*)aTxStartMessage, TXSTARTMESSAGESIZE)!= HAL_OK)
+  {
+    /* Transfer error in transmission process */
+    Error_Handler();
+  }
+
+  /*##-2- Put UART peripheral in reception process ###########################*/
+  /* Any data received will be stored in "aRxBuffer" buffer : the number max of
+     data received is 10 */
+  if(HAL_UART_Receive_IT(&huart1, (uint8_t *)aRxBuffer, RXBUFFERSIZE) != HAL_OK)
+  {
+    /* Transfer error in reception process */
+    Error_Handler();
+  }
+
+  /*##-3- Wait for the end of the transfer ###################################*/
+  /*  Before starting a new communication transfer, you need to check the current
+      state of the peripheral; if it�s busy you need to wait for the end of current
+      transfer before starting a new one.
+      For simplicity reasons, this example is just waiting till the end of the
+      transfer, but application may perform other tasks while transfer operation
+      is ongoing. */
+  while (HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /*##-4- Send the received Buffer ###########################################*/
+  if(HAL_UART_Transmit_IT(&huart1, (uint8_t*)aRxBuffer, RXBUFFERSIZE)!= HAL_OK)
+  {
+    /* Transfer error in transmission process */
+    Error_Handler();
+  }
+
+  /*##-5- Wait for the end of the transfer ###################################*/
+  /*  Before starting a new communication transfer, you need to check the current
+      state of the peripheral; if it�s busy you need to wait for the end of current
+      transfer before starting a new one.
+      For simplicity reasons, this example is just waiting till the end of the
+      transfer, but application may perform other tasks while transfer operation
+      is ongoing. */
+  while (HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /*##-6- Send the End Message ###############################################*/
+  if(HAL_UART_Transmit_IT(&huart1, (uint8_t*)aTxEndMessage, TXENDMESSAGESIZE)!= HAL_OK)
+  {
+    /* Transfer error in transmission process */
+    Error_Handler();
+  }
+
+  /*##-7- Wait for the end of the transfer ###################################*/
+  while (HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /* Turn on LED1 if test passes then enter infinite loop */
+  BSP_LED_On(LED1);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 9600;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_ODD;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+
+/**
+  * @brief  Tx Transfer completed callback
+  * @param  UartHandle: UART handle.
+  * @note   This example shows a simple way to report end of IT Tx transfer, and
+  *         you can add your own implementation.
+  * @retval None
+  */
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *UartHandle)
+{
+}
+
+/**
+  * @brief  Rx Transfer completed callback
+  * @param  UartHandle: UART handle
+  * @note   This example shows a simple way to report end of IT Rx transfer, and
+  *         you can add your own implementation.
+  * @retval None
+  */
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *UartHandle)
+{
+}
+
+/**
+  * @brief  UART error callbacks
+  * @param  UartHandle: UART handle
+  * @note   This example shows a simple way to report transfer error, and you can
+  *         add your own implementation.
+  * @retval None
+  */
+void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle)
+{
+  /* Turn LED3 off: Transfer error in reception/transmission process */
+  BSP_LED_Off(LED3);
+}
+
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while(1);
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..cba9a8cc7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,170 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_IT/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* USART1 interrupt Init */
+    HAL_NVIC_SetPriority(USART1_IRQn, 1, 0);
+    HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+    /* Reset peripherals */
+    __HAL_RCC_USART1_FORCE_RESET();
+    __HAL_RCC_USART1_RELEASE_RESET();
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+    /* USART1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..c2ce26af6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/stm32g4xx_it.c
@@ -0,0 +1,133 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_HyperTerminal_IT/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern UART_HandleTypeDef huart1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
+  */
+void USART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART1_IRQn 0 */
+
+  /* USER CODE END USART1_IRQn 0 */
+  HAL_UART_IRQHandler(&huart1);
+  /* USER CODE BEGIN USART1_IRQn 1 */
+
+  /* USER CODE END USART1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/UART_HyperTerminal_IT.ioc b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/UART_HyperTerminal_IT.ioc
new file mode 100644
index 000000000..fb36fe18d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/UART_HyperTerminal_IT.ioc
@@ -0,0 +1,147 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USART1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA9
+Mcu.Pin1=PA10
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.USART1_IRQn=true\:1\:0\:true\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA10.GPIOParameters=GPIO_PuPd
+PA10.GPIO_PuPd=GPIO_PULLUP
+PA10.Mode=Asynchronous
+PA10.Signal=USART1_RX
+PA9.GPIOParameters=GPIO_PuPd
+PA9.GPIO_PuPd=GPIO_PULLUP
+PA9.Mode=Asynchronous
+PA9.Signal=USART1_TX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=UART_HyperTerminal_IT.ioc
+ProjectManager.ProjectName=UART_HyperTerminal_IT
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+USART1.AutoBaudRateEnableParam=UART_ADVFEATURE_AUTOBAUDRATE_DISABLE
+USART1.BaudRate=9600
+USART1.DMADisableonRxErrorParam=ADVFEATURE_DMA_ENABLEONRXERROR
+USART1.DataInvertParam=ADVFEATURE_DATAINV_DISABLE
+USART1.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,OneBitSampling,AutoBaudRateEnableParam,TxPinLevelInvertParam,RxPinLevelInvertParam,DataInvertParam,SwapParam,OverrunDisableParam,DMADisableonRxErrorParam,MSBFirstParam,VirtualMode-Asynchronous
+USART1.MSBFirstParam=ADVFEATURE_MSBFIRST_DISABLE
+USART1.Mode=MODE_TX_RX
+USART1.OneBitSampling=UART_ONE_BIT_SAMPLE_DISABLE
+USART1.OverSampling=UART_OVERSAMPLING_16
+USART1.OverrunDisableParam=ADVFEATURE_OVERRUN_ENABLE
+USART1.Parity=PARITY_ODD
+USART1.RxPinLevelInvertParam=ADVFEATURE_RXINV_DISABLE
+USART1.StopBits=STOPBITS_1
+USART1.SwapParam=ADVFEATURE_SWAP_DISABLE
+USART1.TxPinLevelInvertParam=ADVFEATURE_TXINV_DISABLE
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USART1.WordLength=WORDLENGTH_8B
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=UART_HyperTerminal_IT
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/readme.txt b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/readme.txt
new file mode 100644
index 000000000..bb4aeb2a5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_HyperTerminal_IT/readme.txt
@@ -0,0 +1,143 @@
+/**
+  @page UART_Hyperterminal_IT UART Hyperterminal IT example
+
+  @verbatim
+  ******************************************************************************
+  * @file    UART/UART_Hyperterminal_IT/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the UART Hyperterminal example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+UART transmission (transmit/receive) in Interrupt mode between a board and
+an HyperTerminal PC application.
+
+Board: STM32G474E-EVAL1
+Tx Pin: PA.09 (CN11 or Pin 8 in CN5)
+Rx Pin: PA.10 (CN11 or Pin 4 in CN5)
+   _________________________
+  |           ______________|                       _______________
+  |          |USART         |                      | HyperTerminal |
+  |          |              |                      |               |
+  |          |           TX |______________________|RX             |
+  |          |              |                      |               |
+  |          |              |     RS232 Cable      |               |
+  |          |              |                      |               |
+  |          |           RX |______________________|TX             |
+  |          |              |                      |               |
+  |          |______________|                      |_______________|
+  |                         |
+  |                         |
+  |                         |
+  |                         |
+  |_STM32_Board_____________|
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz for STM32G4xx Devices.
+
+The UART peripheral configuration is ensured by the HAL_UART_Init() function.
+This later is calling the HAL_UART_MspInit() function which core is implementing
+the configuration of the needed UART resources according to the used hardware (CLOCK,
+GPIO and NVIC). You may update this function to change UART configuration.
+
+The UART/Hyperterminal communication is then initiated.
+The HAL_UART_Receive_IT() and the HAL_UART_Transmit_IT() functions allow respectively
+the reception of Data from Hyperterminal and the transmission of a predefined data
+buffer.
+
+The Asynchronous communication aspect of the UART is clearly highlighted as the
+data buffers transmission/reception to/from Hyperterminal are done simultaneously.
+
+For this example the TxBuffer (aTxStartMessage) is predefined and the RxBuffer (aRxBuffer)
+size is limited to 10 data by the mean of the RXBUFFERSIZE define in the main.c file.
+
+In a first step the TxBuffer buffer content will be displayed in the Hyperterminal
+interface and the received data will be stored in the RxBuffer buffer.
+In a second step the received data in the RxBuffer buffer will be sent back to
+Hyperterminal and displayed.
+The end of this two steps are monitored through the HAL_UART_GetState() function
+result.
+
+STM32G474E-EVAL1 Rev B board LEDs are used to monitor the transfer status:
+ - LED1 turns ON if transmission/reception is complete and OK.
+ - LED3 turns ON when when there is an error in transmission/reception process.
+
+The UART is configured as follows:
+    - BaudRate = 9600 baud
+    - Word Length = 8 Bits (7 data bit + 1 parity bit)
+    - One Stop Bit
+    - Odd parity
+    - Hardware flow control disabled (RTS and CTS signals)
+    - Reception and transmission are enabled in the time
+
+@note When the parity is enabled, the computed parity is inserted at the MSB
+position of the transmitted data.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Connectivity, UART, Printf, Baud rate, RS-232, full-duplex, HyperTerminal, Transmission,
+Reception, Asynchronous, interrupt
+
+@par Directory contents
+
+  - UART/UART_HyperTerminal_IT/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - UART/UART_HyperTerminal_IT/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - UART/UART_HyperTerminal_IT/Inc/stm32g4xx_it.h          IT interrupt handlers header file
+  - UART/UART_HyperTerminal_IT/Inc/main.h                  Header for main.c module
+  - UART/UART_HyperTerminal_IT/Src/stm32g4xx_it.c          IT interrupt handlers
+  - UART/UART_HyperTerminal_IT/Src/main.c                  Main program
+  - UART/UART_HyperTerminal_IT/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - UART/UART_HyperTerminal_IT/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STMicroelectronics STM32G474E-EVAL1 board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474E-EVAL1 Set-up
+    - Connect a null-modem female/female RS232 cable between the USART1 DB9 connector (JP9 on RS232, JP10 OFF)
+      or
+    - Connect USART1 TX (PA9) to RX pin of PC serial port (or USB to UART adapter)
+      and USART1 RX (PA10) to TX pin of PC serial port (or USB to UART adapter).
+
+  - Hyperterminal configuration:
+    - Data Length = 7 Bits
+    - One Stop Bit
+    - Odd parity
+    - BaudRate = 9600 baud
+    - Flow control: None
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/.extSettings b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/Project.eww
new file mode 100644
index 000000000..c213e83fe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\UART_Printf.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/UART_Printf.ewd b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/UART_Printf.ewd
new file mode 100644
index 000000000..aa6289ea5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/UART_Printf.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>UART_Printf</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/UART_Printf.ewp b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/UART_Printf.ewp
new file mode 100644
index 000000000..44caf77b2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/UART_Printf.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>UART_Printf</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>UART_Printf/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>UART_Printf/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>UART_Printf/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
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+          <name>IccRTTI2</name>
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+          <name>AWarnOne</name>
+          <state></state>
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+          <name>AWarnRange1</name>
+          <state></state>
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+          <name>MultiLine</name>
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+          <state>0</state>
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+          <name>PageLength</name>
+          <state>80</state>
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+          <state>0</state>
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+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>UART_Printf.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>UART_Printf.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
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+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/main.h
new file mode 100644
index 000000000..da4e28825
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_Printf/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include <stdio.h>
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..aaa5d35e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..19aec3070
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Inc/stm32g4xx_it.h
@@ -0,0 +1,63 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_Printf/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/UART_Printf.uvoptx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/UART_Printf.uvoptx
new file mode 100644
index 000000000..c772a2ea2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/UART_Printf.uvoptx
@@ -0,0 +1,645 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>UART_Printf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <FileNumber>2</FileNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
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+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
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+
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diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/UART_Printf.uvprojx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/UART_Printf.uvprojx
new file mode 100644
index 000000000..4f1b5c31e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/UART_Printf.uvprojx
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>UART_Printf</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>UART_Printf\Exe\</OutputDirectory>
+          <OutputName>UART_Printf</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
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+            <UserProg1Name></UserProg1Name>
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+            <nStopB1X>0</nStopB1X>
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+          </BeforeMake>
+          <AfterMake>
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+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
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+          <IncludeLibraryModules></IncludeLibraryModules>
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+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
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+            <RunIndependent>0</RunIndependent>
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+          <Flash3></Flash3>
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+          <pFcarmOut></pFcarmOut>
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+          <pFcArmRoot></pFcArmRoot>
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+        <TargetArmAds>
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+            <asHll>1</asHll>
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+            <RvctDeviceName></RvctDeviceName>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="UART_Printf"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..954d42255
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2033441937">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2033441937" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2033441937" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2033441937." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1781182057" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.699326438" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1552959794" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.802168724" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1196113106" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1480450451" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1382267348" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1486602445" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.364952493" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.2069750127" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.2004448964" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/UART_Printf}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1181831902" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1213138054" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1939578952" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.944583768" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2128532039" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.79455862" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1264400733" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.212804066" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.913855249" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1204090682" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.92423843" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.965369455" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.474302208" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.542263614" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2055488628" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.485513537" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.407830054" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
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+							<builder buildPath="${workspace_loc:/UART_Printf}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.364901742" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
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+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1002649194" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1030059645" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.530812169" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1672773132" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1043590691" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
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+						</toolChain>
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+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="UART_Printf.null.655119715" name="UART_Printf"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1422711235;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1422711235.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1454500300;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2084339914">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2033441937;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.2033441937.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2128532039;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.241953165">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/.project
new file mode 100644
index 000000000..388808066
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>UART_Printf</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>UART_Printf.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/UART_Printf.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/main.c
new file mode 100644
index 000000000..27e202c69
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/main.c
@@ -0,0 +1,312 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_Printf/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This example shows how to retarget the C library printf function
+  *          to the UART.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+UART_HandleTypeDef huart1;
+
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_USART1_UART_Init(void);
+/* USER CODE BEGIN PFP */
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
+#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize BSP Led for LED3 */
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Output a message on Hyperterminal using printf function */
+  printf("\n\r UART Printf Example: retarget the C library printf function to the UART\n\r");
+  printf("** Test finished successfully. ** \n\r");
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_ODD;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Retargets the C library __write function to the IAR function iar_fputc.
+  * @param  file: file descriptor.
+  * @param  ptr: pointer to the buffer where the data is stored.
+  * @param  len: length of the data to write in bytes.
+  * @retval length of the written data in bytes.
+  */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+  size_t idx;
+  unsigned char const *pdata = ptr;
+
+  for (idx = 0; idx < len; idx++)
+  {
+    iar_fputc((int)*pdata);
+    pdata++;
+  }
+  return len;
+}
+#endif /* __ICCARM__ */
+
+/**
+  * @brief  Retargets the C library printf function to the USART.
+  */
+PUTCHAR_PROTOTYPE
+{
+  /* Place your implementation of fputc here */
+  /* e.g. write a character to the USART1 and Loop until the end of transmission */
+  HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, 0xFFFF);
+
+  return ch;
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+  while (1);
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..46a3cfd9f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,163 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_Printf/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+    __HAL_RCC_USART1_FORCE_RESET();
+    __HAL_RCC_USART1_RELEASE_RESET();
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..2550a3cd0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/stm32g4xx_it.c
@@ -0,0 +1,147 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_Printf/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/UART_Printf.ioc b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/UART_Printf.ioc
new file mode 100644
index 000000000..fa8c8ff59
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/UART_Printf.ioc
@@ -0,0 +1,146 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USART1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA9
+Mcu.Pin1=PA10
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PA10.GPIOParameters=GPIO_PuPd
+PA10.GPIO_PuPd=GPIO_PULLUP
+PA10.Mode=Asynchronous
+PA10.Signal=USART1_RX
+PA9.GPIOParameters=GPIO_PuPd
+PA9.GPIO_PuPd=GPIO_PULLUP
+PA9.Mode=Asynchronous
+PA9.Signal=USART1_TX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=UART_Printf.ioc
+ProjectManager.ProjectName=UART_Printf
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+USART1.AutoBaudRateEnableParam=UART_ADVFEATURE_AUTOBAUDRATE_DISABLE
+USART1.BaudRate=115200
+USART1.DMADisableonRxErrorParam=ADVFEATURE_DMA_ENABLEONRXERROR
+USART1.DataInvertParam=ADVFEATURE_DATAINV_DISABLE
+USART1.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,OneBitSampling,AutoBaudRateEnableParam,TxPinLevelInvertParam,RxPinLevelInvertParam,DataInvertParam,SwapParam,OverrunDisableParam,DMADisableonRxErrorParam,MSBFirstParam,VirtualMode-Asynchronous
+USART1.MSBFirstParam=ADVFEATURE_MSBFIRST_DISABLE
+USART1.Mode=MODE_TX_RX
+USART1.OneBitSampling=UART_ONE_BIT_SAMPLE_DISABLE
+USART1.OverSampling=UART_OVERSAMPLING_16
+USART1.OverrunDisableParam=ADVFEATURE_OVERRUN_ENABLE
+USART1.Parity=PARITY_ODD
+USART1.RxPinLevelInvertParam=ADVFEATURE_RXINV_DISABLE
+USART1.StopBits=STOPBITS_1
+USART1.SwapParam=ADVFEATURE_SWAP_DISABLE
+USART1.TxPinLevelInvertParam=ADVFEATURE_TXINV_DISABLE
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USART1.WordLength=WORDLENGTH_8B
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=UART_Printf
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/readme.txt b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/readme.txt
new file mode 100644
index 000000000..311ff54f8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_Printf/readme.txt
@@ -0,0 +1,112 @@
+/**
+  @page UART_Printf UART Printf example
+  
+  @verbatim
+  ******************************************************************************
+  * @file    UART/UART_Printf/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the UART Printf example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+Re-routing of the C library printf function to the UART.
+The UART outputs a message on the HyperTerminal.
+
+Board: STM32G474E-EVAL1
+Tx Pin: PA.09: pin 8 on CN5 (available through ST-Link)
+Rx Pin: PA.10: pin 4 on CN5 (available through ST-Link)
+   _________________________ 
+  |           ______________|                       _______________
+  |          |USART         |                      | HyperTerminal |
+  |          |              |                      |               |
+  |          |           TX |______________________|RX             |
+  |          |              |                      |               |
+  |          |              |    ST-Link Cable     |               |
+  |          |              |                      |               |
+  |          |           RX |______________________|TX             |
+  |          |              |                      |               |
+  |          |______________|                      |_______________|
+  |                         |
+  |                         |
+  |                         |
+  |                         |
+  |_STM32_Board_____________|                      
+
+LED3 turns ON when there is an error.
+
+The USART is configured as follows:
+    - BaudRate = 115200 baud
+    - Word Length = 8 Bits (7 data bit + 1 parity bit)
+    - One Stop Bit
+    - Odd parity
+    - Hardware flow control disabled (RTS and CTS signals)
+    - Reception and transmission are enabled in the time
+
+@note When the parity is enabled, the computed parity is inserted at the MSB
+position of the transmitted data.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+      based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+      a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+      
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+@par Keywords
+
+Connectivity, UART, Printf, Baud rate, RS-232, HyperTerminal, full-duplex, Transmission,
+Reception, Asynchronous, interrupt
+
+@par Directory contents
+
+  - UART/UART_Printf/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - UART/UART_Printf/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - UART/UART_Printf/Inc/stm32g4xx_it.h          IT interrupt handlers header file
+  - UART/UART_Printf/Inc/main.h                  Header for main.c module
+  - UART/UART_Printf/Src/stm32g4xx_it.c          Interrupt handlers
+  - UART/UART_Printf/Src/main.c                  Main program
+  - UART/UART_Printf/Src/stm32g4xx_hal_msp.c     HAL MSP module
+  - UART/UART_Printf/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+    
+  - This example has been tested with STM32G474E-EVAL1 board and can be
+    easily tailored to any other supported device and development board.   
+
+  - STM32G474E-EVAL1 Set-up
+    Connect ST-Link cable to the PC USB port to display data on the HyperTerminal.
+      A virtual COM port will then appear in the HyperTerminal.
+
+  - Hyperterminal configuration:
+    - Data Length = 7 Bits
+    - One Stop Bit
+    - Odd parity
+    - BaudRate = 115200 baud
+    - Flow control: None 
+
+@par How to use it ? 
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain 
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/.extSettings b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/Project.eww
new file mode 100644
index 000000000..210c0d9e1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\UART_WakeUpFromStopUsingFIFO.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/UART_WakeUpFromStopUsingFIFO.ewd b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/UART_WakeUpFromStopUsingFIFO.ewd
new file mode 100644
index 000000000..05c2dd3f5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/UART_WakeUpFromStopUsingFIFO.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>UART_WakeUpFromStopUsingFIFO</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/UART_WakeUpFromStopUsingFIFO.ewp b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/UART_WakeUpFromStopUsingFIFO.ewp
new file mode 100644
index 000000000..711347563
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/UART_WakeUpFromStopUsingFIFO.ewp
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>UART_WakeUpFromStopUsingFIFO</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>UART_WakeUpFromStopUsingFIFO/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>UART_WakeUpFromStopUsingFIFO/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>UART_WakeUpFromStopUsingFIFO/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
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+        <option>
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+          <state></state>
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+          <state></state>
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+          <name>CCDiagError</name>
+          <state></state>
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+          <state>1</state>
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+        <option>
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+          <version>1</version>
+          <state>11111110</state>
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+          <name>CCDebugInfo</name>
+          <state>1</state>
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+          <state>1</state>
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+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
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+          <state>$FILE_BNAME$.o</state>
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+          <state>1</state>
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+          <state></state>
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+          <name>CompilerMisraOverride</name>
+          <state>0</state>
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+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
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+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
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+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+          <state>0</state>
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+          <version>0</version>
+          <state>1</state>
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+          <name>CCGuardCalls</name>
+          <state>1</state>
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+        <option>
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+          <state></state>
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+          <name>AProcessor</name>
+          <state>1</state>
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+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
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+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
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+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
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+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
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+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
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+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
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+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
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+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
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+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
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+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>UART_WakeUpFromStopUsingFIFO.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
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+      <archiveVersion>3</archiveVersion>
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+        <extensions></extensions>
+        <cmdline></cmdline>
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+      <data></data>
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+      <archiveVersion>1</archiveVersion>
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+        <prebuild></prebuild>
+        <postbuild></postbuild>
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+      <archiveVersion>0</archiveVersion>
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+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
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+          <state>1</state>
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+          <name>XLinkMisraHandler</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>UART_WakeUpFromStopUsingFIFO.out</state>
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+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
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+          <name>IlinkRawBinaryFile</name>
+          <state></state>
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+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
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+          <name>IlinkRawBinarySegment</name>
+          <state></state>
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+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
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+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
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+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
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+          <name>IlinkMapFile</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
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+          <name>IlinkLogVeneer</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
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+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
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+          <name>IlinkTreatAsRem</name>
+          <state></state>
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+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
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+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
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+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
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+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
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+          <name>IlinkExtraOptions</name>
+          <state></state>
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+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
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+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
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+          <name>IlinkAdditionalLibs</name>
+          <state></state>
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+          <name>IlinkProgramEntryLabelSelect</name>
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+          <name>IlinkStdoutInterfaceSlave</name>
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+          <name>IlinkIElfToolPostProcess</name>
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+        <option>
+          <name>IlinkLogAutoLibSelect</name>
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+          <name>IlinkLogRedirSymbols</name>
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+          <name>IlinkLogUnusedFragments</name>
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+          <name>IlinkCrcReverseByteOrder</name>
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+          <name>IlinkCmsis</name>
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+          <name>IlinkOptMergeDuplSections</name>
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+          <state>1</state>
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+          <name>IlinkOptForceVfe</name>
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+      <name>User</name>
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+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/main.h
new file mode 100644
index 000000000..f40f0eca8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_WakeUpFromStopUsingFIFO/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..aaa5d35e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..fbf14f865
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USART1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/UART_WakeUpFromStopUsingFIFO.uvoptx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/UART_WakeUpFromStopUsingFIFO.uvoptx
new file mode 100644
index 000000000..b964d8be1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/UART_WakeUpFromStopUsingFIFO.uvoptx
@@ -0,0 +1,621 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>UART_WakeUpFromStopUsingFIFO</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>startup_stm32g474xx.s</PathWithFileName>
+      <FilenameWithoutPath>startup_stm32g474xx.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Application/User</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../Src/stm32g4xx_it.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_it.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/UART_WakeUpFromStopUsingFIFO.uvprojx b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/UART_WakeUpFromStopUsingFIFO.uvprojx
new file mode 100644
index 000000000..be36dc468
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/UART_WakeUpFromStopUsingFIFO.uvprojx
@@ -0,0 +1,587 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
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+      <TargetName>UART_WakeUpFromStopUsingFIFO</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
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+          <Vendor>STMicroelectronics</Vendor>
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+          <PackURL>http://www.keil.com/pack</PackURL>
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+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
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+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>UART_WakeUpFromStopUsingFIFO\Exe\</OutputDirectory>
+          <OutputName>UART_WakeUpFromStopUsingFIFO</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
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+            <UserProg1Name></UserProg1Name>
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+          </BeforeMake>
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+          </AfterMake>
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+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
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+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
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+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="UART_WakeUpFromStopUsingFIFO"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..2389e41c8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1638804216">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1638804216" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1638804216" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1638804216." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.622812647" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.684760119" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.2139424187" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.808815909" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1961283938" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.583520847" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.412681426" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.47572116" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1623618845" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.325231288" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.619650040" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/UART_WakeUpFromStopUsingFIFO}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.2074563809" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1142412339" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.468081767" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.858168701" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.725345366" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.968711014" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.741646512" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
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diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/.project
new file mode 100644
index 000000000..057319026
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
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+	<comment></comment>
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+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
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+			<name>UART_WakeUpFromStopUsingFIFO.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/UART_WakeUpFromStopUsingFIFO.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/main.c
new file mode 100644
index 000000000..83d86828b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/main.c
@@ -0,0 +1,377 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_WakeUpFromStopUsingFIFO/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use UART HAL API (UART instance)
+  *          to wake up the MCU from STOP mode using the UART FIFO level.
+  *          Two boards are used, one which enters STOP mode and the second
+  *          one which sends the wake-up stimuli.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define HAL_TIMEOUT_VALUE 0xFFFFFFFF
+#define countof(a) (sizeof(a) / sizeof(*(a)))
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+UART_HandleTypeDef huart1;
+
+/* USER CODE BEGIN PV */
+uint8_t HeaderTxBuffer[] = "\r\nUART WakeUp from stop mode using FIFO\r\n";
+uint8_t Part1TxBuffer[] = "\r\n\t Part 1: RXFIFO threshold interrupt\r\n   Waiting for characters reception until RX FIFO threshold is reached\r\n   Please send 2 bytes\r\n";
+uint8_t WakeupRXFTBuffer[] = "\r\n   Proper wakeup based on RXFIFO threshold interrupt detection.\r\n";
+uint8_t Part2TxBuffer[] = "\r\n\t Part 2: RXFIFO full interrupt\r\n   Waiting for characters reception until RX FIFO is Full \r\n   Please send 8 bytes\r\n";
+uint8_t WakeupRXFFBuffer[] = "\r\n   Proper wakeup based on RXFIFO full interrupt detection.\r\n";
+uint8_t FooterTxBuffer[] = "\r\nExample finished successfully\r\n";
+
+uint8_t RxBuffer[8];
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_USART1_UART_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Initialize BSP LEDs */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED3);
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* Turn LED1 on */
+  BSP_LED_On(LED1);
+
+  /*##########################################################################*/
+  /*##-1- Wakeup first step RXFT #############################################*/
+  /*##########################################################################*/
+
+  /* Output message on hyperterminal */
+  HAL_UART_Transmit(&huart1, (uint8_t*)&HeaderTxBuffer, countof(HeaderTxBuffer)-1, HAL_TIMEOUT_VALUE);
+
+  /* Enable MCU wakeup by UART */
+  HAL_UARTEx_EnableStopMode(&huart1);
+
+  /* Enable the UART RX FIFO threshold interrupt */
+  __HAL_UART_ENABLE_IT(&huart1, UART_IT_RXFT);
+
+  /* Enable the UART wakeup from stop mode interrupt */
+  __HAL_UART_ENABLE_IT(&huart1, UART_IT_WUF);
+
+  /* Output message on hyperterminal */
+  HAL_UART_Transmit(&huart1, (uint8_t*)&Part1TxBuffer, countof(Part1TxBuffer)-1, HAL_TIMEOUT_VALUE);
+
+  /* Put UART peripheral in reception process */
+  HAL_UART_Receive_IT(&huart1, (uint8_t*)&RxBuffer, 2);
+
+  /* Turn LED1 off */
+  BSP_LED_Off(LED1);
+
+  /* Enter STOP mode */
+  HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON,PWR_STOPENTRY_WFI);
+
+  /* ... STOP Mode ... */
+
+  /* Turn LED1 on */
+  BSP_LED_On(LED1);
+
+  while(HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /* Disable the UART wakeup from stop mode interrupt */
+  __HAL_UART_DISABLE_IT(&huart1, UART_IT_WUF);
+
+  /* Disable the UART RX FIFO threshold interrupt */
+  __HAL_UART_DISABLE_IT(&huart1, UART_IT_RXFT);
+
+  /* Disable UART Stop Mode */
+  HAL_UARTEx_DisableStopMode(&huart1);
+
+  /* Output message on hyperterminal */
+  HAL_UART_Transmit(&huart1, (uint8_t*)&WakeupRXFTBuffer, countof(WakeupRXFTBuffer)-1, HAL_TIMEOUT_VALUE);
+
+  /*##########################################################################*/
+  /*##-2- Wakeup second step RXFF ############################################*/
+  /*##########################################################################*/
+
+  /* Update Rx FIFO threshold */
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_8_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Enable MCU wakeup by UART */
+  HAL_UARTEx_EnableStopMode(&huart1);
+
+  /* Enable the UART RX FIFO full interrupt */
+  __HAL_UART_ENABLE_IT(&huart1, UART_IT_RXFF);
+
+  /* Enable the UART wakeup from stop mode interrupt */
+  __HAL_UART_ENABLE_IT(&huart1, UART_IT_WUF);
+
+  /* Output message on hyperterminal */
+  HAL_UART_Transmit(&huart1, (uint8_t*)&Part2TxBuffer, countof(Part2TxBuffer)-1, HAL_TIMEOUT_VALUE);
+
+  /* Put UART peripheral in reception process */
+  HAL_UART_Receive_IT(&huart1, (uint8_t*)&RxBuffer, 8);
+
+  /* Turn LED1 off */
+  BSP_LED_Off(LED1);
+
+  /* Enter STOP mode */
+  HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON,PWR_STOPENTRY_WFI);
+
+  /* ... STOP Mode ... */
+
+  /* Turn LED1 on */
+  BSP_LED_On(LED1);
+
+  while(HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY)
+  {
+  }
+
+  /* Disable the UART wakeup from stop mode interrupt */
+  __HAL_UART_DISABLE_IT(&huart1, UART_IT_WUF);
+
+  /* Disable the UART RX FIFO full interrupt */
+  __HAL_UART_DISABLE_IT(&huart1, UART_IT_RXFF);
+
+  /* Disable UART Stop Mode */
+  HAL_UARTEx_DisableStopMode(&huart1);
+
+  /* Output message on hyperterminal */
+  HAL_UART_Transmit(&huart1, (uint8_t*)&WakeupRXFFBuffer, countof(WakeupRXFFBuffer)-1, HAL_TIMEOUT_VALUE);
+
+  /*##########################################################################*/
+  /*##-3- Successful test ####################################################*/
+  /*##########################################################################*/
+
+  /* Output message on hyperterminal */
+  HAL_UART_Transmit(&huart1, (uint8_t*)&FooterTxBuffer, countof(FooterTxBuffer)-1, HAL_TIMEOUT_VALUE);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 9600;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_ODD;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_EnableFifoMode(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  while(1)
+  {
+    /* LED3 is blinking */
+    BSP_LED_Toggle(LED3);
+    HAL_Delay(500);
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..a44d9a364
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,167 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_HSI;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* USART1 interrupt Init */
+    HAL_NVIC_SetPriority(USART1_IRQn, 1, 0);
+    HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+    /* USART1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a73e1f7d1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_it.c
@@ -0,0 +1,218 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern UART_HandleTypeDef huart1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
+  */
+void USART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART1_IRQn 0 */
+
+  /* USER CODE END USART1_IRQn 0 */
+  HAL_UART_IRQHandler(&huart1);
+  /* USER CODE BEGIN USART1_IRQn 1 */
+
+  /* USER CODE END USART1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/UART_WakeUpFromStopUsingFIFO.ioc b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/UART_WakeUpFromStopUsingFIFO.ioc
new file mode 100644
index 000000000..a14ff1b87
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/UART_WakeUpFromStopUsingFIFO.ioc
@@ -0,0 +1,159 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USART1
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA9
+Mcu.Pin1=PA10
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.USART1_IRQn=true\:1\:0\:true\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA10.GPIO_PuPd=GPIO_PULLUP
+PA10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PA10.Mode=Asynchronous
+PA10.Signal=USART1_RX
+PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd
+PA9.GPIO_PuPd=GPIO_PULLUP
+PA9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+PA9.Mode=Asynchronous
+PA9.Signal=USART1_TX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=UART_WakeUpFromStopUsingFIFO.ioc
+ProjectManager.ProjectName=UART_WakeUpFromStopUsingFIFO
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1CLockSelection,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4CLockSelection,UART4Freq_Value,UART5CLockSelection,UART5Freq_Value,USART1CLockSelection,USART1Freq_Value,USART2CLockSelection,USART2Freq_Value,USART3CLockSelection,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1CLockSelection=RCC_LPUART1CLKSOURCE_HSI
+RCC.LPUART1Freq_Value=16000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4CLockSelection=RCC_UART4CLKSOURCE_HSI
+RCC.UART4Freq_Value=16000000
+RCC.UART5CLockSelection=RCC_UART5CLKSOURCE_HSI
+RCC.UART5Freq_Value=16000000
+RCC.USART1CLockSelection=RCC_USART1CLKSOURCE_HSI
+RCC.USART1Freq_Value=16000000
+RCC.USART2CLockSelection=RCC_USART2CLKSOURCE_HSI
+RCC.USART2Freq_Value=16000000
+RCC.USART3CLockSelection=RCC_USART3CLKSOURCE_HSI
+RCC.USART3Freq_Value=16000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+USART1.BaudRate=9600
+USART1.DMADisableonRxErrorParam-Asynchronous=ADVFEATURE_DMA_ENABLEONRXERROR
+USART1.DataInvertParam-Asynchronous=ADVFEATURE_DATAINV_DISABLE
+USART1.FIFOMode=FIFOMODE_ENABLE
+USART1.IPParameters=BaudRate,OneBitSampling,Prescaler,WordLength,Parity-Asynchronous,StopBits-Asynchronous,Mode-Asynchronous,TXFIFOThreshold-Asynchronous,RXFIFOThreshold-Asynchronous,TxPinLevelInvertParam-Asynchronous,RxPinLevelInvertParam-Asynchronous,DataInvertParam-Asynchronous,SwapParam-Asynchronous,OverrunDisableParam-Asynchronous,DMADisableonRxErrorParam-Asynchronous,MSBFirstParam-Asynchronous,VirtualMode-Asynchronous,FIFOMode,RXFIFOThreshold,TXFIFOThreshold
+USART1.MSBFirstParam-Asynchronous=ADVFEATURE_MSBFIRST_DISABLE
+USART1.Mode-Asynchronous=MODE_TX_RX
+USART1.OneBitSampling=UART_ONE_BIT_SAMPLE_DISABLE
+USART1.OverrunDisableParam-Asynchronous=ADVFEATURE_OVERRUN_ENABLE
+USART1.Parity-Asynchronous=PARITY_ODD
+USART1.Prescaler=UART_PRESCALER_DIV1
+USART1.RXFIFOThreshold=RXFIFO_THRESHOLD_1QUARTERFULL
+USART1.RXFIFOThreshold-Asynchronous=RXFIFO_THRESHOLD_1QUARTERFULL
+USART1.RxPinLevelInvertParam-Asynchronous=ADVFEATURE_RXINV_DISABLE
+USART1.StopBits-Asynchronous=STOPBITS_1
+USART1.SwapParam-Asynchronous=ADVFEATURE_SWAP_DISABLE
+USART1.TXFIFOThreshold=TXFIFO_THRESHOLD_1QUARTERFULL
+USART1.TXFIFOThreshold-Asynchronous=TXFIFO_THRESHOLD_1QUARTERFULL
+USART1.TxPinLevelInvertParam-Asynchronous=ADVFEATURE_TXINV_DISABLE
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USART1.WordLength=WORDLENGTH_8B
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=UART_WakeUpFromStopUsingFIFO
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/readme.txt b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/readme.txt
new file mode 100644
index 000000000..c3857288b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/UART/UART_WakeUpFromStopUsingFIFO/readme.txt
@@ -0,0 +1,131 @@
+/**
+  @page UART_WakeUpFromStopUsingFIFO  wake up from STOP mode using UART FIFO level example
+
+  @verbatim
+  ******************************************************************************
+  * @file    UART/UART_WakeUpFromStopUsingFIFO/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the UART_WakeUpFromStopUsingFIFO example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This example shows how to use UART HAL API to wake up the MCU from STOP mode
+using the UART FIFO level.
+
+At the beginning of the main program, the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+The SystemClock_Config() function is used to configure the system clock for STM32G474QETx Devices.
+
+In the first part of the example, the UART is configured for reception with Rx FIFO threshold
+set to one 1 QUARTER and the CPU enters into Stop Mode.
+The UART FIFO threshold interrupt is enabled and, by default, the UART FIFO full is disabled.
+The user has to send 2 bytes from the HyperTerminal. After 2 received bytes,
+the UART FIFO will reach the quarter level which will generate an interrupt and wake up the CPU.
+
+In the second part of the example, the UART is configured for reception with
+FIFO threshold interrupt disabled and FIFO full enabled. then the CPU goes to stop mode.
+The user has to send 8 bytes (size of the UART FIFO) from the HyperTerminal.
+After 8 received bytes, the UART FIFO will be full, which will generate an interrupt and wake up the CPU.
+
+
+Board: STM32G474E-EVAL1 Rev B
+Tx Pin: PA9
+Rx Pin: PA10
+USART1 used via:
+  - the Virtual COM Port: JP9 not set; JP10 set (VCP_RX);
+  - the USART connector (CN11): JP9 set on 1 (RS232); JP10 not set.
+   _________________________
+  |           ______________|                       _______________
+  |          |USART         |                      | HyperTerminal |
+  |          |              |                      |               |
+  |          |           TX |______________________|RX             |
+  |          |              |                      |               |
+  |          |              |     ST-Link Cable    |               |
+  |          |           RX |______________________|TX             |
+  |          |              |                      |               |
+  |          |______________|                      |_______________|
+  |                         |
+  |                         |
+  |                         |
+  |                         |
+  |_STM32_Board_____________|
+
+LED1 is ON when MCU is not in STOP mode.
+LED3 is blinking when there is an error occurrence.
+
+The UART is configured as follows:
+    - BaudRate = 9600 baud
+    - Word Length = 8 Bits (7 data bit + 1 parity bit)
+    - One Stop Bit
+    - Odd parity
+    - Hardware flow control disabled (RTS and CTS signals)
+    - Reception and transmission are enabled in the time
+
+@note When the parity is enabled, the computed parity is inserted at the MSB
+      position of the transmitted data.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to
+      1 millisecond to have correct HAL operation.
+
+@par Keywords
+
+Connectivity, UART, Baud rate, RS-232, full-duplex, HyperTerminal,Transmission, Reception, Asynchronous,
+STOP mode, FIFO.
+
+@par Directory contents
+
+  - UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - UART/UART_WakeUpFromStopUsingFIFO/Src/main.c                 Main program
+  - UART/UART_WakeUpFromStopUsingFIFO/Src/system_stm32g4xx.c     STM32G4xx system clock configuration file
+  - UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_it.c         Interrupt handlers
+  - UART/UART_WakeUpFromStopUsingFIFO/Src/stm32g4xx_hal_msp.c    HAL MSP module
+  - UART/UART_WakeUpFromStopUsingFIFO/Inc/main.h                 Main program header file
+  - UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_hal_conf.h   HAL Configuration file
+  - UART/UART_WakeUpFromStopUsingFIFO/Inc/stm32g4xx_it.h         Interrupt handlers header file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+  - STM32G474QETx Set-up
+      Connect a USB cable between the ST-Link USB connector
+      and PC to display data on the HyperTerminal.
+
+  - Hyperterminal configuration:
+    - Data Length = 7 Bits
+    - One Stop Bit
+    - Odd parity
+    - BaudRate = 9600 baud
+    - Flow control: None
+
+@par How to use it?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/.extSettings b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/.extSettings
new file mode 100644
index 000000000..ce2c133bb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;WWDG;I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/Project.eww
new file mode 100644
index 000000000..00ad00f07
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+  <project>
+    <path>$WS_DIR$\WWDG_Example.ewp</path>
+  </project>
+  <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/WWDG_Example.ewd b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/WWDG_Example.ewd
new file mode 100644
index 000000000..161ea3428
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/WWDG_Example.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+	<fileVersion>3</fileVersion>
+	<configuration>
+		<name>WWDG_Example</name>
+		<toolchain>
+			<name>ARM</name>
+		</toolchain>
+		<debug>1</debug>
+		<settings>
+			<name>C-SPY</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>29</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CInput</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CEndian</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCVariant</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MacFile</name>
+					<state />
+				</option>
+				<option>
+					<name>MemOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MemFile</name>
+					<state />
+				</option>
+				<option>
+					<name>RunToEnable</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RunToName</name>
+					<state>main</state>
+				</option>
+				<option>
+					<name>CExtraOptionsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CExtraOptions</name>
+					<state />
+				</option>
+				<option>
+					<name>CFpuProcessor</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDDFArgumentProducer</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadSuppressDownload</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDownloadVerifyAll</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCProductVersion</name>
+					<state>7.10.3.6927</state>
+				</option>
+				<option>
+					<name>OCDynDriverList</name>
+					<state>STLINK_ID</state>
+				</option>
+				<option>
+					<name>OCLastSavedByProductVersion</name>
+					<state>8.20.1.14181</state>
+				</option>
+				<option>
+					<name>UseFlashLoader</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CLowLevel</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCBE8Slave</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>MacFile2</name>
+					<state />
+				</option>
+				<option>
+					<name>CDevice</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>FlashLoadersV3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesSuppressCheck3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesPath3</name>
+					<state />
+				</option>
+				<option>
+					<name>OverrideDefFlashBoard</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesOffset1</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset2</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesOffset3</name>
+					<state />
+				</option>
+				<option>
+					<name>OCImagesUse1</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCImagesUse3</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDeviceConfigMacroFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDebuggerExtraOption</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAllMTBOptions</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreNrOfCores</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCMulticoreMaster</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCMulticorePort</name>
+					<state>53461</state>
+				</option>
+				<option>
+					<name>OCMulticoreWorkspace</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveProject</name>
+					<state />
+				</option>
+				<option>
+					<name>OCMulticoreSlaveConfiguration</name>
+					<state />
+				</option>
+				<option>
+					<name>OCDownloadExtraImage</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCAttachSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>MassEraseBeforeFlashing</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>ARMSIM_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCSimDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCSimEnablePSP</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspOverrideConfig</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCSimPspConfigFile</name>
+					<state />
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CADI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCadiMemory</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>Fast Model</name>
+					<state />
+				</option>
+				<option>
+					<name>CCADILogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCADILogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>CMSISDAP_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CMSISDAPResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>CMSISDAPHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>CMSISDAPDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>CMSISDAPProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CMSISDAPSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCMSISDAPUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>GDBSERVER_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJTagBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJTagUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>IJET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>8</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CatchSFERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>OCIarProbeScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetResetList</name>
+					<version>1</version>
+					<state>10</state>
+				</option>
+				<option>
+					<name>IjetHWResetDuration</name>
+					<state>300</state>
+				</option>
+				<option>
+					<name>IjetHWResetDelay</name>
+					<state>200</state>
+				</option>
+				<option>
+					<name>IjetPowerFromProbe</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPowerRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>IjetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTargetEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetProtocolRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSwoPin</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>IjetSwoPrescalerList</name>
+					<version>1</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetRestoreBreakpointsCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetUpdateBreakpointsEdit</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>RDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchUndef</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchData</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchPrefetch</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>RDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>RDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CatchMMERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchNOCPERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchCHKERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchSTATERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchBUSERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchINTERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchHARDERR</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeCfgOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCProbeConfig</name>
+					<state />
+				</option>
+				<option>
+					<name>IjetProbeConfigRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUEnable</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetMultiCPUNumber</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetSelectedCPUBehaviour</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>ICpuName</name>
+					<state />
+				</option>
+				<option>
+					<name>OCJetEmuParams</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetPreferETB</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>IjetTraceSettingsList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>IjetTraceSizeList</name>
+					<version>0</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>FlashBoardPathSlave</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCIjetUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>JLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>16</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CCCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>JLinkSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCJLinkDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCJLinkHWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>JLinkInitialSpeed</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCDoJlinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCScanChainNonARMDevices</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkMultiTarget</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkIRLength</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkCommRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTCPIP</name>
+					<state>aaa.bbb.ccc.ddd</state>
+				</option>
+				<option>
+					<name>CCJLinkSpeedRadioV2</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCUSBDevice</name>
+					<version>1</version>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCRDICatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCRDICatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkBreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkResetList</name>
+					<version>6</version>
+					<state>7</state>
+				</option>
+				<option>
+					<name>CCJLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkScriptFile</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCTcpIpAlt</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCJLinkTcpIpSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>72.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSource</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkTraceSourceDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>OCJLinkDeviceName</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>LMIFTDI_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>2</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>LmiftdiSpeed</name>
+					<state>500</state>
+				</option>
+				<option>
+					<name>CCLmiftdiDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiftdiLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCLmiFtdiInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>PEMICRO_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>3</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCJPEMicroShowSettings</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>STLINK_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>4</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceRadio</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCSTLinkInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkResetList</name>
+					<version>3</version>
+					<state>4</state>
+				</option>
+				<option>
+					<name>CCCpuClockEdit</name>
+					<state>170.0</state>
+				</option>
+				<option>
+					<name>CCSwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSwoClockEdit</name>
+					<state>2000</state>
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCSTLinkDoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkCatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkUsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkJtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCSTLinkDAPNumber</name>
+					<state />
+				</option>
+				<option>
+					<name>CCSTLinkDebugAccessPortRadio</name>
+					<state>0</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>THIRDPARTY_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>0</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>CThirdPartyDriverDll</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileCheck</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CThirdPartyLogFileEditB</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>TIFET_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>1</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetInterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVccTypeDefault</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetVoltage</name>
+					<state>###Uninitialized###</state>
+				</option>
+				<option>
+					<name>CCMSPFetVCCDefault</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetTargetSettlingtime</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioJtagSpeedType</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>CCMSPFetConnection</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetUsbComPort</name>
+					<state>Automatic</state>
+				</option>
+				<option>
+					<name>CCMSPFetAllowAccessToBSL</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetDoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCMSPFetLogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCMSPFetRadioEraseFlash</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<settings>
+			<name>XDS100_ID</name>
+			<archiveVersion>2</archiveVersion>
+			<data>
+				<version>6</version>
+				<wantNonLocal>1</wantNonLocal>
+				<debug>1</debug>
+				<option>
+					<name>OCDriverInfo</name>
+					<state>1</state>
+				</option>
+				<option>
+					<name>TIPackageOverride</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>TIPackage</name>
+					<state />
+				</option>
+				<option>
+					<name>BoardFile</name>
+					<state />
+				</option>
+				<option>
+					<name>DoLogfile</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>LogFile</name>
+					<state>$PROJ_DIR$\cspycomm.log</state>
+				</option>
+				<option>
+					<name>CCXds100BreakpointRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100DoUpdateBreakpoints</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UpdateBreakpoints</name>
+					<state>_call_main</state>
+				</option>
+				<option>
+					<name>CCXds100CatchReset</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchUndef</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSWI</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchData</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchPrefetch</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchIRQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchFIQ</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCORERESET</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchMMERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchNOCPERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchCHRERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSTATERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchBUSERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchINTERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchSFERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchHARDERR</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CatchDummy</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100CpuClockEdit</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100SwoClockAuto</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SwoClockEdit</name>
+					<state>1000</state>
+				</option>
+				<option>
+					<name>CCXds100HWResetDelay</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ResetList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNo</name>
+					<state />
+				</option>
+				<option>
+					<name>CCXds100UsbSerialNoSelect</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100JtagSpeedList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100InterfaceCmdLine</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100ProbeList</name>
+					<version>0</version>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPortRadio</name>
+					<state>0</state>
+				</option>
+				<option>
+					<name>CCXds100SWOPort</name>
+					<state>1</state>
+				</option>
+			</data>
+		</settings>
+		<debuggerPlugins>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+				<loadFlag>1</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+			<plugin>
+				<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+				<loadFlag>0</loadFlag>
+			</plugin>
+		</debuggerPlugins>
+	</configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/WWDG_Example.ewp b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/WWDG_Example.ewp
new file mode 100644
index 000000000..515afd7d0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/WWDG_Example.ewp
@@ -0,0 +1,1152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>WWDG_Example</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>29</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>WWDG_Example/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>WWDG_Example/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>WWDG_Example/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>8.20.1.14181</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32G474QE	ST STM32G474QE</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>NEON</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>26</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32G474xx</state>
+          <state></state>
+          <state></state>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>10</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>WWDG_Example.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+        <hasPrio>0</hasPrio>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>WWDG_Example.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$/stm32g474xx_flash.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$/startup_stm32g474xx.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/main.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_it.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../Src/stm32g4xx_hal_msp.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$/../readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>Components</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32G474E-EVAL1</name>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>STM32G4xx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</name>
+      </file>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$/../Src/system_stm32g4xx.c</name>
+      </file>
+    </group>
+  </group>
+</project>
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..65bffb533
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__   = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/main.h
new file mode 100644
index 000000000..5f01bfc10
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    WWDG/WWDG_Example/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 0U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 0U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..daed48d41
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  /*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+#define HAL_WWDG_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b8e938d7a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Inc/stm32g4xx_it.h
@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    WWDG/WWDG_Example/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/WWDG_Example.uvoptx b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/WWDG_Example.uvoptx
new file mode 100644
index 000000000..5655426bc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/WWDG_Example.uvoptx
@@ -0,0 +1,633 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>WWDG_Example</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>::CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>1</RteFlg>
+  </Group>
+
+  <Group>
+    <GroupName>Application/MDK-ARM</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
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+      <bShared>0</bShared>
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+  </Group>
+
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+    <GroupName>Application/User</GroupName>
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+      <FilenameWithoutPath>stm32g4xx_hal_msp.c</FilenameWithoutPath>
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+  </Group>
+
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+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_rcc_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_flash_ramfunc.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_exti.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>26</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_dma_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <FilenameWithoutPath>stm32g4xx_hal_pwr.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <PathWithFileName>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32g4xx_hal_pwr_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+  </Group>
+
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+    <GroupName>Drivers/CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
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+      <FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
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+  </Group>
+
+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/WWDG_Example.uvprojx b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/WWDG_Example.uvprojx
new file mode 100644
index 000000000..001cb1c5b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/WWDG_Example.uvprojx
@@ -0,0 +1,592 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>WWDG_Example</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.1.2</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>WWDG_Example\Exe\</OutputDirectory>
+          <OutputName>WWDG_Example</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32G474xx,</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
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+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
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+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_hal_msp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_wwdg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="WWDG_Example"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..63c3bd75f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x1000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..afbb43542
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1150819371">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1150819371" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1150819371" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1150819371." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.17283583" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.2031414863" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.394773082" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.236486910" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474QETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1663843818" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.910817005" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2114724355" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.2025839971" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1854627742" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1939692679" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.754583389" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/WWDG_Example}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.251823932" managedBuildOn="true" name="Gnu Make Builder.Debug" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.190091673" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1400886792" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.857862194" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1016804162" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.110202991" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1940150883" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1380702743" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1240911269" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1633234140" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.594994776" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
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+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.328864698" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.211645496" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1446628956" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.354551058" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.618763624" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.619488246" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.51209024" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1573272921">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1573272921" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.2092457684" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1017852990" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474QETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy | ../../Inc | ../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../../../../../../Drivers/BSP/Components/mfxstm32l152 | ../../../../../../../Drivers/BSP/STM32G474E-EVAL | ../../../../../../../Drivers/CMSIS/Include ||  ||  || USE_HAL_DRIVER | STM32G474xx ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1354620390" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/WWDG_Example}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1709198683" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.2113216086" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1946657227" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.624248664" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1240928452" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1334065630" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.951997441" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1083757613" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32G474xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.769232462" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../../Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/Components/mfxstm32l152"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/BSP/STM32G474E-EVAL"/>
+									<listOptionValue builtIn="false" value="../../../../../../../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1542131733" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.496457833" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2108731770" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.651856717" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.397918379" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.653024739" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1018478598" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1760097888" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.2053448388" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G474QETX_FLASH.ld}" valueType="string"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.780224511" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.2092860795" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1086913684" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2060306028" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.620966024" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.609910367" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1354561165" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1315794650" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="WWDG_Example.null.550779491" name="WWDG_Example"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1573272921;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1573272921.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1240928452;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1542131733">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1150819371;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1150819371.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1016804162;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1633234140">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/.project
new file mode 100644
index 000000000..ced69b75f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>WWDG_Example</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>WWDG_Example.ioc</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/WWDG_Example.ioc</locationURI>
+		</link>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Application/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_hal_msp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c</locationURI>
+		</link>
+		<link>
+			<name>Application/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_wwdg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..76966f58a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x1000;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/main.c
new file mode 100644
index 000000000..814520a1c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/main.c
@@ -0,0 +1,307 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    WWDG/WWDG_Example/Src/main.c
+  * @author  MCD Application Team
+  * @brief   This sample code shows how to use the WWDG HAL API
+  *          to update at regular period the WWDG counter and how to generate
+  *          a software fault generating an MCU WWDG reset on expiry of a
+  *          programmed time period.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define WWDG_WINDOW    0x50
+#define WWDG_COUNTER   0x7F
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+WWDG_HandleTypeDef hwwdg;
+
+/* USER CODE BEGIN PV */
+uint32_t WwdgStatus = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_WWDG_Init(void);
+/* USER CODE BEGIN PFP */
+static uint32_t TimeoutCalculation(uint32_t timevalue);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+ uint32_t delay;
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch
+       - Systick timer is configured by default as source of time base, but user
+         can eventually implement his proper time base source (a general purpose
+         timer for example or other time source), keeping in mind that Time base
+         duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+         handled in milliseconds basis.
+       - Set NVIC Group Priority to 4
+       - Low Level Initialization
+     */
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+  /* Configure LED1, LED2, LED3 */
+  BSP_LED_Init(LED1);
+  BSP_LED_Init(LED2);
+  BSP_LED_Init(LED3);
+
+  /*##-1- Check if the system has resumed from WWDG reset ####################*/
+  if (__HAL_RCC_GET_FLAG(RCC_FLAG_WWDGRST) != 0x00u)
+  {
+    /* WWDGRST flag set: Turn LED1 on and set WWDGStatus */
+    WwdgStatus = 1;
+    BSP_LED_On(LED1);
+
+    /* Insert 4s delay */
+    HAL_Delay(4000);
+
+    /* Prior to clear WWDGRST flag: Turn LED1 off */
+    BSP_LED_Off(LED1);
+  }
+
+  /* Clear reset flags in any case */
+  __HAL_RCC_CLEAR_RESET_FLAGS();
+  WwdgStatus = 0;
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_WWDG_Init();
+  /* USER CODE BEGIN 2 */
+  /* Configure User push-button */
+  BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+  /* calculate delay to enter window. Add 1ms to secure round number to upper number  */
+  delay = TimeoutCalculation((hwwdg.Init.Counter-hwwdg.Init.Window) + 1) + 1;
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+    /* Toggle LED2 */
+    BSP_LED_Toggle(LED2);
+
+    /* Insert calculated delay */
+    HAL_Delay(delay);
+
+    if (HAL_WWDG_Refresh(&hwwdg) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief WWDG Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_WWDG_Init(void)
+{
+
+  /* USER CODE BEGIN WWDG_Init 0 */
+     /*  Default WWDG Configuration:
+      1] Set WWDG counter to 0x7F  and window to 0x50
+      2] Set Prescaler to WWDG_PRESCALER_128
+
+      Timing calculation:
+      a) WWDG clock counter period (in ms) = (4096 * WWDG_PRESCALER_128) / (PCLK1 / 1000)
+                                           = 3,495 ms
+      b) WWDG timeout (in ms) = (0x7F + 1) * 3,495
+                              ~= 447,4 ms
+      => After refresh, WWDG will expires after 447,4 ms and generate reset if
+      counter is not reloaded.
+      c) Time to enter inside window
+      Window timeout (in ms) = (127 - 80 + 1) * 3,495
+                             = 167,7 ms */
+  /* USER CODE END WWDG_Init 0 */
+
+  /* USER CODE BEGIN WWDG_Init 1 */
+
+  /* USER CODE END WWDG_Init 1 */
+  hwwdg.Instance = WWDG;
+  hwwdg.Init.Prescaler = WWDG_PRESCALER_128;
+  hwwdg.Init.Window = WWDG_WINDOW;
+  hwwdg.Init.Counter = WWDG_COUNTER;
+  hwwdg.Init.EWIMode = WWDG_EWI_DISABLE;
+  if (HAL_WWDG_Init(&hwwdg) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN WWDG_Init 2 */
+
+  /* USER CODE END WWDG_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+  * @brief  Timeout calculation function.
+  *         This function calculates any timeout related to 
+  *         WWDG with given prescaler and system clock.
+  * @param  timevalue: period in term of WWDG counter cycle.
+  * @retval None
+  */
+static uint32_t TimeoutCalculation(uint32_t timevalue)
+{
+  uint32_t timeoutvalue = 0;
+  uint32_t pclk1 = 0;
+  uint32_t wdgtb = 0;
+
+  /* considering APB divider is still 1, use HCLK value */
+  pclk1 = HAL_RCC_GetPCLK1Freq();
+
+  /* get prescaler */
+  wdgtb = (1 << ((hwwdg.Init.Prescaler) >> WWDG_CFR_WDGTB_Pos)); /* 2^WDGTB[1:0] */
+
+  /* calculate timeout */
+  timeoutvalue = ((4096 * wdgtb * timevalue) / (pclk1 / 1000));
+
+  return timeoutvalue;
+}
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* Turn LED3 on */
+  BSP_LED_On(LED3);
+
+  WwdgStatus = 0xE;
+  while(1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+    ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..2ca5e51d9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,106 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    WWDG/WWDG_Example/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+ 
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief WWDG MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hwwdg: WWDG handle pointer
+* @retval None
+*/
+void HAL_WWDG_MspInit(WWDG_HandleTypeDef* hwwdg)
+{
+  if(hwwdg->Instance==WWDG)
+  {
+  /* USER CODE BEGIN WWDG_MspInit 0 */
+
+  /* USER CODE END WWDG_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_WWDG_CLK_ENABLE();
+  /* USER CODE BEGIN WWDG_MspInit 1 */
+
+  /* USER CODE END WWDG_MspInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..2e8710041
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/stm32g4xx_it.c
@@ -0,0 +1,220 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    WWDG/WWDG_Example/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+* @brief This function handles EXTI lines 10 to 15 interrupts.
+  * @param  None
+  * @retval None
+*/
+void EXTI15_10_IRQHandler(void)
+{
+  /* As the following address is invalid (not mapped), a Hardfault exception
+  will be generated with an infinite loop and when the WWDG counter falls to 63
+  the WWDG reset occurs */
+  *(__IO uint32_t *) 0xA0003000 = 0xFF;
+
+}
+
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/EXTI_ToggleLedOnIT.ioc b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/WWDG_Example.ioc
similarity index 57%
rename from Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/EXTI_ToggleLedOnIT.ioc
rename to Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/WWDG_Example.ioc
index 9e53ff60f..a3fe35817 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/EXTI_ToggleLedOnIT.ioc
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/WWDG_Example.ioc
@@ -4,58 +4,43 @@ CAD.pinconfig=
 CAD.provider=
 File.Version=6
 KeepUserPlacement=true
-Mcu.CPN=STM32G431RBT3
+Mcu.CPN=STM32G474QET6
 Mcu.Family=STM32G4
 Mcu.IP0=NVIC
 Mcu.IP1=RCC
 Mcu.IP2=SYS
-Mcu.IPNb=3
-Mcu.Name=STM32G431R(6-8-B)Tx
-Mcu.Package=LQFP64
-Mcu.Pin0=PC13
-Mcu.Pin1=PA5
-Mcu.Pin2=PC4
-Mcu.Pin3=VP_SYS_VS_Systick
-Mcu.Pin4=VP_SYS_VS_DBSignals
-Mcu.PinsNb=5
+Mcu.IP3=WWDG
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_SYS_VS_Systick
+Mcu.Pin1=VP_SYS_VS_DBSignals
+Mcu.Pin2=VP_WWDG_VS_WWDG
+Mcu.PinsNb=3
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
-Mcu.UserName=STM32G431RBTx
+Mcu.UserName=STM32G474QETx
 MxCube.Version=6.10.0
 MxDb.Version=DB.6.0.100
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-PA5.GPIOParameters=GPIO_Label
-PA5.GPIO_Label=LED2
-PA5.Locked=true
-PA5.Signal=GPIO_Output
-PC13.Locked=true
-PC13.Signal=GPXTI13
-PC4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PC4.GPIO_Label=USER_BUTTON
-PC4.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC4.GPIO_PuPd=GPIO_PULLUP
-PC4.Locked=true
-PC4.Signal=GPXTI4
 PinOutPanel.RotationAngle=0
 ProjectManager.AskForMigrate=true
 ProjectManager.BackupPrevious=false
-ProjectManager.CompilerOptimize=3
+ProjectManager.CompilerOptimize=6
 ProjectManager.ComputerToolchain=false
 ProjectManager.CoupleFile=false
 ProjectManager.DeletePrevious=true
-ProjectManager.DeviceId=STM32G431RBTx
+ProjectManager.DeviceId=STM32G474QETx
 ProjectManager.FreePins=false
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
@@ -66,18 +51,19 @@ ProjectManager.MainLocation=Src
 ProjectManager.NoMain=false
 ProjectManager.PreviousToolchain=
 ProjectManager.ProjectBuild=false
-ProjectManager.ProjectFileName=EXTI_ToggleLedOnIT.ioc
-ProjectManager.ProjectName=EXTI_ToggleLedOnIT
+ProjectManager.ProjectFileName=WWDG_Example.ioc
+ProjectManager.ProjectName=WWDG_Example
 ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=
-ProjectManager.StackSize=0x400
+ProjectManager.StackSize=0x1000
 ProjectManager.TargetToolchain=EWARM V8.32
 ProjectManager.ToolChainLocation=
 ProjectManager.UAScriptAfterPath=
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_WWDG_Init-WWDG-false-HAL-true
 RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
 RCC.AHBFreq_Value=170000000
 RCC.APB1Freq_Value=170000000
 RCC.APB1TimFreq_Value=170000000
@@ -90,14 +76,16 @@ RCC.FCLKCortexFreq_Value=170000000
 RCC.FDCANFreq_Value=170000000
 RCC.FamilyName=M
 RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
 RCC.HSE_VALUE=24000000
 RCC.HSI48_VALUE=48000000
 RCC.HSI_VALUE=16000000
 RCC.I2C1Freq_Value=170000000
 RCC.I2C2Freq_Value=170000000
 RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
 RCC.I2SFreq_Value=170000000
-RCC.IPParameters=ADC12Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
 RCC.LPTIM1Freq_Value=170000000
 RCC.LPUART1Freq_Value=170000000
 RCC.LSCOPinFreq_Value=32000
@@ -110,25 +98,31 @@ RCC.PLLPoutputFreq_Value=170000000
 RCC.PLLQoutputFreq_Value=170000000
 RCC.PLLRCLKFreq_Value=170000000
 RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
 RCC.RNGFreq_Value=170000000
 RCC.SAI1Freq_Value=170000000
 RCC.SYSCLKFreq_VALUE=170000000
 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
 RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
 RCC.USART1Freq_Value=170000000
 RCC.USART2Freq_Value=170000000
 RCC.USART3Freq_Value=170000000
 RCC.USBFreq_Value=170000000
 RCC.VCOInputFreq_Value=4000000
 RCC.VCOOutputFreq_Value=340000000
-SH.GPXTI13.0=GPIO_EXTI13
-SH.GPXTI13.ConfNb=1
-SH.GPXTI4.0=GPIO_EXTI4
-SH.GPXTI4.ConfNb=1
 VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
 VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
 VP_SYS_VS_Systick.Mode=SysTick
 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_WWDG_VS_WWDG.Mode=WWDG_Activate
+VP_WWDG_VS_WWDG.Signal=WWDG_VS_WWDG
+WWDG.Counter=WWDG_COUNTER
+WWDG.EWIMode=WWDG_EWI_DISABLE
+WWDG.IPParameters=Prescaler,Window,Counter,EWIMode
+WWDG.IPParametersWithoutCheck=Window,Counter
+WWDG.Prescaler=WWDG_PRESCALER_128
+WWDG.Window=WWDG_WINDOW
 board=custom
-ProjectManager.Example=EXTI_ToggleLedOnIT
+ProjectManager.Example=WWDG_Example
 ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/readme.txt b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/readme.txt
new file mode 100644
index 000000000..c5d9d50a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/WWDG/WWDG_Example/readme.txt
@@ -0,0 +1,108 @@
+/**
+  @page WWDG_Example Window Watchdog example
+
+  @verbatim
+  ******************************************************************************
+  * @file    WWDG/WWDG_Example/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the Window Watchdog example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+Configuration of the HAL API to periodically update the WWDG counter and simulate a software fault that
+generates an MCU WWDG reset when a predefined time period has elapsed.
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+
+The WWDG peripheral configuration is ensured by the HAL_WWDG_Init() function.
+This later is calling the HAL_WWDG_MspInit()function which core is implementing
+the configuration of the needed WWDG resources according to the used hardware (CLOCK
+and NVIC). You may update this function to change WWDG configuration.
+
+The WWDG timeout is set, through counter value, to 447,4 ms.
+The refresh window is set in order to make user wait 167,7 ms after a wadchdog refresh,
+before writing again counter. Hence the WWDG counter is refreshed each (167,7 + 1) ms in the
+main program infinite loop to prevent a WWDG reset.
+LED2 is toggling at same frequency, indicating that the program is running.
+
+An EXTI Line is connected to a GPIO pin, and configured to generate an interrupt
+on the rising edge of the signal.
+
+The EXTI Line is used to simulate a software failure: once the EXTI Line event
+occurs by pressing the User push-button (PC.13), the corresponding interrupt is served.
+
+In the ISR, a write to invalid address generates a Hardfault exception containing
+an infinite loop and preventing to return to main program (the WWDG counter is
+not refreshed).
+As a result, when the WWDG counter falls to 0x3F, WWDG reset occurs.
+
+If the WWDG reset is generated, after the system resumes from reset, LED1 is turned ON for 4 seconds.
+
+If the EXTI Line event does not occur, the WWDG counter is indefinitely refreshed
+in the main program infinite loop, and there is no WWDG reset.
+
+LED3 is turned ON and remains ON if any error occurs.
+
+@note This example must be tested in standalone mode (not in debug).
+
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+      to have correct HAL operation.
+
+
+@par Keywords
+
+System, WWDG, EXTI, update counter, MCU Reset, Timeout, Software fault
+
+@par Directory contents
+
+  - WWDG/WWDG_Example/Inc/stm32g474e_eval_conf.h     BSP configuration file
+  - WWDG/WWDG_Example/Inc/stm32g4xx_hal_conf.h    HAL configuration file
+  - WWDG/WWDG_Example/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - WWDG/WWDG_Example/Inc/main.h                        Header for main.c module
+  - WWDG/WWDG_Example/Src/stm32g4xx_it.c          Interrupt handlers
+  - WWDG/WWDG_Example/Src/main.c                        Main program
+  - WWDG/WWDG_Example/Src/stm32g4xx_hal_msp.c     HAL MSP file
+  - WWDG/WWDG_Example/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This example runs on STM32G474QETx devices.
+
+  - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.ewd b/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.ewd
new file mode 100644
index 000000000..d4e596025
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>STM32G474E-EVAL1</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>29</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CEndian</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCVariant</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>MemOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MemFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>RunToEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RunToName</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CFpuProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDDFArgumentProducer</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadSuppressDownload</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDownloadVerifyAll</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProductVersion</name>
+                    <state>7.10.3.6927</state>
+                </option>
+                <option>
+                    <name>OCDynDriverList</name>
+                    <state>STLINK_ID</state>
+                </option>
+                <option>
+                    <name>OCLastSavedByProductVersion</name>
+                    <state>8.20.2.14834</state>
+                </option>
+                <option>
+                    <name>UseFlashLoader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CLowLevel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCBE8Slave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MacFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CDevice</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>FlashLoadersV3</name>
+                    <state>$TOOLKIT_DIR$\config\flashloader\</state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OverrideDefFlashBoard</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesOffset1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesUse1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDeviceConfigMacroFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDebuggerExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAllMTBOptions</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreMaster</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticorePort</name>
+                    <state>53461</state>
+                </option>
+                <option>
+                    <name>OCMulticoreWorkspace</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveProject</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveConfiguration</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadExtraImage</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAttachSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MassEraseBeforeFlashing</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ARMSIM_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCSimDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCSimEnablePSP</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspOverrideConfig</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspConfigFile</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CADI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCadiMemory</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>Fast Model</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCADILogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCADILogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CMSISDAP_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CMSISDAPResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>CMSISDAPDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CMSISDAPProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>GDBSERVER_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJTagBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IJET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>IjetPowerFromProbe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPowerRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetProtocolRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPin</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetCpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPrescalerList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPreferETB</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetTraceSettingsList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetTraceSizeList</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>FlashBoardPathSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>JLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>16</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>JLinkSpeed</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJLinkHWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>JLinkInitialSpeed</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCDoJlinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkCommRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>CCJLinkSpeedRadioV2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCUSBDevice</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCRDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkResetList</name>
+                    <version>6</version>
+                    <state>7</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCTcpIpAlt</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTcpIpSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSourceDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkDeviceName</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>LMIFTDI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>2</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>LmiftdiSpeed</name>
+                    <state>500</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>PEMICRO_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJPEMicroShowSettings</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>STLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkResetList</name>
+                    <version>3</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state>80.0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkJtagSpeedList</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDAPNumber</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkDebugAccessPortRadio</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>TIFET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVccTypeDefault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CCMSPFetVCCDefault</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetSettlingtime</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioJtagSpeedType</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetConnection</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetUsbComPort</name>
+                    <state>Automatic</state>
+                </option>
+                <option>
+                    <name>CCMSPFetAllowAccessToBSL</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioEraseFlash</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>XDS100_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>6</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TIPackageOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TIPackage</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>BoardFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCXds100BreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100DoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CpuClockEdit</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockEdit</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCXds100HWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100JtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ProbeList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPort</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+                <loadFlag>1</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.ewp b/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.ewp
new file mode 100644
index 000000000..86781a40b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.ewp
@@ -0,0 +1,1313 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>STM32G474E-EVAL1</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>3</archiveVersion>
+            <data>
+                <version>30</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>ExePath</name>
+                    <state>STM32G474E-EVAL1\Exe</state>
+                </option>
+                <option>
+                    <name>ObjPath</name>
+                    <state>STM32G474E-EVAL1\Obj</state>
+                </option>
+                <option>
+                    <name>ListPath</name>
+                    <state>STM32G474E-EVAL1\List</state>
+                </option>
+                <option>
+                    <name>GEndianMode</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>Input description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>Output description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGCoreOrChip</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelect</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RTDescription</name>
+                    <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+                </option>
+                <option>
+                    <name>OGProductVersion</name>
+                    <state>8.20.2.14834</state>
+                </option>
+                <option>
+                    <name>OGLastSavedByProductVersion</name>
+                    <state>8.20.2.14834</state>
+                </option>
+                <option>
+                    <name>GeneralEnableMisra</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVerbose</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGChipSelectEditMenu</name>
+                    <state>STM32G474RE	ST STM32G474RE</state>
+                </option>
+                <option>
+                    <name>GenLowLevelInterface</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GEndianModeBE</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenStdoutInterface</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules98</name>
+                    <version>0</version>
+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules04</name>
+                    <version>0</version>
+                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+                </option>
+                <option>
+                    <name>RTConfigPath2</name>
+                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                </option>
+                <option>
+                    <name>GBECoreSlave</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>OGUseCmsis</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGUseCmsisDspLib</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CoreVariant</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>GFPUDeviceSlave</name>
+                    <state>STM32G474RE	ST STM32G474RE</state>
+                </option>
+                <option>
+                    <name>FPU2</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>NrRegs</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>NEON</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GFPUCoreSlave2</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>OGCMSISPackSelectDevice</name>
+                </option>
+                <option>
+                    <name>OgLibHeap</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGLibAdditionalLocale</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGPrintfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGPrintfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DSPExtension</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ICCARM</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>34</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCDefines</name>
+                    <state>STM32G474xx</state>
+                    <state>USE_HAL_DRIVER</state>
+                    <state>USE_STM32G474E_EVAL1</state>
+                </option>
+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocComments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagWarning</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagError</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCObjPrefix</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCAllowList</name>
+                    <version>1</version>
+                    <state>11111110</state>
+                </option>
+                <option>
+                    <name>CCDebugInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IEndianMode</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCLangConformance</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSignedPlainChar</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCRequirePrototypes</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDiagWarnAreErr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCompilerRuntimeInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IFpuProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OutputFile</name>
+                    <state>$FILE_BNAME$.o</state>
+                </option>
+                <option>
+                    <name>CCLibConfigHeader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CompilerMisraOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIncludePath2</name>
+                    <state>$PROJ_DIR$\..\Inc</state>
+                    <state>$PROJ_DIR$\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include</state>
+                    <state>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc</state>
+                    <state>$PROJ_DIR$\..\..\..\..\Drivers\BSP\STM32G474E-EVAL</state>
+                    <state>$PROJ_DIR$\..\..\..\..\Drivers\BSP\Components\Common</state>
+                </option>
+                <option>
+                    <name>CCStdIncCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCodeSection</name>
+                    <state>.text</state>
+                </option>
+                <option>
+                    <name>IProcessorMode2</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCOptLevel</name>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>CCOptStrategy</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCOptLevelSlave</name>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>CompilerMisraRules98</name>
+                    <version>0</version>
+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+                </option>
+                <option>
+                    <name>CompilerMisraRules04</name>
+                    <version>0</version>
+                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+                </option>
+                <option>
+                    <name>CCPosIndRopi</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPosIndRwpi</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPosIndNoDynInit</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccLang</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccCDialect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccAllowVLA</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccStaticDestr</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccCppInlineSemantics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccCmsis</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccFloatSemantics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCOptimizationNoSizeConstraints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCNoLiteralPool</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCOptStrategySlave</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCGuardCalls</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCEncSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccExceptions2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccRTTI2</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>AARM</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>10</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>AObjPrefix</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AEndian</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ACaseSensitivity</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MacroChars</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AWarnEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AWarnWhat</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AWarnOne</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AWarnRange1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AWarnRange2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ADebug</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AltRegisterNames</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ADefines</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AList</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AListHeader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AListing</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>Includes</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacDefs</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacExps</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MacExec</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OnlyAssed</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MultiLine</name>
+                    <state>0</state>
+                </option>
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+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rng.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rtc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rtc_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sai.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sai_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smartcard.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smartcard_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smbus.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sram.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_timebase_tim_template.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart_ex.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_wwdg.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_fmc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_usb.c</name>
+            </file>
+        </group>
+    </group>
+    <group>
+        <name>Example</name>
+        <group>
+            <name>EWARM</name>
+            <file>
+                <name>$PROJ_DIR$\startup_stm32g474xx.s</name>
+            </file>
+        </group>
+        <group>
+            <name>User</name>
+            <file>
+                <name>$PROJ_DIR$\..\Src\main.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\stm32g4xx_it.c</name>
+            </file>
+        </group>
+    </group>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.eww
new file mode 100644
index 000000000..46d9d41ce
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+    <project>
+        <path>$WS_DIR$\Project.ewp</path>
+    </project>
+    <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Templates/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Templates/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Templates/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..042ac5637
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__      = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__    = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__      = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__= 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__  = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Templates/Inc/main.h b/Projects/STM32G474E-EVAL1/Templates/Inc/main.h
new file mode 100644
index 000000000..a6e02e3c9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Inc/main.h
@@ -0,0 +1,34 @@
+/**
+  ******************************************************************************
+  * @file    Templates/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef MAIN_H
+#define MAIN_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g474e_eval.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+#endif /* MAIN_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/Inc/mt25ql512abb_conf.h b/Projects/STM32G474E-EVAL1/Templates/Inc/mt25ql512abb_conf.h
new file mode 100644
index 000000000..fcffb0c1e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Inc/mt25ql512abb_conf.h
@@ -0,0 +1,55 @@
+/**
+  ******************************************************************************
+  * @file    mt25ql512abb_conf.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the description of the MT25QL512ABB QSPI memory.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef MT25QL512ABB_CONF_H
+#define MT25QL512ABB_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/** @addtogroup BSP
+  * @{
+  */
+#define CONF_QSPI_ODS             MT25QL512ABB_EVCR_ODS_30   /* MT25QL512ABB Output Driver Strength         */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MT25QL512ABB_CONF_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..0663f19ea
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+  ******************************************************************************
+  * @file    stm32g474e_eval_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32G474E-EVAL1 board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32G474E-EVAL1
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+  * @{
+  */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE                 1U
+
+/* COM LOG define */
+#define USE_COM_LOG                         0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE                 1U
+
+/* COMP define :
+   depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE            0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS                    1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE                 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY                15U
+#define BSP_IOEXPANDER_IT_PRIORITY          14U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           13U
+#define BSP_AUDIO_IN_IT_PRIORITY            12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994              1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* I2C3 Frequency in Hz  */
+#define BUS_I2C3_FREQUENCY                  100000U   /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps  */
+#define BUS_SPI2_BAUDRATE                   12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..1c5a53338
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,382 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32g4xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_COMP_MODULE_ENABLED
+#define HAL_CORDIC_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_CRYP_MODULE_ENABLED
+#define HAL_DAC_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_FDCAN_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_FMAC_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_HRTIM_MODULE_ENABLED
+#define HAL_IRDA_MODULE_ENABLED
+#define HAL_IWDG_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_I2S_MODULE_ENABLED
+#define HAL_LPTIM_MODULE_ENABLED
+#define HAL_NAND_MODULE_ENABLED
+#define HAL_NOR_MODULE_ENABLED
+#define HAL_OPAMP_MODULE_ENABLED
+#define HAL_PCD_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_QSPI_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_SAI_MODULE_ENABLED
+#define HAL_SMARTCARD_MODULE_ENABLED
+#define HAL_SMBUS_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+#define HAL_WWDG_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                          The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)  /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    (48000UL) /*!< Value of the External clock source in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT               1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+  #include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+  #include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..ab1397758
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Inc/stm32g4xx_it.h
@@ -0,0 +1,49 @@
+/**
+  ******************************************************************************
+  * @file    Templates/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_IT_H
+#define STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_IT_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/LICENSE.md b/Projects/STM32G474E-EVAL1/Templates/LICENSE.md
new file mode 100644
index 000000000..9226612ae
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/LICENSE.md
@@ -0,0 +1,27 @@
+Copyright 2021 STMicroelectronics.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+this list of conditions and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its contributors
+may be used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/Project.uvoptx b/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/Project.uvoptx
new file mode 100644
index 000000000..197a8c403
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/Project.uvoptx
@@ -0,0 +1,1241 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>STM32G474E-EVAL1</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>1</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G4xx_512_Dual.FLM))</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G4xx_512.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Doc</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../readme.txt</PathWithFileName>
+      <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>Drivers/BSP/Components</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>../../../../Drivers/BSP/Components/hx8347d/hx8347d.c</PathWithFileName>
+      <FilenameWithoutPath>hx8347d.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\Drivers\BSP\Components\hx8347d\hx8347d_reg.c</PathWithFileName>
+      <FilenameWithoutPath>hx8347d_reg.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
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+</ProjectOpt>
diff --git a/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/Project.uvprojx b/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/Project.uvprojx
new file mode 100644
index 000000000..9c7aa4094
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/Project.uvprojx
@@ -0,0 +1,1000 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>STM32G474E-EVAL1</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>6070000::V6.7::.\ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474RETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.2.0</PackID>
+          <PackURL>http://www.keil.com/pack/</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474RETx$CMSIS\SVD\STM32G4_v0r8.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>STM32G474E-EVAL1\Exe\</OutputDirectory>
+          <OutputName>Project</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>7</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>3</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <useXO>0</useXO>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>STM32G474xx,USE_HAL_DRIVER,USE_STM32G474E_EVAL1</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../Drivers/BSP/STM32G474E-EVAL;../../../../Drivers/BSP/Components/Common</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/Components</GroupName>
+          <Files>
+            <File>
+              <FileName>hx8347d.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/Components/hx8347d/hx8347d.c</FilePath>
+            </File>
+            <File>
+              <FileName>hx8347d_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\Drivers\BSP\Components\hx8347d\hx8347d_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</FilePath>
+            </File>
+            <File>
+              <FileName>mfxstm32l152_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</FilePath>
+            </File>
+            <File>
+              <FileName>mt25ql512abb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/Components/mt25ql512abb/mt25ql512abb.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>1</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+            <File>
+              <FileName>stts751.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/Components/stts751/stts751.c</FilePath>
+            </File>
+            <File>
+              <FileName>stts751_reg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/Components/stts751/stts751_reg.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/BSP/STM32G474E-EVAL</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g474e_eval.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_audio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_audio.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>0</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_bus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_env_sensor.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_env_sensor.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_io.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_lcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_qspi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_qspi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_sd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_smartcard.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_smartcard.c</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>0</IncludeInBuild>
+                  <AlwaysBuild>2</AlwaysBuild>
+                  <GenerateAssemblyFile>2</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>2</AssembleAssemblyFile>
+                  <PublicsOnly>2</PublicsOnly>
+                  <StopOnExitCode>11</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                  <ComprImg>1</ComprImg>
+                </CommonProperty>
+                <FileArmAds>
+                  <Cads>
+                    <interw>2</interw>
+                    <Optim>0</Optim>
+                    <oTime>2</oTime>
+                    <SplitLS>2</SplitLS>
+                    <OneElfS>2</OneElfS>
+                    <Strict>2</Strict>
+                    <EnumInt>2</EnumInt>
+                    <PlainCh>2</PlainCh>
+                    <Ropi>2</Ropi>
+                    <Rwpi>2</Rwpi>
+                    <wLevel>0</wLevel>
+                    <uThumb>2</uThumb>
+                    <uSurpInc>2</uSurpInc>
+                    <uC99>2</uC99>
+                    <useXO>2</useXO>
+                    <v6Lang>0</v6Lang>
+                    <v6LangP>0</v6LangP>
+                    <vShortEn>2</vShortEn>
+                    <vShortWch>2</vShortWch>
+                    <v6Lto>2</v6Lto>
+                    <v6WtE>2</v6WtE>
+                    <v6Rtti>2</v6Rtti>
+                    <VariousControls>
+                      <MiscControls></MiscControls>
+                      <Define></Define>
+                      <Undefine></Undefine>
+                      <IncludePath></IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+            <File>
+              <FileName>stm32g474e_eval_sram.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sram.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_adc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_comp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cordic.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_crc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cryp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_cryp_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dac_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_fdcan.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_fmac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_hrtim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_hrtim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_i2s.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2s.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_irda.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_irda.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_iwdg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_lptim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_msp_template.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_msp_template.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_nand.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nand.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_nor.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nor.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_opamp_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pcd_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_qspi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rng.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_rtc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sai.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sai_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_smartcard.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_smartcard_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_smbus.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_sram.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_timebase_tim_template.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_timebase_tim_template.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_usart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_hal_wwdg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_fmc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_usb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Example/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Example/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.3.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.6.0"/>
+        <targetInfos>
+          <targetInfo name="STM32G474E-EVAL1"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..3d3b84a96
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1735648981">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1735648981" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1735648981" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1735648981." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.751803980" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.559075212" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.82082237" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.2005784606" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32G474RETx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.343574303" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2001558873" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2101819740" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.2052921981" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1025830584" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.985003221" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32G474RETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include | ../../../../../Drivers/BSP/Components/Common | ../../../../../Drivers/CMSIS/Include | ../../../../../Drivers/STM32G4xx_HAL_Driver/Inc | ../../Inc | ../../../../../Drivers/BSP/STM32G474E-EVAL || ../ ||  || STM32G474xx | USE_HAL_DRIVER | USE_STM32G474E_EVAL1 ||  ||  ||  ||  || ${workspace_loc:/${ProjName}/STM32G474RETX_FLASH.ld} || true || NonSecure ||  ||  || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.330515992" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
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+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1340595650;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1340595650.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.890295535;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2111416218">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/.project
new file mode 100644
index 000000000..51974c186
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/.project
@@ -0,0 +1,425 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>Templates</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeExampleProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_comp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cordic.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cryp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cryp_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac.c</name>
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+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dac_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c</locationURI>
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+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c</locationURI>
+		</link>
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+			<type>1</type>
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+		</link>
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+		</link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c</locationURI>
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+		</link>
+		<link>
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+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c</locationURI>
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+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_hrtim.c</locationURI>
+		</link>
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+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c</locationURI>
+		</link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2s.c</locationURI>
+		</link>
+		<link>
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+			<type>1</type>
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+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_iwdg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c</locationURI>
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+			<type>1</type>
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+		</link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_msp_template.c</locationURI>
+		</link>
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+		<link>
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+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c</locationURI>
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+		</link>
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+		</link>
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+		<link>
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+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c</locationURI>
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+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_usart_ex.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_wwdg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_fmc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_usb.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/hx8347d.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/mfxstm32l152_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/stts751.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/Components/stts751/stts751.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/Components/stts751_reg.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/Components/stts751/stts751_reg.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_env_sensor.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_env_sensor.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_qspi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_qspi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sram.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sram.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/User/syscalls.c b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/User/sysmem.c b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/Example/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
new file mode 100644
index 000000000..50f2d6cd8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -0,0 +1,204 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474RETx Device from STM32G4 series
+**                      512Kbytes ROM
+**                      32Kbytes CCMSRAM
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  CCMSRAM    (xrw)    : ORIGIN = 0x10000000,   LENGTH = 32K
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  ROM    (rx)    : ORIGIN = 0x08000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "ROM" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >ROM
+
+  /* The program code and other data into "ROM" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >ROM
+
+  /* Constant data into "ROM" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >ROM
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >ROM
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >ROM
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> ROM
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Templates/Src/main.c b/Projects/STM32G474E-EVAL1/Templates/Src/main.c
new file mode 100644
index 000000000..b4ee1b203
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Src/main.c
@@ -0,0 +1,161 @@
+/**
+  ******************************************************************************
+  * @file    Templates/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup Templates
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static void SystemClock_Config(void);
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Main program
+  * @param  None
+  * @retval None
+  */
+int main(void)
+{
+
+  /* STM32G4xx HAL library initialization:
+       - Configure the Flash prefetch, Flash preread and Buffer caches
+       - Systick timer is configured by default as source of time base, but user
+             can eventually implement his proper time base source (a general purpose
+             timer for example or other time source), keeping in mind that Time base
+             duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+             handled in milliseconds basis.
+       - Low Level Initialization
+     */
+  HAL_Init();
+
+  /* Configure the System clock to have a frequency of 170 MHz */
+  SystemClock_Config();
+
+
+  /* Add your application code here
+     */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follow :
+  *            System Clock source            = PLL (HSI)
+  *            SYSCLK(Hz)                     = 170000000
+  *            HCLK(Hz)                       = 170000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 1
+  *            APB2 Prescaler                 = 1
+  *            HSI Frequency(Hz)              = 16000000
+  *            PLL_M                          = 4
+  *            PLL_N                          = 85
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 2
+  *            PLL_R                          = 2
+  *            Flash Latency(WS)              = 8
+  * @param  None
+  * @retval None
+  */
+static void SystemClock_Config(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+  /* Enable voltage range 1 boost mode for frequency above 150 Mhz */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+  __HAL_RCC_PWR_CLK_DISABLE();
+
+  /* Activate PLL with HSI as source */
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM            = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN            = 85;
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ            = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR            = RCC_PLLR_DIV2;
+  if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    /* Initialization Error */
+    while(1);
+  }
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+     clocks dividers */
+  RCC_ClkInitStruct.ClockType           = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \
+                                           RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource        = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider       = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider      = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider      = RCC_HCLK_DIV1;
+  if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK)
+  {
+    /* Initialization Error */
+    while(1);
+  }
+}
+
+#ifdef  USE_FULL_ASSERT
+
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+}
+#endif
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Templates/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..e4b5d3c5c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,72 @@
+/**
+  ******************************************************************************
+  * @file    Templates/Src/stm32g4xx_hal_msp.c
+  * @author  MCD Application Team
+  * @brief   HAL MSP module.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/** @addtogroup STM32G4xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup HAL_MSP
+  * @brief HAL MSP module.
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup HAL_MSP_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Initializes the Global MSP.
+  * @param  None
+  * @retval None
+  */
+void HAL_MspInit(void)
+{
+}
+
+/**
+  * @brief  DeInitializes the Global MSP.
+  * @param  None
+  * @retval None
+  */
+void HAL_MspDeInit(void)
+{
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Templates/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..b37344a06
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Src/stm32g4xx_it.c
@@ -0,0 +1,168 @@
+/**
+  ******************************************************************************
+  * @file    Templates/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup Templates
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/******************************************************************************/
+/*            Cortex-M4 Processor Exceptions Handlers                         */
+/******************************************************************************/
+
+/**
+  * @brief   This function handles NMI exception.
+  * @param  None
+  * @retval None
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Hard Fault exception.
+  * @param  None
+  * @retval None
+  */
+void HardFault_Handler(void)
+{
+  /* Go to infinite loop when Hard Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Memory Manage exception.
+  * @param  None
+  * @retval None
+  */
+void MemManage_Handler(void)
+{
+  /* Go to infinite loop when Memory Manage exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Bus Fault exception.
+  * @param  None
+  * @retval None
+  */
+void BusFault_Handler(void)
+{
+  /* Go to infinite loop when Bus Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Usage Fault exception.
+  * @param  None
+  * @retval None
+  */
+void UsageFault_Handler(void)
+{
+  /* Go to infinite loop when Usage Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles SVCall exception.
+  * @param  None
+  * @retval None
+  */
+void SVC_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Debug Monitor exception.
+  * @param  None
+  * @retval None
+  */
+void DebugMon_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles PendSVC exception.
+  * @param  None
+  * @retval None
+  */
+void PendSV_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles SysTick Handler.
+  * @param  None
+  * @retval None
+  */
+void SysTick_Handler(void)
+{
+  HAL_IncTick();
+}
+
+/******************************************************************************/
+/*                 STM32G4xx Peripherals Interrupt Handlers                   */
+/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
+/*  available peripheral interrupt handler's name please refer to the startup */
+/*  file (startup_stm32g4xxxx.s).                                             */
+/******************************************************************************/
+
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Templates/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates/readme.txt b/Projects/STM32G474E-EVAL1/Templates/readme.txt
new file mode 100644
index 000000000..0358a6f6c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates/readme.txt
@@ -0,0 +1,68 @@
+/**
+  @page Templates  Description of the Templates example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Templates/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the Templates example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This project provides a reference template based on the STM32Cube HAL API that can be used
+to build any firmware application.
+
+This project is targeted to run on STM32G474QE device on STM32G474E-EVAL1 board from STMicroelectronics.
+
+One workspace is provided for STM32G474E-EVAL1 board.
+This workspace includes the right set of peripherals, linker and startup files.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+      delay (in milliseconds) based on variable incremented in SysTick ISR. This
+      implies that if HAL_Delay() is called from a peripheral ISR process, then
+      the SysTick interrupt must have higher priority (numerically lower)
+      than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+      To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to
+      1 millisecond to have correct HAL operation.
+
+@par Directory contents
+
+  - Templates/Src/main.c                 Main program
+  - Templates/Src/system_stm32g4xx.c     STM32G4xx system clock configuration file
+  - Templates/Src/stm32g4xx_it.c         Interrupt handlers
+  - Templates/Src/stm32g4xx_hal_msp.c    HAL MSP module
+  - Templates/Inc/main.h                 Main program header file
+  - Templates/Inc/stm32g4xx_hal_conf.h   HAL Configuration file
+  - Templates/Inc/stm32g4xx_it.h         Interrupt handlers header file
+
+
+@par Hardware and Software environment
+
+  - This template runs on STM32G474xx devices.
+
+  - This template has been tested with STM32G474E-EVAL1 RevB board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.ewd b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.ewd
new file mode 100644
index 000000000..71b0c9615
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.ewd
@@ -0,0 +1,1419 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>STM32G474E-EVAL1</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>29</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CEndian</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCVariant</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>MemOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MemFile</name>
+                    <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32G4xx.ddf</state>
+                </option>
+                <option>
+                    <name>RunToEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RunToName</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CFpuProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDDFArgumentProducer</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadSuppressDownload</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDownloadVerifyAll</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProductVersion</name>
+                    <state>7.30.1.7765</state>
+                </option>
+                <option>
+                    <name>OCDynDriverList</name>
+                    <state>STLINK_ID</state>
+                </option>
+                <option>
+                    <name>OCLastSavedByProductVersion</name>
+                    <state>8.20.2.14834</state>
+                </option>
+                <option>
+                    <name>UseFlashLoader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CLowLevel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCBE8Slave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>MacFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CDevice</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>FlashLoadersV3</name>
+                    <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32G4x4.board</state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesSuppressCheck3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesPath3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OverrideDefFlashBoard</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesOffset1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesOffset3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCImagesUse1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCImagesUse3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDeviceConfigMacroFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDebuggerExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAllMTBOptions</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreMaster</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticorePort</name>
+                    <state>53461</state>
+                </option>
+                <option>
+                    <name>OCMulticoreWorkspace</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveProject</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveConfiguration</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadExtraImage</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCAttachSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MassEraseBeforeFlashing</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ARMSIM_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCSimDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCSimEnablePSP</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspOverrideConfig</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCSimPspConfigFile</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CADI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCadiMemory</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>Fast Model</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCADILogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCADILogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CMSISDAP_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CMSISDAPResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>CMSISDAPHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>CMSISDAPDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CMSISDAPProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CMSISDAPSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCMSISDAPUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>GDBSERVER_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJTagBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IJET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CatchSFERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetResetList</name>
+                    <version>1</version>
+                    <state>10</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDelay</name>
+                    <state>200</state>
+                </option>
+                <option>
+                    <name>IjetPowerFromProbe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPowerRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetProtocolRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPin</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetCpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>IjetSwoPrescalerList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchUndef</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchData</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchPrefetch</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchMMERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchNOCPERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchCHKERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchSTATERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchBUSERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchINTERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchHARDERR</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSelectedCPUBehaviour</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetPreferETB</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetTraceSettingsList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetTraceSizeList</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>FlashBoardPathSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>JLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>16</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>JLinkSpeed</name>
+                    <state>80</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJLinkHWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>JLinkInitialSpeed</name>
+                    <state>80</state>
+                </option>
+                <option>
+                    <name>CCDoJlinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCScanChainNonARMDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkCommRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
+                </option>
+                <option>
+                    <name>CCJLinkSpeedRadioV2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCUSBDevice</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCRDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkResetList</name>
+                    <version>6</version>
+                    <state>5</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCTcpIpAlt</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTcpIpSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSourceDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkDeviceName</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>LMIFTDI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>2</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>LmiftdiSpeed</name>
+                    <state>500</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>PEMICRO_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJPEMicroShowSettings</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>STLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCSTLinkCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDAPNumber</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkResetList</name>
+                    <version>3</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state>80.0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDebugAccessPortRadio</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>TIFET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVccTypeDefault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CCMSPFetVCCDefault</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetSettlingtime</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioJtagSpeedType</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetConnection</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetUsbComPort</name>
+                    <state>Automatic</state>
+                </option>
+                <option>
+                    <name>CCMSPFetAllowAccessToBSL</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioEraseFlash</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>XDS100_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>6</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCXds100CatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TIPackageOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TIPackage</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>BoardFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCXds100BreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100DoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CpuClockEdit</name>
+                    <state>72.0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockEdit</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCXds100HWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100JtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ProbeList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPort</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+                <loadFlag>1</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.ewp b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.ewp
new file mode 100644
index 000000000..c704eb9d7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.ewp
@@ -0,0 +1,1133 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>STM32G474E-EVAL1</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>3</archiveVersion>
+            <data>
+                <version>30</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>ExePath</name>
+                    <state>STM32G474E-EVAL1\Exe</state>
+                </option>
+                <option>
+                    <name>ObjPath</name>
+                    <state>STM32G474E-EVAL1\Obj</state>
+                </option>
+                <option>
+                    <name>ListPath</name>
+                    <state>STM32G474E-EVAL1\List</state>
+                </option>
+                <option>
+                    <name>GEndianMode</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>Input description</name>
+                    <state>No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.</state>
+                </option>
+                <option>
+                    <name>Output description</name>
+                    <state>No specifier a, A, no specifier n, no float nor long long, with multibyte support.</state>
+                </option>
+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGCoreOrChip</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelect</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>RTDescription</name>
+                    <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+                </option>
+                <option>
+                    <name>OGProductVersion</name>
+                    <state>6.50.1.4445</state>
+                </option>
+                <option>
+                    <name>OGLastSavedByProductVersion</name>
+                    <state>8.20.2.14834</state>
+                </option>
+                <option>
+                    <name>GeneralEnableMisra</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVerbose</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGChipSelectEditMenu</name>
+                    <state>STM32G474QE	ST STM32G474QE</state>
+                </option>
+                <option>
+                    <name>GenLowLevelInterface</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GEndianModeBE</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenStdoutInterface</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules98</name>
+                    <version>0</version>
+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules04</name>
+                    <version>0</version>
+                    <state>011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111</state>
+                </option>
+                <option>
+                    <name>RTConfigPath2</name>
+                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+                </option>
+                <option>
+                    <name>GBECoreSlave</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>OGUseCmsis</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGUseCmsisDspLib</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CoreVariant</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>GFPUDeviceSlave</name>
+                    <state>STM32G474QE	ST STM32G474QE</state>
+                </option>
+                <option>
+                    <name>FPU2</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>NrRegs</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>NEON</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GFPUCoreSlave2</name>
+                    <version>26</version>
+                    <state>39</state>
+                </option>
+                <option>
+                    <name>OGCMSISPackSelectDevice</name>
+                </option>
+                <option>
+                    <name>OgLibHeap</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGLibAdditionalLocale</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGPrintfVariant</name>
+                    <version>0</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>OGPrintfMultibyteSupport</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGScanfVariant</name>
+                    <version>0</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>OGScanfMultibyteSupport</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DSPExtension</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ICCARM</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>34</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CCOptimizationNoSizeConstraints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDefines</name>
+                    <state>STM32G474xx</state>
+                    <state>USE_FULL_LL_DRIVER</state>
+                </option>
+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocComments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagWarning</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagError</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCObjPrefix</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCAllowList</name>
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+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_hrtim.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_i2c.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_lptim.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_lpuart.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_opamp.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_rcc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_rng.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_rtc.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_spi.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_tim.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_ucpd.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_usart.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c</name>
+            </file>
+        </group>
+    </group>
+    <group>
+        <name>Example</name>
+        <group>
+            <name>EWARM</name>
+            <file>
+                <name>$PROJ_DIR$\startup_stm32g474xx.s</name>
+            </file>
+        </group>
+        <group>
+            <name>User</name>
+            <file>
+                <name>$PROJ_DIR$\..\Src\main.c</name>
+            </file>
+            <file>
+                <name>$PROJ_DIR$\..\Src\stm32g4xx_it.c</name>
+            </file>
+        </group>
+    </group>
+</project>
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.eww
new file mode 100644
index 000000000..46d9d41ce
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/Project.eww
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+    <project>
+        <path>$WS_DIR$\Project.ewp</path>
+    </project>
+    <batchBuild />
+</workspace>
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description        : This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+        DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; FLASH
+        DCD     RCC_IRQHandler                    ; RCC
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+        DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+        DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+        DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+        DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; TIM2
+        DCD     TIM3_IRQHandler                   ; TIM3
+        DCD     TIM4_IRQHandler                   ; TIM4
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+        DCD     SPI1_IRQHandler                   ; SPI1
+        DCD     SPI2_IRQHandler                   ; SPI2
+        DCD     USART1_IRQHandler                 ; USART1
+        DCD     USART2_IRQHandler                 ; USART2
+        DCD     USART3_IRQHandler                 ; USART3
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+        DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+        DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+        DCD     ADC3_IRQHandler                   ; ADC3
+        DCD     FMC_IRQHandler                    ; FMC
+        DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+        DCD     TIM5_IRQHandler                   ; TIM5
+        DCD     SPI3_IRQHandler                   ; SPI3
+        DCD     UART4_IRQHandler                  ; UART4
+        DCD     UART5_IRQHandler                  ; UART5
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+        DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; ADC4
+        DCD     ADC5_IRQHandler                   ; ADC5
+        DCD     UCPD1_IRQHandler                  ; UCPD1
+        DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; COMP7
+        DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+        DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+        DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+        DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+        DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+        DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+        DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+        DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+        DCD     CRS_IRQHandler                    ; CRS Interrupt
+        DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+        DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+        DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+        DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     I2C4_EV_IRQHandler                ; I2C4 event
+        DCD     I2C4_ER_IRQHandler                ; I2C4 error
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     0                                 ; Reserved
+        DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+        DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+        DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+        DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+        DCD     RNG_IRQHandler                    ; RNG global interrupt
+        DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+        DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+        DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+        DCD     CORDIC_IRQHandler                 ; CORDIC
+        DCD     FMAC_IRQHandler                   ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+        B RTC_TAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK FDCAN1_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+        B FDCAN1_IT0_IRQHandler
+
+        PUBWEAK FDCAN1_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+        B FDCAN1_IT1_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+        B TIM7_DAC_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK ADC5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+        B ADC5_IRQHandler
+
+        PUBWEAK UCPD1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+        B UCPD1_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK HRTIM1_Master_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+        B HRTIM1_Master_IRQHandler
+
+        PUBWEAK HRTIM1_TIMA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+        B HRTIM1_TIMA_IRQHandler
+
+        PUBWEAK HRTIM1_TIMB_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+        B HRTIM1_TIMB_IRQHandler
+
+        PUBWEAK HRTIM1_TIMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+        B HRTIM1_TIMC_IRQHandler
+
+        PUBWEAK HRTIM1_TIMD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+        B HRTIM1_TIMD_IRQHandler
+
+        PUBWEAK HRTIM1_TIME_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+        B HRTIM1_TIME_IRQHandler
+
+        PUBWEAK HRTIM1_FLT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+        B HRTIM1_FLT_IRQHandler
+
+        PUBWEAK HRTIM1_TIMF_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+        B HRTIM1_TIMF_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+       PUBWEAK TIM20_BRK_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+       B TIM20_BRK_IRQHandler
+
+       PUBWEAK TIM20_UP_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+       B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+        B I2C4_EV_IRQHandler
+
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+        B I2C4_ER_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+
+        PUBWEAK FDCAN2_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+        B FDCAN2_IT0_IRQHandler
+
+        PUBWEAK FDCAN2_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+        B FDCAN2_IT1_IRQHandler
+
+        PUBWEAK FDCAN3_IT0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+        B FDCAN3_IT0_IRQHandler
+
+        PUBWEAK FDCAN3_IT1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+        B FDCAN3_IT1_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK DMAMUX_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+        B DMAMUX_OVR_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK DMA1_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+        B DMA1_Channel8_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMA2_Channel8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+        B DMA2_Channel8_IRQHandler
+
+        PUBWEAK CORDIC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+        B CORDIC_IRQHandler
+
+        PUBWEAK FMAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+        B FMAC_IRQHandler
+
+        END
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..042ac5637
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__      = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__    = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__      = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__= 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__  = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region  = mem:[from __ICFEDIT_region_CCMSRAM_start__   to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/Inc/main.h b/Projects/STM32G474E-EVAL1/Templates_LL/Inc/main.h
new file mode 100644
index 000000000..94e0e17b4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/Inc/main.h
@@ -0,0 +1,107 @@
+/**
+  ******************************************************************************
+  * @file    Templates_LL/Inc/main.h
+  * @author  MCD Application Team
+  * @brief   Header for main.c module
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef MAIN_H
+#define MAIN_H
+
+/* Includes ------------------------------------------------------------------*/
+/* LL drivers common to all LL examples */
+#include "stm32g4xx_ll_bus.h"
+#include "stm32g4xx_ll_rcc.h"
+#include "stm32g4xx_ll_system.h"
+#include "stm32g4xx_ll_utils.h"
+#include "stm32g4xx_ll_pwr.h"
+#include "stm32g4xx_ll_exti.h"
+#include "stm32g4xx_ll_gpio.h"
+/* LL drivers specific to LL examples IPs */
+#include "stm32g4xx_ll_adc.h"
+#include "stm32g4xx_ll_comp.h"
+#include "stm32g4xx_ll_cordic.h"
+#include "stm32g4xx_ll_cortex.h"
+#include "stm32g4xx_ll_crc.h"
+#include "stm32g4xx_ll_crs.h"
+#include "stm32g4xx_ll_dac.h"
+#include "stm32g4xx_ll_dma.h"
+#include "stm32g4xx_ll_fmac.h"
+#include "stm32g4xx_ll_hrtim.h"
+#include "stm32g4xx_ll_i2c.h"
+#include "stm32g4xx_ll_iwdg.h"
+#include "stm32g4xx_ll_lptim.h"
+#include "stm32g4xx_ll_lpuart.h"
+#include "stm32g4xx_ll_opamp.h"
+#include "stm32g4xx_ll_rng.h"
+#include "stm32g4xx_ll_rtc.h"
+#include "stm32g4xx_ll_spi.h"
+#include "stm32g4xx_ll_tim.h"
+#include "stm32g4xx_ll_ucpd.h"
+#include "stm32g4xx_ll_usart.h"
+#include "stm32g4xx_ll_wwdg.h"
+
+#if defined(USE_FULL_ASSERT)
+#include "stm32_assert.h"
+#endif /* USE_FULL_ASSERT */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ==============   BOARD SPECIFIC CONFIGURATION CODE BEGIN    ============== */
+/**
+  * @brief LED1
+  */
+#define LED1_PIN                           LL_GPIO_PIN_9
+#define LED1_GPIO_PORT                     GPIOG
+#define LED1_GPIO_CLK_ENABLE()             LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOG)
+
+/**
+  * @brief LED3
+  */
+#define LED3_PIN                           LL_GPIO_PIN_11
+#define LED3_GPIO_PORT                     GPIOF
+#define LED3_GPIO_CLK_ENABLE()             LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOF)
+
+/**
+  * @brief User push-button
+  */
+#define USER_BUTTON_PIN                         LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_PORT                   GPIOC
+#define USER_BUTTON_GPIO_CLK_ENABLE()           LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC)
+#define USER_BUTTON_EXTI_LINE                   LL_EXTI_LINE_13
+#define USER_BUTTON_EXTI_IRQn                   EXTI15_10_IRQn
+#define USER_BUTTON_EXTI_LINE_ENABLE()          LL_EXTI_EnableIT_0_31(LL_EXTI_LINE_13)
+#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE()  LL_EXTI_EnableFallingTrig_0_31(LL_EXTI_LINE_13)
+#define USER_BUTTON_SYSCFG_SET_EXTI()           do {                                                                     \
+                                                  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);                  \
+                                                  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);  \
+                                                } while(0)
+#define USER_BUTTON_IRQHANDLER                  EXTI15_10_IRQHandler
+/* ==============   BOARD SPECIFIC CONFIGURATION CODE END      ============== */
+
+/**
+  * @brief Toggle periods for various blinking modes
+  */
+#define LED_BLINK_FAST  200
+#define LED_BLINK_SLOW  500
+#define LED_BLINK_ERROR 1000
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+#endif /* MAIN_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/Inc/stm32_assert.h b/Projects/STM32G474E-EVAL1/Templates_LL/Inc/stm32_assert.h
new file mode 100644
index 000000000..51096e491
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/Inc/stm32_assert.h
@@ -0,0 +1,56 @@
+/**
+  ******************************************************************************
+  * @file    stm32_assert.h
+  * @author  MCD Application Team
+  * @brief   STM32 assert template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32_assert.h.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32_ASSERT_H
+#define STM32_ASSERT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Includes ------------------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32_ASSERT_H */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Templates_LL/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..44870c6b1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/Inc/stm32g4xx_it.h
@@ -0,0 +1,49 @@
+/**
+  ******************************************************************************
+  * @file    Templates_LL/Inc/stm32g4xx_it.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_IT_H
+#define STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_IT_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/LICENSE.md b/Projects/STM32G474E-EVAL1/Templates_LL/LICENSE.md
new file mode 100644
index 000000000..9226612ae
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/LICENSE.md
@@ -0,0 +1,27 @@
+Copyright 2021 STMicroelectronics.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+this list of conditions and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its contributors
+may be used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/Project.uvoptx b/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/Project.uvoptx
new file mode 100644
index 000000000..734f98675
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/Project.uvoptx
@@ -0,0 +1,577 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>STM32G474E-EVAL1</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>8000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
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diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/Project.uvprojx b/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/Project.uvprojx
new file mode 100644
index 000000000..7ea1cb271
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/Project.uvprojx
@@ -0,0 +1,570 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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+  <Targets>
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+      <TargetName>STM32G474E-EVAL1</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>6070000::V6.7::.\ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32G474QETx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32G4xx_DFP.1.2.0</PackID>
+          <PackURL>http://www.keil.com/pack/</PackURL>
+          <Cpu>IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32G474QETx$CMSIS\SVD\STM32G474xx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>STM32G474E-EVAL1\Exe\</OutputDirectory>
+          <OutputName>Project</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x80000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>7</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>3</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <useXO>0</useXO>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>STM32G474xx,USE_FULL_LL_DRIVER</Define>
+              <Undefine></Undefine>
+              <IncludePath>../Inc;../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../Drivers/STM32G4xx_HAL_Driver/Inc</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+        <Group>
+          <GroupName>Doc</GroupName>
+          <Files>
+            <File>
+              <FileName>readme.txt</FileName>
+              <FileType>5</FileType>
+              <FilePath>../readme.txt</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32g4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/system_stm32g4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32G4xx_LL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32g4xx_ll_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_comp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_comp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_cordic.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_cordic.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_crc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_crs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crs.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_fmac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_hrtim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_hrtim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_lptim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lptim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_lpuart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_opamp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_opamp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_rng.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rng.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_ucpd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_ucpd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_ll_utils.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Example/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32g474xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32g474xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Example/User</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/main.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32g4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../Src/stm32g4xx_it.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.3.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.6.0"/>
+        <targetInfos>
+          <targetInfo name="STM32G474E-EVAL1"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name          : startup_stm32g474xx.s
+;* @Author             : MCD Application Team
+;* @Brief              : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description        : STM32G474xx Mainstream devices vector table for
+;*                      MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     RTC_TAMP_LSECSS_IRQHandler        ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_IRQHandler                 ; USB Device High Priority
+                DCD     USB_LP_IRQHandler                 ; USB Device Low Priority
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break, Transition error, Index error and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break, Transition error and Index error Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&3 underrun errors
+                DCD     TIM7_DAC_IRQHandler               ; TIM7 and DAC2&4 underrun errors
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     ADC5_IRQHandler                   ; ADC5
+                DCD     UCPD1_IRQHandler                  ; UCPD1
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt
+                DCD     HRTIM1_TIMF_IRQHandler            ; HRTIM Timer F global Interrupt
+                DCD     CRS_IRQHandler                    ; CRS Interrupt
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break, Transition error and Index error
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger, Commutation, Direction change and Index
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     0                                 ; Reserved
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1
+                DCD     FDCAN3_IT0_IRQHandler             ; FDCAN3 interrupt line 0
+                DCD     FDCAN3_IT1_IRQHandler             ; FDCAN3 interrupt line 1
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     LPUART1_IRQHandler                ; LP UART 1 interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     DMAMUX_OVR_IRQHandler             ; DMAMUX overrun global interrupt
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     DMA1_Channel8_IRQHandler          ; DMA1 Channel 8
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     DMA2_Channel8_IRQHandler          ; DMA2 Channel 8
+                DCD     CORDIC_IRQHandler                 ; CORDIC
+                DCD     FMAC_IRQHandler                   ; FMAC
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     RTC_TAMP_LSECSS_IRQHandler        [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     USB_HP_IRQHandler                 [WEAK]
+        EXPORT     USB_LP_IRQHandler                 [WEAK]
+        EXPORT     FDCAN1_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN1_IT1_IRQHandler             [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     USBWakeUp_IRQHandler              [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_DAC_IRQHandler               [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     ADC4_IRQHandler                   [WEAK]
+        EXPORT     ADC5_IRQHandler                   [WEAK]
+        EXPORT     UCPD1_IRQHandler                  [WEAK]
+        EXPORT     COMP1_2_3_IRQHandler              [WEAK]
+        EXPORT     COMP4_5_6_IRQHandler              [WEAK]
+        EXPORT     COMP7_IRQHandler                  [WEAK]
+        EXPORT     HRTIM1_Master_IRQHandler          [WEAK]
+        EXPORT     HRTIM1_TIMA_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMB_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMC_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIMD_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_TIME_IRQHandler            [WEAK]
+        EXPORT     HRTIM1_FLT_IRQHandler             [WEAK]
+        EXPORT     HRTIM1_TIMF_IRQHandler            [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     TIM20_BRK_IRQHandler              [WEAK]
+        EXPORT     TIM20_UP_IRQHandler               [WEAK]
+        EXPORT     TIM20_TRG_COM_IRQHandler          [WEAK]
+        EXPORT     TIM20_CC_IRQHandler               [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     SPI4_IRQHandler                   [WEAK]
+        EXPORT     FDCAN2_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN2_IT1_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT0_IRQHandler             [WEAK]
+        EXPORT     FDCAN3_IT1_IRQHandler             [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     DMAMUX_OVR_IRQHandler             [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     DMA1_Channel8_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel8_IRQHandler          [WEAK]
+        EXPORT     CORDIC_IRQHandler                 [WEAK]
+        EXPORT     FMAC_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..001447d9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.375797116">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.375797116" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.375797116" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.375797116." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1875425003" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1632540854" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1951550867" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.528294758" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.411368742" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.812708756" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="Templates_LL.null.1562143615" name="Templates_LL"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1573789578;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1573789578.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.939506756;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1148809481">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.375797116;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.375797116.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.350230823;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1973037679">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/.project
new file mode 100644
index 000000000..346c893a4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/.project
@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>Templates_LL</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeExampleProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>Doc/readme.txt</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/readme.txt</locationURI>
+		</link>
+		<link>
+			<name>Drivers/CMSIS/system_stm32g4xx.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_adc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_comp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_comp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_cordic.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_cordic.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_crc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_crs.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crs.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_dac.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_exti.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_fmac.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmac.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_hrtim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_hrtim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_i2c.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_lptim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lptim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_lpuart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_opamp.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_opamp.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_rcc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_rng.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rng.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_rtc.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rtc.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_spi.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_tim.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_ucpd.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_ucpd.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_usart.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c</locationURI>
+		</link>
+		<link>
+			<name>Drivers/STM32G4xx_LL_Driver/stm32g4xx_ll_utils.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-4-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/main.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/main.c</locationURI>
+		</link>
+		<link>
+			<name>Example/User/stm32g4xx_it.c</name>
+			<type>1</type>
+			<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32g474xx.s
+  * @author    MCD Application Team
+  * @brief     STM32G474xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+	bl	main
+
+LoopForever:
+    b LoopForever
+
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_PVM_IRQHandler
+	.word	RTC_TAMP_LSECSS_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	FDCAN1_IT0_IRQHandler
+	.word	FDCAN1_IT1_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	LPTIM1_IRQHandler
+	.word	TIM5_IRQHandler
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_DAC_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	ADC5_IRQHandler
+	.word	UCPD1_IRQHandler
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	HRTIM1_Master_IRQHandler
+	.word	HRTIM1_TIMA_IRQHandler
+	.word	HRTIM1_TIMB_IRQHandler
+	.word	HRTIM1_TIMC_IRQHandler
+	.word	HRTIM1_TIMD_IRQHandler
+	.word	HRTIM1_TIME_IRQHandler
+	.word	HRTIM1_FLT_IRQHandler
+	.word	HRTIM1_TIMF_IRQHandler
+	.word	CRS_IRQHandler
+	.word	SAI1_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	I2C4_EV_IRQHandler
+	.word	I2C4_ER_IRQHandler
+	.word	SPI4_IRQHandler
+	.word	0
+	.word	FDCAN2_IT0_IRQHandler
+	.word	FDCAN2_IT1_IRQHandler
+	.word	FDCAN3_IT0_IRQHandler
+	.word	FDCAN3_IT1_IRQHandler
+	.word	RNG_IRQHandler
+	.word	LPUART1_IRQHandler
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	DMAMUX_OVR_IRQHandler
+	.word	QUADSPI_IRQHandler
+	.word	DMA1_Channel8_IRQHandler
+	.word	DMA2_Channel6_IRQHandler
+	.word	DMA2_Channel7_IRQHandler
+	.word	DMA2_Channel8_IRQHandler
+	.word	CORDIC_IRQHandler
+	.word	FMAC_IRQHandler
+
+	.size	g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+	.weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+	.weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+	.weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+	.weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_PVM_IRQHandler
+	.thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+	.weak	RTC_TAMP_LSECSS_IRQHandler
+	.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_IRQHandler
+	.thumb_set EXTI2_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT0_IRQHandler
+	.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN1_IT1_IRQHandler
+	.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	LPTIM1_IRQHandler
+	.thumb_set LPTIM1_IRQHandler,Default_Handler
+
+	.weak	TIM5_IRQHandler
+	.thumb_set TIM5_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_DAC_IRQHandler
+	.thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler
+
+	.weak	ADC5_IRQHandler
+	.thumb_set ADC5_IRQHandler,Default_Handler
+
+	.weak	UCPD1_IRQHandler
+	.thumb_set UCPD1_IRQHandler,Default_Handler
+
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_Master_IRQHandler
+	.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMA_IRQHandler
+	.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMB_IRQHandler
+	.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMC_IRQHandler
+	.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMD_IRQHandler
+	.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIME_IRQHandler
+	.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_FLT_IRQHandler
+	.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+	.weak	HRTIM1_TIMF_IRQHandler
+	.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+	.weak	CRS_IRQHandler
+	.thumb_set CRS_IRQHandler,Default_Handler
+
+	.weak	SAI1_IRQHandler
+	.thumb_set SAI1_IRQHandler,Default_Handler
+
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+
+	.weak	I2C4_EV_IRQHandler
+	.thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+	.weak	I2C4_ER_IRQHandler
+	.thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT0_IRQHandler
+	.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN2_IT1_IRQHandler
+	.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT0_IRQHandler
+	.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+	.weak	FDCAN3_IT1_IRQHandler
+	.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+	.weak	RNG_IRQHandler
+	.thumb_set RNG_IRQHandler,Default_Handler
+
+	.weak	LPUART1_IRQHandler
+	.thumb_set LPUART1_IRQHandler,Default_Handler
+
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+	.weak	DMAMUX_OVR_IRQHandler
+	.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+	.weak	QUADSPI_IRQHandler
+	.thumb_set QUADSPI_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel8_IRQHandler
+	.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel6_IRQHandler
+	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel7_IRQHandler
+	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel8_IRQHandler
+	.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+	.weak	CORDIC_IRQHandler
+	.thumb_set CORDIC_IRQHandler,Default_Handler
+
+	.weak	FMAC_IRQHandler
+	.thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/User/syscalls.c b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/User/sysmem.c b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/Example/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..2e6a15f00
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,204 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474QETx Device from STM32G4 series
+**                      512Kbytes ROM
+**                      32Kbytes CCMSRAM
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  CCMSRAM    (xrw)    : ORIGIN = 0x10000000,   LENGTH = 32K
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  ROM    (rx)    : ORIGIN = 0x08000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "ROM" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >ROM
+
+  /* The program code and other data into "ROM" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >ROM
+
+  /* Constant data into "ROM" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >ROM
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >ROM
+  
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >ROM
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+  
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+  
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+    
+  } >RAM AT> ROM
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/Src/main.c b/Projects/STM32G474E-EVAL1/Templates_LL/Src/main.c
new file mode 100644
index 000000000..5e010b01e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/Src/main.c
@@ -0,0 +1,161 @@
+/**
+  ******************************************************************************
+  * @file    Templates_LL/Src/main.c
+  * @author  MCD Application Team
+  * @brief   Main program body through the LL API
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_LL_Examples
+  * @{
+  */
+
+/** @addtogroup Templates_LL
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Main program
+  * @param  None
+  * @retval None
+  */
+int main(void)
+{
+  /* Configure the system clock to 170 MHz */
+  SystemClock_Config();
+
+  /* Add your application code here */
+
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+}
+
+/* ==============   BOARD SPECIFIC CONFIGURATION CODE BEGIN    ============== */
+/**
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follows :
+  *            System Clock source            = PLL (HSI)
+  *            SYSCLK(Hz)                     = 170000000
+  *            HCLK(Hz)                       = 170000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 1
+  *            APB2 Prescaler                 = 1
+  *            HSI Frequency(Hz)              = 16000000
+  *            PLL_M                          = 4
+  *            PLL_N                          = 85
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 2
+  *            PLL_R                          = 2
+  *            Flash Latency(WS)              = 8
+  * @param  None
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  /* Enable voltage range 1 boost mode for frequency above 150 Mhz */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
+  LL_PWR_EnableRange1BoostMode();
+  LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);
+
+  /* Set Flash Latency */
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
+
+  /* HSI already enabled at reset */
+
+  /* Main PLL configuration and activation */
+  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2);
+  LL_RCC_PLL_Enable();
+  while(LL_RCC_PLL_IsReady() != 1)
+  {
+  };
+
+  /* PLL system Output activation */
+  LL_RCC_PLL_EnableDomain_SYS();
+
+  /* Sysclk activation on the main PLL */
+  /* Intermediate AHB prescaler 2 when target frequency clock is higher than 80 MHz */
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
+  {
+  };
+
+  /* Insure 1µs transition state at intermediate medium speed clock based on DWT */
+  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+  DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+  DWT->CYCCNT = 0;
+  while(DWT->CYCCNT < 100);
+
+  /* AHB prescaler 1 */
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+
+  /* Set APB1 & APB2 prescaler*/
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+  LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
+
+  /* Set systick to 1ms in using frequency set to 170MHz */
+  /* This frequency can be calculated through LL RCC macro */
+  /* ex: __LL_RCC_CALC_PLLCLK_FREQ(HSI_VALUE,
+                                  LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2) */
+  LL_Init1msTick(170000000);
+
+  /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
+  LL_SetSystemCoreClock(170000000);
+}
+/* ==============   BOARD SPECIFIC CONFIGURATION CODE END      ============== */
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {
+  }
+}
+#endif
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Templates_LL/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..4384cc9c0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/Src/stm32g4xx_it.c
@@ -0,0 +1,166 @@
+/**
+  ******************************************************************************
+  * @file    Templates_LL/Src/stm32g4xx_it.c
+  * @author  MCD Application Team
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_it.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+  * @{
+  */
+
+/** @addtogroup Templates
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/******************************************************************************/
+/*            Cortex-M4 Processor Exceptions Handlers                         */
+/******************************************************************************/
+
+/**
+  * @brief   This function handles NMI exception.
+  * @param  None
+  * @retval None
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Hard Fault exception.
+  * @param  None
+  * @retval None
+  */
+void HardFault_Handler(void)
+{
+  /* Go to infinite loop when Hard Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Memory Manage exception.
+  * @param  None
+  * @retval None
+  */
+void MemManage_Handler(void)
+{
+  /* Go to infinite loop when Memory Manage exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Bus Fault exception.
+  * @param  None
+  * @retval None
+  */
+void BusFault_Handler(void)
+{
+  /* Go to infinite loop when Bus Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Usage Fault exception.
+  * @param  None
+  * @retval None
+  */
+void UsageFault_Handler(void)
+{
+  /* Go to infinite loop when Usage Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles SVCall exception.
+  * @param  None
+  * @retval None
+  */
+void SVC_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Debug Monitor exception.
+  * @param  None
+  * @retval None
+  */
+void DebugMon_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles PendSVC exception.
+  * @param  None
+  * @retval None
+  */
+void PendSV_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles SysTick Handler.
+  * @param  None
+  * @retval None
+  */
+void SysTick_Handler(void)
+{
+}
+
+/******************************************************************************/
+/*                 STM32G4xx Peripherals Interrupt Handlers                   */
+/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
+/*  available peripheral interrupt handler's name please refer to the startup */
+/*  file (startup_stm32g4xxxx.s).                                             */
+/******************************************************************************/
+
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Templates_LL/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00UL /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Templates_LL/readme.txt b/Projects/STM32G474E-EVAL1/Templates_LL/readme.txt
new file mode 100644
index 000000000..053f2551b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Templates_LL/readme.txt
@@ -0,0 +1,84 @@
+/**
+  @page Templates_LL  Description of the Templates_LL example
+
+  @verbatim
+  ******************************************************************************
+  * @file    Templates_LL/Src/readme.txt
+  * @author  MCD Application Team
+  * @brief   Description of the Templates_LL example.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  @endverbatim
+
+@par Example Description
+
+This projects provides a reference template through the LL API that can be used to build any firmware application.
+
+This project is targeted to run on STM32G474QE device on STM32G474E-EVAL1 board from STMicroelectronics.
+
+This project LL template provides:
+ - Inclusion of all LL drivers (include files in "main.h" and LL sources files in IDE environment, with option "USE_FULL_LL_DRIVER" in IDE environment)
+   Note: If optimization is needed afterwards, user can perform a cleanup by removing unused drivers.
+ - Definition of LEDs and user button (file: main.h)
+ - Clock configuration (file: main.c)
+
+This project LL template does not provide:
+ - Functions to initialize and control LED and user button
+ - Functions to manage IRQ handler of user button
+
+To port a LL example to the targeted board:
+1. Select the LL example to port.
+   To find the board on which LL examples are deployed, refer to LL examples list in "STM32CubeProjectsList.html", table section "Examples_LL"
+   or AN    : STM32Cube firmware examples for STM32G4 Series
+
+2. Replace source files of the LL template by the ones of the LL example, except code specific to board.
+   Note: Code specific to board is specified between tags:
+         /* ==============   BOARD SPECIFIC CONFIGURATION CODE BEGIN    ============== */
+         /* ==============   BOARD SPECIFIC CONFIGURATION CODE END      ============== */
+
+   - Replace file main.h, with updates:
+     - Keep LED and user button definition of the LL template under tags
+
+   - Replace file main.c, with updates:
+     - Keep clock configuration of the LL template: function "SystemClock_Config()"
+     - Depending of LED availability, replace LEDx_PIN by another LEDx (number) available in file main.h
+
+   - Replace file stm32g4xx_it.h
+   - Replace file stm32g4xx_it.c
+
+
+@par Directory contents
+
+  - Templates_LL/Inc/stm32g4xx_it.h          Interrupt handlers header file
+  - Templates_LL/Inc/main.h                  Header for main.c module
+  - Templates_LL/Inc/stm32_assert.h          Template file to include assert_failed function
+  - Templates_LL/Src/stm32g4xx_it.c          Interrupt handlers
+  - Templates_LL/Src/main.c                  Main program
+  - Templates_LL/Src/system_stm32g4xx.c      STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+  - This template runs on STM32G474xx devices.
+
+  - This template has been tested with STM32G474E-EVAL1 RevB board and can be
+    easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Release_Notes.html b/Release_Notes.html
index 6eeee81df..86232c636 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -5,11 +5,14 @@
   <meta name="generator" content="pandoc" />
   <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
   <title>Release Notes for STM32CubeG4 Firmware Package</title>
-  <style type="text/css">
-      code{white-space: pre-wrap;}
-      span.smallcaps{font-variant: small-caps;}
-      span.underline{text-decoration: underline;}
-      div.column{display: inline-block; vertical-align: top; width: 50%;}
+  <style>
+    code{white-space: pre-wrap;}
+    span.smallcaps{font-variant: small-caps;}
+    span.underline{text-decoration: underline;}
+    div.column{display: inline-block; vertical-align: top; width: 50%;}
+    div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
+    ul.task-list{list-style: none;}
+    .display.math{display: block; text-align: center; margin: 0.5rem auto;}
   </style>
   <link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
   <!--[if lt IE 9]>
@@ -50,7 +53,7 @@ <h1 id="purpose">Purpose</h1>
 </ul>
 <p>The STM32Cube firmware solution offers a straightforward API with a modular architecture, making it simple to fine tune custom applications and scalable to fit most requirements.</p>
 <figure>
-<img src="_htmresc/STM32Cube.bmp" alt="STM32Cube" /><figcaption>STM32Cube</figcaption>
+<img src="_htmresc/STM32Cube.bmp" alt="STM32Cube" /><figcaption aria-hidden="true">STM32Cube</figcaption>
 </figure>
 <p>The HAL (Hardware Abstraction Layer) and LL (Low Layers) drivers provided within this package support the <strong>STM32G431xx/41xx</strong>, <strong>STM32G471xx</strong>, <strong>STM32G473xx/83xx</strong> and <strong>STM32G474xx/84xx</strong> lines.</p>
 <p>The HAL and LL drivers provided within this package are compliant with MISRA-C®:2012 guidelines, and have been reviewed with a static analysis tool to eliminate possible run-time errors. Reports are available on demand.</p>
@@ -66,12 +69,430 @@ <h1 id="purpose">Purpose</h1>
 <li><a href="https://www.st.com/resource/en/user_manual/DM00298101.pdf">UM2552</a> : STM32Cube USBPD stack User Manual</li>
 </ul>
 </div>
-<div class="col-sm-12 col-lg-8">
-<h1 id="update-history">Update History</h1>
+<section id="update-history" class="col-sm-12 col-lg-8">
+<h1>Update History</h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section9" checked aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V1.5.2 / 15-November-2023 </label>
+<input type="checkbox" id="collapse-section10" checked aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">V1.6.0 / 05-June-2024 </label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
+<h3 id="maintenance-release">Maintenance release</h3>
+<ul>
+<li>General updates to fix known defects and enhancements implementation.</li>
+<li>Maintenance release of STM32CubeG4 Firmware package supporting new <strong>STM32G414xx</strong> devices.</li>
+<li>General fixes to support GCC11 and GCC12 in all STM32CubeIDE projects.</li>
+<li>Fix printf() API implementation to be compliant with IAR 9.x.</li>
+<li>Upgrade USBPD devices library to use <strong>g4_v5.3.1</strong>.</li>
+<li>Support of the STM32G474E-EVAL<strong>1</strong> board
+<ul>
+<li>Add 64 projects running on STM32G474E-EVAL1 board.</li>
+<li>Same BSP drivers available for STM32G474E-EVAL board.</li>
+</ul></li>
+<li><strong>CMSIS</strong>
+<ul>
+<li>Add support of <strong>STM32G414xx</strong> devices:
+<ul>
+<li>Add new cmsis device stm32g414xx.h file</li>
+<li>Add startup files “startup_stm32g414xx.s” for EWARM , MDK-ARM and GCC toolchains</li>
+<li>Add part numbers list to stm32g4xx.h header file:
+<ul>
+<li>STM32G414xx: STM32G414CB, STM32G414MB, STM32G414RB, STM32G414VB, STM32G414CC, STM32G414MC, STM32G414RC, STM32G414VC Devices</li>
+</ul></li>
+<li>Add EWARM STM32g414xx devices linker files (<strong>Subset flash</strong>) for EWARM toolchain</li>
+</ul></li>
+<li>Update STM32G483xx MDKARM startup file to add missing FDCAN1 IRQ handler in vector table.</li>
+</ul></li>
+<li><strong>HAL/LL Drivers</strong> updates
+<ul>
+<li><p>Add support of <strong>STM32G414xx</strong> devices.</p></li>
+<li><p>General updates to fix known defects and enhancements implementation.</p></li>
+<li><p><strong>HAL DAC</strong> update</p>
+<ul>
+<li>Update HAL_DACEx_SelfCalibrate() API to manage case of calibration factor equal to range maximum value.</li>
+</ul></li>
+<li><p><strong>HAL CORTEX</strong> update</p>
+<ul>
+<li>Update HAL_MPU_ConfigRegion() API to allow the configuration of the MPU registers independently of the value of Enable/Disable field.</li>
+<li>Add new HAL_MPU_EnableRegion() / HAL_MPU_DisableRegion() APIs.</li>
+</ul></li>
+<li><p><strong>HAL QSPI</strong> update</p>
+<ul>
+<li>Clear AR register after CCR to avoid new transfer when address is not needed.</li>
+</ul></li>
+<li><p><strong>HAL I2C</strong> update</p>
+<ul>
+<li>Code quality enhancement MISRA-C 2012 Rule-13.5 within the HAL_I2C_Master_Abort_IT() API:
+<ul>
+<li>Add a temporary variable to get the value to check before comparison.</li>
+</ul></li>
+<li>Add abort memory management to HAL_I2C_Master_Abort_IT() API.</li>
+<li>Move the prefetch process in HAL_I2C_Slave_Transmit() API.</li>
+</ul></li>
+<li><p><strong>HAL SPI</strong> update</p>
+<ul>
+<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers..</li>
+</ul></li>
+<li><p><strong>HAL/LL TIM</strong> update</p>
+<ul>
+<li>Fixed typo in PWM asymmetric mode related constants.</li>
+</ul></li>
+<li><p><strong>HAL UART</strong> update</p>
+<ul>
+<li>Add HAL_UART_RXEVENT_IDLE event notification to user in case of HAL_UARTEx_ReceiveToIdle_DMA() use with Circular DMA, even if occurring just after TC event.</li>
+<li>Align prescaler value used by default in UART_GET_DIV_FACTOR macro with RM.</li>
+<li>Correct wrong comment in HAL_UARTEx_DisableFifoMode() API.</li>
+<li>Ensure UART Rx buffer is not written beyond boundaries in case of RX FIFO reception in Interrupt mode.</li>
+</ul></li>
+<li><p><strong>HAL USART</strong> update</p>
+<ul>
+<li>Align prescaler value used by default in USART_GET_DIV_FACTOR macro with RM.</li>
+<li>Correct wrong comment in HAL_USARTEx_DisableFifoMode() API.</li>
+<li>Improve the visibility of the SPI mode support in HAL USART description.</li>
+</ul></li>
+<li><p><strong>HAL CRYP</strong> update</p>
+<ul>
+<li>Code quality enhancement MISRA-C 2012 Rule-10.4 within HAL_CRYP_IRQHandler() API.</li>
+</ul></li>
+<li><p><strong>HAL FDCAN</strong> update</p>
+<ul>
+<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.</li>
+</ul></li>
+<li><p><strong>LL BUS</strong> update</p>
+<ul>
+<li>Update macro definition LL_AHB2_GRP1_PERIPH_CCM.</li>
+</ul></li>
+<li><p><strong>LL LPUART</strong> update</p>
+<ul>
+<li>Add LL_LPUART_RequestTxDataFlush() API allowing TX FIFO flush request.</li>
+</ul></li>
+<li><p><strong>LL UCPD</strong> update</p>
+<ul>
+<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.</li>
+<li>Fix typo in Doxygen sections.</li>
+</ul></li>
+</ul></li>
+<li><strong>BSP Drivers</strong> updates
+<ul>
+<li>STM32G4xx_Nucleo/ STM32G474E-EVAL/ B-G474E-DPOW1:
+<ul>
+<li>Fix printf() API implementation to be compliant with IAR 9.x.</li>
+</ul></li>
+</ul></li>
+<li><strong>Middleware</strong>
+<ul>
+<li>Upgrade <strong>USB Power Delivery Device </strong> Library to use <strong>g4_v5.3.1</strong>.</li>
+</ul></li>
+<li><strong>Projects</strong>
+<ul>
+<li>Add new projects for STM32G474E-EVAL1 board (64 in total)</li>
+<li>Fix printf() API implementation to be compliant with IAR 9.x.</li>
+</ul></li>
+<li><strong>Utilities</strong> updates
+<ul>
+<li>Upgrade EWARM and MDK-ARM patches to support new STM32G4 part numbers.</li>
+</ul></li>
+<li>For the complete list of changes, please refer to the release notes of each firmware component</li>
+</ul>
+<h2 id="contents">Contents</h2>
+<h3 id="projects">Projects</h3>
+<p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
+<p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
+<table>
+<caption>Projects :</caption>
+<thead>
+<tr class="header">
+<th>Name</th>
+<th style="text-align: left;">Version</th>
+<th style="text-align: left;">Release notes</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>Projects</td>
+<td style="text-align: left;">See Projects Release note for details</td>
+<td style="text-align: left;"><a href="Projects/Release_Notes.html">release notes</a></td>
+</tr>
+</tbody>
+</table>
+<h3 id="components">Components</h3>
+<table>
+<caption>Released Drivers components :</caption>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Name</th>
+<th style="text-align: left;">Version</th>
+<th style="text-align: left;">Release note</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td style="text-align: left;">CMSIS</td>
+<td style="text-align: left;">V5.6.0_cm4</td>
+<td style="text-align: left;"><a href="Drivers/CMSIS/README.md">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;"><strong>STM32G4xx CMSIS Device</strong></td>
+<td style="text-align: left;"><strong>V1.2.4</strong></td>
+<td style="text-align: left;"><a href="Drivers/CMSIS/Device/ST/STM32G4xx/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;"><strong>STM32G4xx HAL Drivers</strong></td>
+<td style="text-align: left;"><strong>V1.2.4</strong></td>
+<td style="text-align: left;"><a href="Drivers/STM32G4xx_HAL_Driver/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;"><strong>BSP STM32G4xx_Nucleo</strong></td>
+<td style="text-align: left;"><strong>V1.0.5</strong></td>
+<td style="text-align: left;"><a href="Drivers/BSP/STM32G4xx_Nucleo/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;"><strong>BSP STM32G474E-EVAL</strong></td>
+<td style="text-align: left;"><strong>V1.1.6</strong></td>
+<td style="text-align: left;"><a href="Drivers/BSP/STM32G474E-EVAL/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;"><strong>BSP B-G474E-DPOW1</strong></td>
+<td style="text-align: left;"><strong>V1.1.5</strong></td>
+<td style="text-align: left;"><a href="Drivers/BSP/B-G474E-DPOW1/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">BSP Adafruit Shield (reference ID 802)</td>
+<td style="text-align: left;">V5.0.1</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Adafruit_Shield/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">BSP Common</td>
+<td style="text-align: left;">V7.0.0</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Components/Common/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">BSP hx8347d</td>
+<td style="text-align: left;">V2.0.0</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Components/hx8347d/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">BSP mfxstm32l152</td>
+<td style="text-align: left;">V3.0.0</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Components/mfxstm32l152/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">BSP mt25ql512abb</td>
+<td style="text-align: left;">V1.0.1</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Components/mt25ql512abb/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">BSP st7735</td>
+<td style="text-align: left;">V2.0.0</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Components/st7735/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">BSP stts751</td>
+<td style="text-align: left;">V1.0.2</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Components/stts751/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">BSP wm8994</td>
+<td style="text-align: left;">V3.0.0</td>
+<td style="text-align: left;"><a href="Drivers/BSP/Components/wm8994/Release_Notes.html">release note</a></td>
+</tr>
+</tbody>
+</table>
+<table>
+<caption>Released Middlewares components :</caption>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Name</th>
+<th style="text-align: left;">Version</th>
+<th style="text-align: left;">Release note</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td style="text-align: left;">STM32 USB Device Library</td>
+<td style="text-align: left;">V2.7.1</td>
+<td style="text-align: left;"><a href="Middlewares/ST/STM32_USB_Device_Library/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">STM32 USB Power Delivery Core Library</td>
+<td style="text-align: left;">v4.3.1</td>
+<td style="text-align: left;"><a href="Middlewares/ST/STM32_USBPD_Library/Core/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;"><strong>STM32 USB Power Delivery Device Library</strong></td>
+<td style="text-align: left;"><strong>g4_v5.3.1</strong></td>
+<td style="text-align: left;"><a href="Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">FatFS</td>
+<td style="text-align: left;">R0.12c</td>
+<td style="text-align: left;"><a href="Middlewares/Third_Party/FatFs/doc/updates.txt">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;"></td>
+<td style="text-align: left;">ST modified 20191011</td>
+<td style="text-align: left;"><a href="Middlewares/Third_Party/FatFs/src/st_readme.txt">release note ST</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">FreeRTOS</td>
+<td style="text-align: left;">V10.3.1</td>
+<td style="text-align: left;"><a href="Middlewares/Third_Party/FreeRTOS/Source/readme.txt">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;"></td>
+<td style="text-align: left;">ST modified 20200831</td>
+<td style="text-align: left;"><a href="Middlewares/Third_Party/FreeRTOS/Source/st_readme.txt">release note ST</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">STM32 OpenBootLoader</td>
+<td style="text-align: left;">V3.0.1</td>
+<td style="text-align: left;"><a href="Middlewares/ST/OpenBootloader/Release_Notes.html">release note</a></td>
+</tr>
+</tbody>
+</table>
+<table>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Name</th>
+<th style="text-align: left;">Version</th>
+<th style="text-align: left;">Release note</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td style="text-align: left;">LCD</td>
+<td style="text-align: left;">V2.0.0</td>
+<td style="text-align: left;"><a href="Utilities/LCD/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">Fonts</td>
+<td style="text-align: left;">V2.0.2</td>
+<td style="text-align: left;"><a href="Utilities/Fonts/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">GUI Interface</td>
+<td style="text-align: left;">GUI_V1.13.0</td>
+<td style="text-align: left;"><a href="Utilities/GUI_INTERFACE/Release_Notes.html">release note</a></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">Tracer Emb</td>
+<td style="text-align: left;">V1.6.0</td>
+<td style="text-align: left;"><a href="Utilities/TRACER_EMB/Release_Notes.html">release note</a></td>
+</tr>
+</tbody>
+</table>
+<p>Note: in the tables above, version <strong>highlighted</strong> have changed since previous release.</p>
+<h2 id="known-limitations">Known Limitations</h2>
+<ul>
+<li>The following STM32CubeIDE project include only Debug configuration :
+<ul>
+<li>STM32G474E-EVAL/Demonstrations/Demo</li>
+</ul></li>
+</ul>
+<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
+<table style="width:99%;">
+<caption>Development Toolchains :</caption>
+<colgroup>
+<col style="width: 91%" />
+<col style="width: 7%" />
+</colgroup>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Name</th>
+<th style="text-align: center;">Version</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td style="text-align: left;">IAR Embedded Workbench for ARM (EWARM) toolchain + ST-LINKV2</td>
+<td style="text-align: center;"><strong>V8.50.9</strong></td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">RealView Microcontroller Development Kit (MDK-ARM) toolchain + ST-LINKV2 - Only template projects are migrated to Arm Compiler 6 with MDK-ARM 5.31 (“AC-like Warnings” mode).</td>
+<td style="text-align: center;"><strong>V5.38</strong></td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">STM32CubeIDE toolchain</td>
+<td style="text-align: center;"><strong>V1.14.0</strong></td>
+</tr>
+</tbody>
+</table>
+<h2 id="supported-devices-and-boards">Supported Devices and boards</h2>
+<table>
+<caption>Supported Devices :</caption>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Name</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td style="text-align: left;">STM32G431xx, STM32G441xx</td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">STM32G471xx</td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">STM32G473xx, STM32G483xx</td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">STM32G414xx, STM32G474xx, STM32G484xx</td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">STM32G491xx, STM32G4A1xx</td>
+</tr>
+</tbody>
+</table>
+<table>
+<caption>Supported Boards :</caption>
+<thead>
+<tr class="header">
+<th style="text-align: left;">Name</th>
+<th style="text-align: left;">Reference</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td style="text-align: left;">NUCLEO-G431KB Nucleo32 kit</td>
+<td style="text-align: left;">MB1430 A-01</td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">NUCLEO-G431RB Nucleo kit</td>
+<td style="text-align: left;">MB1367 C-01</td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">NUCLEO-G474RE Nucleo kit</td>
+<td style="text-align: left;">MB1367 C-01</td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">STM32G474E-EVAL Evaluation Board</td>
+<td style="text-align: left;">MB1397 B-01</td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">STM32G474E-EVAL1 Evaluation Board</td>
+<td style="text-align: left;">MB1397 B-05</td>
+</tr>
+<tr class="even">
+<td style="text-align: left;">B-G474E-DPOW1 Discovery Kit</td>
+<td style="text-align: left;">MB1428 B-01</td>
+</tr>
+<tr class="odd">
+<td style="text-align: left;">NUCLEO-G491RE Nucleo kit</td>
+<td style="text-align: left;">MB1367-G491RE C-04</td>
+</tr>
+</tbody>
+</table>
+<h2 id="backward-compatibility">Backward Compatibility</h2>
+<p>None</p>
+<h2 id="dependencies">Dependencies</h2>
+<p>This software release is compatible with:</p>
+<ul>
+<li>STM32CubeMX V6.10.0</li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V1.5.2 / 15-November-2023 </label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
 <ul>
 <li>General updates to fix known defects and enhancements implementation.</li>
 <li>Update sysmem.c and syscall.c files in all STM32CubeIDE projects to support GCC11.</li>
@@ -324,8 +745,8 @@ <h2 id="patch-release">Patch release</h2>
 </ul></li>
 <li>For the complete list of changes, please refer to the release notes of each firmware component</li>
 </ul>
-<h2 id="contents">Contents</h2>
-<h3 id="projects">Projects</h3>
+<h2 id="contents-1">Contents</h2>
+<h3 id="projects-1">Projects</h3>
 <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 <p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
 <table>
@@ -345,7 +766,7 @@ <h3 id="projects">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h3 id="components">Components</h3>
+<h3 id="components-1">Components</h3>
 <table>
 <caption>Released Drivers components :</caption>
 <thead>
@@ -512,14 +933,14 @@ <h3 id="components">Components</h3>
 </tbody>
 </table>
 <p>Note: in the tables above, version <strong>highlighted</strong> have changed since previous release.</p>
-<h2 id="known-limitations">Known Limitations</h2>
+<h2 id="known-limitations-1">Known Limitations</h2>
 <ul>
 <li>The following STM32CubeIDE project include only Debug configuration :
 <ul>
 <li>STM32G474E-EVAL/Demonstrations/Demo</li>
 </ul></li>
 </ul>
-<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2>
 <table style="width:99%;">
 <caption>Development Toolchains :</caption>
 <colgroup>
@@ -547,7 +968,7 @@ <h2 id="development-toolchains-and-compilers">Development Toolchains and Compile
 </tr>
 </tbody>
 </table>
-<h2 id="supported-devices-and-boards">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2>
 <table>
 <caption>Supported Devices :</caption>
 <thead>
@@ -608,19 +1029,19 @@ <h2 id="supported-devices-and-boards">Supported Devices and boards</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="backward-compatibility">Backward Compatibility</h2>
+<h2 id="backward-compatibility-1">Backward Compatibility</h2>
 <p>None</p>
-<h2 id="dependencies">Dependencies</h2>
+<h2 id="dependencies-1">Dependencies</h2>
 <p>This software release is compatible with:</p>
 <ul>
-<li>STM32CubeMX V6.4.0</li>
+<li>STM32CubeMX V6.10.0</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section8"  aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">v1.5.1 / 17-June-2022 </label>
 <div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
 <h3 id="patch-release-1">Patch release</h3>
 <ul>
 <li><p>Add and upgrade the Digital Power applications provided for the B-G474E-DPOW1 discovery kit, showcasing the control of Buck and Boost DC-DC converters</p>
@@ -645,8 +1066,8 @@ <h3 id="patch-release-1">Patch release</h3>
 </ul></li>
 </ul></li>
 </ul>
-<h2 id="contents-1">Contents</h2>
-<h3 id="projects-1">Projects</h3>
+<h2 id="contents-2">Contents</h2>
+<h3 id="projects-2">Projects</h3>
 <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 <p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
 <table>
@@ -671,12 +1092,12 @@ <h3 id="projects-1">Projects</h3>
 <div class="collapse">
 <input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V1.5.0 / 10-November-2021 </label>
 <div>
-<h2 id="main-changes-2">Main Changes</h2>
-<h3 id="maintenance-release">Maintenance release</h3>
+<h2 id="main-changes-3">Main Changes</h2>
+<h3 id="maintenance-release-1">Maintenance release</h3>
 <ul>
-<li>General updates to fix known defects and enhancements implementation.</li>
+<li><p>General updates to fix known defects and enhancements implementation.</p></li>
 <li><p>All source files: update disclaimer to add reference to the new license agreement.</p></li>
-<li><strong>CMSIS</strong>
+<li><p><strong>CMSIS</strong></p>
 <ul>
 <li>Added new atomic register access macros in stm32g4xx.h file.</li>
 <li>Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.</li>
@@ -684,7 +1105,7 @@ <h3 id="maintenance-release">Maintenance release</h3>
 <li>Fix Doxygen grouping issues.</li>
 <li>Remove extra TIM5 references in the stm32g471xx.h CMSIS file and add support to the TIM20.</li>
 </ul></li>
-<li><strong>HAL</strong>
+<li><p><strong>HAL</strong></p>
 <ul>
 <li>General updates to fix known defects and enhancements implementation.</li>
 <li><strong>HAL/LL ADC</strong> update
@@ -823,11 +1244,11 @@ <h3 id="maintenance-release">Maintenance release</h3>
 <li>Update implementation of “HAL_NAND_Write_Page_16b” and “HAL_NAND_Read_Page_16b” APIs implementation to fix an issue with the page calculation of 8 bits memories.</li>
 </ul></li>
 </ul></li>
-<li><strong>BSP</strong>
+<li><p><strong>BSP</strong></p>
 <ul>
 <li>Add License.md file required for GitHub publication</li>
 </ul></li>
-<li><strong>Projects</strong>
+<li><p><strong>Projects</strong></p>
 <ul>
 <li>General updates to fix known defects and enhancements implementation.</li>
 <li>STM32G474E-EVAL Demo
@@ -852,8 +1273,8 @@ <h3 id="maintenance-release">Maintenance release</h3>
 </ul></li>
 <li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
 </ul>
-<h2 id="contents-2">Contents</h2>
-<h3 id="projects-2">Projects</h3>
+<h2 id="contents-3">Contents</h2>
+<h3 id="projects-3">Projects</h3>
 <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 <p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
 <table>
@@ -873,7 +1294,7 @@ <h3 id="projects-2">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h3 id="components-1">Components</h3>
+<h3 id="components-2">Components</h3>
 <table>
 <caption>Released Drivers components :</caption>
 <thead>
@@ -1040,8 +1461,8 @@ <h3 id="components-1">Components</h3>
 </tbody>
 </table>
 <p>Note: in the tables above, version <strong>highlighted</strong> have changed since previous release.</p>
-<h2 id="known-limitations-1">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-2">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2>
 <table style="width:99%;">
 <caption>Development Toolchains :</caption>
 <colgroup>
@@ -1069,7 +1490,7 @@ <h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compi
 </tr>
 </tbody>
 </table>
-<h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2>
 <table>
 <caption>Supported Devices :</caption>
 <thead>
@@ -1130,9 +1551,9 @@ <h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="backward-compatibility-1">Backward Compatibility</h2>
+<h2 id="backward-compatibility-2">Backward Compatibility</h2>
 <p>None</p>
-<h2 id="dependencies-1">Dependencies</h2>
+<h2 id="dependencies-2">Dependencies</h2>
 <p>This software release is compatible with:</p>
 <ul>
 <li>STM32CubeMX V6.4.0</li>
@@ -1142,26 +1563,26 @@ <h2 id="dependencies-1">Dependencies</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V1.4.0 / 27-January-2021 </label>
 <div>
-<h2 id="main-changes-3">Main Changes</h2>
-<h3 id="maintenance-release-1">Maintenance release</h3>
+<h2 id="main-changes-4">Main Changes</h2>
+<h3 id="maintenance-release-2">Maintenance release</h3>
 <ul>
-<li>General updates to fix known defects and enhancements implementation.</li>
-<li>Added new <strong>HAL SMBUS extended driver</strong> to support SMBUS fast Mode Plus.</li>
-<li>Added support of QUADSPI to STM32G471xx devices.</li>
-<li>Upgraded FreeRTOS to use <strong>V10.3.1</strong> ST modified <strong>20200831</strong>.</li>
-<li>Upgraded USB Device Lib to use <strong>V2.7.1</strong>.</li>
-<li>Upgraded STM32 USB Power Delivery Core Library to use <strong>v3.3.0</strong>.</li>
-<li>Upgraded STM32 USB Power Delivery Device Library to use <strong>g4_v5.0.0</strong>.</li>
-<li>Upgraded STM32 OpenBootLoader to use <strong>v3.0.1</strong>.</li>
-<li>Upgraded STM32 GUI Interface to use <strong>GUI_V1.13.0</strong>.</li>
+<li><p>General updates to fix known defects and enhancements implementation.</p></li>
+<li><p>Added new <strong>HAL SMBUS extended driver</strong> to support SMBUS fast Mode Plus.</p></li>
+<li><p>Added support of QUADSPI to STM32G471xx devices.</p></li>
+<li><p>Upgraded FreeRTOS to use <strong>V10.3.1</strong> ST modified <strong>20200831</strong>.</p></li>
+<li><p>Upgraded USB Device Lib to use <strong>V2.7.1</strong>.</p></li>
+<li><p>Upgraded STM32 USB Power Delivery Core Library to use <strong>v3.3.0</strong>.</p></li>
+<li><p>Upgraded STM32 USB Power Delivery Device Library to use <strong>g4_v5.0.0</strong>.</p></li>
+<li><p>Upgraded STM32 OpenBootLoader to use <strong>v3.0.1</strong>.</p></li>
+<li><p>Upgraded STM32 GUI Interface to use <strong>GUI_V1.13.0</strong>.</p></li>
 <li><p>Upgraded STM32 Tracer Emb to use <strong>V1.6.0</strong>.</p></li>
-<li><strong>CMSIS</strong>
+<li><p><strong>CMSIS</strong></p>
 <ul>
 <li>General updates to fix known defects and enhancements implementation.</li>
 <li>Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive: USER_VECT_TAB_ADDRESS.</li>
 <li>Added support of QUADSPI to STM32G471xx devices.</li>
 </ul></li>
-<li><strong>HAL</strong>
+<li><p><strong>HAL</strong></p>
 <ul>
 <li>General updates to fix known defects and enhancements implementation.</li>
 <li>Added new defines for ARM compiler V6:
@@ -1334,7 +1755,7 @@ <h3 id="maintenance-release-1">Maintenance release</h3>
 </ul></li>
 </ul></li>
 </ul></li>
-<li><strong>Middlewares</strong>
+<li><p><strong>Middlewares</strong></p>
 <ul>
 <li>Upgraded FreeRTOS to use <strong>V10.3.1</strong> ST modified <strong>20200831</strong>.</li>
 <li>Upgraded USB Device Lib to use <strong>V2.7.1</strong>.</li>
@@ -1344,7 +1765,7 @@ <h3 id="maintenance-release-1">Maintenance release</h3>
 <li>Upgraded STM32 GUI Interface to use <strong>GUI_V1.13.0</strong>.</li>
 <li>Upgraded STM32 Tracer Emb to use <strong>V1.6.0</strong>.</li>
 </ul></li>
-<li><strong>BSP</strong>
+<li><p><strong>BSP</strong></p>
 <ul>
 <li>Add License.md file required for GitHub publication</li>
 <li>General updates to fix MISRA-C®:2012 warnings.</li>
@@ -1364,7 +1785,7 @@ <h3 id="maintenance-release-1">Maintenance release</h3>
 </ul></li>
 </ul></li>
 </ul></li>
-<li><strong>Projects</strong>
+<li><p><strong>Projects</strong></p>
 <ul>
 <li>General updates to fix known defects and enhancements implementation.</li>
 <li>General updates to be compliant with CubeMx <strong>6.2.0</strong> version.</li>
@@ -1389,8 +1810,8 @@ <h3 id="maintenance-release-1">Maintenance release</h3>
 </ul></li>
 <li><p>For the complete list of changes, please refer to the release notes of each firmware component</p></li>
 </ul>
-<h2 id="contents-3">Contents</h2>
-<h3 id="projects-3">Projects</h3>
+<h2 id="contents-4">Contents</h2>
+<h3 id="projects-4">Projects</h3>
 <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 <p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
 <table>
@@ -1410,7 +1831,7 @@ <h3 id="projects-3">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h3 id="components-2">Components</h3>
+<h3 id="components-3">Components</h3>
 <table>
 <caption>Released Drivers components :</caption>
 <thead>
@@ -1577,14 +1998,14 @@ <h3 id="components-2">Components</h3>
 </tbody>
 </table>
 <p>Note: in the tables above, version <strong>highlighted</strong> have changed since previous release.</p>
-<h2 id="known-limitations-2">Known Limitations</h2>
+<h2 id="known-limitations-3">Known Limitations</h2>
 <ul>
 <li>Demo for STM32G474E-EVAL
 <ul>
 <li>Some warnings may appear while compiling the project if gcc 9 is used.</li>
 </ul></li>
 </ul>
-<h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2>
 <table style="width:99%;">
 <caption>Development Toolchains :</caption>
 <colgroup>
@@ -1612,7 +2033,7 @@ <h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compi
 </tr>
 </tbody>
 </table>
-<h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-3">Supported Devices and boards</h2>
 <table>
 <caption>Supported Devices :</caption>
 <thead>
@@ -1673,9 +2094,9 @@ <h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="backward-compatibility-2">Backward Compatibility</h2>
+<h2 id="backward-compatibility-3">Backward Compatibility</h2>
 <p>None</p>
-<h2 id="dependencies-2">Dependencies</h2>
+<h2 id="dependencies-3">Dependencies</h2>
 <p>This software release is compatible with:</p>
 <ul>
 <li>STM32CubeMX V6.2.0</li>
@@ -1685,8 +2106,8 @@ <h2 id="dependencies-2">Dependencies</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V1.3.0 / 26-June-2020 </label>
 <div>
-<h2 id="main-changes-4">Main Changes</h2>
-<h3 id="maintenance-release-2">Maintenance release</h3>
+<h2 id="main-changes-5">Main Changes</h2>
+<h3 id="maintenance-release-3">Maintenance release</h3>
 <p>Release to support STM32G491xx/4A1xx devices (for more details please refer to HAL release notes).</p>
 <ul>
 <li><strong>CMSIS</strong>
@@ -1701,14 +2122,14 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 </ul></li>
 <li><strong>HAL</strong>
 <ul>
-<li>Add support for STM32G491xx and STM32G4A1 part numbers</li>
+<li><p>Add support for STM32G491xx and STM32G4A1 part numbers</p></li>
 <li><p>General updates to fix known defects and enhancements implementation</p></li>
-<li><strong>HAL/LL GPIO</strong> update
+<li><p><strong>HAL/LL GPIO</strong> update</p>
 <ul>
 <li>Enhancement GPIO_TogglePin API to allow the toggling of many pins</li>
 <li>Update GPIO initialization sequence to avoid unwanted pulse on GPIO Pin’s</li>
 </ul></li>
-<li><strong>HAL/LL HRTIM</strong> update
+<li><p><strong>HAL/LL HRTIM</strong> update</p>
 <ul>
 <li>Constants renaming:
 <ul>
@@ -1722,7 +2143,7 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 <li>Remove unused LL constant LL_HRTIM_RESETTRIG_OTHER5_CMP4 as the definition it corresponds to (HRTIM_RSTR_TIMFCMP4) exists neither in the CMSIS nor in the reference manual.</li>
 </ul></li>
 </ul></li>
-<li><strong>HAL/LL I2S</strong> update
+<li><p><strong>HAL/LL I2S</strong> update</p>
 <ul>
 <li>Update HAL_I2S_DMAStop() API to be more safe
 <ul>
@@ -1734,7 +2155,7 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 <li>Add new ErrorCode define: HAL_I2S_ERROR_BUSY_LINE_RX</li>
 </ul></li>
 </ul></li>
-<li><strong>HAL/LL SPI</strong> update
+<li><p><strong>HAL/LL SPI</strong> update</p>
 <ul>
 <li>Update HAL_SPI_Init() API
 <ul>
@@ -1754,11 +2175,11 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 <li>Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled</li>
 </ul></li>
 </ul></li>
-<li><strong>HAL SAI</strong> update
+<li><p><strong>HAL SAI</strong> update</p>
 <ul>
 <li>Update HAL_SAI_Init() API to correct the formula in case of SPDIF is wrong</li>
 </ul></li>
-<li><strong>HAL/LL ADC</strong> update
+<li><p><strong>HAL/LL ADC</strong> update</p>
 <ul>
 <li>Update Channel &amp; external trigger to support <strong>STM32G491/STM32G4A1</strong> embedded with 3 ADC:
 <ul>
@@ -1767,23 +2188,23 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 </ul></li>
 <li>Update note in ll_adc.h &amp; hal_adc.h to highlight that the ADC with transfers DMA and ADC mode auto delay can work simultaneously.</li>
 </ul></li>
-<li><strong>HAL COMP</strong> update
+<li><p><strong>HAL COMP</strong> update</p>
 <ul>
 <li>Update Blanking sources to support <strong>STM32G491/STM32G4A1</strong> embedded with 4 COMP:
 <ul>
 <li>IS_COMP_BLANKINGSRC_INSTANCE</li>
 </ul></li>
 </ul></li>
-<li><strong>HAL OPAMP</strong> update
+<li><p><strong>HAL OPAMP</strong> update</p>
 <ul>
 <li>Update hal_opamp_ex.c to support <strong>STM32G491/STM32G4A1</strong> embedded with 4 OPAMP (OPAMP1/OPAMP2/OPAMP3/OPAMP6):</li>
 </ul></li>
-<li><strong>HAL FLASH</strong> update
+<li><p><strong>HAL FLASH</strong> update</p>
 <ul>
 <li>Update FLASH Latency comment param to list all supported flash latency values.</li>
 <li>Update FLASH_PAGE_NB to return the right page number(256 pages for devices embedded with 512KB flash size and 64 for devices embedded with 128KB flash size)</li>
 </ul></li>
-<li><strong>HAL/LL RCC</strong> update
+<li><p><strong>HAL/LL RCC</strong> update</p>
 <ul>
 <li>Update Table 1. HCLK clock frequency for STM32G4xx devices to be aligned with reference manual RM0440</li>
 <li>Update peripheral clock to support <strong>STM32G491/STM32G4A1</strong> devices:
@@ -1792,7 +2213,7 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 <li>IS_RCC_PERIPHCLOCK</li>
 </ul></li>
 </ul></li>
-<li><strong>HAL/LL TIM</strong> driver
+<li><p><strong>HAL/LL TIM</strong> driver</p>
 <ul>
 <li>Align HAL/LL TIM driver with latest updates and enhancements</li>
 <li>Add new macros to enable and disable the fast mode when using the one pulse mode to output a waveform with a minimum delay
@@ -1808,7 +2229,7 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 <li>Add new API HAL_TIM_DMABurst_MultiWriteStart() allowing to configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral</li>
 <li>Add new API HAL_TIM_DMABurst_MultiReadStart() allowing to configure the DMA Burst to transfer Data from the TIM peripheral to the memory</li>
 </ul></li>
-<li><strong>HAL/LL UART</strong> driver
+<li><p><strong>HAL/LL UART</strong> driver</p>
 <ul>
 <li>Update UART polling processes to handle efficiently the Lock mechanism
 <ul>
@@ -1817,11 +2238,11 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 <li>Update UART BRR calculation for ROM size gain</li>
 <li>Remove ‘register’ storage class specifier from LL UART driver.</li>
 </ul></li>
-<li><strong>HAL/LL USART</strong> driver
+<li><p><strong>HAL/LL USART</strong> driver</p>
 <ul>
 <li>Remove ‘register’ storage class specifier from LL USART driver.</li>
 </ul></li>
-<li><strong>HAL/LL USB</strong> driver
+<li><p><strong>HAL/LL USB</strong> driver</p>
 <ul>
 <li>Fix USB Bulk transfer double buffer mode</li>
 <li>Remove register keyword from USB defined macros as no more supported by c++ compiler</li>
@@ -1865,8 +2286,8 @@ <h3 id="maintenance-release-2">Maintenance release</h3>
 </ul></li>
 <li>For the complete list of changes, please refer to the release notes of each firmware component</li>
 </ul>
-<h2 id="contents-4">Contents</h2>
-<h3 id="projects-4">Projects</h3>
+<h2 id="contents-5">Contents</h2>
+<h3 id="projects-5">Projects</h3>
 <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 <p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
 <table>
@@ -1886,7 +2307,7 @@ <h3 id="projects-4">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h3 id="components-3">Components</h3>
+<h3 id="components-4">Components</h3>
 <table>
 <caption>Released Drivers components :</caption>
 <thead>
@@ -2053,14 +2474,14 @@ <h3 id="components-3">Components</h3>
 </tbody>
 </table>
 <p>Note: in the tables above, version <strong>highlighted</strong> have changed since previous release.</p>
-<h2 id="known-limitations-3">Known Limitations</h2>
+<h2 id="known-limitations-4">Known Limitations</h2>
 <ul>
 <li>OpenBootloader application for NUCLEO-G491RE
 <ul>
 <li>MDK-ARM and CubeIDE projects are not provided.</li>
 </ul></li>
 </ul>
-<h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compilers</h2>
 <table style="width:99%;">
 <caption>Development Toolchains :</caption>
 <colgroup>
@@ -2088,7 +2509,7 @@ <h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compi
 </tr>
 </tbody>
 </table>
-<h2 id="supported-devices-and-boards-3">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-4">Supported Devices and boards</h2>
 <table>
 <caption>Supported Devices :</caption>
 <thead>
@@ -2149,9 +2570,9 @@ <h2 id="supported-devices-and-boards-3">Supported Devices and boards</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="backward-compatibility-3">Backward Compatibility</h2>
+<h2 id="backward-compatibility-4">Backward Compatibility</h2>
 <p>None</p>
-<h2 id="dependencies-3">Dependencies</h2>
+<h2 id="dependencies-4">Dependencies</h2>
 <p>This software release is compatible with:</p>
 <ul>
 <li>STM32CubeMX V5.6.0</li>
@@ -2161,8 +2582,8 @@ <h2 id="dependencies-3">Dependencies</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true">V1.2.0 / 14-February-2020 </label>
 <div>
-<h2 id="main-changes-5">Main Changes</h2>
-<h3 id="maintenance-release-3">Maintenance release</h3>
+<h2 id="main-changes-6">Main Changes</h2>
+<h3 id="maintenance-release-4">Maintenance release</h3>
 <ul>
 <li>Add support for CubeIDE Toolchain to replace System Workbench for STM32 (SW4STM32)toolchain</li>
 <li>Add new Digital_Power application running on B-G474E-DPOW1 board</li>
@@ -2348,8 +2769,8 @@ <h3 id="maintenance-release-3">Maintenance release</h3>
 </ul></li>
 <li>For the complete list of changes, please refer to the release notes of each firmware component</li>
 </ul>
-<h2 id="contents-5">Contents</h2>
-<h3 id="projects-5">Projects</h3>
+<h2 id="contents-6">Contents</h2>
+<h3 id="projects-6">Projects</h3>
 <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 <p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
 <table>
@@ -2369,7 +2790,7 @@ <h3 id="projects-5">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h3 id="components-4">Components</h3>
+<h3 id="components-5">Components</h3>
 <table>
 <caption>Released Drivers components :</caption>
 <thead>
@@ -2531,8 +2952,8 @@ <h3 id="components-4">Components</h3>
 </tbody>
 </table>
 <p>Note: in the tables above, version <strong>highlighted</strong> have changed since previous release.</p>
-<h2 id="known-limitations-4">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-5">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -2556,7 +2977,7 @@ <h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compi
 </tr>
 </tbody>
 </table>
-<h2 id="supported-devices-and-boards-4">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-5">Supported Devices and boards</h2>
 <table>
 <caption>Supported Devices :</caption>
 <thead>
@@ -2610,9 +3031,9 @@ <h2 id="supported-devices-and-boards-4">Supported Devices and boards</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="backward-compatibility-4">Backward Compatibility</h2>
+<h2 id="backward-compatibility-5">Backward Compatibility</h2>
 <p>None</p>
-<h2 id="dependencies-4">Dependencies</h2>
+<h2 id="dependencies-5">Dependencies</h2>
 <p>This software release is compatible with:</p>
 <ul>
 <li>STM32CubeMX V5.6.0</li>
@@ -2622,14 +3043,14 @@ <h2 id="dependencies-4">Dependencies</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">v1.1.0 / 28-June-2019 </label>
 <div>
-<h2 id="main-changes-6">Main Changes</h2>
-<h3 id="maintenance-release-4">Maintenance release</h3>
+<h2 id="main-changes-7">Main Changes</h2>
+<h3 id="maintenance-release-5">Maintenance release</h3>
 <p>Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware package supporting STM32G431xx/41xx/71xx devices, STM32G473xx/<strong>83xx</strong> devices and STM32G474xx/84xx devices.</p>
 <p>A Discovery kit, B-G474E-DPOW, is introduced in this release to enable demonstration of Buck and Boost in voltage mode, High brightness RGB LED control and USB audio streaming.</p>
 <p>In the STM32CubeG4 MCU Package, examples and applications projects are generated with the STM32CubeMX tool to initialize the system, peripherals and middleware stacks. User can open the provided ioc file in STM32CubeMX to modify the settings, add additional peripherals and/or middleware, to build his final application.</p>
 <p>Demonstrations binaries are no more delivered within the STM32CubeG4 MCU package. They are available for download, in addition to their required media files if any, in a standalone package accessible through each hardware board official webpage. Please refer to the corresponding demonstration binary readme.txt to get webpage for each board.</p>
-<h2 id="contents-6">Contents</h2>
-<h3 id="projects-6">Projects</h3>
+<h2 id="contents-7">Contents</h2>
+<h3 id="projects-7">Projects</h3>
 <p>The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.</p>
 <p>The exhaustive list of projects is provided in this table (<a href="Projects/STM32CubeProjectsList.html">STM32CubeProjectsList.html</a>).</p>
 <table>
@@ -2649,7 +3070,7 @@ <h3 id="projects-6">Projects</h3>
 </tr>
 </tbody>
 </table>
-<h3 id="components-5">Components</h3>
+<h3 id="components-6">Components</h3>
 <table>
 <caption>Released Drivers components :</caption>
 <thead>
@@ -2813,8 +3234,8 @@ <h3 id="components-5">Components</h3>
 </table>
 <p><strong>CPU and Log Utilities</strong> are not more part of STM32CubeG4 Firmware Package (obsolete components)</p>
 <p>Note: in the tables above, version <strong>highlighted</strong> have changed since previous release.</p>
-<h2 id="known-limitations-5">Known Limitations</h2>
-<h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compilers</h2>
+<h2 id="known-limitations-6">Known Limitations</h2>
+<h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -2838,7 +3259,7 @@ <h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compi
 </tr>
 </tbody>
 </table>
-<h2 id="supported-devices-and-boards-5">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-6">Supported Devices and boards</h2>
 <table>
 <caption>Supported Devices :</caption>
 <thead>
@@ -2892,9 +3313,9 @@ <h2 id="supported-devices-and-boards-5">Supported Devices and boards</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="backward-compatibility-5">Backward Compatibility</h2>
+<h2 id="backward-compatibility-6">Backward Compatibility</h2>
 <p>None</p>
-<h2 id="dependencies-5">Dependencies</h2>
+<h2 id="dependencies-6">Dependencies</h2>
 <p>This software release is compatible with:</p>
 <ul>
 <li>STM32CubeMX V5.3.0</li>
@@ -2904,7 +3325,7 @@ <h2 id="dependencies-5">Dependencies</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">v1.0.1 / 29-May-2019 </label>
 <div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
 <h3 id="patch-release-2">Patch release</h3>
 <p>Update of <strong>HRTIM examples</strong> and new release of <strong>STM32G4 patches for Keil IDE</strong>:</p>
 <ul>
@@ -2923,7 +3344,7 @@ <h3 id="patch-release-2">Patch release</h3>
 <li>New Keil.STM32G4xx_DFP.1.1.1.pack : Fix issue when flashing STM32G4xx devices with Keil v5.25</li>
 </ul></li>
 </ul>
-<h2 id="contents-7">Contents</h2>
+<h2 id="contents-8">Contents</h2>
 <table>
 <caption>Projects :</caption>
 <thead>
@@ -2947,11 +3368,11 @@ <h2 id="contents-7">Contents</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">v1.0.0 / 12-April-2019 </label>
 <div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
 <h3 id="first-release">First release</h3>
 <p>First release of STM32CubeG4 (STM32Cube for STM32G4 Series) supporting <strong>STM32G431xx/41xx</strong>, <strong>STM32G471xx</strong>, <strong>STM32G473xx/83xx</strong> and <strong>STM32G474xx/84xx</strong> devices.</p>
 <p>In the STM32CubeG4 MCU Package, most of the examples and applications projects are generated with the STM32CubeMX tool to initialize the system, peripherals and middleware stacks. User can open the provided ioc file in STM32CubeMX to modify the settings, add additional peripherals and/or middleware, to build his final application.</p>
-<h2 id="contents-8">Contents</h2>
+<h2 id="contents-9">Contents</h2>
 <table>
 <caption>Released Drivers components :</caption>
 <thead>
@@ -3136,7 +3557,7 @@ <h2 id="contents-8">Contents</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="known-limitations-6">Known Limitations</h2>
+<h2 id="known-limitations-7">Known Limitations</h2>
 <table>
 <caption>Requirements not met or planned in a forthcoming release :</caption>
 <thead>
@@ -3156,7 +3577,7 @@ <h2 id="known-limitations-6">Known Limitations</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compilers</h2>
+<h2 id="development-toolchains-and-compilers-7">Development Toolchains and Compilers</h2>
 <table>
 <caption>Development Toolchains :</caption>
 <thead>
@@ -3180,7 +3601,7 @@ <h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compi
 </tr>
 </tbody>
 </table>
-<h2 id="supported-devices-and-boards-6">Supported Devices and boards</h2>
+<h2 id="supported-devices-and-boards-7">Supported Devices and boards</h2>
 <table>
 <thead>
 <tr class="header">
@@ -3215,16 +3636,16 @@ <h2 id="supported-devices-and-boards-6">Supported Devices and boards</h2>
 </tr>
 </tbody>
 </table>
-<h2 id="backward-compatibility-6">Backward Compatibility</h2>
+<h2 id="backward-compatibility-7">Backward Compatibility</h2>
 <p>None</p>
-<h2 id="dependencies-6">Dependencies</h2>
+<h2 id="dependencies-7">Dependencies</h2>
 <p>This software release is compatible with:</p>
 <ul>
 <li>STM32CubeMX V5.2.0</li>
 </ul>
 </div>
 </div>
-</div>
+</section>
 </div>
 <footer class="sticky">
 <p>For complete documentation on STM32G4xx, visit: [<a href="http://www.st.com/stm32g4">www.st.com/stm32g4</a>]</p>
diff --git a/Utilities/PC_Software/IDEs_Patches/EWARM/EWARMv8_STM32G4xx_V4.1.zip b/Utilities/PC_Software/IDEs_Patches/EWARM/EWARMv8_STM32G4xx_V4.1.zip
deleted file mode 100644
index 4897a694f..000000000
Binary files a/Utilities/PC_Software/IDEs_Patches/EWARM/EWARMv8_STM32G4xx_V4.1.zip and /dev/null differ
diff --git a/Utilities/PC_Software/IDEs_Patches/EWARM/EWARMv8_STM32G4xx_V4.3.zip b/Utilities/PC_Software/IDEs_Patches/EWARM/EWARMv8_STM32G4xx_V4.3.zip
new file mode 100644
index 000000000..3d0f9989b
Binary files /dev/null and b/Utilities/PC_Software/IDEs_Patches/EWARM/EWARMv8_STM32G4xx_V4.3.zip differ
diff --git a/Utilities/PC_Software/IDEs_Patches/MDK-ARM/Keil.STM32G4xx_DFP.1.2.1.zip b/Utilities/PC_Software/IDEs_Patches/MDK-ARM/Keil.STM32G4xx_DFP.1.2.1.zip
deleted file mode 100644
index 9c7356b5b..000000000
Binary files a/Utilities/PC_Software/IDEs_Patches/MDK-ARM/Keil.STM32G4xx_DFP.1.2.1.zip and /dev/null differ
diff --git a/Utilities/PC_Software/IDEs_Patches/MDK-ARM/Keil.STM32G4xx_DFP.1.5.3.zip b/Utilities/PC_Software/IDEs_Patches/MDK-ARM/Keil.STM32G4xx_DFP.1.5.3.zip
new file mode 100644
index 000000000..c63ddcfb5
Binary files /dev/null and b/Utilities/PC_Software/IDEs_Patches/MDK-ARM/Keil.STM32G4xx_DFP.1.5.3.zip differ
diff --git a/_htmresc/ReleaseNotes.html b/_htmresc/ReleaseNotes.html
index 1e9416348..ad7626f65 100644
--- a/_htmresc/ReleaseNotes.html
+++ b/_htmresc/ReleaseNotes.html
@@ -14,10 +14,18 @@
 
 
 
-    <meta charset="ISO-8859-1"><title>_htmresc\ReleaseNotes.html</title></head><body><font color="blue"><b><u>STM32CubeG4 Firmware Package V1.5.0 / 10-November-2021</u></b></font><br>
+
+
+
+    <meta charset="ISO-8859-1"><title>_htmresc\ReleaseNotes.html</title></head>
+<body><font color="blue"><b><u>STM32CubeG4 Firmware Package V1.6.0 / 05-June-2024</u></b></font><br>
 <h3 id="maintenance-release" style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.2; font-weight: 500; color: rgb(17, 17, 17); font-style: normal; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px;">Maintenance release</h3>
 <ul style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4; font-size: 14px; color: rgb(17, 17, 17); font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px;">
-  <li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">General updates to fix known defects and enhancements implementation.</li></ul><br>
+  <li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">General updates to fix known defects and enhancements implementation.</li>
+  <li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Maintenance release of STM32CubeG4 Firmware package supporting new STM32G414xx devices.</li>
+  <li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Upgrade USBPD devices library to use g4_v5.3.1.</li>
+  <li style="font-family: -apple-system,BlinkMacSystemFont,&quot;Segoe UI&quot;,Roboto,Ubuntu,&quot;Helvetica Neue&quot;,Helvetica,sans-serif; line-height: 1.4;">Support of the STM32G474E-EVAL1 board</li>
+</ul><br>
     <span style="font-family: 'Verdana','sans-serif'; font-size: 10pt; font-weight: bold;" lang="EN-US"><span style="color: rgb(51, 51, 255); text-decoration: underline;"></span></span><font color="blue"><b><u></u></b></font>
     <ul style="margin-bottom: 0in; color: rgb(0, 0, 0); font-family: &quot;Times New Roman&quot;; font-size: medium; font-style: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; margin-top: 0cm;" type="square">
     </ul>
diff --git a/_htmresc/ReleaseNotes_Patch.html b/_htmresc/ReleaseNotes_Patch.html
deleted file mode 100644
index 519c19657..000000000
--- a/_htmresc/ReleaseNotes_Patch.html
+++ /dev/null
@@ -1,5 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
-<html><head></head>
-<body><font color="blue"><b><u>STM32CubeG4 Firmware Package V1.5.2 / 15-December-2023</u></b></font><br>
-<br>
-<b><u>Main Changes</u></b><br><br><ul style="list-style-type: square;"><li style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25;"><p style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25;">General updates to fix known defects and implementation enhancements.</p></li><li style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25;">Update sysmem.c and syscall.c files in all STM32CubeIDE projects to support GCC11.</li><li style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25;"><p style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25;">Upgrade<span>&nbsp;</span><strong style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25; font-size: 1em; font-weight: 700;">USB Power Delivery Core</strong><span>&nbsp;</span>Lib to use<span>&nbsp;</span><strong style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25; font-size: 1em; font-weight: 700;">V4.3.1</strong>.</p></li><li style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25;">Upgrade<span>&nbsp;</span><strong style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25; font-size: 1em; font-weight: 700;">USB Power Delivery Device Library</strong><span>&nbsp;</span>Lib to use<span>&nbsp;</span><strong style="font-family: -apple-system,BlinkMacSystemFont,Helvetica,arial,sans-serif; line-height: 1.25; font-size: 1em; font-weight: 700;">V5.3.0</strong>.</li></ul></body></html>
\ No newline at end of file
diff --git a/package.xml b/package.xml
index c5f42b3fd..8a6b84275 100644
--- a/package.xml
+++ b/package.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="ISO-8859-1" standalone="no"?>
 <Package DBVersion="2.0">
- <PackDescription Release="FW.G4.1.5.0" Patch="FW.G4.1.5.2">
- <Note  Release="ReleaseNotes.html" Patch="ReleaseNotes_Patch.html"/>
+ <PackDescription Release="FW.G4.1.6.0">
+ <Note  Release="ReleaseNotes.html"/>
  </PackDescription>
 </Package>